[PATCH] genirq: cleanup: merge irq_affinity[] into irq_desc[]
[linux-2.6.git] / arch / powerpc / platforms / pseries / xics.c
1 /*
2  * arch/powerpc/platforms/pseries/xics.c
3  *
4  * Copyright 2000 IBM Corporation.
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  */
11 #include <linux/config.h>
12 #include <linux/types.h>
13 #include <linux/threads.h>
14 #include <linux/kernel.h>
15 #include <linux/irq.h>
16 #include <linux/smp.h>
17 #include <linux/interrupt.h>
18 #include <linux/signal.h>
19 #include <linux/init.h>
20 #include <linux/gfp.h>
21 #include <linux/radix-tree.h>
22 #include <linux/cpu.h>
23 #include <asm/firmware.h>
24 #include <asm/prom.h>
25 #include <asm/io.h>
26 #include <asm/pgtable.h>
27 #include <asm/smp.h>
28 #include <asm/rtas.h>
29 #include <asm/hvcall.h>
30 #include <asm/machdep.h>
31 #include <asm/i8259.h>
32
33 #include "xics.h"
34
35 static unsigned int xics_startup(unsigned int irq);
36 static void xics_enable_irq(unsigned int irq);
37 static void xics_disable_irq(unsigned int irq);
38 static void xics_mask_and_ack_irq(unsigned int irq);
39 static void xics_end_irq(unsigned int irq);
40 static void xics_set_affinity(unsigned int irq_nr, cpumask_t cpumask);
41
42 static struct hw_interrupt_type xics_pic = {
43         .typename = " XICS     ",
44         .startup = xics_startup,
45         .enable = xics_enable_irq,
46         .disable = xics_disable_irq,
47         .ack = xics_mask_and_ack_irq,
48         .end = xics_end_irq,
49         .set_affinity = xics_set_affinity
50 };
51
52 /* This is used to map real irq numbers to virtual */
53 static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
54
55 #define XICS_IPI                2
56 #define XICS_IRQ_SPURIOUS       0
57
58 /* Want a priority other than 0.  Various HW issues require this. */
59 #define DEFAULT_PRIORITY        5
60
61 /*
62  * Mark IPIs as higher priority so we can take them inside interrupts that
63  * arent marked SA_INTERRUPT
64  */
65 #define IPI_PRIORITY            4
66
67 struct xics_ipl {
68         union {
69                 u32 word;
70                 u8 bytes[4];
71         } xirr_poll;
72         union {
73                 u32 word;
74                 u8 bytes[4];
75         } xirr;
76         u32 dummy;
77         union {
78                 u32 word;
79                 u8 bytes[4];
80         } qirr;
81 };
82
83 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
84
85 static int xics_irq_8259_cascade = 0;
86 static int xics_irq_8259_cascade_real = 0;
87 static unsigned int default_server = 0xFF;
88 static unsigned int default_distrib_server = 0;
89 static unsigned int interrupt_server_size = 8;
90
91 /*
92  * XICS only has a single IPI, so encode the messages per CPU
93  */
94 struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
95
96 /* RTAS service tokens */
97 static int ibm_get_xive;
98 static int ibm_set_xive;
99 static int ibm_int_on;
100 static int ibm_int_off;
101
102 typedef struct {
103         int (*xirr_info_get)(int cpu);
104         void (*xirr_info_set)(int cpu, int val);
105         void (*cppr_info)(int cpu, u8 val);
106         void (*qirr_info)(int cpu, u8 val);
107 } xics_ops;
108
109
110 /* SMP */
111
112 static int pSeries_xirr_info_get(int n_cpu)
113 {
114         return in_be32(&xics_per_cpu[n_cpu]->xirr.word);
115 }
116
117 static void pSeries_xirr_info_set(int n_cpu, int value)
118 {
119         out_be32(&xics_per_cpu[n_cpu]->xirr.word, value);
120 }
121
122 static void pSeries_cppr_info(int n_cpu, u8 value)
123 {
124         out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value);
125 }
126
127 static void pSeries_qirr_info(int n_cpu, u8 value)
128 {
129         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
130 }
131
132 static xics_ops pSeries_ops = {
133         pSeries_xirr_info_get,
134         pSeries_xirr_info_set,
135         pSeries_cppr_info,
136         pSeries_qirr_info
137 };
138
139 static xics_ops *ops = &pSeries_ops;
140
141
142 /* LPAR */
143
144 static inline long plpar_eoi(unsigned long xirr)
145 {
146         return plpar_hcall_norets(H_EOI, xirr);
147 }
148
149 static inline long plpar_cppr(unsigned long cppr)
150 {
151         return plpar_hcall_norets(H_CPPR, cppr);
152 }
153
154 static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
155 {
156         return plpar_hcall_norets(H_IPI, servernum, mfrr);
157 }
158
159 static inline long plpar_xirr(unsigned long *xirr_ret)
160 {
161         unsigned long dummy;
162         return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy);
163 }
164
165 static int pSeriesLP_xirr_info_get(int n_cpu)
166 {
167         unsigned long lpar_rc;
168         unsigned long return_value;
169
170         lpar_rc = plpar_xirr(&return_value);
171         if (lpar_rc != H_SUCCESS)
172                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
173         return (int)return_value;
174 }
175
176 static void pSeriesLP_xirr_info_set(int n_cpu, int value)
177 {
178         unsigned long lpar_rc;
179         unsigned long val64 = value & 0xffffffff;
180
181         lpar_rc = plpar_eoi(val64);
182         if (lpar_rc != H_SUCCESS)
183                 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
184                       val64);
185 }
186
187 void pSeriesLP_cppr_info(int n_cpu, u8 value)
188 {
189         unsigned long lpar_rc;
190
191         lpar_rc = plpar_cppr(value);
192         if (lpar_rc != H_SUCCESS)
193                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
194 }
195
196 static void pSeriesLP_qirr_info(int n_cpu , u8 value)
197 {
198         unsigned long lpar_rc;
199
200         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
201         if (lpar_rc != H_SUCCESS)
202                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
203 }
204
205 xics_ops pSeriesLP_ops = {
206         pSeriesLP_xirr_info_get,
207         pSeriesLP_xirr_info_set,
208         pSeriesLP_cppr_info,
209         pSeriesLP_qirr_info
210 };
211
212 static unsigned int xics_startup(unsigned int virq)
213 {
214         unsigned int irq;
215
216         irq = irq_offset_down(virq);
217         if (radix_tree_insert(&irq_map, virt_irq_to_real(irq),
218                               &virt_irq_to_real_map[irq]) == -ENOMEM)
219                 printk(KERN_CRIT "Out of memory creating real -> virtual"
220                        " IRQ mapping for irq %u (real 0x%x)\n",
221                        virq, virt_irq_to_real(irq));
222         xics_enable_irq(virq);
223         return 0;       /* return value is ignored */
224 }
225
226 static unsigned int real_irq_to_virt(unsigned int real_irq)
227 {
228         unsigned int *ptr;
229
230         ptr = radix_tree_lookup(&irq_map, real_irq);
231         if (ptr == NULL)
232                 return NO_IRQ;
233         return ptr - virt_irq_to_real_map;
234 }
235
236 #ifdef CONFIG_SMP
237 static int get_irq_server(unsigned int irq)
238 {
239         unsigned int server;
240         /* For the moment only implement delivery to all cpus or one cpu */
241         cpumask_t cpumask = irq_desc[irq].affinity;
242         cpumask_t tmp = CPU_MASK_NONE;
243
244         if (!distribute_irqs)
245                 return default_server;
246
247         if (cpus_equal(cpumask, CPU_MASK_ALL)) {
248                 server = default_distrib_server;
249         } else {
250                 cpus_and(tmp, cpu_online_map, cpumask);
251
252                 if (cpus_empty(tmp))
253                         server = default_distrib_server;
254                 else
255                         server = get_hard_smp_processor_id(first_cpu(tmp));
256         }
257
258         return server;
259
260 }
261 #else
262 static int get_irq_server(unsigned int irq)
263 {
264         return default_server;
265 }
266 #endif
267
268 static void xics_enable_irq(unsigned int virq)
269 {
270         unsigned int irq;
271         int call_status;
272         unsigned int server;
273
274         irq = virt_irq_to_real(irq_offset_down(virq));
275         if (irq == XICS_IPI)
276                 return;
277
278         server = get_irq_server(virq);
279         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
280                                 DEFAULT_PRIORITY);
281         if (call_status != 0) {
282                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive "
283                        "returned %d\n", irq, call_status);
284                 printk("set_xive %x, server %x\n", ibm_set_xive, server);
285                 return;
286         }
287
288         /* Now unmask the interrupt (often a no-op) */
289         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
290         if (call_status != 0) {
291                 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on "
292                        "returned %d\n", irq, call_status);
293                 return;
294         }
295 }
296
297 static void xics_disable_real_irq(unsigned int irq)
298 {
299         int call_status;
300         unsigned int server;
301
302         if (irq == XICS_IPI)
303                 return;
304
305         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
306         if (call_status != 0) {
307                 printk(KERN_ERR "xics_disable_real_irq: irq=%u: "
308                        "ibm_int_off returned %d\n", irq, call_status);
309                 return;
310         }
311
312         server = get_irq_server(irq);
313         /* Have to set XIVE to 0xff to be able to remove a slot */
314         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 0xff);
315         if (call_status != 0) {
316                 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)"
317                        " returned %d\n", irq, call_status);
318                 return;
319         }
320 }
321
322 static void xics_disable_irq(unsigned int virq)
323 {
324         unsigned int irq;
325
326         irq = virt_irq_to_real(irq_offset_down(virq));
327         xics_disable_real_irq(irq);
328 }
329
330 static void xics_end_irq(unsigned int irq)
331 {
332         int cpu = smp_processor_id();
333
334         iosync();
335         ops->xirr_info_set(cpu, ((0xff << 24) |
336                                  (virt_irq_to_real(irq_offset_down(irq)))));
337
338 }
339
340 static void xics_mask_and_ack_irq(unsigned int irq)
341 {
342         int cpu = smp_processor_id();
343
344         if (irq < irq_offset_value()) {
345                 i8259_pic.ack(irq);
346                 iosync();
347                 ops->xirr_info_set(cpu, ((0xff<<24) |
348                                          xics_irq_8259_cascade_real));
349                 iosync();
350         }
351 }
352
353 int xics_get_irq(struct pt_regs *regs)
354 {
355         unsigned int cpu = smp_processor_id();
356         unsigned int vec;
357         int irq;
358
359         vec = ops->xirr_info_get(cpu);
360         /*  (vec >> 24) == old priority */
361         vec &= 0x00ffffff;
362
363         /* for sanity, this had better be < NR_IRQS - 16 */
364         if (vec == xics_irq_8259_cascade_real) {
365                 irq = i8259_irq(regs);
366                 xics_end_irq(irq_offset_up(xics_irq_8259_cascade));
367         } else if (vec == XICS_IRQ_SPURIOUS) {
368                 irq = -1;
369         } else {
370                 irq = real_irq_to_virt(vec);
371                 if (irq == NO_IRQ)
372                         irq = real_irq_to_virt_slowpath(vec);
373                 if (irq == NO_IRQ) {
374                         printk(KERN_ERR "Interrupt %u (real) is invalid,"
375                                " disabling it.\n", vec);
376                         xics_disable_real_irq(vec);
377                 } else
378                         irq = irq_offset_up(irq);
379         }
380         return irq;
381 }
382
383 #ifdef CONFIG_SMP
384
385 static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
386 {
387         int cpu = smp_processor_id();
388
389         ops->qirr_info(cpu, 0xff);
390
391         WARN_ON(cpu_is_offline(cpu));
392
393         while (xics_ipi_message[cpu].value) {
394                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
395                                        &xics_ipi_message[cpu].value)) {
396                         mb();
397                         smp_message_recv(PPC_MSG_CALL_FUNCTION, regs);
398                 }
399                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
400                                        &xics_ipi_message[cpu].value)) {
401                         mb();
402                         smp_message_recv(PPC_MSG_RESCHEDULE, regs);
403                 }
404 #if 0
405                 if (test_and_clear_bit(PPC_MSG_MIGRATE_TASK,
406                                        &xics_ipi_message[cpu].value)) {
407                         mb();
408                         smp_message_recv(PPC_MSG_MIGRATE_TASK, regs);
409                 }
410 #endif
411 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
412                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
413                                        &xics_ipi_message[cpu].value)) {
414                         mb();
415                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK, regs);
416                 }
417 #endif
418         }
419         return IRQ_HANDLED;
420 }
421
422 void xics_cause_IPI(int cpu)
423 {
424         ops->qirr_info(cpu, IPI_PRIORITY);
425 }
426 #endif /* CONFIG_SMP */
427
428 void xics_setup_cpu(void)
429 {
430         int cpu = smp_processor_id();
431
432         ops->cppr_info(cpu, 0xff);
433         iosync();
434
435         /*
436          * Put the calling processor into the GIQ.  This is really only
437          * necessary from a secondary thread as the OF start-cpu interface
438          * performs this function for us on primary threads.
439          *
440          * XXX: undo of teardown on kexec needs this too, as may hotplug
441          */
442         rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
443                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
444 }
445
446 void xics_init_IRQ(void)
447 {
448         int i;
449         unsigned long intr_size = 0;
450         struct device_node *np;
451         uint *ireg, ilen, indx = 0;
452         unsigned long intr_base = 0;
453         struct xics_interrupt_node {
454                 unsigned long addr;
455                 unsigned long size;
456         } intnodes[NR_CPUS];
457
458         ppc64_boot_msg(0x20, "XICS Init");
459
460         ibm_get_xive = rtas_token("ibm,get-xive");
461         ibm_set_xive = rtas_token("ibm,set-xive");
462         ibm_int_on  = rtas_token("ibm,int-on");
463         ibm_int_off = rtas_token("ibm,int-off");
464
465         np = of_find_node_by_type(NULL, "PowerPC-External-Interrupt-Presentation");
466         if (!np)
467                 panic("xics_init_IRQ: can't find interrupt presentation");
468
469 nextnode:
470         ireg = (uint *)get_property(np, "ibm,interrupt-server-ranges", NULL);
471         if (ireg) {
472                 /*
473                  * set node starting index for this node
474                  */
475                 indx = *ireg;
476         }
477
478         ireg = (uint *)get_property(np, "reg", &ilen);
479         if (!ireg)
480                 panic("xics_init_IRQ: can't find interrupt reg property");
481
482         while (ilen) {
483                 intnodes[indx].addr = (unsigned long)*ireg++ << 32;
484                 ilen -= sizeof(uint);
485                 intnodes[indx].addr |= *ireg++;
486                 ilen -= sizeof(uint);
487                 intnodes[indx].size = (unsigned long)*ireg++ << 32;
488                 ilen -= sizeof(uint);
489                 intnodes[indx].size |= *ireg++;
490                 ilen -= sizeof(uint);
491                 indx++;
492                 if (indx >= NR_CPUS) break;
493         }
494
495         np = of_find_node_by_type(np, "PowerPC-External-Interrupt-Presentation");
496         if ((indx < NR_CPUS) && np) goto nextnode;
497
498         /* Find the server numbers for the boot cpu. */
499         for (np = of_find_node_by_type(NULL, "cpu");
500              np;
501              np = of_find_node_by_type(np, "cpu")) {
502                 ireg = (uint *)get_property(np, "reg", &ilen);
503                 if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) {
504                         ireg = (uint *)get_property(np, "ibm,ppc-interrupt-gserver#s",
505                                                     &ilen);
506                         i = ilen / sizeof(int);
507                         if (ireg && i > 0) {
508                                 default_server = ireg[0];
509                                 default_distrib_server = ireg[i-1]; /* take last element */
510                         }
511                         ireg = (uint *)get_property(np,
512                                         "ibm,interrupt-server#-size", NULL);
513                         if (ireg)
514                                 interrupt_server_size = *ireg;
515                         break;
516                 }
517         }
518         of_node_put(np);
519
520         intr_base = intnodes[0].addr;
521         intr_size = intnodes[0].size;
522
523         np = of_find_node_by_type(NULL, "interrupt-controller");
524         if (!np) {
525                 printk(KERN_DEBUG "xics: no ISA interrupt controller\n");
526                 xics_irq_8259_cascade_real = -1;
527                 xics_irq_8259_cascade = -1;
528         } else {
529                 ireg = (uint *) get_property(np, "interrupts", NULL);
530                 if (!ireg)
531                         panic("xics_init_IRQ: can't find ISA interrupts property");
532
533                 xics_irq_8259_cascade_real = *ireg;
534                 xics_irq_8259_cascade
535                         = virt_irq_create_mapping(xics_irq_8259_cascade_real);
536                 i8259_init(0, 0);
537                 of_node_put(np);
538         }
539
540         if (firmware_has_feature(FW_FEATURE_LPAR))
541                 ops = &pSeriesLP_ops;
542         else {
543 #ifdef CONFIG_SMP
544                 for_each_possible_cpu(i) {
545                         int hard_id;
546
547                         /* FIXME: Do this dynamically! --RR */
548                         if (!cpu_present(i))
549                                 continue;
550
551                         hard_id = get_hard_smp_processor_id(i);
552                         xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
553                                                   intnodes[hard_id].size);
554                 }
555 #else
556                 xics_per_cpu[0] = ioremap(intr_base, intr_size);
557 #endif /* CONFIG_SMP */
558         }
559
560         for (i = irq_offset_value(); i < NR_IRQS; ++i)
561                 get_irq_desc(i)->chip = &xics_pic;
562
563         xics_setup_cpu();
564
565         ppc64_boot_msg(0x21, "XICS Done");
566 }
567
568 /*
569  * We cant do this in init_IRQ because we need the memory subsystem up for
570  * request_irq()
571  */
572 static int __init xics_setup_i8259(void)
573 {
574         if (ppc64_interrupt_controller == IC_PPC_XIC &&
575             xics_irq_8259_cascade != -1) {
576                 if (request_irq(irq_offset_up(xics_irq_8259_cascade),
577                                 no_action, 0, "8259 cascade", NULL))
578                         printk(KERN_ERR "xics_setup_i8259: couldn't get 8259 "
579                                         "cascade\n");
580         }
581         return 0;
582 }
583 arch_initcall(xics_setup_i8259);
584
585 #ifdef CONFIG_SMP
586 void xics_request_IPIs(void)
587 {
588         virt_irq_to_real_map[XICS_IPI] = XICS_IPI;
589
590         /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */
591         request_irq(irq_offset_up(XICS_IPI), xics_ipi_action, SA_INTERRUPT,
592                     "IPI", NULL);
593         get_irq_desc(irq_offset_up(XICS_IPI))->status |= IRQ_PER_CPU;
594 }
595 #endif
596
597 static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
598 {
599         unsigned int irq;
600         int status;
601         int xics_status[2];
602         unsigned long newmask;
603         cpumask_t tmp = CPU_MASK_NONE;
604
605         irq = virt_irq_to_real(irq_offset_down(virq));
606         if (irq == XICS_IPI || irq == NO_IRQ)
607                 return;
608
609         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
610
611         if (status) {
612                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive "
613                        "returns %d\n", irq, status);
614                 return;
615         }
616
617         /* For the moment only implement delivery to all cpus or one cpu */
618         if (cpus_equal(cpumask, CPU_MASK_ALL)) {
619                 newmask = default_distrib_server;
620         } else {
621                 cpus_and(tmp, cpu_online_map, cpumask);
622                 if (cpus_empty(tmp))
623                         return;
624                 newmask = get_hard_smp_processor_id(first_cpu(tmp));
625         }
626
627         status = rtas_call(ibm_set_xive, 3, 1, NULL,
628                                 irq, newmask, xics_status[1]);
629
630         if (status) {
631                 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive "
632                        "returns %d\n", irq, status);
633                 return;
634         }
635 }
636
637 void xics_teardown_cpu(int secondary)
638 {
639         int cpu = smp_processor_id();
640
641         ops->cppr_info(cpu, 0x00);
642         iosync();
643
644         /* Clear IPI */
645         ops->qirr_info(cpu, 0xff);
646
647         /*
648          * we need to EOI the IPI if we got here from kexec down IPI
649          *
650          * probably need to check all the other interrupts too
651          * should we be flagging idle loop instead?
652          * or creating some task to be scheduled?
653          */
654         ops->xirr_info_set(cpu, XICS_IPI);
655
656         /*
657          * Some machines need to have at least one cpu in the GIQ,
658          * so leave the master cpu in the group.
659          */
660         if (secondary)
661                 rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
662                         (1UL << interrupt_server_size) - 1 -
663                         default_distrib_server, 0);
664 }
665
666 #ifdef CONFIG_HOTPLUG_CPU
667
668 /* Interrupts are disabled. */
669 void xics_migrate_irqs_away(void)
670 {
671         int status;
672         unsigned int irq, virq, cpu = smp_processor_id();
673
674         /* Reject any interrupt that was queued to us... */
675         ops->cppr_info(cpu, 0);
676         iosync();
677
678         /* remove ourselves from the global interrupt queue */
679         status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
680                 (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
681         WARN_ON(status < 0);
682
683         /* Allow IPIs again... */
684         ops->cppr_info(cpu, DEFAULT_PRIORITY);
685         iosync();
686
687         for_each_irq(virq) {
688                 irq_desc_t *desc;
689                 int xics_status[2];
690                 unsigned long flags;
691
692                 /* We cant set affinity on ISA interrupts */
693                 if (virq < irq_offset_value())
694                         continue;
695
696                 desc = get_irq_desc(virq);
697                 irq = virt_irq_to_real(irq_offset_down(virq));
698
699                 /* We need to get IPIs still. */
700                 if (irq == XICS_IPI || irq == NO_IRQ)
701                         continue;
702
703                 /* We only need to migrate enabled IRQS */
704                 if (desc == NULL || desc->chip == NULL
705                     || desc->action == NULL
706                     || desc->chip->set_affinity == NULL)
707                         continue;
708
709                 spin_lock_irqsave(&desc->lock, flags);
710
711                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
712                 if (status) {
713                         printk(KERN_ERR "migrate_irqs_away: irq=%u "
714                                         "ibm,get-xive returns %d\n",
715                                         virq, status);
716                         goto unlock;
717                 }
718
719                 /*
720                  * We only support delivery to all cpus or to one cpu.
721                  * The irq has to be migrated only in the single cpu
722                  * case.
723                  */
724                 if (xics_status[0] != get_hard_smp_processor_id(cpu))
725                         goto unlock;
726
727                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
728                        virq, cpu);
729
730                 /* Reset affinity to all cpus */
731                 desc->chip->set_affinity(virq, CPU_MASK_ALL);
732                 irq_desc[irq].affinity = CPU_MASK_ALL;
733 unlock:
734                 spin_unlock_irqrestore(&desc->lock, flags);
735         }
736 }
737 #endif