powerpc: Fix typo in pmac_cpufreq_resume
[linux-2.6.git] / arch / powerpc / platforms / powermac / cpufreq_32.c
1 /*
2  *  arch/ppc/platforms/pmac_cpufreq.c
3  *
4  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * TODO: Need a big cleanup here. Basically, we need to have different
12  * cpufreq_driver structures for the different type of HW instead of the
13  * current mess. We also need to better deal with the detection of the
14  * type of machine.
15  *
16  */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/types.h>
21 #include <linux/errno.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/sched.h>
25 #include <linux/adb.h>
26 #include <linux/pmu.h>
27 #include <linux/slab.h>
28 #include <linux/cpufreq.h>
29 #include <linux/init.h>
30 #include <linux/sysdev.h>
31 #include <linux/i2c.h>
32 #include <linux/hardirq.h>
33 #include <asm/prom.h>
34 #include <asm/machdep.h>
35 #include <asm/irq.h>
36 #include <asm/pmac_feature.h>
37 #include <asm/mmu_context.h>
38 #include <asm/sections.h>
39 #include <asm/cputable.h>
40 #include <asm/time.h>
41 #include <asm/system.h>
42 #include <asm/mpic.h>
43 #include <asm/keylargo.h>
44
45 /* WARNING !!! This will cause calibrate_delay() to be called,
46  * but this is an __init function ! So you MUST go edit
47  * init/main.c to make it non-init before enabling DEBUG_FREQ
48  */
49 #undef DEBUG_FREQ
50
51 /*
52  * There is a problem with the core cpufreq code on SMP kernels,
53  * it won't recalculate the Bogomips properly
54  */
55 #ifdef CONFIG_SMP
56 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
57 #endif
58
59 extern void low_choose_7447a_dfs(int dfs);
60 extern void low_choose_750fx_pll(int pll);
61 extern void low_sleep_handler(void);
62
63 /*
64  * Currently, PowerMac cpufreq supports only high & low frequencies
65  * that are set by the firmware
66  */
67 static unsigned int low_freq;
68 static unsigned int hi_freq;
69 static unsigned int cur_freq;
70 static unsigned int sleep_freq;
71
72 /*
73  * Different models uses different mecanisms to switch the frequency
74  */
75 static int (*set_speed_proc)(int low_speed);
76 static unsigned int (*get_speed_proc)(void);
77
78 /*
79  * Some definitions used by the various speedprocs
80  */
81 static u32 voltage_gpio;
82 static u32 frequency_gpio;
83 static u32 slew_done_gpio;
84 static int no_schedule;
85 static int has_cpu_l2lve;
86 static int is_pmu_based;
87
88 /* There are only two frequency states for each processor. Values
89  * are in kHz for the time being.
90  */
91 #define CPUFREQ_HIGH                  0
92 #define CPUFREQ_LOW                   1
93
94 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
95         {CPUFREQ_HIGH,          0},
96         {CPUFREQ_LOW,           0},
97         {0,                     CPUFREQ_TABLE_END},
98 };
99
100 static struct freq_attr* pmac_cpu_freqs_attr[] = {
101         &cpufreq_freq_attr_scaling_available_freqs,
102         NULL,
103 };
104
105 static inline void local_delay(unsigned long ms)
106 {
107         if (no_schedule)
108                 mdelay(ms);
109         else
110                 msleep(ms);
111 }
112
113 #ifdef DEBUG_FREQ
114 static inline void debug_calc_bogomips(void)
115 {
116         /* This will cause a recalc of bogomips and display the
117          * result. We backup/restore the value to avoid affecting the
118          * core cpufreq framework's own calculation.
119          */
120         extern void calibrate_delay(void);
121
122         unsigned long save_lpj = loops_per_jiffy;
123         calibrate_delay();
124         loops_per_jiffy = save_lpj;
125 }
126 #endif /* DEBUG_FREQ */
127
128 /* Switch CPU speed under 750FX CPU control
129  */
130 static int cpu_750fx_cpu_speed(int low_speed)
131 {
132         u32 hid2;
133
134         if (low_speed == 0) {
135                 /* ramping up, set voltage first */
136                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
137                 /* Make sure we sleep for at least 1ms */
138                 local_delay(10);
139
140                 /* tweak L2 for high voltage */
141                 if (has_cpu_l2lve) {
142                         hid2 = mfspr(SPRN_HID2);
143                         hid2 &= ~0x2000;
144                         mtspr(SPRN_HID2, hid2);
145                 }
146         }
147 #ifdef CONFIG_6xx
148         low_choose_750fx_pll(low_speed);
149 #endif
150         if (low_speed == 1) {
151                 /* tweak L2 for low voltage */
152                 if (has_cpu_l2lve) {
153                         hid2 = mfspr(SPRN_HID2);
154                         hid2 |= 0x2000;
155                         mtspr(SPRN_HID2, hid2);
156                 }
157
158                 /* ramping down, set voltage last */
159                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
160                 local_delay(10);
161         }
162
163         return 0;
164 }
165
166 static unsigned int cpu_750fx_get_cpu_speed(void)
167 {
168         if (mfspr(SPRN_HID1) & HID1_PS)
169                 return low_freq;
170         else
171                 return hi_freq;
172 }
173
174 /* Switch CPU speed using DFS */
175 static int dfs_set_cpu_speed(int low_speed)
176 {
177         if (low_speed == 0) {
178                 /* ramping up, set voltage first */
179                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
180                 /* Make sure we sleep for at least 1ms */
181                 local_delay(1);
182         }
183
184         /* set frequency */
185 #ifdef CONFIG_6xx
186         low_choose_7447a_dfs(low_speed);
187 #endif
188         udelay(100);
189
190         if (low_speed == 1) {
191                 /* ramping down, set voltage last */
192                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
193                 local_delay(1);
194         }
195
196         return 0;
197 }
198
199 static unsigned int dfs_get_cpu_speed(void)
200 {
201         if (mfspr(SPRN_HID1) & HID1_DFS)
202                 return low_freq;
203         else
204                 return hi_freq;
205 }
206
207
208 /* Switch CPU speed using slewing GPIOs
209  */
210 static int gpios_set_cpu_speed(int low_speed)
211 {
212         int gpio, timeout = 0;
213
214         /* If ramping up, set voltage first */
215         if (low_speed == 0) {
216                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
217                 /* Delay is way too big but it's ok, we schedule */
218                 local_delay(10);
219         }
220
221         /* Set frequency */
222         gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
223         if (low_speed == ((gpio & 0x01) == 0))
224                 goto skip;
225
226         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
227                           low_speed ? 0x04 : 0x05);
228         udelay(200);
229         do {
230                 if (++timeout > 100)
231                         break;
232                 local_delay(1);
233                 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
234         } while((gpio & 0x02) == 0);
235  skip:
236         /* If ramping down, set voltage last */
237         if (low_speed == 1) {
238                 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
239                 /* Delay is way too big but it's ok, we schedule */
240                 local_delay(10);
241         }
242
243 #ifdef DEBUG_FREQ
244         debug_calc_bogomips();
245 #endif
246
247         return 0;
248 }
249
250 /* Switch CPU speed under PMU control
251  */
252 static int pmu_set_cpu_speed(int low_speed)
253 {
254         struct adb_request req;
255         unsigned long save_l2cr;
256         unsigned long save_l3cr;
257         unsigned int pic_prio;
258         unsigned long flags;
259
260         preempt_disable();
261
262 #ifdef DEBUG_FREQ
263         printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
264 #endif
265         pmu_suspend();
266
267         /* Disable all interrupt sources on openpic */
268         pic_prio = mpic_cpu_get_priority();
269         mpic_cpu_set_priority(0xf);
270
271         /* Make sure the decrementer won't interrupt us */
272         asm volatile("mtdec %0" : : "r" (0x7fffffff));
273         /* Make sure any pending DEC interrupt occuring while we did
274          * the above didn't re-enable the DEC */
275         mb();
276         asm volatile("mtdec %0" : : "r" (0x7fffffff));
277
278         /* We can now disable MSR_EE */
279         local_irq_save(flags);
280
281         /* Giveup the FPU & vec */
282         enable_kernel_fp();
283
284 #ifdef CONFIG_ALTIVEC
285         if (cpu_has_feature(CPU_FTR_ALTIVEC))
286                 enable_kernel_altivec();
287 #endif /* CONFIG_ALTIVEC */
288
289         /* Save & disable L2 and L3 caches */
290         save_l3cr = _get_L3CR();        /* (returns -1 if not available) */
291         save_l2cr = _get_L2CR();        /* (returns -1 if not available) */
292
293         /* Send the new speed command. My assumption is that this command
294          * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
295          */
296         pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
297         while (!req.complete)
298                 pmu_poll();
299
300         /* Prepare the northbridge for the speed transition */
301         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
302
303         /* Call low level code to backup CPU state and recover from
304          * hardware reset
305          */
306         low_sleep_handler();
307
308         /* Restore the northbridge */
309         pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
310
311         /* Restore L2 cache */
312         if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
313                 _set_L2CR(save_l2cr);
314         /* Restore L3 cache */
315         if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
316                 _set_L3CR(save_l3cr);
317
318         /* Restore userland MMU context */
319         set_context(current->active_mm->context, current->active_mm->pgd);
320
321 #ifdef DEBUG_FREQ
322         printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
323 #endif
324
325         /* Restore low level PMU operations */
326         pmu_unlock();
327
328         /* Restore decrementer */
329         wakeup_decrementer();
330
331         /* Restore interrupts */
332         mpic_cpu_set_priority(pic_prio);
333
334         /* Let interrupts flow again ... */
335         local_irq_restore(flags);
336
337 #ifdef DEBUG_FREQ
338         debug_calc_bogomips();
339 #endif
340
341         pmu_resume();
342
343         preempt_enable();
344
345         return 0;
346 }
347
348 static int do_set_cpu_speed(int speed_mode, int notify)
349 {
350         struct cpufreq_freqs freqs;
351         unsigned long l3cr;
352         static unsigned long prev_l3cr;
353
354         freqs.old = cur_freq;
355         freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
356         freqs.cpu = smp_processor_id();
357
358         if (freqs.old == freqs.new)
359                 return 0;
360
361         if (notify)
362                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
363         if (speed_mode == CPUFREQ_LOW &&
364             cpu_has_feature(CPU_FTR_L3CR)) {
365                 l3cr = _get_L3CR();
366                 if (l3cr & L3CR_L3E) {
367                         prev_l3cr = l3cr;
368                         _set_L3CR(0);
369                 }
370         }
371         set_speed_proc(speed_mode == CPUFREQ_LOW);
372         if (speed_mode == CPUFREQ_HIGH &&
373             cpu_has_feature(CPU_FTR_L3CR)) {
374                 l3cr = _get_L3CR();
375                 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
376                         _set_L3CR(prev_l3cr);
377         }
378         if (notify)
379                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
380         cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
381
382         return 0;
383 }
384
385 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
386 {
387         return cur_freq;
388 }
389
390 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
391 {
392         return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
393 }
394
395 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
396                                         unsigned int target_freq,
397                                         unsigned int relation)
398 {
399         unsigned int    newstate = 0;
400         int             rc;
401
402         if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
403                         target_freq, relation, &newstate))
404                 return -EINVAL;
405
406         rc = do_set_cpu_speed(newstate, 1);
407
408         ppc_proc_freq = cur_freq * 1000ul;
409         return rc;
410 }
411
412 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
413 {
414         if (policy->cpu != 0)
415                 return -ENODEV;
416
417         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
418         policy->cpuinfo.transition_latency      = CPUFREQ_ETERNAL;
419         policy->cur = cur_freq;
420
421         cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
422         return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
423 }
424
425 static u32 read_gpio(struct device_node *np)
426 {
427         u32 *reg = (u32 *)get_property(np, "reg", NULL);
428         u32 offset;
429
430         if (reg == NULL)
431                 return 0;
432         /* That works for all keylargos but shall be fixed properly
433          * some day... The problem is that it seems we can't rely
434          * on the "reg" property of the GPIO nodes, they are either
435          * relative to the base of KeyLargo or to the base of the
436          * GPIO space, and the device-tree doesn't help.
437          */
438         offset = *reg;
439         if (offset < KEYLARGO_GPIO_LEVELS0)
440                 offset += KEYLARGO_GPIO_LEVELS0;
441         return offset;
442 }
443
444 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
445 {
446         /* Ok, this could be made a bit smarter, but let's be robust for now. We
447          * always force a speed change to high speed before sleep, to make sure
448          * we have appropriate voltage and/or bus speed for the wakeup process,
449          * and to make sure our loops_per_jiffies are "good enough", that is will
450          * not cause too short delays if we sleep in low speed and wake in high
451          * speed..
452          */
453         no_schedule = 1;
454         sleep_freq = cur_freq;
455         if (cur_freq == low_freq && !is_pmu_based)
456                 do_set_cpu_speed(CPUFREQ_HIGH, 0);
457         return 0;
458 }
459
460 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
461 {
462         /* If we resume, first check if we have a get() function */
463         if (get_speed_proc)
464                 cur_freq = get_speed_proc();
465         else
466                 cur_freq = 0;
467
468         /* We don't, hrm... we don't really know our speed here, best
469          * is that we force a switch to whatever it was, which is
470          * probably high speed due to our suspend() routine
471          */
472         do_set_cpu_speed(sleep_freq == low_freq ?
473                          CPUFREQ_LOW : CPUFREQ_HIGH, 0);
474
475         ppc_proc_freq = cur_freq * 1000ul;
476
477         no_schedule = 0;
478         return 0;
479 }
480
481 static struct cpufreq_driver pmac_cpufreq_driver = {
482         .verify         = pmac_cpufreq_verify,
483         .target         = pmac_cpufreq_target,
484         .get            = pmac_cpufreq_get_speed,
485         .init           = pmac_cpufreq_cpu_init,
486         .suspend        = pmac_cpufreq_suspend,
487         .resume         = pmac_cpufreq_resume,
488         .flags          = CPUFREQ_PM_NO_WARN,
489         .attr           = pmac_cpu_freqs_attr,
490         .name           = "powermac",
491         .owner          = THIS_MODULE,
492 };
493
494
495 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
496 {
497         struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
498                                                                 "voltage-gpio");
499         struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
500                                                                 "frequency-gpio");
501         struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
502                                                                      "slewing-done");
503         u32 *value;
504
505         /*
506          * Check to see if it's GPIO driven or PMU only
507          *
508          * The way we extract the GPIO address is slightly hackish, but it
509          * works well enough for now. We need to abstract the whole GPIO
510          * stuff sooner or later anyway
511          */
512
513         if (volt_gpio_np)
514                 voltage_gpio = read_gpio(volt_gpio_np);
515         if (freq_gpio_np)
516                 frequency_gpio = read_gpio(freq_gpio_np);
517         if (slew_done_gpio_np)
518                 slew_done_gpio = read_gpio(slew_done_gpio_np);
519
520         /* If we use the frequency GPIOs, calculate the min/max speeds based
521          * on the bus frequencies
522          */
523         if (frequency_gpio && slew_done_gpio) {
524                 int lenp, rc;
525                 u32 *freqs, *ratio;
526
527                 freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
528                 lenp /= sizeof(u32);
529                 if (freqs == NULL || lenp != 2) {
530                         printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
531                         return 1;
532                 }
533                 ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
534                 if (ratio == NULL) {
535                         printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
536                         return 1;
537                 }
538
539                 /* Get the min/max bus frequencies */
540                 low_freq = min(freqs[0], freqs[1]);
541                 hi_freq = max(freqs[0], freqs[1]);
542
543                 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
544                  * frequency, it claims it to be around 84Mhz on some models while
545                  * it appears to be approx. 101Mhz on all. Let's hack around here...
546                  * fortunately, we don't need to be too precise
547                  */
548                 if (low_freq < 98000000)
549                         low_freq = 101000000;
550
551                 /* Convert those to CPU core clocks */
552                 low_freq = (low_freq * (*ratio)) / 2000;
553                 hi_freq = (hi_freq * (*ratio)) / 2000;
554
555                 /* Now we get the frequencies, we read the GPIO to see what is out current
556                  * speed
557                  */
558                 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
559                 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
560
561                 set_speed_proc = gpios_set_cpu_speed;
562                 return 1;
563         }
564
565         /* If we use the PMU, look for the min & max frequencies in the
566          * device-tree
567          */
568         value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
569         if (!value)
570                 return 1;
571         low_freq = (*value) / 1000;
572         /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
573          * here */
574         if (low_freq < 100000)
575                 low_freq *= 10;
576
577         value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
578         if (!value)
579                 return 1;
580         hi_freq = (*value) / 1000;
581         set_speed_proc = pmu_set_cpu_speed;
582         is_pmu_based = 1;
583
584         return 0;
585 }
586
587 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
588 {
589         struct device_node *volt_gpio_np;
590
591         if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
592                 return 1;
593
594         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
595         if (volt_gpio_np)
596                 voltage_gpio = read_gpio(volt_gpio_np);
597         if (!voltage_gpio){
598                 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
599                 return 1;
600         }
601
602         /* OF only reports the high frequency */
603         hi_freq = cur_freq;
604         low_freq = cur_freq/2;
605
606         /* Read actual frequency from CPU */
607         cur_freq = dfs_get_cpu_speed();
608         set_speed_proc = dfs_set_cpu_speed;
609         get_speed_proc = dfs_get_cpu_speed;
610
611         return 0;
612 }
613
614 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
615 {
616         struct device_node *volt_gpio_np;
617         u32 pvr, *value;
618
619         if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
620                 return 1;
621
622         hi_freq = cur_freq;
623         value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
624         if (!value)
625                 return 1;
626         low_freq = (*value) / 1000;
627
628         volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
629         if (volt_gpio_np)
630                 voltage_gpio = read_gpio(volt_gpio_np);
631
632         pvr = mfspr(SPRN_PVR);
633         has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
634
635         set_speed_proc = cpu_750fx_cpu_speed;
636         get_speed_proc = cpu_750fx_get_cpu_speed;
637         cur_freq = cpu_750fx_get_cpu_speed();
638
639         return 0;
640 }
641
642 /* Currently, we support the following machines:
643  *
644  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
645  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
646  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
647  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
648  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
649  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
650  *  - Recent MacRISC3 laptops
651  *  - All new machines with 7447A CPUs
652  */
653 static int __init pmac_cpufreq_setup(void)
654 {
655         struct device_node      *cpunode;
656         u32                     *value;
657
658         if (strstr(cmd_line, "nocpufreq"))
659                 return 0;
660
661         /* Assume only one CPU */
662         cpunode = find_type_devices("cpu");
663         if (!cpunode)
664                 goto out;
665
666         /* Get current cpu clock freq */
667         value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
668         if (!value)
669                 goto out;
670         cur_freq = (*value) / 1000;
671
672         /*  Check for 7447A based MacRISC3 */
673         if (machine_is_compatible("MacRISC3") &&
674             get_property(cpunode, "dynamic-power-step", NULL) &&
675             PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
676                 pmac_cpufreq_init_7447A(cpunode);
677         /* Check for other MacRISC3 machines */
678         } else if (machine_is_compatible("PowerBook3,4") ||
679                    machine_is_compatible("PowerBook3,5") ||
680                    machine_is_compatible("MacRISC3")) {
681                 pmac_cpufreq_init_MacRISC3(cpunode);
682         /* Else check for iBook2 500/600 */
683         } else if (machine_is_compatible("PowerBook4,1")) {
684                 hi_freq = cur_freq;
685                 low_freq = 400000;
686                 set_speed_proc = pmu_set_cpu_speed;
687                 is_pmu_based = 1;
688         }
689         /* Else check for TiPb 550 */
690         else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
691                 hi_freq = cur_freq;
692                 low_freq = 500000;
693                 set_speed_proc = pmu_set_cpu_speed;
694                 is_pmu_based = 1;
695         }
696         /* Else check for TiPb 400 & 500 */
697         else if (machine_is_compatible("PowerBook3,2")) {
698                 /* We only know about the 400 MHz and the 500Mhz model
699                  * they both have 300 MHz as low frequency
700                  */
701                 if (cur_freq < 350000 || cur_freq > 550000)
702                         goto out;
703                 hi_freq = cur_freq;
704                 low_freq = 300000;
705                 set_speed_proc = pmu_set_cpu_speed;
706                 is_pmu_based = 1;
707         }
708         /* Else check for 750FX */
709         else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
710                 pmac_cpufreq_init_750FX(cpunode);
711 out:
712         if (set_speed_proc == NULL)
713                 return -ENODEV;
714
715         pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
716         pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
717         ppc_proc_freq = cur_freq * 1000ul;
718
719         printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
720         printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
721                low_freq/1000, hi_freq/1000, cur_freq/1000);
722
723         return cpufreq_register_driver(&pmac_cpufreq_driver);
724 }
725
726 module_init(pmac_cpufreq_setup);
727