[PATCH] sched: disable preempt in idle tasks
[linux-2.6.git] / arch / powerpc / platforms / iseries / setup.c
1 /*
2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4  *
5  *    Description:
6  *      Architecture- / platform-specific boot-time initialization code for
7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9  *      <dan@net4x.com>.
10  *
11  *      This program is free software; you can redistribute it and/or
12  *      modify it under the terms of the GNU General Public License
13  *      as published by the Free Software Foundation; either version
14  *      2 of the License, or (at your option) any later version.
15  */
16
17 #undef DEBUG
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
31
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
34 #include <asm/page.h>
35 #include <asm/mmu.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42
43 #include <asm/time.h>
44 #include <asm/paca.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iseries/it_lp_queue.h>
52 #include <asm/iseries/mf.h>
53 #include <asm/iseries/hv_lp_event.h>
54 #include <asm/iseries/lpar_map.h>
55
56 #include "naca.h"
57 #include "setup.h"
58 #include "irq.h"
59 #include "vpd_areas.h"
60 #include "processor_vpd.h"
61 #include "main_store.h"
62 #include "call_sm.h"
63 #include "call_hpt.h"
64
65 extern void hvlog(char *fmt, ...);
66
67 #ifdef DEBUG
68 #define DBG(fmt...) hvlog(fmt)
69 #else
70 #define DBG(fmt...)
71 #endif
72
73 /* Function Prototypes */
74 static void build_iSeries_Memory_Map(void);
75 static void iseries_shared_idle(void);
76 static void iseries_dedicated_idle(void);
77 #ifdef CONFIG_PCI
78 extern void iSeries_pci_final_fixup(void);
79 #else
80 static void iSeries_pci_final_fixup(void) { }
81 #endif
82
83 /* Global Variables */
84 int piranha_simulator;
85
86 extern int rd_size;             /* Defined in drivers/block/rd.c */
87 extern unsigned long klimit;
88 extern unsigned long embedded_sysmap_start;
89 extern unsigned long embedded_sysmap_end;
90
91 extern unsigned long iSeries_recal_tb;
92 extern unsigned long iSeries_recal_titan;
93
94 static int mf_initialized;
95
96 static unsigned long cmd_mem_limit;
97
98 struct MemoryBlock {
99         unsigned long absStart;
100         unsigned long absEnd;
101         unsigned long logicalStart;
102         unsigned long logicalEnd;
103 };
104
105 /*
106  * Process the main store vpd to determine where the holes in memory are
107  * and return the number of physical blocks and fill in the array of
108  * block data.
109  */
110 static unsigned long iSeries_process_Condor_mainstore_vpd(
111                 struct MemoryBlock *mb_array, unsigned long max_entries)
112 {
113         unsigned long holeFirstChunk, holeSizeChunks;
114         unsigned long numMemoryBlocks = 1;
115         struct IoHriMainStoreSegment4 *msVpd =
116                 (struct IoHriMainStoreSegment4 *)xMsVpd;
117         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
118         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
119         unsigned long holeSize = holeEnd - holeStart;
120
121         printk("Mainstore_VPD: Condor\n");
122         /*
123          * Determine if absolute memory has any
124          * holes so that we can interpret the
125          * access map we get back from the hypervisor
126          * correctly.
127          */
128         mb_array[0].logicalStart = 0;
129         mb_array[0].logicalEnd = 0x100000000;
130         mb_array[0].absStart = 0;
131         mb_array[0].absEnd = 0x100000000;
132
133         if (holeSize) {
134                 numMemoryBlocks = 2;
135                 holeStart = holeStart & 0x000fffffffffffff;
136                 holeStart = addr_to_chunk(holeStart);
137                 holeFirstChunk = holeStart;
138                 holeSize = addr_to_chunk(holeSize);
139                 holeSizeChunks = holeSize;
140                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
141                                 holeFirstChunk, holeSizeChunks );
142                 mb_array[0].logicalEnd = holeFirstChunk;
143                 mb_array[0].absEnd = holeFirstChunk;
144                 mb_array[1].logicalStart = holeFirstChunk;
145                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
146                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
147                 mb_array[1].absEnd = 0x100000000;
148         }
149         return numMemoryBlocks;
150 }
151
152 #define MaxSegmentAreas                 32
153 #define MaxSegmentAdrRangeBlocks        128
154 #define MaxAreaRangeBlocks              4
155
156 static unsigned long iSeries_process_Regatta_mainstore_vpd(
157                 struct MemoryBlock *mb_array, unsigned long max_entries)
158 {
159         struct IoHriMainStoreSegment5 *msVpdP =
160                 (struct IoHriMainStoreSegment5 *)xMsVpd;
161         unsigned long numSegmentBlocks = 0;
162         u32 existsBits = msVpdP->msAreaExists;
163         unsigned long area_num;
164
165         printk("Mainstore_VPD: Regatta\n");
166
167         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
168                 unsigned long numAreaBlocks;
169                 struct IoHriMainStoreArea4 *currentArea;
170
171                 if (existsBits & 0x80000000) {
172                         unsigned long block_num;
173
174                         currentArea = &msVpdP->msAreaArray[area_num];
175                         numAreaBlocks = currentArea->numAdrRangeBlocks;
176                         printk("ms_vpd: processing area %2ld  blocks=%ld",
177                                         area_num, numAreaBlocks);
178                         for (block_num = 0; block_num < numAreaBlocks;
179                                         ++block_num ) {
180                                 /* Process an address range block */
181                                 struct MemoryBlock tempBlock;
182                                 unsigned long i;
183
184                                 tempBlock.absStart =
185                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
186                                 tempBlock.absEnd =
187                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
188                                 tempBlock.logicalStart = 0;
189                                 tempBlock.logicalEnd   = 0;
190                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
191                                                 block_num, tempBlock.absStart,
192                                                 tempBlock.absEnd);
193
194                                 for (i = 0; i < numSegmentBlocks; ++i) {
195                                         if (mb_array[i].absStart ==
196                                                         tempBlock.absStart)
197                                                 break;
198                                 }
199                                 if (i == numSegmentBlocks) {
200                                         if (numSegmentBlocks == max_entries)
201                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
202                                         mb_array[numSegmentBlocks] = tempBlock;
203                                         ++numSegmentBlocks;
204                                 } else
205                                         printk(" (duplicate)");
206                         }
207                         printk("\n");
208                 }
209                 existsBits <<= 1;
210         }
211         /* Now sort the blocks found into ascending sequence */
212         if (numSegmentBlocks > 1) {
213                 unsigned long m, n;
214
215                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
216                         for (n = numSegmentBlocks - 1; m < n; --n) {
217                                 if (mb_array[n].absStart <
218                                                 mb_array[n-1].absStart) {
219                                         struct MemoryBlock tempBlock;
220
221                                         tempBlock = mb_array[n];
222                                         mb_array[n] = mb_array[n-1];
223                                         mb_array[n-1] = tempBlock;
224                                 }
225                         }
226                 }
227         }
228         /*
229          * Assign "logical" addresses to each block.  These
230          * addresses correspond to the hypervisor "bitmap" space.
231          * Convert all addresses into units of 256K chunks.
232          */
233         {
234         unsigned long i, nextBitmapAddress;
235
236         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
237         nextBitmapAddress = 0;
238         for (i = 0; i < numSegmentBlocks; ++i) {
239                 unsigned long length = mb_array[i].absEnd -
240                         mb_array[i].absStart;
241
242                 mb_array[i].logicalStart = nextBitmapAddress;
243                 mb_array[i].logicalEnd = nextBitmapAddress + length;
244                 nextBitmapAddress += length;
245                 printk("          Bitmap range: %016lx - %016lx\n"
246                                 "        Absolute range: %016lx - %016lx\n",
247                                 mb_array[i].logicalStart,
248                                 mb_array[i].logicalEnd,
249                                 mb_array[i].absStart, mb_array[i].absEnd);
250                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
251                                 0x000fffffffffffff);
252                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
253                                 0x000fffffffffffff);
254                 mb_array[i].logicalStart =
255                         addr_to_chunk(mb_array[i].logicalStart);
256                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
257         }
258         }
259
260         return numSegmentBlocks;
261 }
262
263 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
264                 unsigned long max_entries)
265 {
266         unsigned long i;
267         unsigned long mem_blocks = 0;
268
269         if (cpu_has_feature(CPU_FTR_SLB))
270                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
271                                 max_entries);
272         else
273                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
274                                 max_entries);
275
276         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
277         for (i = 0; i < mem_blocks; ++i) {
278                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
279                        "                             abs chunks %016lx - %016lx\n",
280                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
281                         mb_array[i].absStart, mb_array[i].absEnd);
282         }
283         return mem_blocks;
284 }
285
286 static void __init iSeries_get_cmdline(void)
287 {
288         char *p, *q;
289
290         /* copy the command line parameter from the primary VSP  */
291         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
292                         HvLpDma_Direction_RemoteToLocal);
293
294         p = cmd_line;
295         q = cmd_line + 255;
296         while(p < q) {
297                 if (!*p || *p == '\n')
298                         break;
299                 ++p;
300         }
301         *p = 0;
302 }
303
304 static void __init iSeries_init_early(void)
305 {
306         DBG(" -> iSeries_init_early()\n");
307
308         ppc64_firmware_features = FW_FEATURE_ISERIES;
309
310         ppc64_interrupt_controller = IC_ISERIES;
311
312 #if defined(CONFIG_BLK_DEV_INITRD)
313         /*
314          * If the init RAM disk has been configured and there is
315          * a non-zero starting address for it, set it up
316          */
317         if (naca.xRamDisk) {
318                 initrd_start = (unsigned long)__va(naca.xRamDisk);
319                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
320                 initrd_below_start_ok = 1;      // ramdisk in kernel space
321                 ROOT_DEV = Root_RAM0;
322                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
323                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
324         } else
325 #endif /* CONFIG_BLK_DEV_INITRD */
326         {
327             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
328         }
329
330         iSeries_recal_tb = get_tb();
331         iSeries_recal_titan = HvCallXm_loadTod();
332
333         /*
334          * Initialize the hash table management pointers
335          */
336         hpte_init_iSeries();
337
338         /*
339          * Initialize the DMA/TCE management
340          */
341         iommu_init_early_iSeries();
342
343         /* Initialize machine-dependency vectors */
344 #ifdef CONFIG_SMP
345         smp_init_iSeries();
346 #endif
347         if (itLpNaca.xPirEnvironMode == 0)
348                 piranha_simulator = 1;
349
350         /* Associate Lp Event Queue 0 with processor 0 */
351         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
352
353         mf_init();
354         mf_initialized = 1;
355         mb();
356
357         /* If we were passed an initrd, set the ROOT_DEV properly if the values
358          * look sensible. If not, clear initrd reference.
359          */
360 #ifdef CONFIG_BLK_DEV_INITRD
361         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
362             initrd_end > initrd_start)
363                 ROOT_DEV = Root_RAM0;
364         else
365                 initrd_start = initrd_end = 0;
366 #endif /* CONFIG_BLK_DEV_INITRD */
367
368         DBG(" <- iSeries_init_early()\n");
369 }
370
371 struct mschunks_map mschunks_map = {
372         /* XXX We don't use these, but Piranha might need them. */
373         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
374         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
375         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
376 };
377 EXPORT_SYMBOL(mschunks_map);
378
379 void mschunks_alloc(unsigned long num_chunks)
380 {
381         klimit = _ALIGN(klimit, sizeof(u32));
382         mschunks_map.mapping = (u32 *)klimit;
383         klimit += num_chunks * sizeof(u32);
384         mschunks_map.num_chunks = num_chunks;
385 }
386
387 /*
388  * The iSeries may have very large memories ( > 128 GB ) and a partition
389  * may get memory in "chunks" that may be anywhere in the 2**52 real
390  * address space.  The chunks are 256K in size.  To map this to the
391  * memory model Linux expects, the AS/400 specific code builds a
392  * translation table to translate what Linux thinks are "physical"
393  * addresses to the actual real addresses.  This allows us to make
394  * it appear to Linux that we have contiguous memory starting at
395  * physical address zero while in fact this could be far from the truth.
396  * To avoid confusion, I'll let the words physical and/or real address
397  * apply to the Linux addresses while I'll use "absolute address" to
398  * refer to the actual hardware real address.
399  *
400  * build_iSeries_Memory_Map gets information from the Hypervisor and
401  * looks at the Main Store VPD to determine the absolute addresses
402  * of the memory that has been assigned to our partition and builds
403  * a table used to translate Linux's physical addresses to these
404  * absolute addresses.  Absolute addresses are needed when
405  * communicating with the hypervisor (e.g. to build HPT entries)
406  */
407
408 static void __init build_iSeries_Memory_Map(void)
409 {
410         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
411         u32 nextPhysChunk;
412         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
413         u32 totalChunks,moreChunks;
414         u32 currChunk, thisChunk, absChunk;
415         u32 currDword;
416         u32 chunkBit;
417         u64 map;
418         struct MemoryBlock mb[32];
419         unsigned long numMemoryBlocks, curBlock;
420
421         /* Chunk size on iSeries is 256K bytes */
422         totalChunks = (u32)HvLpConfig_getMsChunks();
423         mschunks_alloc(totalChunks);
424
425         /*
426          * Get absolute address of our load area
427          * and map it to physical address 0
428          * This guarantees that the loadarea ends up at physical 0
429          * otherwise, it might not be returned by PLIC as the first
430          * chunks
431          */
432
433         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
434         loadAreaSize =  itLpNaca.xLoadAreaChunks;
435
436         /*
437          * Only add the pages already mapped here.
438          * Otherwise we might add the hpt pages
439          * The rest of the pages of the load area
440          * aren't in the HPT yet and can still
441          * be assigned an arbitrary physical address
442          */
443         if ((loadAreaSize * 64) > HvPagesToMap)
444                 loadAreaSize = HvPagesToMap / 64;
445
446         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
447
448         /*
449          * TODO Do we need to do something if the HPT is in the 64MB load area?
450          * This would be required if the itLpNaca.xLoadAreaChunks includes
451          * the HPT size
452          */
453
454         printk("Mapping load area - physical addr = 0000000000000000\n"
455                 "                    absolute addr = %016lx\n",
456                 chunk_to_addr(loadAreaFirstChunk));
457         printk("Load area size %dK\n", loadAreaSize * 256);
458
459         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
460                 mschunks_map.mapping[nextPhysChunk] =
461                         loadAreaFirstChunk + nextPhysChunk;
462
463         /*
464          * Get absolute address of our HPT and remember it so
465          * we won't map it to any physical address
466          */
467         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
468         hptSizePages = (u32)HvCallHpt_getHptPages();
469         hptSizeChunks = hptSizePages >>
470                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
471         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
472
473         printk("HPT absolute addr = %016lx, size = %dK\n",
474                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
475
476         ppc64_pft_size = __ilog2(hptSizePages * HW_PAGE_SIZE);
477
478         /*
479          * The actual hashed page table is in the hypervisor,
480          * we have no direct access
481          */
482         htab_address = NULL;
483
484         /*
485          * Determine if absolute memory has any
486          * holes so that we can interpret the
487          * access map we get back from the hypervisor
488          * correctly.
489          */
490         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
491
492         /*
493          * Process the main store access map from the hypervisor
494          * to build up our physical -> absolute translation table
495          */
496         curBlock = 0;
497         currChunk = 0;
498         currDword = 0;
499         moreChunks = totalChunks;
500
501         while (moreChunks) {
502                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
503                                 currDword);
504                 thisChunk = currChunk;
505                 while (map) {
506                         chunkBit = map >> 63;
507                         map <<= 1;
508                         if (chunkBit) {
509                                 --moreChunks;
510                                 while (thisChunk >= mb[curBlock].logicalEnd) {
511                                         ++curBlock;
512                                         if (curBlock >= numMemoryBlocks)
513                                                 panic("out of memory blocks");
514                                 }
515                                 if (thisChunk < mb[curBlock].logicalStart)
516                                         panic("memory block error");
517
518                                 absChunk = mb[curBlock].absStart +
519                                         (thisChunk - mb[curBlock].logicalStart);
520                                 if (((absChunk < hptFirstChunk) ||
521                                      (absChunk > hptLastChunk)) &&
522                                     ((absChunk < loadAreaFirstChunk) ||
523                                      (absChunk > loadAreaLastChunk))) {
524                                         mschunks_map.mapping[nextPhysChunk] =
525                                                 absChunk;
526                                         ++nextPhysChunk;
527                                 }
528                         }
529                         ++thisChunk;
530                 }
531                 ++currDword;
532                 currChunk += 64;
533         }
534
535         /*
536          * main store size (in chunks) is
537          *   totalChunks - hptSizeChunks
538          * which should be equal to
539          *   nextPhysChunk
540          */
541         systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
542 }
543
544 /*
545  * Document me.
546  */
547 static void __init iSeries_setup_arch(void)
548 {
549         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
550
551         if (get_paca()->lppaca.shared_proc) {
552                 ppc_md.idle_loop = iseries_shared_idle;
553                 printk(KERN_INFO "Using shared processor idle loop\n");
554         } else {
555                 ppc_md.idle_loop = iseries_dedicated_idle;
556                 printk(KERN_INFO "Using dedicated idle loop\n");
557         }
558
559         /* Setup the Lp Event Queue */
560         setup_hvlpevent_queue();
561
562         printk("Max  logical processors = %d\n",
563                         itVpdAreas.xSlicMaxLogicalProcs);
564         printk("Max physical processors = %d\n",
565                         itVpdAreas.xSlicMaxPhysicalProcs);
566
567         systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
568         printk("Processor version = %x\n", systemcfg->processor);
569 }
570
571 static void iSeries_show_cpuinfo(struct seq_file *m)
572 {
573         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
574 }
575
576 /*
577  * Document me.
578  * and Implement me.
579  */
580 static int iSeries_get_irq(struct pt_regs *regs)
581 {
582         /* -2 means ignore this interrupt */
583         return -2;
584 }
585
586 /*
587  * Document me.
588  */
589 static void iSeries_restart(char *cmd)
590 {
591         mf_reboot();
592 }
593
594 /*
595  * Document me.
596  */
597 static void iSeries_power_off(void)
598 {
599         mf_power_off();
600 }
601
602 /*
603  * Document me.
604  */
605 static void iSeries_halt(void)
606 {
607         mf_power_off();
608 }
609
610 static void __init iSeries_progress(char * st, unsigned short code)
611 {
612         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
613         if (!piranha_simulator && mf_initialized) {
614                 if (code != 0xffff)
615                         mf_display_progress(code);
616                 else
617                         mf_clear_src();
618         }
619 }
620
621 static void __init iSeries_fixup_klimit(void)
622 {
623         /*
624          * Change klimit to take into account any ram disk
625          * that may be included
626          */
627         if (naca.xRamDisk)
628                 klimit = KERNELBASE + (u64)naca.xRamDisk +
629                         (naca.xRamDiskSize * HW_PAGE_SIZE);
630         else {
631                 /*
632                  * No ram disk was included - check and see if there
633                  * was an embedded system map.  Change klimit to take
634                  * into account any embedded system map
635                  */
636                 if (embedded_sysmap_end)
637                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
638                                         0xfffffffffffff000);
639         }
640 }
641
642 static int __init iSeries_src_init(void)
643 {
644         /* clear the progress line */
645         ppc_md.progress(" ", 0xffff);
646         return 0;
647 }
648
649 late_initcall(iSeries_src_init);
650
651 static inline void process_iSeries_events(void)
652 {
653         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
654 }
655
656 static void yield_shared_processor(void)
657 {
658         unsigned long tb;
659
660         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
661                                     HvCall_MaskLpEvent |
662                                     HvCall_MaskLpProd |
663                                     HvCall_MaskTimeout);
664
665         tb = get_tb();
666         /* Compute future tb value when yield should expire */
667         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
668
669         /*
670          * The decrementer stops during the yield.  Force a fake decrementer
671          * here and let the timer_interrupt code sort out the actual time.
672          */
673         get_paca()->lppaca.int_dword.fields.decr_int = 1;
674         process_iSeries_events();
675 }
676
677 static void iseries_shared_idle(void)
678 {
679         while (1) {
680                 while (!need_resched() && !hvlpevent_is_pending()) {
681                         local_irq_disable();
682                         ppc64_runlatch_off();
683
684                         /* Recheck with irqs off */
685                         if (!need_resched() && !hvlpevent_is_pending())
686                                 yield_shared_processor();
687
688                         HMT_medium();
689                         local_irq_enable();
690                 }
691
692                 ppc64_runlatch_on();
693
694                 if (hvlpevent_is_pending())
695                         process_iSeries_events();
696
697                 preempt_enable_no_resched();
698                 schedule();
699                 preempt_disable();
700         }
701 }
702
703 static void iseries_dedicated_idle(void)
704 {
705         long oldval;
706
707         while (1) {
708                 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
709
710                 if (!oldval) {
711                         set_thread_flag(TIF_POLLING_NRFLAG);
712
713                         while (!need_resched()) {
714                                 ppc64_runlatch_off();
715                                 HMT_low();
716
717                                 if (hvlpevent_is_pending()) {
718                                         HMT_medium();
719                                         ppc64_runlatch_on();
720                                         process_iSeries_events();
721                                 }
722                         }
723
724                         HMT_medium();
725                         clear_thread_flag(TIF_POLLING_NRFLAG);
726                 } else {
727                         set_need_resched();
728                 }
729
730                 ppc64_runlatch_on();
731                 preempt_enable_no_resched();
732                 schedule();
733                 preempt_disable();
734         }
735 }
736
737 #ifndef CONFIG_PCI
738 void __init iSeries_init_IRQ(void) { }
739 #endif
740
741 static int __init iseries_probe(int platform)
742 {
743         return PLATFORM_ISERIES_LPAR == platform;
744 }
745
746 struct machdep_calls __initdata iseries_md = {
747         .setup_arch     = iSeries_setup_arch,
748         .show_cpuinfo   = iSeries_show_cpuinfo,
749         .init_IRQ       = iSeries_init_IRQ,
750         .get_irq        = iSeries_get_irq,
751         .init_early     = iSeries_init_early,
752         .pcibios_fixup  = iSeries_pci_final_fixup,
753         .restart        = iSeries_restart,
754         .power_off      = iSeries_power_off,
755         .halt           = iSeries_halt,
756         .get_boot_time  = iSeries_get_boot_time,
757         .set_rtc_time   = iSeries_set_rtc_time,
758         .get_rtc_time   = iSeries_get_rtc_time,
759         .calibrate_decr = generic_calibrate_decr,
760         .progress       = iSeries_progress,
761         .probe          = iseries_probe,
762         /* XXX Implement enable_pmcs for iSeries */
763 };
764
765 struct blob {
766         unsigned char data[PAGE_SIZE];
767         unsigned long next;
768 };
769
770 struct iseries_flat_dt {
771         struct boot_param_header header;
772         u64 reserve_map[2];
773         struct blob dt;
774         struct blob strings;
775 };
776
777 struct iseries_flat_dt iseries_dt;
778
779 void dt_init(struct iseries_flat_dt *dt)
780 {
781         dt->header.off_mem_rsvmap =
782                 offsetof(struct iseries_flat_dt, reserve_map);
783         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
784         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
785         dt->header.totalsize = sizeof(struct iseries_flat_dt);
786         dt->header.dt_strings_size = sizeof(struct blob);
787
788         /* There is no notion of hardware cpu id on iSeries */
789         dt->header.boot_cpuid_phys = smp_processor_id();
790
791         dt->dt.next = (unsigned long)&dt->dt.data;
792         dt->strings.next = (unsigned long)&dt->strings.data;
793
794         dt->header.magic = OF_DT_HEADER;
795         dt->header.version = 0x10;
796         dt->header.last_comp_version = 0x10;
797
798         dt->reserve_map[0] = 0;
799         dt->reserve_map[1] = 0;
800 }
801
802 void dt_check_blob(struct blob *b)
803 {
804         if (b->next >= (unsigned long)&b->next) {
805                 DBG("Ran out of space in flat device tree blob!\n");
806                 BUG();
807         }
808 }
809
810 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
811 {
812         *((u32*)dt->dt.next) = value;
813         dt->dt.next += sizeof(u32);
814
815         dt_check_blob(&dt->dt);
816 }
817
818 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
819 {
820         *((u64*)dt->dt.next) = value;
821         dt->dt.next += sizeof(u64);
822
823         dt_check_blob(&dt->dt);
824 }
825
826 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
827 {
828         unsigned long start = blob->next - (unsigned long)blob->data;
829
830         memcpy((char *)blob->next, data, len);
831         blob->next = _ALIGN(blob->next + len, 4);
832
833         dt_check_blob(blob);
834
835         return start;
836 }
837
838 void dt_start_node(struct iseries_flat_dt *dt, char *name)
839 {
840         dt_push_u32(dt, OF_DT_BEGIN_NODE);
841         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
842 }
843
844 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
845
846 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
847 {
848         unsigned long offset;
849
850         dt_push_u32(dt, OF_DT_PROP);
851
852         /* Length of the data */
853         dt_push_u32(dt, len);
854
855         /* Put the property name in the string blob. */
856         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
857
858         /* The offset of the properties name in the string blob. */
859         dt_push_u32(dt, (u32)offset);
860
861         /* The actual data. */
862         dt_push_bytes(&dt->dt, data, len);
863 }
864
865 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
866 {
867         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
868 }
869
870 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
871 {
872         dt_prop(dt, name, (char *)&data, sizeof(u32));
873 }
874
875 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
876 {
877         dt_prop(dt, name, (char *)&data, sizeof(u64));
878 }
879
880 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
881 {
882         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
883 }
884
885 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
886 {
887         dt_prop(dt, name, NULL, 0);
888 }
889
890 void dt_cpus(struct iseries_flat_dt *dt)
891 {
892         unsigned char buf[32];
893         unsigned char *p;
894         unsigned int i, index;
895         struct IoHriProcessorVpd *d;
896
897         /* yuck */
898         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
899         p = strchr(buf, ' ');
900         if (!p) p = buf + strlen(buf);
901
902         dt_start_node(dt, "cpus");
903         dt_prop_u32(dt, "#address-cells", 1);
904         dt_prop_u32(dt, "#size-cells", 0);
905
906         for (i = 0; i < NR_CPUS; i++) {
907                 if (paca[i].lppaca.dyn_proc_status >= 2)
908                         continue;
909
910                 snprintf(p, 32 - (p - buf), "@%d", i);
911                 dt_start_node(dt, buf);
912
913                 dt_prop_str(dt, "device_type", "cpu");
914
915                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
916                 d = &xIoHriProcessorVpd[index];
917
918                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
919                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
920
921                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
922                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
923
924                 /* magic conversions to Hz copied from old code */
925                 dt_prop_u32(dt, "clock-frequency",
926                         ((1UL << 34) * 1000000) / d->xProcFreq);
927                 dt_prop_u32(dt, "timebase-frequency",
928                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
929
930                 dt_prop_u32(dt, "reg", i);
931
932                 dt_end_node(dt);
933         }
934
935         dt_end_node(dt);
936 }
937
938 void build_flat_dt(struct iseries_flat_dt *dt)
939 {
940         u64 tmp[2];
941
942         dt_init(dt);
943
944         dt_start_node(dt, "");
945
946         dt_prop_u32(dt, "#address-cells", 2);
947         dt_prop_u32(dt, "#size-cells", 2);
948
949         /* /memory */
950         dt_start_node(dt, "memory@0");
951         dt_prop_str(dt, "name", "memory");
952         dt_prop_str(dt, "device_type", "memory");
953         tmp[0] = 0;
954         tmp[1] = systemcfg->physicalMemorySize;
955         dt_prop_u64_list(dt, "reg", tmp, 2);
956         dt_end_node(dt);
957
958         /* /chosen */
959         dt_start_node(dt, "chosen");
960         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
961         if (cmd_mem_limit)
962                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
963         dt_end_node(dt);
964
965         dt_cpus(dt);
966
967         dt_end_node(dt);
968
969         dt_push_u32(dt, OF_DT_END);
970 }
971
972 void * __init iSeries_early_setup(void)
973 {
974         iSeries_fixup_klimit();
975
976         /*
977          * Initialize the table which translate Linux physical addresses to
978          * AS/400 absolute addresses
979          */
980         build_iSeries_Memory_Map();
981
982         iSeries_get_cmdline();
983
984         /* Save unparsed command line copy for /proc/cmdline */
985         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
986
987         /* Parse early parameters, in particular mem=x */
988         parse_early_param();
989
990         build_flat_dt(&iseries_dt);
991
992         return (void *) __pa(&iseries_dt);
993 }
994
995 /*
996  * On iSeries we just parse the mem=X option from the command line.
997  * On pSeries it's a bit more complicated, see prom_init_mem()
998  */
999 static int __init early_parsemem(char *p)
1000 {
1001         if (p)
1002                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
1003         return 0;
1004 }
1005 early_param("mem", early_parsemem);