[PATCH] powerpc: cell interrupt controller updates
[linux-2.6.git] / arch / powerpc / platforms / cell / interrupt.c
1 /*
2  * Cell Internal Interrupt Controller
3  *
4  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5  *
6  * Author: Arnd Bergmann <arndb@de.ibm.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/config.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
27 #include <linux/percpu.h>
28 #include <linux/types.h>
29
30 #include <asm/io.h>
31 #include <asm/pgtable.h>
32 #include <asm/prom.h>
33 #include <asm/ptrace.h>
34
35 #include "interrupt.h"
36
37 struct iic_pending_bits {
38         u32 data;
39         u8 flags;
40         u8 class;
41         u8 source;
42         u8 prio;
43 };
44
45 enum iic_pending_flags {
46         IIC_VALID = 0x80,
47         IIC_IPI   = 0x40,
48 };
49
50 struct iic_regs {
51         struct iic_pending_bits pending;
52         struct iic_pending_bits pending_destr;
53         u64 generate;
54         u64 prio;
55 };
56
57 struct iic {
58         struct iic_regs __iomem *regs;
59         u8 target_id;
60 };
61
62 static DEFINE_PER_CPU(struct iic, iic);
63
64 void iic_local_enable(void)
65 {
66         out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
67 }
68
69 void iic_local_disable(void)
70 {
71         out_be64(&__get_cpu_var(iic).regs->prio, 0x0);
72 }
73
74 static unsigned int iic_startup(unsigned int irq)
75 {
76         return 0;
77 }
78
79 static void iic_enable(unsigned int irq)
80 {
81         iic_local_enable();
82 }
83
84 static void iic_disable(unsigned int irq)
85 {
86 }
87
88 static void iic_end(unsigned int irq)
89 {
90         iic_local_enable();
91 }
92
93 static struct hw_interrupt_type iic_pic = {
94         .typename = " CELL-IIC ",
95         .startup = iic_startup,
96         .enable = iic_enable,
97         .disable = iic_disable,
98         .end = iic_end,
99 };
100
101 static int iic_external_get_irq(struct iic_pending_bits pending)
102 {
103         int irq;
104         unsigned char node, unit;
105
106         node = pending.source >> 4;
107         unit = pending.source & 0xf;
108         irq = -1;
109
110         /*
111          * This mapping is specific to the Cell Broadband
112          * Engine. We might need to get the numbers
113          * from the device tree to support future CPUs.
114          */
115         switch (unit) {
116         case 0x00:
117         case 0x0b:
118                 /*
119                  * One of these units can be connected
120                  * to an external interrupt controller.
121                  */
122                 if (pending.prio > 0x3f ||
123                     pending.class != 2)
124                         break;
125                 irq = IIC_EXT_OFFSET
126                         + spider_get_irq(node)
127                         + node * IIC_NODE_STRIDE;
128                 break;
129         case 0x01 ... 0x04:
130         case 0x07 ... 0x0a:
131                 /*
132                  * These units are connected to the SPEs
133                  */
134                 if (pending.class > 2)
135                         break;
136                 irq = IIC_SPE_OFFSET
137                         + pending.class * IIC_CLASS_STRIDE
138                         + node * IIC_NODE_STRIDE
139                         + unit;
140                 break;
141         }
142         if (irq == -1)
143                 printk(KERN_WARNING "Unexpected interrupt class %02x, "
144                         "source %02x, prio %02x, cpu %02x\n", pending.class,
145                         pending.source, pending.prio, smp_processor_id());
146         return irq;
147 }
148
149 /* Get an IRQ number from the pending state register of the IIC */
150 int iic_get_irq(struct pt_regs *regs)
151 {
152         struct iic *iic;
153         int irq;
154         struct iic_pending_bits pending;
155
156         iic = &__get_cpu_var(iic);
157         *(unsigned long *) &pending = 
158                 in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
159
160         irq = -1;
161         if (pending.flags & IIC_VALID) {
162                 if (pending.flags & IIC_IPI) {
163                         irq = IIC_IPI_OFFSET + (pending.prio >> 4);
164 /*
165                         if (irq > 0x80)
166                                 printk(KERN_WARNING "Unexpected IPI prio %02x"
167                                         "on CPU %02x\n", pending.prio,
168                                                         smp_processor_id());
169 */
170                 } else {
171                         irq = iic_external_get_irq(pending);
172                 }
173         }
174         return irq;
175 }
176
177 /* hardcoded part to be compatible with older firmware */
178
179 static int setup_iic_hardcoded(void)
180 {
181         struct device_node *np;
182         int nodeid, cpu;
183         unsigned long regs;
184         struct iic *iic;
185
186         for_each_cpu(cpu) {
187                 iic = &per_cpu(iic, cpu);
188                 nodeid = cpu/2;
189
190                 for (np = of_find_node_by_type(NULL, "cpu");
191                      np;
192                      np = of_find_node_by_type(np, "cpu")) {
193                         if (nodeid == *(int *)get_property(np, "node-id", NULL))
194                                 break;
195                         }
196
197                 if (!np) {
198                         printk(KERN_WARNING "IIC: CPU %d not found\n", cpu);
199                         iic->regs = NULL;
200                         iic->target_id = 0xff;
201                         return -ENODEV;
202                         }
203
204                 regs = *(long *)get_property(np, "iic", NULL);
205
206                 /* hack until we have decided on the devtree info */
207                 regs += 0x400;
208                 if (cpu & 1)
209                         regs += 0x20;
210
211                 printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs);
212                 iic->regs = __ioremap(regs, sizeof(struct iic_regs),
213                                       _PAGE_NO_CACHE);
214
215                 iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe);
216         }
217
218         return 0;
219 }
220
221 static int setup_iic(void)
222 {
223         struct device_node *dn;
224         unsigned long *regs;
225         char *compatible;
226         unsigned *np, found = 0;
227         struct iic *iic = NULL;
228
229         for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
230                 compatible = (char *)get_property(dn, "compatible", NULL);
231
232                 if (!compatible) {
233                         printk(KERN_WARNING "no compatible property found !\n");
234                         continue;
235                 }
236
237                 if (strstr(compatible, "IBM,CBEA-Internal-Interrupt-Controller"))
238                         regs = (unsigned long *)get_property(dn,"reg", NULL);
239                 else
240                         continue;
241
242                 if (!regs)
243                         printk(KERN_WARNING "IIC: no reg property\n");
244
245                 np = (unsigned int *)get_property(dn, "ibm,interrupt-server-ranges", NULL);
246
247                 if (!np) {
248                         printk(KERN_WARNING "IIC: CPU association not found\n");
249                         iic->regs = NULL;
250                         iic->target_id = 0xff;
251                         return -ENODEV;
252                 }
253
254                 iic = &per_cpu(iic, np[0]);
255                 iic->regs = __ioremap(regs[0], sizeof(struct iic_regs),
256                                       _PAGE_NO_CACHE);
257                 iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe);
258                 printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs);
259
260                 iic = &per_cpu(iic, np[1]);
261                 iic->regs = __ioremap(regs[2], sizeof(struct iic_regs),
262                                       _PAGE_NO_CACHE);
263                 iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe);
264                 printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs);
265
266                 found++;
267         }
268
269         if (found)
270                 return 0;
271         else
272                 return -ENODEV;
273 }
274
275 #ifdef CONFIG_SMP
276
277 /* Use the highest interrupt priorities for IPI */
278 static inline int iic_ipi_to_irq(int ipi)
279 {
280         return IIC_IPI_OFFSET + IIC_NUM_IPIS - 1 - ipi;
281 }
282
283 static inline int iic_irq_to_ipi(int irq)
284 {
285         return IIC_NUM_IPIS - 1 - (irq - IIC_IPI_OFFSET);
286 }
287
288 void iic_setup_cpu(void)
289 {
290         out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
291 }
292
293 void iic_cause_IPI(int cpu, int mesg)
294 {
295         out_be64(&per_cpu(iic, cpu).regs->generate, (IIC_NUM_IPIS - 1 - mesg) << 4);
296 }
297
298 u8 iic_get_target_id(int cpu)
299 {
300         return per_cpu(iic, cpu).target_id;
301 }
302 EXPORT_SYMBOL_GPL(iic_get_target_id);
303
304 static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
305 {
306         smp_message_recv(iic_irq_to_ipi(irq), regs);
307         return IRQ_HANDLED;
308 }
309
310 static void iic_request_ipi(int ipi, const char *name)
311 {
312         int irq;
313
314         irq = iic_ipi_to_irq(ipi);
315         /* IPIs are marked SA_INTERRUPT as they must run with irqs
316          * disabled */
317         get_irq_desc(irq)->handler = &iic_pic;
318         get_irq_desc(irq)->status |= IRQ_PER_CPU;
319         request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL);
320 }
321
322 void iic_request_IPIs(void)
323 {
324         iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
325         iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
326 #ifdef CONFIG_DEBUGGER
327         iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
328 #endif /* CONFIG_DEBUGGER */
329 }
330 #endif /* CONFIG_SMP */
331
332 static void iic_setup_spe_handlers(void)
333 {
334         int be, isrc;
335
336         /* Assume two threads per BE are present */
337         for (be=0; be < num_present_cpus() / 2; be++) {
338                 for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) {
339                         int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc;
340                         get_irq_desc(irq)->handler = &iic_pic;
341                 }
342         }
343 }
344
345 void iic_init_IRQ(void)
346 {
347         int cpu, irq_offset;
348         struct iic *iic;
349
350         if (setup_iic() < 0)
351                 setup_iic_hardcoded();
352
353         irq_offset = 0;
354         for_each_cpu(cpu) {
355                 iic = &per_cpu(iic, cpu);
356                 if (iic->regs)
357                         out_be64(&iic->regs->prio, 0xff);
358         }
359         iic_setup_spe_handlers();
360 }