KVM: ppc: PowerPC 440 KVM implementation
[linux-2.6.git] / arch / powerpc / kvm / booke_guest.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  *
17  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19  */
20
21 #include <linux/errno.h>
22 #include <linux/err.h>
23 #include <linux/kvm_host.h>
24 #include <linux/module.h>
25 #include <linux/vmalloc.h>
26 #include <linux/fs.h>
27 #include <asm/cputable.h>
28 #include <asm/uaccess.h>
29 #include <asm/kvm_ppc.h>
30
31 #include "44x_tlb.h"
32
33 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
34 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35
36 struct kvm_stats_debugfs_item debugfs_entries[] = {
37         { "exits",      VCPU_STAT(sum_exits) },
38         { "mmio",       VCPU_STAT(mmio_exits) },
39         { "dcr",        VCPU_STAT(dcr_exits) },
40         { "sig",        VCPU_STAT(signal_exits) },
41         { "light",      VCPU_STAT(light_exits) },
42         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
43         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
44         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
45         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
46         { "sysc",       VCPU_STAT(syscall_exits) },
47         { "isi",        VCPU_STAT(isi_exits) },
48         { "dsi",        VCPU_STAT(dsi_exits) },
49         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
50         { "dec",        VCPU_STAT(dec_exits) },
51         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
52         { NULL }
53 };
54
55 static const u32 interrupt_msr_mask[16] = {
56         [BOOKE_INTERRUPT_CRITICAL]      = MSR_ME,
57         [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
58         [BOOKE_INTERRUPT_DATA_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
59         [BOOKE_INTERRUPT_INST_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
60         [BOOKE_INTERRUPT_EXTERNAL]      = MSR_CE|MSR_ME|MSR_DE,
61         [BOOKE_INTERRUPT_ALIGNMENT]     = MSR_CE|MSR_ME|MSR_DE,
62         [BOOKE_INTERRUPT_PROGRAM]       = MSR_CE|MSR_ME|MSR_DE,
63         [BOOKE_INTERRUPT_FP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
64         [BOOKE_INTERRUPT_SYSCALL]       = MSR_CE|MSR_ME|MSR_DE,
65         [BOOKE_INTERRUPT_AP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
66         [BOOKE_INTERRUPT_DECREMENTER]   = MSR_CE|MSR_ME|MSR_DE,
67         [BOOKE_INTERRUPT_FIT]           = MSR_CE|MSR_ME|MSR_DE,
68         [BOOKE_INTERRUPT_WATCHDOG]      = MSR_ME,
69         [BOOKE_INTERRUPT_DTLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
70         [BOOKE_INTERRUPT_ITLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
71         [BOOKE_INTERRUPT_DEBUG]         = MSR_ME,
72 };
73
74 const unsigned char exception_priority[] = {
75         [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
76         [BOOKE_INTERRUPT_INST_STORAGE] = 1,
77         [BOOKE_INTERRUPT_ALIGNMENT] = 2,
78         [BOOKE_INTERRUPT_PROGRAM] = 3,
79         [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
80         [BOOKE_INTERRUPT_SYSCALL] = 5,
81         [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
82         [BOOKE_INTERRUPT_DTLB_MISS] = 7,
83         [BOOKE_INTERRUPT_ITLB_MISS] = 8,
84         [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
85         [BOOKE_INTERRUPT_DEBUG] = 10,
86         [BOOKE_INTERRUPT_CRITICAL] = 11,
87         [BOOKE_INTERRUPT_WATCHDOG] = 12,
88         [BOOKE_INTERRUPT_EXTERNAL] = 13,
89         [BOOKE_INTERRUPT_FIT] = 14,
90         [BOOKE_INTERRUPT_DECREMENTER] = 15,
91 };
92
93 const unsigned char priority_exception[] = {
94         BOOKE_INTERRUPT_DATA_STORAGE,
95         BOOKE_INTERRUPT_INST_STORAGE,
96         BOOKE_INTERRUPT_ALIGNMENT,
97         BOOKE_INTERRUPT_PROGRAM,
98         BOOKE_INTERRUPT_FP_UNAVAIL,
99         BOOKE_INTERRUPT_SYSCALL,
100         BOOKE_INTERRUPT_AP_UNAVAIL,
101         BOOKE_INTERRUPT_DTLB_MISS,
102         BOOKE_INTERRUPT_ITLB_MISS,
103         BOOKE_INTERRUPT_MACHINE_CHECK,
104         BOOKE_INTERRUPT_DEBUG,
105         BOOKE_INTERRUPT_CRITICAL,
106         BOOKE_INTERRUPT_WATCHDOG,
107         BOOKE_INTERRUPT_EXTERNAL,
108         BOOKE_INTERRUPT_FIT,
109         BOOKE_INTERRUPT_DECREMENTER,
110 };
111
112
113 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
114 {
115         struct tlbe *tlbe;
116         int i;
117
118         printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
119         printk("| %2s | %3s | %8s | %8s | %8s |\n",
120                         "nr", "tid", "word0", "word1", "word2");
121
122         for (i = 0; i < PPC44x_TLB_SIZE; i++) {
123                 tlbe = &vcpu->arch.guest_tlb[i];
124                 if (tlbe->word0 & PPC44x_TLB_VALID)
125                         printk(" G%2d |  %02X | %08X | %08X | %08X |\n",
126                                i, tlbe->tid, tlbe->word0, tlbe->word1,
127                                tlbe->word2);
128         }
129
130         for (i = 0; i < PPC44x_TLB_SIZE; i++) {
131                 tlbe = &vcpu->arch.shadow_tlb[i];
132                 if (tlbe->word0 & PPC44x_TLB_VALID)
133                         printk(" S%2d | %02X | %08X | %08X | %08X |\n",
134                                i, tlbe->tid, tlbe->word0, tlbe->word1,
135                                tlbe->word2);
136         }
137 }
138
139 /* TODO: use vcpu_printf() */
140 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
141 {
142         int i;
143
144         printk("pc:   %08x msr:  %08x\n", vcpu->arch.pc, vcpu->arch.msr);
145         printk("lr:   %08x ctr:  %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
146         printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
147
148         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
149
150         for (i = 0; i < 32; i += 4) {
151                 printk("gpr%02d: %08x %08x %08x %08x\n", i,
152                        vcpu->arch.gpr[i],
153                        vcpu->arch.gpr[i+1],
154                        vcpu->arch.gpr[i+2],
155                        vcpu->arch.gpr[i+3]);
156         }
157 }
158
159 /* Check if we are ready to deliver the interrupt */
160 static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
161 {
162         int r;
163
164         switch (interrupt) {
165         case BOOKE_INTERRUPT_CRITICAL:
166                 r = vcpu->arch.msr & MSR_CE;
167                 break;
168         case BOOKE_INTERRUPT_MACHINE_CHECK:
169                 r = vcpu->arch.msr & MSR_ME;
170                 break;
171         case BOOKE_INTERRUPT_EXTERNAL:
172                 r = vcpu->arch.msr & MSR_EE;
173                 break;
174         case BOOKE_INTERRUPT_DECREMENTER:
175                 r = vcpu->arch.msr & MSR_EE;
176                 break;
177         case BOOKE_INTERRUPT_FIT:
178                 r = vcpu->arch.msr & MSR_EE;
179                 break;
180         case BOOKE_INTERRUPT_WATCHDOG:
181                 r = vcpu->arch.msr & MSR_CE;
182                 break;
183         case BOOKE_INTERRUPT_DEBUG:
184                 r = vcpu->arch.msr & MSR_DE;
185                 break;
186         default:
187                 r = 1;
188         }
189
190         return r;
191 }
192
193 static void kvmppc_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
194 {
195         switch (interrupt) {
196         case BOOKE_INTERRUPT_DECREMENTER:
197                 vcpu->arch.tsr |= TSR_DIS;
198                 break;
199         }
200
201         vcpu->arch.srr0 = vcpu->arch.pc;
202         vcpu->arch.srr1 = vcpu->arch.msr;
203         vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
204         kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
205 }
206
207 /* Check pending exceptions and deliver one, if possible. */
208 void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu)
209 {
210         unsigned long *pending = &vcpu->arch.pending_exceptions;
211         unsigned int exception;
212         unsigned int priority;
213
214         priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
215         while (priority <= BOOKE_MAX_INTERRUPT) {
216                 exception = priority_exception[priority];
217                 if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
218                         kvmppc_clear_exception(vcpu, exception);
219                         kvmppc_deliver_interrupt(vcpu, exception);
220                         break;
221                 }
222
223                 priority = find_next_bit(pending,
224                                          BITS_PER_BYTE * sizeof(*pending),
225                                          priority + 1);
226         }
227 }
228
229 static int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
230 {
231         enum emulation_result er;
232         int r;
233
234         er = kvmppc_emulate_instruction(run, vcpu);
235         switch (er) {
236         case EMULATE_DONE:
237                 /* Future optimization: only reload non-volatiles if they were
238                  * actually modified. */
239                 r = RESUME_GUEST_NV;
240                 break;
241         case EMULATE_DO_MMIO:
242                 run->exit_reason = KVM_EXIT_MMIO;
243                 /* We must reload nonvolatiles because "update" load/store
244                  * instructions modify register state. */
245                 /* Future optimization: only reload non-volatiles if they were
246                  * actually modified. */
247                 r = RESUME_HOST_NV;
248                 break;
249         case EMULATE_FAIL:
250                 /* XXX Deliver Program interrupt to guest. */
251                 printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__,
252                        vcpu->arch.last_inst);
253                 r = RESUME_HOST;
254                 break;
255         default:
256                 BUG();
257         }
258
259         return r;
260 }
261
262 /**
263  * kvmppc_handle_exit
264  *
265  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
266  */
267 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
268                        unsigned int exit_nr)
269 {
270         enum emulation_result er;
271         int r = RESUME_HOST;
272
273         local_irq_enable();
274
275         run->exit_reason = KVM_EXIT_UNKNOWN;
276         run->ready_for_interrupt_injection = 1;
277
278         switch (exit_nr) {
279         case BOOKE_INTERRUPT_MACHINE_CHECK:
280                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
281                 kvmppc_dump_vcpu(vcpu);
282                 r = RESUME_HOST;
283                 break;
284
285         case BOOKE_INTERRUPT_EXTERNAL:
286         case BOOKE_INTERRUPT_DECREMENTER:
287                 /* Since we switched IVPR back to the host's value, the host
288                  * handled this interrupt the moment we enabled interrupts.
289                  * Now we just offer it a chance to reschedule the guest. */
290
291                 /* XXX At this point the TLB still holds our shadow TLB, so if
292                  * we do reschedule the host will fault over it. Perhaps we
293                  * should politely restore the host's entries to minimize
294                  * misses before ceding control. */
295                 if (need_resched())
296                         cond_resched();
297                 if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
298                         vcpu->stat.dec_exits++;
299                 else
300                         vcpu->stat.ext_intr_exits++;
301                 r = RESUME_GUEST;
302                 break;
303
304         case BOOKE_INTERRUPT_PROGRAM:
305                 if (vcpu->arch.msr & MSR_PR) {
306                         /* Program traps generated by user-level software must be handled
307                          * by the guest kernel. */
308                         vcpu->arch.esr = vcpu->arch.fault_esr;
309                         kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
310                         r = RESUME_GUEST;
311                         break;
312                 }
313
314                 er = kvmppc_emulate_instruction(run, vcpu);
315                 switch (er) {
316                 case EMULATE_DONE:
317                         /* Future optimization: only reload non-volatiles if
318                          * they were actually modified by emulation. */
319                         vcpu->stat.emulated_inst_exits++;
320                         r = RESUME_GUEST_NV;
321                         break;
322                 case EMULATE_DO_DCR:
323                         run->exit_reason = KVM_EXIT_DCR;
324                         r = RESUME_HOST;
325                         break;
326                 case EMULATE_FAIL:
327                         /* XXX Deliver Program interrupt to guest. */
328                         printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
329                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
330                         /* For debugging, encode the failing instruction and
331                          * report it to userspace. */
332                         run->hw.hardware_exit_reason = ~0ULL << 32;
333                         run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
334                         r = RESUME_HOST;
335                         break;
336                 default:
337                         BUG();
338                 }
339                 break;
340
341         case BOOKE_INTERRUPT_DATA_STORAGE:
342                 vcpu->arch.dear = vcpu->arch.fault_dear;
343                 vcpu->arch.esr = vcpu->arch.fault_esr;
344                 kvmppc_queue_exception(vcpu, exit_nr);
345                 vcpu->stat.dsi_exits++;
346                 r = RESUME_GUEST;
347                 break;
348
349         case BOOKE_INTERRUPT_INST_STORAGE:
350                 vcpu->arch.esr = vcpu->arch.fault_esr;
351                 kvmppc_queue_exception(vcpu, exit_nr);
352                 vcpu->stat.isi_exits++;
353                 r = RESUME_GUEST;
354                 break;
355
356         case BOOKE_INTERRUPT_SYSCALL:
357                 kvmppc_queue_exception(vcpu, exit_nr);
358                 vcpu->stat.syscall_exits++;
359                 r = RESUME_GUEST;
360                 break;
361
362         case BOOKE_INTERRUPT_DTLB_MISS: {
363                 struct tlbe *gtlbe;
364                 unsigned long eaddr = vcpu->arch.fault_dear;
365                 gfn_t gfn;
366
367                 /* Check the guest TLB. */
368                 gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
369                 if (!gtlbe) {
370                         /* The guest didn't have a mapping for it. */
371                         kvmppc_queue_exception(vcpu, exit_nr);
372                         vcpu->arch.dear = vcpu->arch.fault_dear;
373                         vcpu->arch.esr = vcpu->arch.fault_esr;
374                         vcpu->stat.dtlb_real_miss_exits++;
375                         r = RESUME_GUEST;
376                         break;
377                 }
378
379                 vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
380                 gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
381
382                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
383                         /* The guest TLB had a mapping, but the shadow TLB
384                          * didn't, and it is RAM. This could be because:
385                          * a) the entry is mapping the host kernel, or
386                          * b) the guest used a large mapping which we're faking
387                          * Either way, we need to satisfy the fault without
388                          * invoking the guest. */
389                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
390                                        gtlbe->word2);
391                         vcpu->stat.dtlb_virt_miss_exits++;
392                         r = RESUME_GUEST;
393                 } else {
394                         /* Guest has mapped and accessed a page which is not
395                          * actually RAM. */
396                         r = kvmppc_emulate_mmio(run, vcpu);
397                 }
398
399                 break;
400         }
401
402         case BOOKE_INTERRUPT_ITLB_MISS: {
403                 struct tlbe *gtlbe;
404                 unsigned long eaddr = vcpu->arch.pc;
405                 gfn_t gfn;
406
407                 r = RESUME_GUEST;
408
409                 /* Check the guest TLB. */
410                 gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
411                 if (!gtlbe) {
412                         /* The guest didn't have a mapping for it. */
413                         kvmppc_queue_exception(vcpu, exit_nr);
414                         vcpu->stat.itlb_real_miss_exits++;
415                         break;
416                 }
417
418                 vcpu->stat.itlb_virt_miss_exits++;
419
420                 gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
421
422                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
423                         /* The guest TLB had a mapping, but the shadow TLB
424                          * didn't. This could be because:
425                          * a) the entry is mapping the host kernel, or
426                          * b) the guest used a large mapping which we're faking
427                          * Either way, we need to satisfy the fault without
428                          * invoking the guest. */
429                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
430                                        gtlbe->word2);
431                 } else {
432                         /* Guest mapped and leaped at non-RAM! */
433                         kvmppc_queue_exception(vcpu,
434                                                BOOKE_INTERRUPT_MACHINE_CHECK);
435                 }
436
437                 break;
438         }
439
440         default:
441                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
442                 BUG();
443         }
444
445         local_irq_disable();
446
447         kvmppc_check_and_deliver_interrupts(vcpu);
448
449         /* Do some exit accounting. */
450         vcpu->stat.sum_exits++;
451         if (!(r & RESUME_HOST)) {
452                 /* To avoid clobbering exit_reason, only check for signals if
453                  * we aren't already exiting to userspace for some other
454                  * reason. */
455                 if (signal_pending(current)) {
456                         run->exit_reason = KVM_EXIT_INTR;
457                         r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
458
459                         vcpu->stat.signal_exits++;
460                 } else {
461                         vcpu->stat.light_exits++;
462                 }
463         } else {
464                 switch (run->exit_reason) {
465                 case KVM_EXIT_MMIO:
466                         vcpu->stat.mmio_exits++;
467                         break;
468                 case KVM_EXIT_DCR:
469                         vcpu->stat.dcr_exits++;
470                         break;
471                 case KVM_EXIT_INTR:
472                         vcpu->stat.signal_exits++;
473                         break;
474                 }
475         }
476
477         return r;
478 }
479
480 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
481 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
482 {
483         struct tlbe *tlbe = &vcpu->arch.guest_tlb[0];
484
485         tlbe->tid = 0;
486         tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
487         tlbe->word1 = 0;
488         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
489
490         tlbe++;
491         tlbe->tid = 0;
492         tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
493         tlbe->word1 = 0xef600000;
494         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
495                       | PPC44x_TLB_I | PPC44x_TLB_G;
496
497         vcpu->arch.pc = 0;
498         vcpu->arch.msr = 0;
499         vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
500
501         /* Eye-catching number so we know if the guest takes an interrupt
502          * before it's programmed its own IVPR. */
503         vcpu->arch.ivpr = 0x55550000;
504
505         /* Since the guest can directly access the timebase, it must know the
506          * real timebase frequency. Accordingly, it must see the state of
507          * CCR1[TCS]. */
508         vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
509
510         return 0;
511 }
512
513 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
514 {
515         int i;
516
517         regs->pc = vcpu->arch.pc;
518         regs->cr = vcpu->arch.cr;
519         regs->ctr = vcpu->arch.ctr;
520         regs->lr = vcpu->arch.lr;
521         regs->xer = vcpu->arch.xer;
522         regs->msr = vcpu->arch.msr;
523         regs->srr0 = vcpu->arch.srr0;
524         regs->srr1 = vcpu->arch.srr1;
525         regs->pid = vcpu->arch.pid;
526         regs->sprg0 = vcpu->arch.sprg0;
527         regs->sprg1 = vcpu->arch.sprg1;
528         regs->sprg2 = vcpu->arch.sprg2;
529         regs->sprg3 = vcpu->arch.sprg3;
530         regs->sprg5 = vcpu->arch.sprg4;
531         regs->sprg6 = vcpu->arch.sprg5;
532         regs->sprg7 = vcpu->arch.sprg6;
533
534         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
535                 regs->gpr[i] = vcpu->arch.gpr[i];
536
537         return 0;
538 }
539
540 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
541 {
542         int i;
543
544         vcpu->arch.pc = regs->pc;
545         vcpu->arch.cr = regs->cr;
546         vcpu->arch.ctr = regs->ctr;
547         vcpu->arch.lr = regs->lr;
548         vcpu->arch.xer = regs->xer;
549         vcpu->arch.msr = regs->msr;
550         vcpu->arch.srr0 = regs->srr0;
551         vcpu->arch.srr1 = regs->srr1;
552         vcpu->arch.sprg0 = regs->sprg0;
553         vcpu->arch.sprg1 = regs->sprg1;
554         vcpu->arch.sprg2 = regs->sprg2;
555         vcpu->arch.sprg3 = regs->sprg3;
556         vcpu->arch.sprg5 = regs->sprg4;
557         vcpu->arch.sprg6 = regs->sprg5;
558         vcpu->arch.sprg7 = regs->sprg6;
559
560         for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
561                 vcpu->arch.gpr[i] = regs->gpr[i];
562
563         return 0;
564 }
565
566 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
567                                   struct kvm_sregs *sregs)
568 {
569         return -ENOTSUPP;
570 }
571
572 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
573                                   struct kvm_sregs *sregs)
574 {
575         return -ENOTSUPP;
576 }
577
578 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
579 {
580         return -ENOTSUPP;
581 }
582
583 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
584 {
585         return -ENOTSUPP;
586 }
587
588 /* 'linear_address' is actually an encoding of AS|PID|EADDR . */
589 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
590                                   struct kvm_translation *tr)
591 {
592         struct tlbe *gtlbe;
593         int index;
594         gva_t eaddr;
595         u8 pid;
596         u8 as;
597
598         eaddr = tr->linear_address;
599         pid = (tr->linear_address >> 32) & 0xff;
600         as = (tr->linear_address >> 40) & 0x1;
601
602         index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
603         if (index == -1) {
604                 tr->valid = 0;
605                 return 0;
606         }
607
608         gtlbe = &vcpu->arch.guest_tlb[index];
609
610         tr->physical_address = tlb_xlate(gtlbe, eaddr);
611         /* XXX what does "writeable" and "usermode" even mean? */
612         tr->valid = 1;
613
614         return 0;
615 }