parisc: fix trivial section name warnings
[linux-2.6.git] / arch / parisc / kernel / perf_asm.S
1
2 /*    low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
3  * 
4  *    Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
5  *    Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
6  * 
7  *    This program is free software; you can redistribute it and/or modify
8  *    it under the terms of the GNU General Public License as published by
9  *    the Free Software Foundation; either version 2 of the License, or
10  *    (at your option) any later version.
11  * 
12  *    This program is distributed in the hope that it will be useful,
13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  *    GNU General Public License for more details.
16  * 
17  *    You should have received a copy of the GNU General Public License
18  *    along with this program; if not, write to the Free Software
19  *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <asm/assembly.h>
23 #include <linux/linkage.h>
24
25 #ifdef CONFIG_64BIT
26         .level          2.0w
27 #endif /* CONFIG_64BIT */
28
29 #define MTDIAG_1(gr)    .word 0x14201840 + gr*0x10000
30 #define MTDIAG_2(gr)    .word 0x14401840 + gr*0x10000
31 #define MFDIAG_1(gr)    .word 0x142008A0 + gr
32 #define MFDIAG_2(gr)    .word 0x144008A0 + gr
33 #define STDIAG(dr)      .word 0x14000AA0 + dr*0x200000
34 #define SFDIAG(dr)      .word 0x14000BA0 + dr*0x200000
35 #define DR2_SLOW_RET    53
36
37
38 ;
39 ; Enable the performance counters
40 ;
41 ; The coprocessor only needs to be enabled when
42 ; starting/stopping the coprocessor with the pmenb/pmdis.
43 ;
44         __HEAD
45
46 ENTRY(perf_intrigue_enable_perf_counters)
47         .proc
48         .callinfo  frame=0,NO_CALLS
49         .entry
50
51         ldi     0x20,%r25                ; load up perfmon bit
52         mfctl   ccr,%r26                 ; get coprocessor register
53         or      %r25,%r26,%r26             ; set bit
54         mtctl   %r26,ccr                 ; turn on performance coprocessor
55         pmenb                           ; enable performance monitor
56         ssm     0,0                     ; dummy op to ensure completion
57         sync                            ; follow ERS
58         andcm   %r26,%r25,%r26             ; clear bit now 
59         mtctl   %r26,ccr                 ; turn off performance coprocessor
60         nop                             ; NOPs as specified in ERS
61         nop
62         nop
63         nop
64         nop
65         nop
66         nop
67         bve    (%r2)
68         nop
69         .exit
70         .procend
71 ENDPROC(perf_intrigue_enable_perf_counters)
72
73 ENTRY(perf_intrigue_disable_perf_counters)
74         .proc
75         .callinfo  frame=0,NO_CALLS
76         .entry
77         ldi     0x20,%r25                ; load up perfmon bit
78         mfctl   ccr,%r26                 ; get coprocessor register
79         or      %r25,%r26,%r26             ; set bit
80         mtctl   %r26,ccr                 ; turn on performance coprocessor
81         pmdis                           ; disable performance monitor
82         ssm     0,0                     ; dummy op to ensure completion
83         andcm   %r26,%r25,%r26             ; clear bit now 
84         bve    (%r2)
85         mtctl   %r26,ccr                 ; turn off performance coprocessor
86         .exit
87         .procend
88 ENDPROC(perf_intrigue_disable_perf_counters)
89
90 ;***********************************************************************
91 ;*
92 ;* Name: perf_rdr_shift_in_W
93 ;*
94 ;* Description:
95 ;*      This routine shifts data in from the RDR in arg0 and returns
96 ;*      the result in ret0.  If the RDR is <= 64 bits in length, it
97 ;*      is shifted shifted backup immediately.  This is to compensate
98 ;*      for RDR10 which has bits that preclude PDC stack operations
99 ;*      when they are in the wrong state.
100 ;*
101 ;* Arguments:
102 ;*      arg0 : rdr to be read
103 ;*      arg1 : bit length of rdr
104 ;*
105 ;* Returns:
106 ;*      ret0 = next 64 bits of rdr data from staging register
107 ;*
108 ;* Register usage:
109 ;*      arg0 : rdr to be read
110 ;*      arg1 : bit length of rdr
111 ;*      %r24  - original DR2 value
112 ;*      %r1   - scratch
113 ;*  %r29  - scratch
114 ;*
115 ;* Returns:
116 ;*      ret0 = RDR data (right justified)
117 ;*
118 ;***********************************************************************
119
120 ENTRY(perf_rdr_shift_in_W)
121         .proc
122         .callinfo frame=0,NO_CALLS
123         .entry
124 ;
125 ; read(shift in) the RDR.
126 ;
127
128 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
129 ; shifting is done, from or to, remote diagnose registers.
130 ;
131
132         depdi,z         1,DR2_SLOW_RET,1,%r29
133         MFDIAG_2        (24)
134         or                  %r24,%r29,%r29
135         MTDIAG_2        (29)                    ; set DR2_SLOW_RET
136
137         nop
138         nop
139         nop
140         nop
141
142 ;
143 ; Cacheline start (32-byte cacheline)
144 ;
145         nop
146         nop
147         nop
148         extrd,u         arg1,63,6,%r1   ; setup shift amount by bits to move 
149
150         mtsar           %r1
151         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
152         blr             %r1,%r0         ; branch to 8-instruction sequence
153         nop
154
155 ;
156 ; Cacheline start (32-byte cacheline)
157 ;
158
159         ;
160         ; RDR 0 sequence
161         ;
162         SFDIAG          (0)
163         ssm                 0,0
164         MFDIAG_1        (28)
165         shrpd           ret0,%r0,%sar,%r1
166         MTDIAG_1        (1)                     ; mtdiag %dr1, %r1 
167         STDIAG          (0)
168         ssm                 0,0
169         b,n         perf_rdr_shift_in_W_leave
170
171         ;
172         ; RDR 1 sequence
173         ;
174         sync
175         ssm                 0,0
176         SFDIAG          (1)
177         ssm                 0,0
178         MFDIAG_1        (28)
179         ssm                 0,0
180         b,n         perf_rdr_shift_in_W_leave
181         nop
182
183         ;
184         ; RDR 2 read sequence
185         ;
186         SFDIAG          (2)
187         ssm                 0,0
188         MFDIAG_1        (28)
189         shrpd           ret0,%r0,%sar,%r1
190         MTDIAG_1        (1)
191         STDIAG          (2)
192         ssm                 0,0
193         b,n         perf_rdr_shift_in_W_leave
194
195         ;
196         ; RDR 3 read sequence
197         ;
198         b,n         perf_rdr_shift_in_W_leave
199         nop
200         nop
201         nop
202         nop
203         nop
204         nop
205         nop
206
207         ;
208         ; RDR 4 read sequence
209         ;
210         sync
211         ssm             0,0
212         SFDIAG          (4)
213         ssm             0,0
214         MFDIAG_1        (28)
215         b,n         perf_rdr_shift_in_W_leave
216         ssm             0,0
217         nop
218
219         ; 
220         ; RDR 5 read sequence
221         ;
222         sync
223         ssm             0,0
224         SFDIAG          (5)
225         ssm             0,0
226         MFDIAG_1        (28)
227         b,n         perf_rdr_shift_in_W_leave
228         ssm             0,0
229         nop
230
231         ;
232         ; RDR 6 read sequence
233         ;
234         sync
235         ssm             0,0
236         SFDIAG          (6)
237         ssm             0,0
238         MFDIAG_1        (28)
239         b,n         perf_rdr_shift_in_W_leave
240         ssm             0,0
241         nop
242
243         ;
244         ; RDR 7 read sequence
245         ;
246         b,n         perf_rdr_shift_in_W_leave
247         nop
248         nop
249         nop
250         nop
251         nop
252         nop
253         nop
254
255         ;
256         ; RDR 8 read sequence
257         ;
258         b,n         perf_rdr_shift_in_W_leave
259         nop
260         nop
261         nop
262         nop
263         nop
264         nop
265         nop
266
267         ;
268         ; RDR 9 read sequence
269         ;
270         b,n         perf_rdr_shift_in_W_leave
271         nop
272         nop
273         nop
274         nop
275         nop
276         nop
277         nop
278
279         ;
280         ; RDR 10 read sequence
281         ;
282         SFDIAG          (10)
283         ssm             0,0
284         MFDIAG_1        (28)
285         shrpd           ret0,%r0,%sar,%r1
286         MTDIAG_1        (1)
287         STDIAG          (10)
288         ssm             0,0
289         b,n         perf_rdr_shift_in_W_leave
290
291         ;
292         ; RDR 11 read sequence
293         ;
294         SFDIAG          (11)
295         ssm             0,0
296         MFDIAG_1        (28)
297         shrpd           ret0,%r0,%sar,%r1
298         MTDIAG_1        (1)
299         STDIAG          (11)
300         ssm             0,0
301         b,n         perf_rdr_shift_in_W_leave
302
303         ;
304         ; RDR 12 read sequence
305         ;
306         b,n         perf_rdr_shift_in_W_leave
307         nop
308         nop
309         nop
310         nop
311         nop
312         nop
313         nop
314
315         ;
316         ; RDR 13 read sequence
317         ;
318         sync
319         ssm             0,0
320         SFDIAG          (13)
321         ssm             0,0
322         MFDIAG_1        (28)
323         b,n         perf_rdr_shift_in_W_leave
324         ssm             0,0
325         nop
326
327         ;
328         ; RDR 14 read sequence
329         ;
330         SFDIAG          (14)
331         ssm             0,0
332         MFDIAG_1        (28)
333         shrpd           ret0,%r0,%sar,%r1
334         MTDIAG_1        (1)
335         STDIAG          (14)
336         ssm             0,0
337         b,n         perf_rdr_shift_in_W_leave
338
339         ;
340         ; RDR 15 read sequence
341         ;
342         sync
343         ssm             0,0
344         SFDIAG          (15)
345         ssm             0,0
346         MFDIAG_1        (28)
347         ssm             0,0
348         b,n         perf_rdr_shift_in_W_leave
349         nop
350
351         ;
352         ; RDR 16 read sequence
353         ;
354         sync
355         ssm             0,0
356         SFDIAG          (16)
357         ssm             0,0
358         MFDIAG_1        (28)
359         b,n         perf_rdr_shift_in_W_leave
360         ssm             0,0
361         nop
362
363         ;
364         ; RDR 17 read sequence
365         ;
366         SFDIAG          (17)
367         ssm             0,0
368         MFDIAG_1        (28)
369         shrpd           ret0,%r0,%sar,%r1
370         MTDIAG_1        (1)
371         STDIAG          (17)
372         ssm             0,0
373         b,n         perf_rdr_shift_in_W_leave
374
375         ;
376         ; RDR 18 read sequence
377         ;
378         SFDIAG          (18)
379         ssm             0,0
380         MFDIAG_1        (28)
381         shrpd           ret0,%r0,%sar,%r1
382         MTDIAG_1        (1)
383         STDIAG          (18)
384         ssm             0,0
385         b,n         perf_rdr_shift_in_W_leave
386
387         ;
388         ; RDR 19 read sequence
389         ;
390         b,n         perf_rdr_shift_in_W_leave
391         nop
392         nop
393         nop
394         nop
395         nop
396         nop
397         nop
398
399         ;
400         ; RDR 20 read sequence
401         ;
402         sync
403         ssm             0,0
404         SFDIAG          (20)
405         ssm             0,0
406         MFDIAG_1        (28)
407         b,n         perf_rdr_shift_in_W_leave
408         ssm             0,0
409         nop
410
411         ;
412         ; RDR 21 read sequence
413         ;
414         sync
415         ssm             0,0
416         SFDIAG          (21)
417         ssm             0,0
418         MFDIAG_1        (28)
419         b,n         perf_rdr_shift_in_W_leave
420         ssm             0,0
421         nop
422
423         ;
424         ; RDR 22 read sequence
425         ;
426         sync
427         ssm             0,0
428         SFDIAG          (22)
429         ssm             0,0
430         MFDIAG_1        (28)
431         b,n         perf_rdr_shift_in_W_leave
432         ssm             0,0
433         nop
434
435         ;
436         ; RDR 23 read sequence
437         ;
438         sync
439         ssm             0,0
440         SFDIAG          (23)
441         ssm             0,0
442         MFDIAG_1        (28)
443         b,n         perf_rdr_shift_in_W_leave
444         ssm             0,0
445         nop
446
447         ;
448         ; RDR 24 read sequence
449         ;
450         sync
451         ssm             0,0
452         SFDIAG          (24)
453         ssm             0,0
454         MFDIAG_1        (28)
455         b,n         perf_rdr_shift_in_W_leave
456         ssm             0,0
457         nop
458
459         ;
460         ; RDR 25 read sequence
461         ;
462         sync
463         ssm             0,0
464         SFDIAG          (25)
465         ssm             0,0
466         MFDIAG_1        (28)
467         b,n         perf_rdr_shift_in_W_leave
468         ssm             0,0
469         nop
470
471         ;
472         ; RDR 26 read sequence
473         ;
474         SFDIAG          (26)
475         ssm             0,0
476         MFDIAG_1        (28)
477         shrpd           ret0,%r0,%sar,%r1
478         MTDIAG_1        (1)
479         STDIAG          (26)
480         ssm             0,0
481         b,n         perf_rdr_shift_in_W_leave
482
483         ;
484         ; RDR 27 read sequence
485         ;
486         SFDIAG          (27)
487         ssm             0,0
488         MFDIAG_1        (28)
489         shrpd           ret0,%r0,%sar,%r1
490         MTDIAG_1        (1)
491         STDIAG          (27)
492         ssm             0,0
493         b,n         perf_rdr_shift_in_W_leave
494
495         ;
496         ; RDR 28 read sequence
497         ;
498         sync
499         ssm             0,0
500         SFDIAG          (28)
501         ssm             0,0
502         MFDIAG_1        (28)
503         b,n         perf_rdr_shift_in_W_leave
504         ssm             0,0
505         nop
506
507         ;
508         ; RDR 29 read sequence
509         ;
510         sync
511         ssm             0,0
512         SFDIAG          (29)
513         ssm             0,0
514         MFDIAG_1        (28)
515         b,n         perf_rdr_shift_in_W_leave
516         ssm             0,0
517         nop
518
519         ;
520         ; RDR 30 read sequence
521         ;
522         SFDIAG          (30)
523         ssm             0,0
524         MFDIAG_1        (28)
525         shrpd           ret0,%r0,%sar,%r1
526         MTDIAG_1        (1)
527         STDIAG          (30)
528         ssm             0,0
529         b,n         perf_rdr_shift_in_W_leave
530
531         ;
532         ; RDR 31 read sequence
533         ;
534         sync
535         ssm             0,0
536         SFDIAG          (31)
537         ssm             0,0
538         MFDIAG_1        (28)
539         nop
540         ssm             0,0
541         nop
542
543         ;
544         ; Fallthrough
545         ;
546
547 perf_rdr_shift_in_W_leave:
548         bve                 (%r2)
549         .exit
550         MTDIAG_2        (24)                    ; restore DR2
551         .procend
552 ENDPROC(perf_rdr_shift_in_W)
553
554
555 ;***********************************************************************
556 ;*
557 ;* Name: perf_rdr_shift_out_W
558 ;*
559 ;* Description:
560 ;*      This routine moves data to the RDR's.  The double-word that
561 ;*      arg1 points to is loaded and moved into the staging register.
562 ;*      Then the STDIAG instruction for the RDR # in arg0 is called
563 ;*      to move the data to the RDR.
564 ;*
565 ;* Arguments:
566 ;*      arg0 = rdr number
567 ;*      arg1 = 64-bit value to write
568 ;*      %r24 - DR2 | DR2_SLOW_RET
569 ;*      %r23 - original DR2 value
570 ;*
571 ;* Returns:
572 ;*      None
573 ;*
574 ;* Register usage:
575 ;*
576 ;***********************************************************************
577
578 ENTRY(perf_rdr_shift_out_W)
579         .proc
580         .callinfo frame=0,NO_CALLS
581         .entry
582 ;
583 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
584 ; shifting is done, from or to, the remote diagnose registers.
585 ;
586
587         depdi,z         1,DR2_SLOW_RET,1,%r24
588         MFDIAG_2        (23)
589         or              %r24,%r23,%r24
590         MTDIAG_2        (24)            ; set DR2_SLOW_RET
591         MTDIAG_1        (25)            ; data to the staging register
592         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
593         blr                 %r1,%r0     ; branch to 8-instruction sequence
594         nop
595
596         ;
597         ; RDR 0 write sequence
598         ;
599         sync                            ; RDR 0 write sequence
600         ssm             0,0
601         STDIAG          (0)
602         ssm             0,0
603         b,n         perf_rdr_shift_out_W_leave
604         nop
605         ssm             0,0
606         nop
607
608         ;
609         ; RDR 1 write sequence
610         ;
611         sync
612         ssm             0,0
613         STDIAG          (1)
614         ssm             0,0
615         b,n         perf_rdr_shift_out_W_leave
616         nop
617         ssm             0,0
618         nop
619
620         ;
621         ; RDR 2 write sequence
622         ;
623         sync
624         ssm             0,0
625         STDIAG          (2)
626         ssm             0,0
627         b,n         perf_rdr_shift_out_W_leave
628         nop
629         ssm             0,0
630         nop
631
632         ;
633         ; RDR 3 write sequence
634         ;
635         sync
636         ssm             0,0
637         STDIAG          (3)
638         ssm             0,0
639         b,n         perf_rdr_shift_out_W_leave
640         nop
641         ssm             0,0
642         nop
643
644         ;
645         ; RDR 4 write sequence
646         ;
647         sync
648         ssm             0,0
649         STDIAG          (4)
650         ssm             0,0
651         b,n         perf_rdr_shift_out_W_leave
652         nop
653         ssm             0,0
654         nop
655
656         ;
657         ; RDR 5 write sequence
658         ;
659         sync
660         ssm             0,0
661         STDIAG          (5)
662         ssm             0,0
663         b,n         perf_rdr_shift_out_W_leave
664         nop
665         ssm             0,0
666         nop
667
668         ;
669         ; RDR 6 write sequence
670         ;
671         sync
672         ssm             0,0
673         STDIAG          (6)
674         ssm             0,0
675         b,n         perf_rdr_shift_out_W_leave
676         nop
677         ssm             0,0
678         nop
679
680         ;
681         ; RDR 7 write sequence
682         ;
683         sync
684         ssm             0,0
685         STDIAG          (7)
686         ssm             0,0
687         b,n         perf_rdr_shift_out_W_leave
688         nop
689         ssm             0,0
690         nop
691
692         ;
693         ; RDR 8 write sequence
694         ;
695         sync
696         ssm             0,0
697         STDIAG          (8)
698         ssm             0,0
699         b,n         perf_rdr_shift_out_W_leave
700         nop
701         ssm             0,0
702         nop
703
704         ;
705         ; RDR 9 write sequence
706         ;
707         sync
708         ssm             0,0
709         STDIAG          (9)
710         ssm             0,0
711         b,n         perf_rdr_shift_out_W_leave
712         nop
713         ssm             0,0
714         nop
715
716         ;
717         ; RDR 10 write sequence
718         ;
719         sync
720         ssm             0,0
721         STDIAG          (10)
722         STDIAG          (26)
723         ssm             0,0
724         b,n         perf_rdr_shift_out_W_leave
725         ssm             0,0
726         nop
727
728         ;
729         ; RDR 11 write sequence
730         ;
731         sync
732         ssm             0,0
733         STDIAG          (11)
734         STDIAG          (27)
735         ssm             0,0
736         b,n         perf_rdr_shift_out_W_leave
737         ssm             0,0
738         nop
739
740         ;
741         ; RDR 12 write sequence
742         ;
743         sync
744         ssm             0,0
745         STDIAG          (12)
746         ssm             0,0
747         b,n         perf_rdr_shift_out_W_leave
748         nop
749         ssm             0,0
750         nop
751
752         ;
753         ; RDR 13 write sequence
754         ;
755         sync
756         ssm             0,0
757         STDIAG          (13)
758         ssm             0,0
759         b,n         perf_rdr_shift_out_W_leave
760         nop
761         ssm             0,0
762         nop
763
764         ;
765         ; RDR 14 write sequence
766         ;
767         sync
768         ssm             0,0
769         STDIAG          (14)
770         ssm             0,0
771         b,n         perf_rdr_shift_out_W_leave
772         nop
773         ssm             0,0
774         nop
775
776         ;
777         ; RDR 15 write sequence
778         ;
779         sync
780         ssm             0,0
781         STDIAG          (15)
782         ssm             0,0
783         b,n         perf_rdr_shift_out_W_leave
784         nop
785         ssm             0,0
786         nop
787
788         ;
789         ; RDR 16 write sequence
790         ;
791         sync
792         ssm             0,0
793         STDIAG          (16)
794         ssm             0,0
795         b,n         perf_rdr_shift_out_W_leave
796         nop
797         ssm             0,0
798         nop
799
800         ;
801         ; RDR 17 write sequence
802         ;
803         sync
804         ssm             0,0
805         STDIAG          (17)
806         ssm             0,0
807         b,n         perf_rdr_shift_out_W_leave
808         nop
809         ssm             0,0
810         nop
811
812         ;
813         ; RDR 18 write sequence
814         ;
815         sync
816         ssm             0,0
817         STDIAG          (18)
818         ssm             0,0
819         b,n         perf_rdr_shift_out_W_leave
820         nop
821         ssm             0,0
822         nop
823
824         ;
825         ; RDR 19 write sequence
826         ;
827         sync
828         ssm             0,0
829         STDIAG          (19)
830         ssm             0,0
831         b,n         perf_rdr_shift_out_W_leave
832         nop
833         ssm             0,0
834         nop
835
836         ;
837         ; RDR 20 write sequence
838         ;
839         sync
840         ssm             0,0
841         STDIAG          (20)
842         ssm             0,0
843         b,n         perf_rdr_shift_out_W_leave
844         nop
845         ssm             0,0
846         nop
847
848         ;
849         ; RDR 21 write sequence
850         ;
851         sync
852         ssm             0,0
853         STDIAG          (21)
854         ssm             0,0
855         b,n         perf_rdr_shift_out_W_leave
856         nop
857         ssm             0,0
858         nop
859
860         ;
861         ; RDR 22 write sequence
862         ;
863         sync
864         ssm             0,0
865         STDIAG          (22)
866         ssm             0,0
867         b,n         perf_rdr_shift_out_W_leave
868         nop
869         ssm             0,0
870         nop
871
872         ;
873         ; RDR 23 write sequence
874         ;
875         sync
876         ssm             0,0
877         STDIAG          (23)
878         ssm             0,0
879         b,n         perf_rdr_shift_out_W_leave
880         nop
881         ssm             0,0
882         nop
883
884         ;
885         ; RDR 24 write sequence
886         ;
887         sync
888         ssm             0,0
889         STDIAG          (24)
890         ssm             0,0
891         b,n         perf_rdr_shift_out_W_leave
892         nop
893         ssm             0,0
894         nop
895
896         ;
897         ; RDR 25 write sequence
898         ;
899         sync
900         ssm             0,0
901         STDIAG          (25)
902         ssm             0,0
903         b,n         perf_rdr_shift_out_W_leave
904         nop
905         ssm             0,0
906         nop
907
908         ;
909         ; RDR 26 write sequence
910         ;
911         sync
912         ssm             0,0
913         STDIAG          (10)
914         STDIAG          (26)
915         ssm             0,0
916         b,n         perf_rdr_shift_out_W_leave
917         ssm             0,0
918         nop
919
920         ;
921         ; RDR 27 write sequence
922         ;
923         sync
924         ssm             0,0
925         STDIAG          (11)
926         STDIAG          (27)
927         ssm             0,0
928         b,n         perf_rdr_shift_out_W_leave
929         ssm             0,0
930         nop
931
932         ;
933         ; RDR 28 write sequence
934         ;
935         sync
936         ssm             0,0
937         STDIAG          (28)
938         ssm             0,0
939         b,n         perf_rdr_shift_out_W_leave
940         nop
941         ssm             0,0
942         nop
943
944         ;
945         ; RDR 29 write sequence
946         ;
947         sync
948         ssm             0,0
949         STDIAG          (29)
950         ssm             0,0
951         b,n         perf_rdr_shift_out_W_leave
952         nop
953         ssm             0,0
954         nop
955
956         ;
957         ; RDR 30 write sequence
958         ;
959         sync
960         ssm             0,0
961         STDIAG          (30)
962         ssm             0,0
963         b,n         perf_rdr_shift_out_W_leave
964         nop
965         ssm             0,0
966         nop
967
968         ;
969         ; RDR 31 write sequence
970         ;
971         sync
972         ssm             0,0
973         STDIAG          (31)
974         ssm             0,0
975         b,n         perf_rdr_shift_out_W_leave
976         nop
977         ssm             0,0
978         nop
979
980 perf_rdr_shift_out_W_leave:
981         bve             (%r2)
982         .exit
983         MTDIAG_2        (23)                    ; restore DR2
984         .procend
985 ENDPROC(perf_rdr_shift_out_W)
986
987
988 ;***********************************************************************
989 ;*
990 ;* Name: rdr_shift_in_U
991 ;*
992 ;* Description:
993 ;*      This routine shifts data in from the RDR in arg0 and returns
994 ;*      the result in ret0.  If the RDR is <= 64 bits in length, it
995 ;*      is shifted shifted backup immediately.  This is to compensate
996 ;*      for RDR10 which has bits that preclude PDC stack operations
997 ;*      when they are in the wrong state.
998 ;*
999 ;* Arguments:
1000 ;*      arg0 : rdr to be read
1001 ;*      arg1 : bit length of rdr
1002 ;*
1003 ;* Returns:
1004 ;*      ret0 = next 64 bits of rdr data from staging register
1005 ;*
1006 ;* Register usage:
1007 ;*      arg0 : rdr to be read                                                                   
1008 ;*      arg1 : bit length of rdr                                                                
1009 ;*      %r24 - original DR2 value
1010 ;*      %r23 - DR2 | DR2_SLOW_RET
1011 ;*      %r1  - scratch
1012 ;*
1013 ;***********************************************************************
1014
1015 ENTRY(perf_rdr_shift_in_U)
1016         .proc
1017         .callinfo frame=0,NO_CALLS
1018         .entry
1019
1020 ; read(shift in) the RDR.
1021 ;
1022 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1023 ; shifting is done, from or to, remote diagnose registers.
1024
1025         depdi,z         1,DR2_SLOW_RET,1,%r29
1026         MFDIAG_2        (24)
1027         or                      %r24,%r29,%r29
1028         MTDIAG_2        (29)                    ; set DR2_SLOW_RET
1029
1030         nop
1031         nop
1032         nop
1033         nop
1034
1035 ;
1036 ; Start of next 32-byte cacheline
1037 ;
1038         nop
1039         nop
1040         nop
1041         extrd,u         arg1,63,6,%r1
1042
1043         mtsar           %r1
1044         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
1045         blr             %r1,%r0         ; branch to 8-instruction sequence
1046         nop
1047
1048 ;
1049 ; Start of next 32-byte cacheline
1050 ;
1051         SFDIAG          (0)             ; RDR 0 read sequence
1052         ssm             0,0
1053         MFDIAG_1        (28)
1054         shrpd           ret0,%r0,%sar,%r1
1055         MTDIAG_1        (1)
1056         STDIAG          (0)
1057         ssm             0,0
1058         b,n         perf_rdr_shift_in_U_leave
1059
1060         SFDIAG          (1)             ; RDR 1 read sequence
1061         ssm             0,0
1062         MFDIAG_1        (28)
1063         shrpd           ret0,%r0,%sar,%r1
1064         MTDIAG_1        (1)
1065         STDIAG          (1)
1066         ssm             0,0
1067         b,n         perf_rdr_shift_in_U_leave
1068
1069         sync                            ; RDR 2 read sequence
1070         ssm             0,0
1071         SFDIAG          (4)
1072         ssm             0,0
1073         MFDIAG_1        (28)
1074         b,n         perf_rdr_shift_in_U_leave
1075         ssm             0,0
1076         nop
1077
1078         sync                            ; RDR 3 read sequence
1079         ssm             0,0
1080         SFDIAG          (3)
1081         ssm             0,0
1082         MFDIAG_1        (28)
1083         b,n         perf_rdr_shift_in_U_leave
1084         ssm             0,0
1085         nop
1086
1087         sync                            ; RDR 4 read sequence
1088         ssm             0,0
1089         SFDIAG          (4)
1090         ssm             0,0
1091         MFDIAG_1        (28)
1092         b,n         perf_rdr_shift_in_U_leave
1093         ssm             0,0
1094         nop
1095
1096         sync                            ; RDR 5 read sequence
1097         ssm             0,0
1098         SFDIAG          (5)
1099         ssm             0,0
1100         MFDIAG_1        (28)
1101         b,n         perf_rdr_shift_in_U_leave
1102         ssm             0,0
1103         nop
1104
1105         sync                            ; RDR 6 read sequence
1106         ssm             0,0
1107         SFDIAG          (6)
1108         ssm             0,0
1109         MFDIAG_1        (28)
1110         b,n         perf_rdr_shift_in_U_leave
1111         ssm             0,0
1112         nop
1113
1114         sync                            ; RDR 7 read sequence
1115         ssm             0,0
1116         SFDIAG          (7)
1117         ssm             0,0
1118         MFDIAG_1        (28)
1119         b,n         perf_rdr_shift_in_U_leave
1120         ssm             0,0
1121         nop
1122
1123         b,n         perf_rdr_shift_in_U_leave
1124         nop
1125         nop
1126         nop
1127         nop
1128         nop
1129         nop
1130         nop
1131
1132         SFDIAG          (9)             ; RDR 9 read sequence
1133         ssm             0,0
1134         MFDIAG_1        (28)
1135         shrpd           ret0,%r0,%sar,%r1
1136         MTDIAG_1        (1)
1137         STDIAG          (9)
1138         ssm             0,0
1139         b,n         perf_rdr_shift_in_U_leave
1140
1141         SFDIAG          (10)            ; RDR 10 read sequence
1142         ssm             0,0
1143         MFDIAG_1        (28)
1144         shrpd           ret0,%r0,%sar,%r1
1145         MTDIAG_1        (1)
1146         STDIAG          (10)
1147         ssm             0,0
1148         b,n         perf_rdr_shift_in_U_leave
1149
1150         SFDIAG          (11)            ; RDR 11 read sequence
1151         ssm             0,0
1152         MFDIAG_1        (28)
1153         shrpd           ret0,%r0,%sar,%r1
1154         MTDIAG_1        (1)
1155         STDIAG          (11)
1156         ssm             0,0
1157         b,n         perf_rdr_shift_in_U_leave
1158
1159         SFDIAG          (12)            ; RDR 12 read sequence
1160         ssm             0,0
1161         MFDIAG_1        (28)
1162         shrpd           ret0,%r0,%sar,%r1
1163         MTDIAG_1        (1)
1164         STDIAG          (12)
1165         ssm             0,0
1166         b,n         perf_rdr_shift_in_U_leave
1167
1168         SFDIAG          (13)            ; RDR 13 read sequence
1169         ssm             0,0
1170         MFDIAG_1        (28)
1171         shrpd           ret0,%r0,%sar,%r1
1172         MTDIAG_1        (1)
1173         STDIAG          (13)
1174         ssm             0,0
1175         b,n         perf_rdr_shift_in_U_leave
1176
1177         SFDIAG          (14)            ; RDR 14 read sequence
1178         ssm             0,0
1179         MFDIAG_1        (28)
1180         shrpd           ret0,%r0,%sar,%r1
1181         MTDIAG_1        (1)
1182         STDIAG          (14)
1183         ssm             0,0
1184         b,n         perf_rdr_shift_in_U_leave
1185
1186         SFDIAG          (15)            ; RDR 15 read sequence
1187         ssm             0,0
1188         MFDIAG_1        (28)
1189         shrpd           ret0,%r0,%sar,%r1
1190         MTDIAG_1        (1)
1191         STDIAG          (15)
1192         ssm             0,0
1193         b,n         perf_rdr_shift_in_U_leave
1194
1195         sync                            ; RDR 16 read sequence
1196         ssm             0,0
1197         SFDIAG          (16)
1198         ssm             0,0
1199         MFDIAG_1        (28)
1200         b,n         perf_rdr_shift_in_U_leave
1201         ssm             0,0
1202         nop
1203
1204         SFDIAG          (17)            ; RDR 17 read sequence
1205         ssm             0,0
1206         MFDIAG_1        (28)
1207         shrpd           ret0,%r0,%sar,%r1
1208         MTDIAG_1        (1)
1209         STDIAG          (17)
1210         ssm             0,0
1211         b,n         perf_rdr_shift_in_U_leave
1212
1213         SFDIAG          (18)            ; RDR 18 read sequence
1214         ssm             0,0
1215         MFDIAG_1        (28)
1216         shrpd           ret0,%r0,%sar,%r1
1217         MTDIAG_1        (1)
1218         STDIAG          (18)
1219         ssm             0,0
1220         b,n         perf_rdr_shift_in_U_leave
1221
1222         b,n         perf_rdr_shift_in_U_leave
1223         nop
1224         nop
1225         nop
1226         nop
1227         nop
1228         nop
1229         nop
1230
1231         sync                            ; RDR 20 read sequence
1232         ssm             0,0
1233         SFDIAG          (20)
1234         ssm             0,0
1235         MFDIAG_1        (28)
1236         b,n         perf_rdr_shift_in_U_leave
1237         ssm             0,0
1238         nop
1239
1240         sync                            ; RDR 21 read sequence
1241         ssm             0,0
1242         SFDIAG          (21)
1243         ssm             0,0
1244         MFDIAG_1        (28)
1245         b,n         perf_rdr_shift_in_U_leave
1246         ssm             0,0
1247         nop
1248
1249         sync                            ; RDR 22 read sequence
1250         ssm             0,0
1251         SFDIAG          (22)
1252         ssm             0,0
1253         MFDIAG_1        (28)
1254         b,n         perf_rdr_shift_in_U_leave
1255         ssm             0,0
1256         nop
1257
1258         sync                            ; RDR 23 read sequence
1259         ssm             0,0
1260         SFDIAG          (23)
1261         ssm             0,0
1262         MFDIAG_1        (28)
1263         b,n         perf_rdr_shift_in_U_leave
1264         ssm             0,0
1265         nop
1266
1267         sync                            ; RDR 24 read sequence
1268         ssm             0,0
1269         SFDIAG          (24)
1270         ssm             0,0
1271         MFDIAG_1        (28)
1272         b,n         perf_rdr_shift_in_U_leave
1273         ssm             0,0
1274         nop
1275
1276         sync                            ; RDR 25 read sequence
1277         ssm             0,0
1278         SFDIAG          (25)
1279         ssm             0,0
1280         MFDIAG_1        (28)
1281         b,n         perf_rdr_shift_in_U_leave
1282         ssm             0,0
1283         nop
1284
1285         SFDIAG          (26)            ; RDR 26 read sequence
1286         ssm             0,0
1287         MFDIAG_1        (28)
1288         shrpd           ret0,%r0,%sar,%r1
1289         MTDIAG_1        (1)
1290         STDIAG          (26)
1291         ssm             0,0
1292         b,n         perf_rdr_shift_in_U_leave
1293
1294         SFDIAG          (27)            ; RDR 27 read sequence
1295         ssm             0,0
1296         MFDIAG_1        (28)
1297         shrpd           ret0,%r0,%sar,%r1
1298         MTDIAG_1        (1)
1299         STDIAG          (27)
1300         ssm             0,0
1301         b,n         perf_rdr_shift_in_U_leave
1302
1303         sync                            ; RDR 28 read sequence
1304         ssm             0,0
1305         SFDIAG          (28)
1306         ssm             0,0
1307         MFDIAG_1        (28)
1308         b,n         perf_rdr_shift_in_U_leave
1309         ssm             0,0
1310         nop
1311
1312         b,n         perf_rdr_shift_in_U_leave
1313         nop
1314         nop
1315         nop
1316         nop
1317         nop
1318         nop
1319         nop
1320
1321         SFDIAG          (30)            ; RDR 30 read sequence
1322         ssm             0,0
1323         MFDIAG_1        (28)
1324         shrpd           ret0,%r0,%sar,%r1
1325         MTDIAG_1        (1)
1326         STDIAG          (30)
1327         ssm             0,0
1328         b,n         perf_rdr_shift_in_U_leave
1329
1330         SFDIAG          (31)            ; RDR 31 read sequence
1331         ssm             0,0
1332         MFDIAG_1        (28)
1333         shrpd           ret0,%r0,%sar,%r1
1334         MTDIAG_1        (1)
1335         STDIAG          (31)
1336         ssm             0,0
1337         b,n         perf_rdr_shift_in_U_leave
1338         nop
1339
1340 perf_rdr_shift_in_U_leave:
1341         bve                 (%r2)
1342         .exit
1343         MTDIAG_2        (24)                    ; restore DR2
1344         .procend
1345 ENDPROC(perf_rdr_shift_in_U)
1346
1347 ;***********************************************************************
1348 ;*
1349 ;* Name: rdr_shift_out_U
1350 ;*
1351 ;* Description:
1352 ;*      This routine moves data to the RDR's.  The double-word that
1353 ;*      arg1 points to is loaded and moved into the staging register.
1354 ;*      Then the STDIAG instruction for the RDR # in arg0 is called
1355 ;*      to move the data to the RDR.
1356 ;*
1357 ;* Arguments:
1358 ;*      arg0 = rdr target
1359 ;*      arg1 = buffer pointer
1360 ;*
1361 ;* Returns:
1362 ;*      None
1363 ;*
1364 ;* Register usage:
1365 ;*      arg0 = rdr target
1366 ;*      arg1 = buffer pointer
1367 ;*      %r24 - DR2 | DR2_SLOW_RET
1368 ;*      %r23 - original DR2 value
1369 ;*
1370 ;***********************************************************************
1371
1372 ENTRY(perf_rdr_shift_out_U)
1373         .proc
1374         .callinfo frame=0,NO_CALLS
1375         .entry
1376
1377 ;
1378 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1379 ; shifting is done, from or to, the remote diagnose registers.
1380 ;
1381
1382         depdi,z         1,DR2_SLOW_RET,1,%r24
1383         MFDIAG_2        (23)
1384         or              %r24,%r23,%r24
1385         MTDIAG_2        (24)            ; set DR2_SLOW_RET
1386
1387         MTDIAG_1        (25)            ; data to the staging register
1388         shladd          arg0,2,%r0,%r1  ; %r1 = 4 * RDR number
1389         blr             %r1,%r0         ; branch to 8-instruction sequence
1390         nop
1391
1392 ;
1393 ; 32-byte cachline aligned
1394 ;
1395
1396         sync                            ; RDR 0 write sequence
1397         ssm             0,0
1398         STDIAG          (0)
1399         ssm             0,0
1400         b,n         perf_rdr_shift_out_U_leave
1401         nop
1402         ssm             0,0
1403         nop
1404
1405         sync                            ; RDR 1 write sequence
1406         ssm             0,0
1407         STDIAG          (1)
1408         ssm             0,0
1409         b,n         perf_rdr_shift_out_U_leave
1410         nop
1411         ssm             0,0
1412         nop
1413
1414         sync                            ; RDR 2 write sequence
1415         ssm             0,0
1416         STDIAG          (2)
1417         ssm             0,0
1418         b,n         perf_rdr_shift_out_U_leave
1419         nop
1420         ssm             0,0
1421         nop
1422
1423         sync                            ; RDR 3 write sequence
1424         ssm             0,0
1425         STDIAG          (3)
1426         ssm             0,0
1427         b,n         perf_rdr_shift_out_U_leave
1428         nop
1429         ssm             0,0
1430         nop
1431
1432         sync                            ; RDR 4 write sequence
1433         ssm             0,0
1434         STDIAG          (4)
1435         ssm             0,0
1436         b,n         perf_rdr_shift_out_U_leave
1437         nop
1438         ssm             0,0
1439         nop
1440
1441         sync                            ; RDR 5 write sequence
1442         ssm             0,0
1443         STDIAG          (5)
1444         ssm             0,0
1445         b,n         perf_rdr_shift_out_U_leave
1446         nop
1447         ssm             0,0
1448         nop
1449
1450         sync                            ; RDR 6 write sequence
1451         ssm             0,0
1452         STDIAG          (6)
1453         ssm             0,0
1454         b,n         perf_rdr_shift_out_U_leave
1455         nop
1456         ssm             0,0
1457         nop
1458
1459         sync                            ; RDR 7 write sequence
1460         ssm             0,0
1461         STDIAG          (7)
1462         ssm             0,0
1463         b,n         perf_rdr_shift_out_U_leave
1464         nop
1465         ssm             0,0
1466         nop
1467
1468         sync                            ; RDR 8 write sequence
1469         ssm             0,0
1470         STDIAG          (8)
1471         ssm             0,0
1472         b,n         perf_rdr_shift_out_U_leave
1473         nop
1474         ssm             0,0
1475         nop
1476
1477         sync                            ; RDR 9 write sequence
1478         ssm             0,0
1479         STDIAG          (9)
1480         ssm             0,0
1481         b,n         perf_rdr_shift_out_U_leave
1482         nop
1483         ssm             0,0
1484         nop
1485
1486         sync                            ; RDR 10 write sequence
1487         ssm             0,0
1488         STDIAG          (10)
1489         ssm             0,0
1490         b,n         perf_rdr_shift_out_U_leave
1491         nop
1492         ssm             0,0
1493         nop
1494
1495         sync                            ; RDR 11 write sequence
1496         ssm             0,0
1497         STDIAG          (11)
1498         ssm             0,0
1499         b,n         perf_rdr_shift_out_U_leave
1500         nop
1501         ssm             0,0
1502         nop
1503
1504         sync                            ; RDR 12 write sequence
1505         ssm             0,0
1506         STDIAG          (12)
1507         ssm             0,0
1508         b,n         perf_rdr_shift_out_U_leave
1509         nop
1510         ssm             0,0
1511         nop
1512
1513         sync                            ; RDR 13 write sequence
1514         ssm             0,0
1515         STDIAG          (13)
1516         ssm             0,0
1517         b,n         perf_rdr_shift_out_U_leave
1518         nop
1519         ssm             0,0
1520         nop
1521
1522         sync                            ; RDR 14 write sequence
1523         ssm             0,0
1524         STDIAG          (14)
1525         ssm             0,0
1526         b,n         perf_rdr_shift_out_U_leave
1527         nop
1528         ssm             0,0
1529         nop
1530
1531         sync                            ; RDR 15 write sequence
1532         ssm             0,0
1533         STDIAG          (15)
1534         ssm             0,0
1535         b,n         perf_rdr_shift_out_U_leave
1536         nop
1537         ssm             0,0
1538         nop
1539
1540         sync                            ; RDR 16 write sequence
1541         ssm             0,0
1542         STDIAG          (16)
1543         ssm             0,0
1544         b,n         perf_rdr_shift_out_U_leave
1545         nop
1546         ssm             0,0
1547         nop
1548
1549         sync                            ; RDR 17 write sequence
1550         ssm             0,0
1551         STDIAG          (17)
1552         ssm             0,0
1553         b,n         perf_rdr_shift_out_U_leave
1554         nop
1555         ssm             0,0
1556         nop
1557
1558         sync                            ; RDR 18 write sequence
1559         ssm             0,0
1560         STDIAG          (18)
1561         ssm             0,0
1562         b,n         perf_rdr_shift_out_U_leave
1563         nop
1564         ssm             0,0
1565         nop
1566
1567         sync                            ; RDR 19 write sequence
1568         ssm             0,0
1569         STDIAG          (19)
1570         ssm             0,0
1571         b,n         perf_rdr_shift_out_U_leave
1572         nop
1573         ssm             0,0
1574         nop
1575
1576         sync                            ; RDR 20 write sequence
1577         ssm             0,0
1578         STDIAG          (20)
1579         ssm             0,0
1580         b,n         perf_rdr_shift_out_U_leave
1581         nop
1582         ssm             0,0
1583         nop
1584
1585         sync                            ; RDR 21 write sequence
1586         ssm             0,0
1587         STDIAG          (21)
1588         ssm             0,0
1589         b,n         perf_rdr_shift_out_U_leave
1590         nop
1591         ssm             0,0
1592         nop
1593
1594         sync                            ; RDR 22 write sequence
1595         ssm             0,0
1596         STDIAG          (22)
1597         ssm             0,0
1598         b,n         perf_rdr_shift_out_U_leave
1599         nop
1600         ssm             0,0
1601         nop
1602
1603         sync                            ; RDR 23 write sequence
1604         ssm             0,0
1605         STDIAG          (23)
1606         ssm             0,0
1607         b,n         perf_rdr_shift_out_U_leave
1608         nop
1609         ssm             0,0
1610         nop
1611
1612         sync                            ; RDR 24 write sequence
1613         ssm             0,0
1614         STDIAG          (24)
1615         ssm             0,0
1616         b,n         perf_rdr_shift_out_U_leave
1617         nop
1618         ssm             0,0
1619         nop
1620
1621         sync                            ; RDR 25 write sequence
1622         ssm             0,0
1623         STDIAG          (25)
1624         ssm             0,0
1625         b,n         perf_rdr_shift_out_U_leave
1626         nop
1627         ssm             0,0
1628         nop
1629
1630         sync                            ; RDR 26 write sequence
1631         ssm             0,0
1632         STDIAG          (26)
1633         ssm             0,0
1634         b,n         perf_rdr_shift_out_U_leave
1635         nop
1636         ssm             0,0
1637         nop
1638
1639         sync                            ; RDR 27 write sequence
1640         ssm             0,0
1641         STDIAG          (27)
1642         ssm             0,0
1643         b,n         perf_rdr_shift_out_U_leave
1644         nop
1645         ssm             0,0
1646         nop
1647
1648         sync                            ; RDR 28 write sequence
1649         ssm             0,0
1650         STDIAG          (28)
1651         ssm             0,0
1652         b,n         perf_rdr_shift_out_U_leave
1653         nop
1654         ssm             0,0
1655         nop
1656
1657         sync                            ; RDR 29 write sequence
1658         ssm             0,0
1659         STDIAG          (29)
1660         ssm             0,0
1661         b,n         perf_rdr_shift_out_U_leave
1662         nop
1663         ssm             0,0
1664         nop
1665
1666         sync                            ; RDR 30 write sequence
1667         ssm             0,0
1668         STDIAG          (30)
1669         ssm             0,0
1670         b,n         perf_rdr_shift_out_U_leave
1671         nop
1672         ssm             0,0
1673         nop
1674
1675         sync                            ; RDR 31 write sequence
1676         ssm             0,0
1677         STDIAG          (31)
1678         ssm             0,0
1679         b,n         perf_rdr_shift_out_U_leave
1680         nop
1681         ssm             0,0
1682         nop
1683
1684 perf_rdr_shift_out_U_leave:
1685         bve             (%r2)
1686         .exit
1687         MTDIAG_2        (23)                    ; restore DR2
1688         .procend
1689 ENDPROC(perf_rdr_shift_out_U)
1690