[MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
[linux-2.6.git] / arch / mips / sni / setup.c
1 /*
2  * Setup pointers to hardware-dependent routines.
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
9  */
10 #include <linux/config.h>
11 #include <linux/eisa.h>
12 #include <linux/hdreg.h>
13 #include <linux/ioport.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/mc146818rtc.h>
18 #include <linux/pm.h>
19 #include <linux/pci.h>
20 #include <linux/console.h>
21 #include <linux/fb.h>
22 #include <linux/tty.h>
23
24 #ifdef CONFIG_ARC
25 #include <asm/arc/types.h>
26 #include <asm/sgialib.h>
27 #endif
28
29 #include <asm/bcache.h>
30 #include <asm/bootinfo.h>
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 #include <asm/mc146818-time.h>
34 #include <asm/processor.h>
35 #include <asm/ptrace.h>
36 #include <asm/reboot.h>
37 #include <asm/sni.h>
38 #include <asm/time.h>
39 #include <asm/traps.h>
40
41 extern void sni_machine_restart(char *command);
42 extern void sni_machine_halt(void);
43 extern void sni_machine_power_off(void);
44
45 static void __init sni_rm200_pci_timer_setup(struct irqaction *irq)
46 {
47         /* set the clock to 100 Hz */
48         outb_p(0x34,0x43);              /* binary, mode 2, LSB/MSB, ch 0 */
49         outb_p(LATCH & 0xff , 0x40);    /* LSB */
50         outb(LATCH >> 8 , 0x40);        /* MSB */
51         setup_irq(0, irq);
52 }
53
54 /*
55  * A bit more gossip about the iron we're running on ...
56  */
57 static inline void sni_pcimt_detect(void)
58 {
59         char boardtype[80];
60         unsigned char csmsr;
61         char *p = boardtype;
62         unsigned int asic;
63
64         csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
65
66         p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300");
67         if ((csmsr & 0x80) == 0)
68                 p += sprintf(p, ", board revision %s",
69                              (csmsr & 0x20) ? "D" : "C");
70         asic = csmsr & 0x80;
71         asic = (csmsr & 0x08) ? asic : !asic;
72         p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
73         printk("%s.\n", boardtype);
74 }
75
76 static void __init sni_display_setup(void)
77 {
78 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) && defined(CONFIG_ARC)
79         struct screen_info *si = &screen_info;
80         DISPLAY_STATUS *di;
81
82         di = ArcGetDisplayStatus(1);
83
84         if (di) {
85                 si->orig_x              = di->CursorXPosition;
86                 si->orig_y              = di->CursorYPosition;
87                 si->orig_video_cols     = di->CursorMaxXPosition;
88                 si->orig_video_lines    = di->CursorMaxYPosition;
89                 si->orig_video_isVGA    = VIDEO_TYPE_VGAC;
90                 si->orig_video_points   = 16;
91         }
92 #endif
93 }
94
95 static struct resource sni_io_resource = {
96         .start  = 0x00001000UL,
97         .end    = 0x03bfffffUL,
98         .name   = "PCIMT IO MEM",
99         .flags  = IORESOURCE_IO,
100 };
101
102 static struct resource pcimt_io_resources[] = {
103         {
104                 .start  = 0x00,
105                 .end    = 0x1f,
106                 .name   = "dma1",
107                 .flags  = IORESOURCE_BUSY
108         }, {
109                 .start  =  0x40,
110                 .end    = 0x5f,
111                 .name   = "timer",
112                 .flags  = IORESOURCE_BUSY
113         }, {
114                 .start  =  0x60,
115                 .end    = 0x6f,
116                 .name   = "keyboard",
117                 .flags  = IORESOURCE_BUSY
118         }, {
119                 .start  =  0x80,
120                 .end    = 0x8f,
121                 .name   = "dma page reg",
122                 .flags  = IORESOURCE_BUSY
123         }, {
124                 .start  =  0xc0,
125                 .end    = 0xdf,
126                 .name   = "dma2",
127                 .flags  = IORESOURCE_BUSY
128         }, {
129                 .start  =  0xcfc,
130                 .end    = 0xcff,
131                 .name   = "PCI config data",
132                 .flags  = IORESOURCE_BUSY
133         }
134 };
135
136 static struct resource sni_mem_resource = {
137         .start  = 0x10000000UL,
138         .end    = 0xffffffffUL,
139         .name   = "PCIMT PCI MEM",
140         .flags  = IORESOURCE_MEM
141 };
142
143 /*
144  * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
145  * for other purposes.  Be paranoid and allocate all of the before the PCI
146  * code gets a chance to to map anything else there ...
147  *
148  * This leaves the following areas available:
149  *
150  * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
151  * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
152  * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
153  * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
154  * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
155  */
156 static struct resource pcimt_mem_resources[] = {
157         {
158                 .start  = 0x100a0000,
159                 .end    = 0x100bffff,
160                 .name   = "Video RAM area",
161                 .flags  = IORESOURCE_BUSY
162         }, {
163                 .start  = 0x100c0000,
164                 .end    = 0x100fffff,
165                 .name   = "ISA Reserved",
166                 .flags  = IORESOURCE_BUSY
167         }, {
168                 .start  = 0x14000000,
169                 .end    = 0x17bfffff,
170                 .name   = "PCI IO",
171                 .flags  = IORESOURCE_BUSY
172         }, {
173                 .start  = 0x17c00000,
174                 .end    = 0x17ffffff,
175                 .name   = "Cache Replacement Area",
176                 .flags  = IORESOURCE_BUSY
177         }, {
178                 .start  = 0x1a000000,
179                 .end    = 0x1a000003,
180                 .name   = "PCI INT Acknowledge",
181                 .flags  = IORESOURCE_BUSY
182         }, {
183                 .start  = 0x1fc00000,
184                 .end    = 0x1fc7ffff,
185                 .name   = "Boot PROM",
186                 .flags  = IORESOURCE_BUSY
187         }, {
188                 .start  = 0x1fc80000,
189                 .end    = 0x1fcfffff,
190                 .name   = "Diag PROM",
191                 .flags  = IORESOURCE_BUSY
192         }, {
193                 .start  = 0x1fd00000,
194                 .end    = 0x1fdfffff,
195                 .name   = "X-Bus",
196                 .flags  = IORESOURCE_BUSY
197         }, {
198                 .start  = 0x1fe00000,
199                 .end    = 0x1fefffff,
200                 .name   = "BIOS map",
201                 .flags  = IORESOURCE_BUSY
202         }, {
203                 .start  = 0x1ff00000,
204                 .end    = 0x1ff7ffff,
205                 .name   = "NVRAM / EEPROM",
206                 .flags  = IORESOURCE_BUSY
207         }, {
208                 .start  = 0x1fff0000,
209                 .end    = 0x1fffefff,
210                 .name   = "ASIC PCI",
211                 .flags  = IORESOURCE_BUSY
212         }, {
213                 .start  = 0x1ffff000,
214                 .end    = 0x1fffffff,
215                 .name   = "MP Agent",
216                 .flags  = IORESOURCE_BUSY
217         }, {
218                 .start  = 0x20000000,
219                 .end    = 0x9fffffff,
220                 .name   = "Main Memory",
221                 .flags  = IORESOURCE_BUSY
222         }
223 };
224
225 static void __init sni_resource_init(void)
226 {
227         int i;
228
229         /* request I/O space for devices used on all i[345]86 PCs */
230         for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
231                 request_resource(&ioport_resource, pcimt_io_resources + i);
232
233         /* request mem space for pcimt-specific devices */
234         for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
235                 request_resource(&sni_mem_resource, pcimt_mem_resources + i);
236
237         ioport_resource.end = sni_io_resource.end;
238 }
239
240 extern struct pci_ops sni_pci_ops;
241
242 static struct pci_controller sni_controller = {
243         .pci_ops        = &sni_pci_ops,
244         .mem_resource   = &sni_mem_resource,
245         .mem_offset     = 0x10000000UL,
246         .io_resource    = &sni_io_resource,
247         .io_offset      = 0x00000000UL
248 };
249
250 static inline void sni_pcimt_time_init(void)
251 {
252         rtc_mips_get_time = mc146818_get_cmos_time;
253         rtc_mips_set_time = mc146818_set_rtc_mmss;
254 }
255
256 void __init plat_mem_setup(void)
257 {
258         sni_pcimt_detect();
259         sni_pcimt_sc_init();
260         sni_pcimt_time_init();
261
262         set_io_port_base(SNI_PORT_BASE);
263         ioport_resource.end = sni_io_resource.end;
264
265         /*
266          * Setup (E)ISA I/O memory access stuff
267          */
268         isa_slot_offset = 0xb0000000;
269 #ifdef CONFIG_EISA
270         EISA_bus = 1;
271 #endif
272
273         sni_resource_init();
274         board_timer_setup = sni_rm200_pci_timer_setup;
275
276         _machine_restart = sni_machine_restart;
277         _machine_halt = sni_machine_halt;
278         pm_power_off = sni_machine_power_off;
279
280         sni_display_setup();
281
282 #ifdef CONFIG_PCI
283         register_pci_controller(&sni_controller);
284 #endif
285 }