Linux-2.6.12-rc2
[linux-2.6.git] / arch / mips / oprofile / op_model_rm9000.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2004 by Ralf Baechle
7  */
8 #include <linux/oprofile.h>
9 #include <linux/interrupt.h>
10 #include <linux/smp.h>
11
12 #include "op_impl.h"
13
14 #define RM9K_COUNTER1_EVENT(event)      ((event) << 0)
15 #define RM9K_COUNTER1_SUPERVISOR        (1ULL    <<  7)
16 #define RM9K_COUNTER1_KERNEL            (1ULL    <<  8)
17 #define RM9K_COUNTER1_USER              (1ULL    <<  9)
18 #define RM9K_COUNTER1_ENABLE            (1ULL    << 10)
19 #define RM9K_COUNTER1_OVERFLOW          (1ULL    << 15)
20
21 #define RM9K_COUNTER2_EVENT(event)      ((event) << 16)
22 #define RM9K_COUNTER2_SUPERVISOR        (1ULL    << 23)
23 #define RM9K_COUNTER2_KERNEL            (1ULL    << 24)
24 #define RM9K_COUNTER2_USER              (1ULL    << 25)
25 #define RM9K_COUNTER2_ENABLE            (1ULL    << 26)
26 #define RM9K_COUNTER2_OVERFLOW          (1ULL    << 31)
27
28 extern unsigned int rm9000_perfcount_irq;
29
30 static struct rm9k_register_config {
31         unsigned int control;
32         unsigned int reset_counter1;
33         unsigned int reset_counter2;
34 } reg;
35
36 /* Compute all of the registers in preparation for enabling profiling.  */
37
38 static void rm9000_reg_setup(struct op_counter_config *ctr)
39 {
40         unsigned int control = 0;
41
42         /* Compute the performance counter control word.  */
43         /* For now count kernel and user mode */
44         if (ctr[0].enabled)
45                 control |= RM9K_COUNTER1_EVENT(ctr[0].event) |
46                            RM9K_COUNTER1_KERNEL |
47                            RM9K_COUNTER1_USER |
48                            RM9K_COUNTER1_ENABLE;
49         if (ctr[1].enabled)
50                 control |= RM9K_COUNTER2_EVENT(ctr[1].event) |
51                            RM9K_COUNTER2_KERNEL |
52                            RM9K_COUNTER2_USER |
53                            RM9K_COUNTER2_ENABLE;
54         reg.control = control;
55
56         reg.reset_counter1 = 0x80000000 - ctr[0].count;
57         reg.reset_counter2 = 0x80000000 - ctr[1].count;
58 }
59
60 /* Program all of the registers in preparation for enabling profiling.  */
61
62 static void rm9000_cpu_setup (void *args)
63 {
64         uint64_t perfcount;
65
66         perfcount = ((uint64_t) reg.reset_counter2 << 32) | reg.reset_counter1;
67         write_c0_perfcount(perfcount);
68 }
69
70 static void rm9000_cpu_start(void *args)
71 {
72         /* Start all counters on current CPU */
73         write_c0_perfcontrol(reg.control);
74 }
75
76 static void rm9000_cpu_stop(void *args)
77 {
78         /* Stop all counters on current CPU */
79         write_c0_perfcontrol(0);
80 }
81
82 static irqreturn_t rm9000_perfcount_handler(int irq, void * dev_id,
83         struct pt_regs *regs)
84 {
85         unsigned int control = read_c0_perfcontrol();
86         uint32_t counter1, counter2;
87         uint64_t counters;
88
89         /*
90          * RM9000 combines two 32-bit performance counters into a single
91          * 64-bit coprocessor zero register.  To avoid a race updating the
92          * registers we need to stop the counters while we're messing with
93          * them ...
94          */
95         write_c0_perfcontrol(0);
96
97         counters = read_c0_perfcount();
98         counter1 = counters;
99         counter2 = counters >> 32;
100
101         if (control & RM9K_COUNTER1_OVERFLOW) {
102                 oprofile_add_sample(regs, 0);
103                 counter1 = reg.reset_counter1;
104         }
105         if (control & RM9K_COUNTER2_OVERFLOW) {
106                 oprofile_add_sample(regs, 1);
107                 counter2 = reg.reset_counter2;
108         }
109
110         counters = ((uint64_t)counter2 << 32) | counter1;
111         write_c0_perfcount(counters);
112         write_c0_perfcontrol(reg.control);
113
114         return IRQ_HANDLED;
115 }
116
117 static int rm9000_init(void)
118 {
119         return request_irq(rm9000_perfcount_irq, rm9000_perfcount_handler,
120                            0, "Perfcounter", NULL);
121 }
122
123 static void rm9000_exit(void)
124 {
125         free_irq(rm9000_perfcount_irq, NULL);
126 }
127
128 struct op_mips_model op_model_rm9000 = {
129         .reg_setup      = rm9000_reg_setup,
130         .cpu_setup      = rm9000_cpu_setup,
131         .init           = rm9000_init,
132         .exit           = rm9000_exit,
133         .cpu_start      = rm9000_cpu_start,
134         .cpu_stop       = rm9000_cpu_stop,
135         .cpu_type       = "mips/rm9000",
136         .num_counters   = 2
137 };