ia64: allocate percpu area for cpu0 like percpu areas for other cpus
[linux-2.6.git] / arch / blackfin / mach-common / smp.c
1 /*
2  * File:         arch/blackfin/kernel/smp.c
3  * Author:       Philippe Gerum <rpm@xenomai.org>
4  * IPI management based on arch/arm/kernel/smp.c.
5  *
6  *               Copyright 2007 Analog Devices Inc.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, see the file COPYING, or write
20  * to the Free Software Foundation, Inc.,
21  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
22  */
23
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/spinlock.h>
28 #include <linux/sched.h>
29 #include <linux/interrupt.h>
30 #include <linux/cache.h>
31 #include <linux/profile.h>
32 #include <linux/errno.h>
33 #include <linux/mm.h>
34 #include <linux/cpu.h>
35 #include <linux/smp.h>
36 #include <linux/seq_file.h>
37 #include <linux/irq.h>
38 #include <asm/atomic.h>
39 #include <asm/cacheflush.h>
40 #include <asm/mmu_context.h>
41 #include <asm/pgtable.h>
42 #include <asm/pgalloc.h>
43 #include <asm/processor.h>
44 #include <asm/ptrace.h>
45 #include <asm/cpu.h>
46 #include <asm/time.h>
47 #include <linux/err.h>
48
49 /*
50  * Anomaly notes:
51  * 05000120 - we always define corelock as 32-bit integer in L2
52  */
53 struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
54
55 void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
56         *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb,
57         *init_saved_dcplb_fault_addr_coreb;
58
59 cpumask_t cpu_possible_map;
60 EXPORT_SYMBOL(cpu_possible_map);
61
62 cpumask_t cpu_online_map;
63 EXPORT_SYMBOL(cpu_online_map);
64
65 #define BFIN_IPI_RESCHEDULE   0
66 #define BFIN_IPI_CALL_FUNC    1
67 #define BFIN_IPI_CPU_STOP     2
68
69 struct blackfin_flush_data {
70         unsigned long start;
71         unsigned long end;
72 };
73
74 void *secondary_stack;
75
76
77 struct smp_call_struct {
78         void (*func)(void *info);
79         void *info;
80         int wait;
81         cpumask_t pending;
82         cpumask_t waitmask;
83 };
84
85 static struct blackfin_flush_data smp_flush_data;
86
87 static DEFINE_SPINLOCK(stop_lock);
88
89 struct ipi_message {
90         struct list_head list;
91         unsigned long type;
92         struct smp_call_struct call_struct;
93 };
94
95 struct ipi_message_queue {
96         struct list_head head;
97         spinlock_t lock;
98         unsigned long count;
99 };
100
101 static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);
102
103 static void ipi_cpu_stop(unsigned int cpu)
104 {
105         spin_lock(&stop_lock);
106         printk(KERN_CRIT "CPU%u: stopping\n", cpu);
107         dump_stack();
108         spin_unlock(&stop_lock);
109
110         cpu_clear(cpu, cpu_online_map);
111
112         local_irq_disable();
113
114         while (1)
115                 SSYNC();
116 }
117
118 static void ipi_flush_icache(void *info)
119 {
120         struct blackfin_flush_data *fdata = info;
121
122         /* Invalidate the memory holding the bounds of the flushed region. */
123         blackfin_dcache_invalidate_range((unsigned long)fdata,
124                                          (unsigned long)fdata + sizeof(*fdata));
125
126         blackfin_icache_flush_range(fdata->start, fdata->end);
127 }
128
129 static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
130 {
131         int wait;
132         void (*func)(void *info);
133         void *info;
134         func = msg->call_struct.func;
135         info = msg->call_struct.info;
136         wait = msg->call_struct.wait;
137         cpu_clear(cpu, msg->call_struct.pending);
138         func(info);
139         if (wait)
140                 cpu_clear(cpu, msg->call_struct.waitmask);
141         else
142                 kfree(msg);
143 }
144
145 static irqreturn_t ipi_handler(int irq, void *dev_instance)
146 {
147         struct ipi_message *msg;
148         struct ipi_message_queue *msg_queue;
149         unsigned int cpu = smp_processor_id();
150
151         platform_clear_ipi(cpu);
152
153         msg_queue = &__get_cpu_var(ipi_msg_queue);
154         msg_queue->count++;
155
156         spin_lock(&msg_queue->lock);
157         while (!list_empty(&msg_queue->head)) {
158                 msg = list_entry(msg_queue->head.next, typeof(*msg), list);
159                 list_del(&msg->list);
160                 switch (msg->type) {
161                 case BFIN_IPI_RESCHEDULE:
162                         /* That's the easiest one; leave it to
163                          * return_from_int. */
164                         kfree(msg);
165                         break;
166                 case BFIN_IPI_CALL_FUNC:
167                         spin_unlock(&msg_queue->lock);
168                         ipi_call_function(cpu, msg);
169                         spin_lock(&msg_queue->lock);
170                         break;
171                 case BFIN_IPI_CPU_STOP:
172                         spin_unlock(&msg_queue->lock);
173                         ipi_cpu_stop(cpu);
174                         spin_lock(&msg_queue->lock);
175                         kfree(msg);
176                         break;
177                 default:
178                         printk(KERN_CRIT "CPU%u: Unknown IPI message \
179                         0x%lx\n", cpu, msg->type);
180                         kfree(msg);
181                         break;
182                 }
183         }
184         spin_unlock(&msg_queue->lock);
185         return IRQ_HANDLED;
186 }
187
188 static void ipi_queue_init(void)
189 {
190         unsigned int cpu;
191         struct ipi_message_queue *msg_queue;
192         for_each_possible_cpu(cpu) {
193                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
194                 INIT_LIST_HEAD(&msg_queue->head);
195                 spin_lock_init(&msg_queue->lock);
196                 msg_queue->count = 0;
197         }
198 }
199
200 int smp_call_function(void (*func)(void *info), void *info, int wait)
201 {
202         unsigned int cpu;
203         cpumask_t callmap;
204         unsigned long flags;
205         struct ipi_message_queue *msg_queue;
206         struct ipi_message *msg;
207
208         callmap = cpu_online_map;
209         cpu_clear(smp_processor_id(), callmap);
210         if (cpus_empty(callmap))
211                 return 0;
212
213         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
214         if (!msg)
215                 return -ENOMEM;
216         INIT_LIST_HEAD(&msg->list);
217         msg->call_struct.func = func;
218         msg->call_struct.info = info;
219         msg->call_struct.wait = wait;
220         msg->call_struct.pending = callmap;
221         msg->call_struct.waitmask = callmap;
222         msg->type = BFIN_IPI_CALL_FUNC;
223
224         for_each_cpu_mask(cpu, callmap) {
225                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
226                 spin_lock_irqsave(&msg_queue->lock, flags);
227                 list_add_tail(&msg->list, &msg_queue->head);
228                 spin_unlock_irqrestore(&msg_queue->lock, flags);
229                 platform_send_ipi_cpu(cpu);
230         }
231         if (wait) {
232                 while (!cpus_empty(msg->call_struct.waitmask))
233                         blackfin_dcache_invalidate_range(
234                                 (unsigned long)(&msg->call_struct.waitmask),
235                                 (unsigned long)(&msg->call_struct.waitmask));
236                 kfree(msg);
237         }
238         return 0;
239 }
240 EXPORT_SYMBOL_GPL(smp_call_function);
241
242 int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
243                                 int wait)
244 {
245         unsigned int cpu = cpuid;
246         cpumask_t callmap;
247         unsigned long flags;
248         struct ipi_message_queue *msg_queue;
249         struct ipi_message *msg;
250
251         if (cpu_is_offline(cpu))
252                 return 0;
253         cpus_clear(callmap);
254         cpu_set(cpu, callmap);
255
256         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
257         if (!msg)
258                 return -ENOMEM;
259         INIT_LIST_HEAD(&msg->list);
260         msg->call_struct.func = func;
261         msg->call_struct.info = info;
262         msg->call_struct.wait = wait;
263         msg->call_struct.pending = callmap;
264         msg->call_struct.waitmask = callmap;
265         msg->type = BFIN_IPI_CALL_FUNC;
266
267         msg_queue = &per_cpu(ipi_msg_queue, cpu);
268         spin_lock_irqsave(&msg_queue->lock, flags);
269         list_add_tail(&msg->list, &msg_queue->head);
270         spin_unlock_irqrestore(&msg_queue->lock, flags);
271         platform_send_ipi_cpu(cpu);
272
273         if (wait) {
274                 while (!cpus_empty(msg->call_struct.waitmask))
275                         blackfin_dcache_invalidate_range(
276                                 (unsigned long)(&msg->call_struct.waitmask),
277                                 (unsigned long)(&msg->call_struct.waitmask));
278                 kfree(msg);
279         }
280         return 0;
281 }
282 EXPORT_SYMBOL_GPL(smp_call_function_single);
283
284 void smp_send_reschedule(int cpu)
285 {
286         unsigned long flags;
287         struct ipi_message_queue *msg_queue;
288         struct ipi_message *msg;
289
290         if (cpu_is_offline(cpu))
291                 return;
292
293         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
294         if (!msg)
295                 return;
296         memset(msg, 0, sizeof(msg));
297         INIT_LIST_HEAD(&msg->list);
298         msg->type = BFIN_IPI_RESCHEDULE;
299
300         msg_queue = &per_cpu(ipi_msg_queue, cpu);
301         spin_lock_irqsave(&msg_queue->lock, flags);
302         list_add_tail(&msg->list, &msg_queue->head);
303         spin_unlock_irqrestore(&msg_queue->lock, flags);
304         platform_send_ipi_cpu(cpu);
305
306         return;
307 }
308
309 void smp_send_stop(void)
310 {
311         unsigned int cpu;
312         cpumask_t callmap;
313         unsigned long flags;
314         struct ipi_message_queue *msg_queue;
315         struct ipi_message *msg;
316
317         callmap = cpu_online_map;
318         cpu_clear(smp_processor_id(), callmap);
319         if (cpus_empty(callmap))
320                 return;
321
322         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
323         if (!msg)
324                 return;
325         memset(msg, 0, sizeof(msg));
326         INIT_LIST_HEAD(&msg->list);
327         msg->type = BFIN_IPI_CPU_STOP;
328
329         for_each_cpu_mask(cpu, callmap) {
330                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
331                 spin_lock_irqsave(&msg_queue->lock, flags);
332                 list_add_tail(&msg->list, &msg_queue->head);
333                 spin_unlock_irqrestore(&msg_queue->lock, flags);
334                 platform_send_ipi_cpu(cpu);
335         }
336         return;
337 }
338
339 int __cpuinit __cpu_up(unsigned int cpu)
340 {
341         struct task_struct *idle;
342         int ret;
343
344         idle = fork_idle(cpu);
345         if (IS_ERR(idle)) {
346                 printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
347                 return PTR_ERR(idle);
348         }
349
350         secondary_stack = task_stack_page(idle) + THREAD_SIZE;
351         smp_wmb();
352
353         ret = platform_boot_secondary(cpu, idle);
354
355         if (ret) {
356                 cpu_clear(cpu, cpu_present_map);
357                 printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
358                 free_task(idle);
359         } else
360                 cpu_set(cpu, cpu_online_map);
361
362         secondary_stack = NULL;
363
364         return ret;
365 }
366
367 static void __cpuinit setup_secondary(unsigned int cpu)
368 {
369 #if !defined(CONFIG_TICKSOURCE_GPTMR0)
370         struct irq_desc *timer_desc;
371 #endif
372         unsigned long ilat;
373
374         bfin_write_IMASK(0);
375         CSYNC();
376         ilat = bfin_read_ILAT();
377         CSYNC();
378         bfin_write_ILAT(ilat);
379         CSYNC();
380
381         /* Enable interrupt levels IVG7-15. IARs have been already
382          * programmed by the boot CPU.  */
383         bfin_irq_flags |= IMASK_IVG15 |
384             IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
385             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
386
387 #if defined(CONFIG_TICKSOURCE_GPTMR0)
388         /* Power down the core timer, just to play safe. */
389         bfin_write_TCNTL(0);
390
391         /* system timer0 has been setup by CoreA. */
392 #else
393         timer_desc = irq_desc + IRQ_CORETMR;
394         setup_core_timer();
395         timer_desc->chip->enable(IRQ_CORETMR);
396 #endif
397 }
398
399 void __cpuinit secondary_start_kernel(void)
400 {
401         unsigned int cpu = smp_processor_id();
402         struct mm_struct *mm = &init_mm;
403
404         if (_bfin_swrst & SWRST_DBL_FAULT_B) {
405                 printk(KERN_EMERG "CoreB Recovering from DOUBLE FAULT event\n");
406 #ifdef CONFIG_DEBUG_DOUBLEFAULT
407                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
408                         (int)init_saved_seqstat_coreb & SEQSTAT_EXCAUSE, init_saved_retx_coreb);
409                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr_coreb);
410                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr_coreb);
411 #endif
412                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
413                         init_retx_coreb);
414         }
415
416         /*
417          * We want the D-cache to be enabled early, in case the atomic
418          * support code emulates cache coherence (see
419          * __ARCH_SYNC_CORE_DCACHE).
420          */
421         init_exception_vectors();
422
423         bfin_setup_caches(cpu);
424
425         local_irq_disable();
426
427         /* Attach the new idle task to the global mm. */
428         atomic_inc(&mm->mm_users);
429         atomic_inc(&mm->mm_count);
430         current->active_mm = mm;
431         BUG_ON(current->mm);    /* Can't be, but better be safe than sorry. */
432
433         preempt_disable();
434
435         setup_secondary(cpu);
436
437         local_irq_enable();
438
439         platform_secondary_init(cpu);
440
441         cpu_idle();
442 }
443
444 void __init smp_prepare_boot_cpu(void)
445 {
446 }
447
448 void __init smp_prepare_cpus(unsigned int max_cpus)
449 {
450         platform_prepare_cpus(max_cpus);
451         ipi_queue_init();
452         platform_request_ipi(&ipi_handler);
453 }
454
455 void __init smp_cpus_done(unsigned int max_cpus)
456 {
457         unsigned long bogosum = 0;
458         unsigned int cpu;
459
460         for_each_online_cpu(cpu)
461                 bogosum += loops_per_jiffy;
462
463         printk(KERN_INFO "SMP: Total of %d processors activated "
464                "(%lu.%02lu BogoMIPS).\n",
465                num_online_cpus(),
466                bogosum / (500000/HZ),
467                (bogosum / (5000/HZ)) % 100);
468 }
469
470 void smp_icache_flush_range_others(unsigned long start, unsigned long end)
471 {
472         smp_flush_data.start = start;
473         smp_flush_data.end = end;
474
475         if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
476                 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
477 }
478 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
479
480 #ifdef __ARCH_SYNC_CORE_ICACHE
481 void resync_core_icache(void)
482 {
483         unsigned int cpu = get_cpu();
484         blackfin_invalidate_entire_icache();
485         ++per_cpu(cpu_data, cpu).icache_invld_count;
486         put_cpu();
487 }
488 EXPORT_SYMBOL(resync_core_icache);
489 #endif
490
491 #ifdef __ARCH_SYNC_CORE_DCACHE
492 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
493
494 void resync_core_dcache(void)
495 {
496         unsigned int cpu = get_cpu();
497         blackfin_invalidate_entire_dcache();
498         ++per_cpu(cpu_data, cpu).dcache_invld_count;
499         put_cpu();
500 }
501 EXPORT_SYMBOL(resync_core_dcache);
502 #endif