2 * File: arch/blackfin/mach-common/pm.c
3 * Based on: arm/mach-omap/pm.c
4 * Author: Cliff Brake <cbrake@accelent.com> Copyright (c) 2001
7 * Description: Blackfin power management
9 * Modified: Nicolas Pitre - PXA250 support
10 * Copyright (c) 2002 Monta Vista Software, Inc.
11 * David Singleton - OMAP1510
12 * Copyright (c) 2002 Monta Vista Software, Inc.
13 * Dirk Behme <dirk.behme@de.bosch.com> - OMAP1510/1610
15 * Copyright 2004-2008 Analog Devices Inc.
17 * Bugs: Enter bugs at http://blackfin.uclinux.org/
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, see the file COPYING, or write
31 * to the Free Software Foundation, Inc.,
32 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
35 #include <linux/suspend.h>
36 #include <linux/sched.h>
37 #include <linux/proc_fs.h>
39 #include <linux/irq.h>
46 #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_H
47 #define WAKEUP_TYPE PM_WAKE_HIGH
50 #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_L
51 #define WAKEUP_TYPE PM_WAKE_LOW
54 #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_F
55 #define WAKEUP_TYPE PM_WAKE_FALLING
58 #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_R
59 #define WAKEUP_TYPE PM_WAKE_RISING
62 #ifdef CONFIG_PM_WAKEUP_GPIO_POLAR_EDGE_B
63 #define WAKEUP_TYPE PM_WAKE_BOTH_EDGES
67 void bfin_pm_suspend_standby_enter(void)
71 #ifdef CONFIG_PM_WAKEUP_BY_GPIO
72 gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE);
75 local_irq_save_hw(flags);
76 bfin_pm_standby_setup();
78 #ifdef CONFIG_PM_BFIN_SLEEP_DEEPER
79 sleep_deeper(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);
81 sleep_mode(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);
84 bfin_pm_standby_restore();
87 bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
89 /* BF52x system reset does not properly reset SIC_IWR1 which
90 * will screw up the bootrom as it relies on MDMA0/1 waking it
91 * up from IDLE instructions. See this report for more info:
92 * http://blackfin.uclinux.org/gf/tracker/4323
95 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
97 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
100 bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
103 bfin_write_SIC_IWR(IWR_DISABLE_ALL);
106 local_irq_restore_hw(flags);
109 int bf53x_suspend_l1_mem(unsigned char *memptr)
111 dma_memcpy(memptr, (const void *) L1_CODE_START, L1_CODE_LENGTH);
112 dma_memcpy(memptr + L1_CODE_LENGTH, (const void *) L1_DATA_A_START,
114 dma_memcpy(memptr + L1_CODE_LENGTH + L1_DATA_A_LENGTH,
115 (const void *) L1_DATA_B_START, L1_DATA_B_LENGTH);
116 memcpy(memptr + L1_CODE_LENGTH + L1_DATA_A_LENGTH +
117 L1_DATA_B_LENGTH, (const void *) L1_SCRATCH_START,
123 int bf53x_resume_l1_mem(unsigned char *memptr)
125 dma_memcpy((void *) L1_CODE_START, memptr, L1_CODE_LENGTH);
126 dma_memcpy((void *) L1_DATA_A_START, memptr + L1_CODE_LENGTH,
128 dma_memcpy((void *) L1_DATA_B_START, memptr + L1_CODE_LENGTH +
129 L1_DATA_A_LENGTH, L1_DATA_B_LENGTH);
130 memcpy((void *) L1_SCRATCH_START, memptr + L1_CODE_LENGTH +
131 L1_DATA_A_LENGTH + L1_DATA_B_LENGTH, L1_SCRATCH_LENGTH);
136 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
137 static void flushinv_all_dcache(void)
139 u32 way, bank, subbank, set;
141 u32 dmem_ctl = bfin_read_DMEM_CONTROL();
143 for (bank = 0; bank < 2; ++bank) {
144 if (!(dmem_ctl & (1 << (DMC1_P - bank))))
147 for (way = 0; way < 2; ++way)
148 for (subbank = 0; subbank < 4; ++subbank)
149 for (set = 0; set < 64; ++set) {
151 bfin_write_DTEST_COMMAND(
158 status = bfin_read_DTEST_DATA0();
160 /* only worry about valid/dirty entries */
161 if ((status & 0x3) != 0x3)
164 /* construct the address using the tag */
165 addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5);
168 __asm__ __volatile__("FLUSHINV[%0];" : : "a"(addr));
174 int bfin_pm_suspend_mem_enter(void)
179 unsigned char *memptr = kmalloc(L1_CODE_LENGTH + L1_DATA_A_LENGTH
180 + L1_DATA_B_LENGTH + L1_SCRATCH_LENGTH,
183 if (memptr == NULL) {
184 panic("bf53x_suspend_l1_mem malloc failed");
188 wakeup = bfin_read_VR_CTL() & ~FREQ;
191 #ifdef CONFIG_PM_BFIN_WAKE_PH6
194 #ifdef CONFIG_PM_BFIN_WAKE_GP
198 local_irq_save_hw(flags);
200 ret = blackfin_dma_suspend();
203 local_irq_restore_hw(flags);
208 bfin_gpio_pm_hibernate_suspend();
210 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
211 flushinv_all_dcache();
215 bf53x_suspend_l1_mem(memptr);
217 do_hibernate(wakeup | vr_wakeup); /* Goodbye */
219 bf53x_resume_l1_mem(memptr);
224 bfin_gpio_pm_hibernate_restore();
225 blackfin_dma_resume();
227 local_irq_restore_hw(flags);
234 * bfin_pm_valid - Tell the PM core that we only support the standby sleep
236 * @state: suspend state we're checking.
239 static int bfin_pm_valid(suspend_state_t state)
241 return (state == PM_SUSPEND_STANDBY
242 #if !(defined(BF533_FAMILY) || defined(CONFIG_BF561))
245 * If we enter Hibernate the SCKE Pin is driven Low,
246 * so that the SDRAM enters Self Refresh Mode.
247 * However when the reset sequence that follows hibernate
248 * state is executed, SCKE is driven High, taking the
249 * SDRAM out of Self Refresh.
251 * If you reconfigure and access the SDRAM "very quickly",
252 * you are likely to avoid errors, otherwise the SDRAM
253 * start losing its contents.
254 * An external HW workaround is possible using logic gates.
256 || state == PM_SUSPEND_MEM
262 * bfin_pm_enter - Actually enter a sleep state.
263 * @state: State we're entering.
266 static int bfin_pm_enter(suspend_state_t state)
269 case PM_SUSPEND_STANDBY:
270 bfin_pm_suspend_standby_enter();
273 bfin_pm_suspend_mem_enter();
282 struct platform_suspend_ops bfin_pm_ops = {
283 .enter = bfin_pm_enter,
284 .valid = bfin_pm_valid,
287 static int __init bfin_pm_init(void)
289 suspend_set_ops(&bfin_pm_ops);
293 __initcall(bfin_pm_init);