Blackfin arch: update anomaly headers to match latest sheets
[linux-2.6.git] / arch / blackfin / mach-bf561 / include / mach / mem_map.h
1 /*
2  * Memory MAP
3  * Common header file for blackfin BF561 of processors.
4  */
5
6 #ifndef _MEM_MAP_561_H_
7 #define _MEM_MAP_561_H_
8
9 #define COREMMR_BASE           0xFFE00000        /* Core MMRs */
10 #define SYSMMR_BASE            0xFFC00000        /* System MMRs */
11
12 /* Async Memory Banks */
13 #define ASYNC_BANK3_BASE        0x2C000000       /* Async Bank 3 */
14 #define ASYNC_BANK3_SIZE        0x04000000      /* 64M */
15 #define ASYNC_BANK2_BASE        0x28000000       /* Async Bank 2 */
16 #define ASYNC_BANK2_SIZE        0x04000000      /* 64M */
17 #define ASYNC_BANK1_BASE        0x24000000       /* Async Bank 1 */
18 #define ASYNC_BANK1_SIZE        0x04000000      /* 64M */
19 #define ASYNC_BANK0_BASE        0x20000000       /* Async Bank 0 */
20 #define ASYNC_BANK0_SIZE        0x04000000      /* 64M */
21
22 /* Boot ROM Memory */
23
24 #define BOOT_ROM_START          0xEF000000
25 #define BOOT_ROM_LENGTH         0x800
26
27 /* Level 1 Memory */
28
29 #ifdef CONFIG_BFIN_ICACHE
30 #define BFIN_ICACHESIZE (16*1024)
31 #else
32 #define BFIN_ICACHESIZE (0*1024)
33 #endif
34
35 /* Memory Map for ADSP-BF561 processors */
36
37 #ifdef CONFIG_BF561
38 #define COREA_L1_CODE_START       0xFFA00000
39 #define COREA_L1_DATA_A_START     0xFF800000
40 #define COREA_L1_DATA_B_START     0xFF900000
41 #define COREB_L1_CODE_START       0xFF600000
42 #define COREB_L1_DATA_A_START     0xFF400000
43 #define COREB_L1_DATA_B_START     0xFF500000
44
45 #define L1_CODE_START       COREA_L1_CODE_START
46 #define L1_DATA_A_START     COREA_L1_DATA_A_START
47 #define L1_DATA_B_START     COREA_L1_DATA_B_START
48
49 #define L1_CODE_LENGTH      0x4000
50
51 #ifdef CONFIG_BFIN_DCACHE
52
53 #ifdef CONFIG_BFIN_DCACHE_BANKA
54 #define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
55 #define L1_DATA_A_LENGTH      (0x8000 - 0x4000)
56 #define L1_DATA_B_LENGTH      0x8000
57 #define BFIN_DCACHESIZE (16*1024)
58 #define BFIN_DSUPBANKS  1
59 #else
60 #define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
61 #define L1_DATA_A_LENGTH      (0x8000 - 0x4000)
62 #define L1_DATA_B_LENGTH      (0x8000 - 0x4000)
63 #define BFIN_DCACHESIZE (32*1024)
64 #define BFIN_DSUPBANKS  2
65 #endif
66
67 #else
68 #define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
69 #define L1_DATA_A_LENGTH      0x8000
70 #define L1_DATA_B_LENGTH      0x8000
71 #define BFIN_DCACHESIZE (0*1024)
72 #define BFIN_DSUPBANKS  0
73 #endif /*CONFIG_BFIN_DCACHE*/
74 #endif
75
76 /* Level 2 Memory */
77 #define L2_START                0xFEB00000
78 #define L2_LENGTH               0x20000
79
80 /* Scratch Pad Memory */
81
82 #define COREA_L1_SCRATCH_START  0xFFB00000
83 #define COREB_L1_SCRATCH_START  0xFF700000
84
85 #define L1_SCRATCH_START        COREA_L1_SCRATCH_START
86 #define L1_SCRATCH_LENGTH       0x1000
87
88 #ifdef __ASSEMBLY__
89
90 /*
91  * The following macros both return the address of the PDA for the
92  * current core.
93  *
94  * In its first safe (and hairy) form, the macro neither clobbers any
95  * register aside of the output Preg, nor uses the stack, since it
96  * could be called with an invalid stack pointer, or the current stack
97  * space being uncovered by any CPLB (e.g. early exception handling).
98  *
99  * The constraints on the second form are a bit relaxed, and the code
100  * is allowed to use the specified Dreg for determining the PDA
101  * address to be returned into Preg.
102  */
103 #ifdef CONFIG_SMP
104 #define GET_PDA_SAFE(preg)              \
105         preg.l = lo(DSPID);             \
106         preg.h = hi(DSPID);             \
107         preg = [preg];                  \
108         preg = preg << 2;               \
109         preg = preg << 2;               \
110         preg = preg << 2;               \
111         preg = preg << 2;               \
112         preg = preg << 2;               \
113         preg = preg << 2;               \
114         preg = preg << 2;               \
115         preg = preg << 2;               \
116         preg = preg << 2;               \
117         preg = preg << 2;               \
118         preg = preg << 2;               \
119         preg = preg << 2;               \
120         if cc jump 2f;                  \
121         cc = preg == 0x0;               \
122         preg.l = _cpu_pda;              \
123         preg.h = _cpu_pda;              \
124         if !cc jump 3f;                 \
125 1:                                      \
126         /* preg = 0x0; */               \
127         cc = !cc; /* restore cc to 0 */ \
128         jump 4f;                        \
129 2:                                      \
130         cc = preg == 0x0;               \
131         preg.l = _cpu_pda;              \
132         preg.h = _cpu_pda;              \
133         if cc jump 4f;                  \
134         /* preg = 0x1000000; */         \
135         cc = !cc; /* restore cc to 1 */ \
136 3:                                      \
137         preg = [preg];                  \
138 4:
139
140 #define GET_PDA(preg, dreg)             \
141         preg.l = lo(DSPID);             \
142         preg.h = hi(DSPID);             \
143         dreg = [preg];                  \
144         preg.l = _cpu_pda;              \
145         preg.h = _cpu_pda;              \
146         cc = bittst(dreg, 0);           \
147         if !cc jump 1f;                 \
148         preg = [preg];                  \
149 1:                                      \
150
151 #define GET_CPUID(preg, dreg)           \
152         preg.l = lo(DSPID);             \
153         preg.h = hi(DSPID);             \
154         dreg = [preg];                  \
155         dreg = ROT dreg BY -1;          \
156         dreg = CC;
157
158 #else
159 #define GET_PDA_SAFE(preg)              \
160         preg.l = _cpu_pda;              \
161         preg.h = _cpu_pda;
162
163 #define GET_PDA(preg, dreg)     GET_PDA_SAFE(preg)
164 #endif /* CONFIG_SMP */
165
166 #endif /* __ASSEMBLY__ */
167
168 #endif                          /* _MEM_MAP_533_H_ */