Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrd
[linux-2.6.git] / arch / blackfin / mach-bf527 / boards / ezbrd.c
1 /*
2  * File:         arch/blackfin/mach-bf527/boards/ezbrd.c
3  * Based on:     arch/blackfin/mach-bf537/boards/stamp.c
4  * Author:       Aidan Williams <aidan@nicta.com.au>
5  *
6  * Created:
7  * Description:
8  *
9  * Modified:
10  *               Copyright 2005 National ICT Australia (NICTA)
11  *               Copyright 2004-2008 Analog Devices Inc.
12  *
13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License as published by
17  * the Free Software Foundation; either version 2 of the License, or
18  * (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, see the file COPYING, or write
27  * to the Free Software Foundation, Inc.,
28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
29  */
30
31 #include <linux/device.h>
32 #include <linux/platform_device.h>
33 #include <linux/mtd/mtd.h>
34 #include <linux/mtd/partitions.h>
35 #include <linux/mtd/physmap.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/flash.h>
38
39 #include <linux/i2c.h>
40 #include <linux/irq.h>
41 #include <linux/interrupt.h>
42 #include <linux/usb/musb.h>
43 #include <asm/dma.h>
44 #include <asm/bfin5xx_spi.h>
45 #include <asm/reboot.h>
46 #include <asm/nand.h>
47 #include <asm/portmux.h>
48 #include <asm/dpmc.h>
49 #include <linux/spi/ad7877.h>
50
51 /*
52  * Name the Board for the /proc/cpuinfo
53  */
54 const char bfin_board_name[] = "ADI BF526-EZBRD";
55
56 /*
57  *  Driver needs to know address, irq and flag pin.
58  */
59
60 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
61 static struct resource musb_resources[] = {
62         [0] = {
63                 .start  = 0xffc03800,
64                 .end    = 0xffc03cff,
65                 .flags  = IORESOURCE_MEM,
66         },
67         [1] = { /* general IRQ */
68                 .start  = IRQ_USB_INT0,
69                 .end    = IRQ_USB_INT0,
70                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
71         },
72         [2] = { /* DMA IRQ */
73                 .start  = IRQ_USB_DMA,
74                 .end    = IRQ_USB_DMA,
75                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
76         },
77 };
78
79 static struct musb_hdrc_config musb_config = {
80         .multipoint     = 0,
81         .dyn_fifo       = 0,
82         .soft_con       = 1,
83         .dma            = 1,
84         .num_eps        = 8,
85         .dma_channels   = 8,
86         .gpio_vrsel     = GPIO_PG13,
87 };
88
89 static struct musb_hdrc_platform_data musb_plat = {
90 #if defined(CONFIG_USB_MUSB_OTG)
91         .mode           = MUSB_OTG,
92 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
93         .mode           = MUSB_HOST,
94 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
95         .mode           = MUSB_PERIPHERAL,
96 #endif
97         .config         = &musb_config,
98 };
99
100 static u64 musb_dmamask = ~(u32)0;
101
102 static struct platform_device musb_device = {
103         .name           = "musb_hdrc",
104         .id             = 0,
105         .dev = {
106                 .dma_mask               = &musb_dmamask,
107                 .coherent_dma_mask      = 0xffffffff,
108                 .platform_data          = &musb_plat,
109         },
110         .num_resources  = ARRAY_SIZE(musb_resources),
111         .resource       = musb_resources,
112 };
113 #endif
114
115 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
116 static struct mtd_partition ezbrd_partitions[] = {
117         {
118                 .name       = "bootloader(nor)",
119                 .size       = 0x40000,
120                 .offset     = 0,
121         }, {
122                 .name       = "linux kernel(nor)",
123                 .size       = 0x1C0000,
124                 .offset     = MTDPART_OFS_APPEND,
125         }, {
126                 .name       = "file system(nor)",
127                 .size       = MTDPART_SIZ_FULL,
128                 .offset     = MTDPART_OFS_APPEND,
129         }
130 };
131
132 static struct physmap_flash_data ezbrd_flash_data = {
133         .width      = 2,
134         .parts      = ezbrd_partitions,
135         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
136 };
137
138 static struct resource ezbrd_flash_resource = {
139         .start = 0x20000000,
140         .end   = 0x203fffff,
141         .flags = IORESOURCE_MEM,
142 };
143
144 static struct platform_device ezbrd_flash_device = {
145         .name          = "physmap-flash",
146         .id            = 0,
147         .dev = {
148                 .platform_data = &ezbrd_flash_data,
149         },
150         .num_resources = 1,
151         .resource      = &ezbrd_flash_resource,
152 };
153 #endif
154
155 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
156 static struct mtd_partition partition_info[] = {
157         {
158                 .name = "linux kernel(nand)",
159                 .offset = 0,
160                 .size = 4 * 1024 * 1024,
161         },
162         {
163                 .name = "file system(nand)",
164                 .offset = MTDPART_OFS_APPEND,
165                 .size = MTDPART_SIZ_FULL,
166         },
167 };
168
169 static struct bf5xx_nand_platform bf5xx_nand_platform = {
170         .page_size = NFC_PG_SIZE_256,
171         .data_width = NFC_NWIDTH_8,
172         .partitions = partition_info,
173         .nr_partitions = ARRAY_SIZE(partition_info),
174         .rd_dly = 3,
175         .wr_dly = 3,
176 };
177
178 static struct resource bf5xx_nand_resources[] = {
179         {
180                 .start = NFC_CTL,
181                 .end = NFC_DATA_RD + 2,
182                 .flags = IORESOURCE_MEM,
183         },
184         {
185                 .start = CH_NFC,
186                 .end = CH_NFC,
187                 .flags = IORESOURCE_IRQ,
188         },
189 };
190
191 static struct platform_device bf5xx_nand_device = {
192         .name = "bf5xx-nand",
193         .id = 0,
194         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
195         .resource = bf5xx_nand_resources,
196         .dev = {
197                 .platform_data = &bf5xx_nand_platform,
198         },
199 };
200 #endif
201
202 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
203 static struct platform_device rtc_device = {
204         .name = "rtc-bfin",
205         .id   = -1,
206 };
207 #endif
208
209
210 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
211 static struct platform_device bfin_mac_device = {
212         .name = "bfin_mac",
213 };
214 #endif
215
216 #if defined(CONFIG_MTD_M25P80) \
217         || defined(CONFIG_MTD_M25P80_MODULE)
218 static struct mtd_partition bfin_spi_flash_partitions[] = {
219         {
220                 .name = "bootloader(spi)",
221                 .size = 0x00040000,
222                 .offset = 0,
223                 .mask_flags = MTD_CAP_ROM
224         }, {
225                 .name = "linux kernel(spi)",
226                 .size = MTDPART_SIZ_FULL,
227                 .offset = MTDPART_OFS_APPEND,
228         }
229 };
230
231 static struct flash_platform_data bfin_spi_flash_data = {
232         .name = "m25p80",
233         .parts = bfin_spi_flash_partitions,
234         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
235         .type = "m25p16",
236 };
237
238 /* SPI flash chip (m25p64) */
239 static struct bfin5xx_spi_chip spi_flash_chip_info = {
240         .enable_dma = 0,         /* use dma transfer with this chip*/
241         .bits_per_word = 8,
242 };
243 #endif
244
245 #if defined(CONFIG_SPI_ADC_BF533) \
246         || defined(CONFIG_SPI_ADC_BF533_MODULE)
247 /* SPI ADC chip */
248 static struct bfin5xx_spi_chip spi_adc_chip_info = {
249         .enable_dma = 1,         /* use dma transfer with this chip*/
250         .bits_per_word = 16,
251 };
252 #endif
253
254 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
255 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
256         .enable_dma = 1,
257         .bits_per_word = 8,
258 };
259 #endif
260
261 #if defined(CONFIG_PBX)
262 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
263         .ctl_reg        = 0x4, /* send zero */
264         .enable_dma     = 0,
265         .bits_per_word  = 8,
266         .cs_change_per_word = 1,
267 };
268 #endif
269
270 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
271 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
272         .enable_dma = 0,
273         .bits_per_word = 16,
274 };
275
276 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
277         .model                  = 7877,
278         .vref_delay_usecs       = 50,   /* internal, no capacitor */
279         .x_plate_ohms           = 419,
280         .y_plate_ohms           = 486,
281         .pressure_max           = 1000,
282         .pressure_min           = 0,
283         .stopacq_polarity       = 1,
284         .first_conversion_delay = 3,
285         .acquisition_time       = 1,
286         .averaging              = 1,
287         .pen_down_acc_interval  = 1,
288 };
289 #endif
290
291 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
292 #include <linux/spi/ad7879.h>
293 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
294         .model                  = 7879, /* Model = AD7879 */
295         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
296         .pressure_max           = 10000,
297         .pressure_min           = 0,
298         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
299         .acquisition_time       = 1,    /* 4us acquisition time per sample */
300         .median                 = 2,    /* do 8 measurements */
301         .averaging              = 1,    /* take the average of 4 middle samples */
302         .pen_down_acc_interval  = 255,  /* 9.4 ms */
303         .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
304         .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
305 };
306 #endif
307
308 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
309 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
310         .enable_dma = 0,
311         .bits_per_word = 16,
312 };
313 #endif
314
315 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
316          && defined(CONFIG_SND_SOC_WM8731_SPI)
317 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
318         .enable_dma = 0,
319         .bits_per_word = 16,
320 };
321 #endif
322
323 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
324 static struct bfin5xx_spi_chip spidev_chip_info = {
325         .enable_dma = 0,
326         .bits_per_word = 8,
327 };
328 #endif
329
330 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
331 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
332         .enable_dma = 0,
333         .bits_per_word = 8,
334 };
335 #endif
336
337 static struct spi_board_info bfin_spi_board_info[] __initdata = {
338 #if defined(CONFIG_MTD_M25P80) \
339         || defined(CONFIG_MTD_M25P80_MODULE)
340         {
341                 /* the modalias must be the same as spi device driver name */
342                 .modalias = "m25p80", /* Name of spi_driver for this device */
343                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
344                 .bus_num = 0, /* Framework bus number */
345                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
346                 .platform_data = &bfin_spi_flash_data,
347                 .controller_data = &spi_flash_chip_info,
348                 .mode = SPI_MODE_3,
349         },
350 #endif
351
352 #if defined(CONFIG_SPI_ADC_BF533) \
353         || defined(CONFIG_SPI_ADC_BF533_MODULE)
354         {
355                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
356                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
357                 .bus_num = 0, /* Framework bus number */
358                 .chip_select = 1, /* Framework chip select. */
359                 .platform_data = NULL, /* No spi_driver specific config */
360                 .controller_data = &spi_adc_chip_info,
361         },
362 #endif
363
364 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
365         {
366                 .modalias = "spi_mmc_dummy",
367                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
368                 .bus_num = 0,
369                 .chip_select = 0,
370                 .platform_data = NULL,
371                 .controller_data = &spi_mmc_chip_info,
372                 .mode = SPI_MODE_3,
373         },
374         {
375                 .modalias = "spi_mmc",
376                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
377                 .bus_num = 0,
378                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
379                 .platform_data = NULL,
380                 .controller_data = &spi_mmc_chip_info,
381                 .mode = SPI_MODE_3,
382         },
383 #endif
384 #if defined(CONFIG_PBX)
385         {
386                 .modalias = "fxs-spi",
387                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
388                 .bus_num = 0,
389                 .chip_select = 8 - CONFIG_J11_JUMPER,
390                 .controller_data = &spi_si3xxx_chip_info,
391                 .mode = SPI_MODE_3,
392         },
393         {
394                 .modalias = "fxo-spi",
395                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
396                 .bus_num = 0,
397                 .chip_select = 8 - CONFIG_J19_JUMPER,
398                 .controller_data = &spi_si3xxx_chip_info,
399                 .mode = SPI_MODE_3,
400         },
401 #endif
402 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
403         {
404                 .modalias               = "ad7877",
405                 .platform_data          = &bfin_ad7877_ts_info,
406                 .irq                    = IRQ_PF8,
407                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
408                 .bus_num        = 0,
409                 .chip_select  = 2,
410                 .controller_data = &spi_ad7877_chip_info,
411         },
412 #endif
413 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
414         {
415                 .modalias = "ad7879",
416                 .platform_data = &bfin_ad7879_ts_info,
417                 .irq = IRQ_PG0,
418                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
419                 .bus_num = 0,
420                 .chip_select = 5,
421                 .controller_data = &spi_ad7879_chip_info,
422                 .mode = SPI_CPHA | SPI_CPOL,
423         },
424 #endif
425 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
426          && defined(CONFIG_SND_SOC_WM8731_SPI)
427         {
428                 .modalias       = "wm8731",
429                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
430                 .bus_num        = 0,
431                 .chip_select    = 5,
432                 .controller_data = &spi_wm8731_chip_info,
433                 .mode = SPI_MODE_0,
434         },
435 #endif
436 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
437         {
438                 .modalias = "spidev",
439                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
440                 .bus_num = 0,
441                 .chip_select = 1,
442                 .controller_data = &spidev_chip_info,
443         },
444 #endif
445 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
446         {
447                 .modalias = "bfin-lq035q1-spi",
448                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
449                 .bus_num = 0,
450                 .chip_select = 1,
451                 .controller_data = &lq035q1_spi_chip_info,
452                 .mode = SPI_CPHA | SPI_CPOL,
453         },
454 #endif
455 };
456
457 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
458 /* SPI controller data */
459 static struct bfin5xx_spi_master bfin_spi0_info = {
460         .num_chipselect = 8,
461         .enable_dma = 1,  /* master has the ability to do dma transfer */
462         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
463 };
464
465 /* SPI (0) */
466 static struct resource bfin_spi0_resource[] = {
467         [0] = {
468                 .start = SPI0_REGBASE,
469                 .end   = SPI0_REGBASE + 0xFF,
470                 .flags = IORESOURCE_MEM,
471                 },
472         [1] = {
473                 .start = CH_SPI,
474                 .end   = CH_SPI,
475                 .flags = IORESOURCE_IRQ,
476         },
477 };
478
479 static struct platform_device bfin_spi0_device = {
480         .name = "bfin-spi",
481         .id = 0, /* Bus number */
482         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
483         .resource = bfin_spi0_resource,
484         .dev = {
485                 .platform_data = &bfin_spi0_info, /* Passed to driver */
486         },
487 };
488 #endif  /* spi master and devices */
489
490 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
491 static struct resource bfin_uart_resources[] = {
492 #ifdef CONFIG_SERIAL_BFIN_UART0
493         {
494                 .start = 0xFFC00400,
495                 .end = 0xFFC004FF,
496                 .flags = IORESOURCE_MEM,
497         },
498 #endif
499 #ifdef CONFIG_SERIAL_BFIN_UART1
500         {
501                 .start = 0xFFC02000,
502                 .end = 0xFFC020FF,
503                 .flags = IORESOURCE_MEM,
504         },
505 #endif
506 };
507
508 static struct platform_device bfin_uart_device = {
509         .name = "bfin-uart",
510         .id = 1,
511         .num_resources = ARRAY_SIZE(bfin_uart_resources),
512         .resource = bfin_uart_resources,
513 };
514 #endif
515
516 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
517 #ifdef CONFIG_BFIN_SIR0
518 static struct resource bfin_sir0_resources[] = {
519         {
520                 .start = 0xFFC00400,
521                 .end = 0xFFC004FF,
522                 .flags = IORESOURCE_MEM,
523         },
524         {
525                 .start = IRQ_UART0_RX,
526                 .end = IRQ_UART0_RX+1,
527                 .flags = IORESOURCE_IRQ,
528         },
529         {
530                 .start = CH_UART0_RX,
531                 .end = CH_UART0_RX+1,
532                 .flags = IORESOURCE_DMA,
533         },
534 };
535
536 static struct platform_device bfin_sir0_device = {
537         .name = "bfin_sir",
538         .id = 0,
539         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
540         .resource = bfin_sir0_resources,
541 };
542 #endif
543 #ifdef CONFIG_BFIN_SIR1
544 static struct resource bfin_sir1_resources[] = {
545         {
546                 .start = 0xFFC02000,
547                 .end = 0xFFC020FF,
548                 .flags = IORESOURCE_MEM,
549         },
550         {
551                 .start = IRQ_UART1_RX,
552                 .end = IRQ_UART1_RX+1,
553                 .flags = IORESOURCE_IRQ,
554         },
555         {
556                 .start = CH_UART1_RX,
557                 .end = CH_UART1_RX+1,
558                 .flags = IORESOURCE_DMA,
559         },
560 };
561
562 static struct platform_device bfin_sir1_device = {
563         .name = "bfin_sir",
564         .id = 1,
565         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
566         .resource = bfin_sir1_resources,
567 };
568 #endif
569 #endif
570
571 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
572 static struct resource bfin_twi0_resource[] = {
573         [0] = {
574                 .start = TWI0_REGBASE,
575                 .end   = TWI0_REGBASE,
576                 .flags = IORESOURCE_MEM,
577         },
578         [1] = {
579                 .start = IRQ_TWI,
580                 .end   = IRQ_TWI,
581                 .flags = IORESOURCE_IRQ,
582         },
583 };
584
585 static struct platform_device i2c_bfin_twi_device = {
586         .name = "i2c-bfin-twi",
587         .id = 0,
588         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
589         .resource = bfin_twi0_resource,
590 };
591 #endif
592
593 #ifdef CONFIG_I2C_BOARDINFO
594 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
595 #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
596         {
597                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
598         },
599 #endif
600 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
601         {
602                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
603                 .irq = IRQ_PF8,
604         },
605 #endif
606 };
607 #endif
608
609 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
610 static struct platform_device bfin_sport0_uart_device = {
611         .name = "bfin-sport-uart",
612         .id = 0,
613 };
614
615 static struct platform_device bfin_sport1_uart_device = {
616         .name = "bfin-sport-uart",
617         .id = 1,
618 };
619 #endif
620
621 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
622 #include <linux/input.h>
623 #include <linux/gpio_keys.h>
624
625 static struct gpio_keys_button bfin_gpio_keys_table[] = {
626         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
627         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
628 };
629
630 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
631         .buttons        = bfin_gpio_keys_table,
632         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
633 };
634
635 static struct platform_device bfin_device_gpiokeys = {
636         .name      = "gpio-keys",
637         .dev = {
638                 .platform_data = &bfin_gpio_keys_data,
639         },
640 };
641 #endif
642
643 static struct resource bfin_gpios_resources = {
644         .start = 0,
645         .end   = MAX_BLACKFIN_GPIOS - 1,
646         .flags = IORESOURCE_IRQ,
647 };
648
649 static struct platform_device bfin_gpios_device = {
650         .name = "simple-gpio",
651         .id = -1,
652         .num_resources = 1,
653         .resource = &bfin_gpios_resources,
654 };
655
656 static const unsigned int cclk_vlev_datasheet[] =
657 {
658         VRPAIR(VLEV_100, 400000000),
659         VRPAIR(VLEV_105, 426000000),
660         VRPAIR(VLEV_110, 500000000),
661         VRPAIR(VLEV_115, 533000000),
662         VRPAIR(VLEV_120, 600000000),
663 };
664
665 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
666         .tuple_tab = cclk_vlev_datasheet,
667         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
668         .vr_settling_time = 25 /* us */,
669 };
670
671 static struct platform_device bfin_dpmc = {
672         .name = "bfin dpmc",
673         .dev = {
674                 .platform_data = &bfin_dmpc_vreg_data,
675         },
676 };
677
678 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
679 #include <asm/bfin-lq035q1.h>
680
681 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
682         .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
683         .use_bl =       1,
684         .gpio_bl =      GPIO_PG12,
685 };
686
687 static struct resource bfin_lq035q1_resources[] = {
688         {
689                 .start = IRQ_PPI_ERROR,
690                 .end = IRQ_PPI_ERROR,
691                 .flags = IORESOURCE_IRQ,
692         },
693 };
694
695 static struct platform_device bfin_lq035q1_device = {
696         .name           = "bfin-lq035q1",
697         .id             = -1,
698         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
699         .resource       = bfin_lq035q1_resources,
700         .dev            = {
701                 .platform_data = &bfin_lq035q1_data,
702         },
703 };
704 #endif
705
706 static struct platform_device *stamp_devices[] __initdata = {
707
708         &bfin_dpmc,
709
710 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
711         &bf5xx_nand_device,
712 #endif
713
714 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
715         &rtc_device,
716 #endif
717
718 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
719         &musb_device,
720 #endif
721
722 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
723         &bfin_mac_device,
724 #endif
725
726 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
727         &bfin_spi0_device,
728 #endif
729
730 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
731         &bfin_uart_device,
732 #endif
733
734 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
735         &bfin_lq035q1_device,
736 #endif
737
738 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
739 #ifdef CONFIG_BFIN_SIR0
740         &bfin_sir0_device,
741 #endif
742 #ifdef CONFIG_BFIN_SIR1
743         &bfin_sir1_device,
744 #endif
745 #endif
746
747 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
748         &i2c_bfin_twi_device,
749 #endif
750
751 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
752         &bfin_sport0_uart_device,
753         &bfin_sport1_uart_device,
754 #endif
755
756 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
757         &bfin_device_gpiokeys,
758 #endif
759
760 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
761         &ezbrd_flash_device,
762 #endif
763
764         &bfin_gpios_device,
765 };
766
767 static int __init stamp_init(void)
768 {
769         printk(KERN_INFO "%s(): registering device resources\n", __func__);
770
771 #ifdef CONFIG_I2C_BOARDINFO
772         i2c_register_board_info(0, bfin_i2c_board_info,
773                                 ARRAY_SIZE(bfin_i2c_board_info));
774 #endif
775
776         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
777         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
778         return 0;
779 }
780
781 arch_initcall(stamp_init);
782
783 void native_machine_restart(char *cmd)
784 {
785         /* workaround reboot hang when booting from SPI */
786         if ((bfin_read_SYSCR() & 0x7) == 0x3)
787                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
788 }
789
790 void bfin_get_ether_addr(char *addr)
791 {
792         /* the MAC is stored in OTP memory page 0xDF */
793         u32 ret;
794         u64 otp_mac;
795         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
796
797         ret = otp_read(0xDF, 0x00, &otp_mac);
798         if (!(ret & 0x1)) {
799                 char *otp_mac_p = (char *)&otp_mac;
800                 for (ret = 0; ret < 6; ++ret)
801                         addr[ret] = otp_mac_p[5 - ret];
802         }
803 }
804 EXPORT_SYMBOL(bfin_get_ether_addr);