Blackfin arch: add SDIO host driver platform data
[linux-2.6.git] / arch / blackfin / mach-bf518 / boards / ezbrd.c
1 /*
2  * File:         arch/blackfin/mach-bf518/boards/ezbrd.c
3  * Based on:     arch/blackfin/mach-bf527/boards/ezbrd.c
4  * Author:       Bryan Wu <cooloney@kernel.org>
5  *
6  * Created:
7  * Description:
8  *
9  * Modified:
10  *               Copyright 2005 National ICT Australia (NICTA)
11  *               Copyright 2004-2008 Analog Devices Inc.
12  *
13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License as published by
17  * the Free Software Foundation; either version 2 of the License, or
18  * (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, see the file COPYING, or write
27  * to the Free Software Foundation, Inc.,
28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
29  */
30
31 #include <linux/device.h>
32 #include <linux/platform_device.h>
33 #include <linux/mtd/mtd.h>
34 #include <linux/mtd/partitions.h>
35 #include <linux/mtd/physmap.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/flash.h>
38
39 #include <linux/i2c.h>
40 #include <linux/irq.h>
41 #include <linux/interrupt.h>
42 #include <asm/dma.h>
43 #include <asm/bfin5xx_spi.h>
44 #include <asm/reboot.h>
45 #include <asm/portmux.h>
46 #include <asm/dpmc.h>
47 #include <asm/bfin_sdh.h>
48 #include <linux/spi/ad7877.h>
49
50 /*
51  * Name the Board for the /proc/cpuinfo
52  */
53 const char bfin_board_name[] = "ADI BF518F-EZBRD";
54
55 /*
56  *  Driver needs to know address, irq and flag pin.
57  */
58
59 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
60 static struct mtd_partition ezbrd_partitions[] = {
61         {
62                 .name       = "bootloader(nor)",
63                 .size       = 0x40000,
64                 .offset     = 0,
65         }, {
66                 .name       = "linux kernel(nor)",
67                 .size       = 0x1C0000,
68                 .offset     = MTDPART_OFS_APPEND,
69         }, {
70                 .name       = "file system(nor)",
71                 .size       = MTDPART_SIZ_FULL,
72                 .offset     = MTDPART_OFS_APPEND,
73         }
74 };
75
76 static struct physmap_flash_data ezbrd_flash_data = {
77         .width      = 2,
78         .parts      = ezbrd_partitions,
79         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
80 };
81
82 static struct resource ezbrd_flash_resource = {
83         .start = 0x20000000,
84         .end   = 0x203fffff,
85         .flags = IORESOURCE_MEM,
86 };
87
88 static struct platform_device ezbrd_flash_device = {
89         .name          = "physmap-flash",
90         .id            = 0,
91         .dev = {
92                 .platform_data = &ezbrd_flash_data,
93         },
94         .num_resources = 1,
95         .resource      = &ezbrd_flash_resource,
96 };
97 #endif
98
99 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
100 static struct platform_device rtc_device = {
101         .name = "rtc-bfin",
102         .id   = -1,
103 };
104 #endif
105
106 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
107 static struct platform_device bfin_mac_device = {
108         .name = "bfin_mac",
109 };
110 #endif
111
112 #if defined(CONFIG_MTD_M25P80) \
113         || defined(CONFIG_MTD_M25P80_MODULE)
114 static struct mtd_partition bfin_spi_flash_partitions[] = {
115         {
116                 .name = "bootloader(spi)",
117                 .size = 0x00040000,
118                 .offset = 0,
119                 .mask_flags = MTD_CAP_ROM
120         }, {
121                 .name = "linux kernel(spi)",
122                 .size = MTDPART_SIZ_FULL,
123                 .offset = MTDPART_OFS_APPEND,
124         }
125 };
126
127 static struct flash_platform_data bfin_spi_flash_data = {
128         .name = "m25p80",
129         .parts = bfin_spi_flash_partitions,
130         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
131         .type = "m25p16",
132 };
133
134 /* SPI flash chip (m25p64) */
135 static struct bfin5xx_spi_chip spi_flash_chip_info = {
136         .enable_dma = 0,         /* use dma transfer with this chip*/
137         .bits_per_word = 8,
138 };
139 #endif
140
141 #if defined(CONFIG_SPI_ADC_BF533) \
142         || defined(CONFIG_SPI_ADC_BF533_MODULE)
143 /* SPI ADC chip */
144 static struct bfin5xx_spi_chip spi_adc_chip_info = {
145         .enable_dma = 1,         /* use dma transfer with this chip*/
146         .bits_per_word = 16,
147 };
148 #endif
149
150 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
151 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
152         .enable_dma = 1,
153         .bits_per_word = 8,
154 };
155 #endif
156
157 #if defined(CONFIG_PBX)
158 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
159         .ctl_reg        = 0x4, /* send zero */
160         .enable_dma     = 0,
161         .bits_per_word  = 8,
162         .cs_change_per_word = 1,
163 };
164 #endif
165
166 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
167 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
168         .enable_dma = 0,
169         .bits_per_word = 16,
170 };
171
172 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
173         .model                  = 7877,
174         .vref_delay_usecs       = 50,   /* internal, no capacitor */
175         .x_plate_ohms           = 419,
176         .y_plate_ohms           = 486,
177         .pressure_max           = 1000,
178         .pressure_min           = 0,
179         .stopacq_polarity       = 1,
180         .first_conversion_delay = 3,
181         .acquisition_time       = 1,
182         .averaging              = 1,
183         .pen_down_acc_interval  = 1,
184 };
185 #endif
186
187 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
188          && defined(CONFIG_SND_SOC_WM8731_SPI)
189 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
190         .enable_dma = 0,
191         .bits_per_word = 16,
192 };
193 #endif
194
195 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
196 static struct bfin5xx_spi_chip spidev_chip_info = {
197         .enable_dma = 0,
198         .bits_per_word = 8,
199 };
200 #endif
201
202 static struct spi_board_info bfin_spi_board_info[] __initdata = {
203 #if defined(CONFIG_MTD_M25P80) \
204         || defined(CONFIG_MTD_M25P80_MODULE)
205         {
206                 /* the modalias must be the same as spi device driver name */
207                 .modalias = "m25p80", /* Name of spi_driver for this device */
208                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
209                 .bus_num = 0, /* Framework bus number */
210                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
211                 .platform_data = &bfin_spi_flash_data,
212                 .controller_data = &spi_flash_chip_info,
213                 .mode = SPI_MODE_3,
214         },
215 #endif
216
217 #if defined(CONFIG_SPI_ADC_BF533) \
218         || defined(CONFIG_SPI_ADC_BF533_MODULE)
219         {
220                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
221                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
222                 .bus_num = 0, /* Framework bus number */
223                 .chip_select = 1, /* Framework chip select. */
224                 .platform_data = NULL, /* No spi_driver specific config */
225                 .controller_data = &spi_adc_chip_info,
226         },
227 #endif
228
229 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
230         {
231                 .modalias = "spi_mmc_dummy",
232                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
233                 .bus_num = 0,
234                 .chip_select = 0,
235                 .platform_data = NULL,
236                 .controller_data = &spi_mmc_chip_info,
237                 .mode = SPI_MODE_3,
238         },
239         {
240                 .modalias = "spi_mmc",
241                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
242                 .bus_num = 0,
243                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
244                 .platform_data = NULL,
245                 .controller_data = &spi_mmc_chip_info,
246                 .mode = SPI_MODE_3,
247         },
248 #endif
249 #if defined(CONFIG_PBX)
250         {
251                 .modalias = "fxs-spi",
252                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
253                 .bus_num = 0,
254                 .chip_select = 8 - CONFIG_J11_JUMPER,
255                 .controller_data = &spi_si3xxx_chip_info,
256                 .mode = SPI_MODE_3,
257         },
258         {
259                 .modalias = "fxo-spi",
260                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
261                 .bus_num = 0,
262                 .chip_select = 8 - CONFIG_J19_JUMPER,
263                 .controller_data = &spi_si3xxx_chip_info,
264                 .mode = SPI_MODE_3,
265         },
266 #endif
267 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
268         {
269                 .modalias               = "ad7877",
270                 .platform_data          = &bfin_ad7877_ts_info,
271                 .irq                    = IRQ_PF8,
272                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
273                 .bus_num        = 0,
274                 .chip_select  = 2,
275                 .controller_data = &spi_ad7877_chip_info,
276         },
277 #endif
278 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
279          && defined(CONFIG_SND_SOC_WM8731_SPI)
280         {
281                 .modalias       = "wm8731",
282                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
283                 .bus_num        = 0,
284                 .chip_select    = 5,
285                 .controller_data = &spi_wm8731_chip_info,
286                 .mode = SPI_MODE_0,
287         },
288 #endif
289 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
290         {
291                 .modalias = "spidev",
292                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
293                 .bus_num = 0,
294                 .chip_select = 1,
295                 .controller_data = &spidev_chip_info,
296         },
297 #endif
298 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
299         {
300                 .modalias = "bfin-lq035q1-spi",
301                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
302                 .bus_num = 0,
303                 .chip_select = 1,
304                 .controller_data = &lq035q1_spi_chip_info,
305                 .mode = SPI_CPHA | SPI_CPOL,
306         },
307 #endif
308 };
309
310 /* SPI controller data */
311 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
312 /* SPI (0) */
313 static struct bfin5xx_spi_master bfin_spi0_info = {
314         .num_chipselect = 5,
315         .enable_dma = 1,  /* master has the ability to do dma transfer */
316         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
317 };
318
319 static struct resource bfin_spi0_resource[] = {
320         [0] = {
321                 .start = SPI0_REGBASE,
322                 .end   = SPI0_REGBASE + 0xFF,
323                 .flags = IORESOURCE_MEM,
324                 },
325         [1] = {
326                 .start = CH_SPI0,
327                 .end   = CH_SPI0,
328                 .flags = IORESOURCE_IRQ,
329         },
330 };
331
332 static struct platform_device bfin_spi0_device = {
333         .name = "bfin-spi",
334         .id = 0, /* Bus number */
335         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
336         .resource = bfin_spi0_resource,
337         .dev = {
338                 .platform_data = &bfin_spi0_info, /* Passed to driver */
339         },
340 };
341
342 /* SPI (1) */
343 static struct bfin5xx_spi_master bfin_spi1_info = {
344         .num_chipselect = 5,
345         .enable_dma = 1,  /* master has the ability to do dma transfer */
346         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
347 };
348
349 static struct resource bfin_spi1_resource[] = {
350         [0] = {
351                 .start = SPI1_REGBASE,
352                 .end   = SPI1_REGBASE + 0xFF,
353                 .flags = IORESOURCE_MEM,
354                 },
355         [1] = {
356                 .start = CH_SPI1,
357                 .end   = CH_SPI1,
358                 .flags = IORESOURCE_IRQ,
359         },
360 };
361
362 static struct platform_device bfin_spi1_device = {
363         .name = "bfin-spi",
364         .id = 1, /* Bus number */
365         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
366         .resource = bfin_spi1_resource,
367         .dev = {
368                 .platform_data = &bfin_spi1_info, /* Passed to driver */
369         },
370 };
371 #endif  /* spi master and devices */
372
373 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
374 static struct resource bfin_uart_resources[] = {
375 #ifdef CONFIG_SERIAL_BFIN_UART0
376         {
377                 .start = 0xFFC00400,
378                 .end = 0xFFC004FF,
379                 .flags = IORESOURCE_MEM,
380         },
381 #endif
382 #ifdef CONFIG_SERIAL_BFIN_UART1
383         {
384                 .start = 0xFFC02000,
385                 .end = 0xFFC020FF,
386                 .flags = IORESOURCE_MEM,
387         },
388 #endif
389 };
390
391 static struct platform_device bfin_uart_device = {
392         .name = "bfin-uart",
393         .id = 1,
394         .num_resources = ARRAY_SIZE(bfin_uart_resources),
395         .resource = bfin_uart_resources,
396 };
397 #endif
398
399 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
400 #ifdef CONFIG_BFIN_SIR0
401 static struct resource bfin_sir0_resources[] = {
402         {
403                 .start = 0xFFC00400,
404                 .end = 0xFFC004FF,
405                 .flags = IORESOURCE_MEM,
406         },
407         {
408                 .start = IRQ_UART0_RX,
409                 .end = IRQ_UART0_RX+1,
410                 .flags = IORESOURCE_IRQ,
411         },
412         {
413                 .start = CH_UART0_RX,
414                 .end = CH_UART0_RX+1,
415                 .flags = IORESOURCE_DMA,
416         },
417 };
418
419 static struct platform_device bfin_sir0_device = {
420         .name = "bfin_sir",
421         .id = 0,
422         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
423         .resource = bfin_sir0_resources,
424 };
425 #endif
426 #ifdef CONFIG_BFIN_SIR1
427 static struct resource bfin_sir1_resources[] = {
428         {
429                 .start = 0xFFC02000,
430                 .end = 0xFFC020FF,
431                 .flags = IORESOURCE_MEM,
432         },
433         {
434                 .start = IRQ_UART1_RX,
435                 .end = IRQ_UART1_RX+1,
436                 .flags = IORESOURCE_IRQ,
437         },
438         {
439                 .start = CH_UART1_RX,
440                 .end = CH_UART1_RX+1,
441                 .flags = IORESOURCE_DMA,
442         },
443 };
444
445 static struct platform_device bfin_sir1_device = {
446         .name = "bfin_sir",
447         .id = 1,
448         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
449         .resource = bfin_sir1_resources,
450 };
451 #endif
452 #endif
453
454 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
455 static struct resource bfin_twi0_resource[] = {
456         [0] = {
457                 .start = TWI0_REGBASE,
458                 .end   = TWI0_REGBASE,
459                 .flags = IORESOURCE_MEM,
460         },
461         [1] = {
462                 .start = IRQ_TWI,
463                 .end   = IRQ_TWI,
464                 .flags = IORESOURCE_IRQ,
465         },
466 };
467
468 static struct platform_device i2c_bfin_twi_device = {
469         .name = "i2c-bfin-twi",
470         .id = 0,
471         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
472         .resource = bfin_twi0_resource,
473 };
474 #endif
475
476 #ifdef CONFIG_I2C_BOARDINFO
477 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
478 #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
479         {
480                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
481         },
482 #endif
483 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
484         {
485                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
486                 .irq = IRQ_PF8,
487         },
488 #endif
489 };
490 #endif
491
492 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
493 static struct platform_device bfin_sport0_uart_device = {
494         .name = "bfin-sport-uart",
495         .id = 0,
496 };
497
498 static struct platform_device bfin_sport1_uart_device = {
499         .name = "bfin-sport-uart",
500         .id = 1,
501 };
502 #endif
503
504 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
505 #include <linux/input.h>
506 #include <linux/gpio_keys.h>
507
508 static struct gpio_keys_button bfin_gpio_keys_table[] = {
509         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
510         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
511 };
512
513 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
514         .buttons        = bfin_gpio_keys_table,
515         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
516 };
517
518 static struct platform_device bfin_device_gpiokeys = {
519         .name      = "gpio-keys",
520         .dev = {
521                 .platform_data = &bfin_gpio_keys_data,
522         },
523 };
524 #endif
525
526 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
527
528 static struct bfin_sd_host bfin_sdh_data = {
529         .dma_chan = CH_RSI,
530         .irq_int0 = IRQ_RSI_INT0,
531         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
532 };
533
534 static struct platform_device bf51x_sdh_device = {
535         .name = "bfin-sdh",
536         .id = 0,
537         .dev = {
538                 .platform_data = &bfin_sdh_data,
539         },
540 };
541 #endif
542
543 static struct resource bfin_gpios_resources = {
544         .start = 0,
545         .end   = MAX_BLACKFIN_GPIOS - 1,
546         .flags = IORESOURCE_IRQ,
547 };
548
549 static struct platform_device bfin_gpios_device = {
550         .name = "simple-gpio",
551         .id = -1,
552         .num_resources = 1,
553         .resource = &bfin_gpios_resources,
554 };
555
556 static const unsigned int cclk_vlev_datasheet[] =
557 {
558         VRPAIR(VLEV_100, 400000000),
559         VRPAIR(VLEV_105, 426000000),
560         VRPAIR(VLEV_110, 500000000),
561         VRPAIR(VLEV_115, 533000000),
562         VRPAIR(VLEV_120, 600000000),
563 };
564
565 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
566         .tuple_tab = cclk_vlev_datasheet,
567         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
568         .vr_settling_time = 25 /* us */,
569 };
570
571 static struct platform_device bfin_dpmc = {
572         .name = "bfin dpmc",
573         .dev = {
574                 .platform_data = &bfin_dmpc_vreg_data,
575         },
576 };
577
578 static struct platform_device *stamp_devices[] __initdata = {
579
580         &bfin_dpmc,
581
582 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
583         &rtc_device,
584 #endif
585
586 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
587         &bfin_mac_device,
588 #endif
589
590 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
591         &bfin_spi0_device,
592         &bfin_spi1_device,
593 #endif
594
595 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
596         &bfin_uart_device,
597 #endif
598
599 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
600 #ifdef CONFIG_BFIN_SIR0
601         &bfin_sir0_device,
602 #endif
603 #ifdef CONFIG_BFIN_SIR1
604         &bfin_sir1_device,
605 #endif
606 #endif
607
608 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
609         &i2c_bfin_twi_device,
610 #endif
611
612 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
613         &bfin_sport0_uart_device,
614         &bfin_sport1_uart_device,
615 #endif
616
617 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
618         &bfin_device_gpiokeys,
619 #endif
620
621 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
622         &bf51x_sdh_device,
623 #endif
624
625 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
626         &ezbrd_flash_device,
627 #endif
628
629         &bfin_gpios_device,
630 };
631
632 static int __init ezbrd_init(void)
633 {
634         printk(KERN_INFO "%s(): registering device resources\n", __func__);
635
636 #ifdef CONFIG_I2C_BOARDINFO
637         i2c_register_board_info(0, bfin_i2c_board_info,
638                                 ARRAY_SIZE(bfin_i2c_board_info));
639 #endif
640
641         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
642         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
643         return 0;
644 }
645
646 arch_initcall(ezbrd_init);
647
648 void native_machine_restart(char *cmd)
649 {
650         /* workaround reboot hang when booting from SPI */
651         if ((bfin_read_SYSCR() & 0x7) == 0x3)
652                 bfin_gpio_reset_spi0_ssel1();
653 }
654
655 void bfin_get_ether_addr(char *addr)
656 {
657         /* the MAC is stored in OTP memory page 0xDF */
658         u32 ret;
659         u64 otp_mac;
660         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
661
662         ret = otp_read(0xDF, 0x00, &otp_mac);
663         if (!(ret & 0x1)) {
664                 char *otp_mac_p = (char *)&otp_mac;
665                 for (ret = 0; ret < 6; ++ret)
666                         addr[ret] = otp_mac_p[5 - ret];
667         }
668 }
669 EXPORT_SYMBOL(bfin_get_ether_addr);