47e1fa322f157f5fc1348c8e488282d9d6370a19
[linux-2.6.git] / arch / arm / mach-tegra / board-dt-tegra20.c
1 /*
2  * nVidia Tegra device tree board support
3  *
4  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5  * Copyright (C) 2010 Google, Inc.
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/serial_8250.h>
22 #include <linux/clk.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/irqdomain.h>
25 #include <linux/of.h>
26 #include <linux/of_address.h>
27 #include <linux/of_fdt.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_platform.h>
30 #include <linux/pda_power.h>
31 #include <linux/io.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-tegra.h>
34
35 #include <asm/hardware/gic.h>
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/time.h>
39 #include <asm/setup.h>
40 #include <asm/hardware/gic.h>
41
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44
45 #include "board.h"
46 #include "board-harmony.h"
47 #include "clock.h"
48 #include "devices.h"
49
50 void harmony_pinmux_init(void);
51 void paz00_pinmux_init(void);
52 void seaboard_pinmux_init(void);
53 void trimslice_pinmux_init(void);
54 void ventana_pinmux_init(void);
55
56 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
57         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
58         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
59         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
60         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
61         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
62         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
63         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
64         OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
65         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
66         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
67         OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
68         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
69                        &tegra_ehci1_device.dev.platform_data),
70         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
71                        &tegra_ehci2_device.dev.platform_data),
72         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
73                        &tegra_ehci3_device.dev.platform_data),
74         {}
75 };
76
77 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
78         /* name         parent          rate            enabled */
79         { "uartd",      "pll_p",        216000000,      true },
80         { "usbd",       "clk_m",        12000000,       false },
81         { "usb2",       "clk_m",        12000000,       false },
82         { "usb3",       "clk_m",        12000000,       false },
83         { "pll_a",      "pll_p_out1",   56448000,       true },
84         { "pll_a_out0", "pll_a",        11289600,       true },
85         { "cdev1",      NULL,           0,              true },
86         { "i2s1",       "pll_a_out0",   11289600,       false},
87         { "i2s2",       "pll_a_out0",   11289600,       false},
88         { NULL,         NULL,           0,              0},
89 };
90
91 static struct of_device_id tegra_dt_match_table[] __initdata = {
92         { .compatible = "simple-bus", },
93         {}
94 };
95
96 static struct {
97         char *machine;
98         void (*init)(void);
99 } pinmux_configs[] = {
100         { "compulab,trimslice", trimslice_pinmux_init },
101         { "nvidia,harmony", harmony_pinmux_init },
102         { "compal,paz00", paz00_pinmux_init },
103         { "nvidia,seaboard", seaboard_pinmux_init },
104         { "nvidia,ventana", ventana_pinmux_init },
105 };
106
107 static void __init tegra_dt_init(void)
108 {
109         int i;
110
111         tegra_clk_init_from_table(tegra_dt_clk_init_table);
112
113         /*
114          * Finished with the static registrations now; fill in the missing
115          * devices
116          */
117         of_platform_populate(NULL, tegra_dt_match_table,
118                                 tegra20_auxdata_lookup, NULL);
119
120         for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
121                 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
122                         pinmux_configs[i].init();
123                         break;
124                 }
125         }
126
127         WARN(i == ARRAY_SIZE(pinmux_configs),
128                 "Unknown platform! Pinmuxing not initialized\n");
129 }
130
131 static const char *tegra20_dt_board_compat[] = {
132         "compulab,trimslice",
133         "nvidia,harmony",
134         "compal,paz00",
135         "nvidia,seaboard",
136         "nvidia,ventana",
137         NULL
138 };
139
140 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
141         .map_io         = tegra_map_common_io,
142         .init_early     = tegra20_init_early,
143         .init_irq       = tegra_dt_init_irq,
144         .handle_irq     = gic_handle_irq,
145         .timer          = &tegra_timer,
146         .init_machine   = tegra_dt_init,
147         .restart        = tegra_assert_system_reset,
148         .dt_compat      = tegra20_dt_board_compat,
149 MACHINE_END