[ARM] pxa: separate GPIOs and their mode definitions to pxa2xx-gpio.h
[linux-2.6.git] / arch / arm / mach-pxa / mainstone.c
1 /*
2  *  linux/arch/arm/mach-pxa/mainstone.c
3  *
4  *  Support for the Intel HCDDBBVA0 Development Platform.
5  *  (go figure how they came up with such name...)
6  *
7  *  Author:     Nicolas Pitre
8  *  Created:    Nov 05, 2002
9  *  Copyright:  MontaVista Software Inc.
10  *
11  *  This program is free software; you can redistribute it and/or modify
12  *  it under the terms of the GNU General Public License version 2 as
13  *  published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/backlight.h>
27
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware.h>
33 #include <asm/irq.h>
34 #include <asm/sizes.h>
35
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
40
41 #include <asm/arch/pxa-regs.h>
42 #include <asm/arch/pxa2xx-regs.h>
43 #include <asm/arch/pxa2xx-gpio.h>
44 #include <asm/arch/mainstone.h>
45 #include <asm/arch/audio.h>
46 #include <asm/arch/pxafb.h>
47 #include <asm/arch/mmc.h>
48 #include <asm/arch/irda.h>
49 #include <asm/arch/ohci.h>
50
51 #include "generic.h"
52 #include "devices.h"
53
54
55 static unsigned long mainstone_irq_enabled;
56
57 static void mainstone_mask_irq(unsigned int irq)
58 {
59         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
60         MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
61 }
62
63 static void mainstone_unmask_irq(unsigned int irq)
64 {
65         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
66         /* the irq can be acknowledged only if deasserted, so it's done here */
67         MST_INTSETCLR &= ~(1 << mainstone_irq);
68         MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
69 }
70
71 static struct irq_chip mainstone_irq_chip = {
72         .name           = "FPGA",
73         .ack            = mainstone_mask_irq,
74         .mask           = mainstone_mask_irq,
75         .unmask         = mainstone_unmask_irq,
76 };
77
78 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
79 {
80         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
81         do {
82                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
83                 if (likely(pending)) {
84                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
85                         desc = irq_desc + irq;
86                         desc_handle_irq(irq, desc);
87                 }
88                 pending = MST_INTSETCLR & mainstone_irq_enabled;
89         } while (pending);
90 }
91
92 static void __init mainstone_init_irq(void)
93 {
94         int irq;
95
96         pxa27x_init_irq();
97
98         /* setup extra Mainstone irqs */
99         for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
100                 set_irq_chip(irq, &mainstone_irq_chip);
101                 set_irq_handler(irq, handle_level_irq);
102                 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
103                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
104                 else
105                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
106         }
107         set_irq_flags(MAINSTONE_IRQ(8), 0);
108         set_irq_flags(MAINSTONE_IRQ(12), 0);
109
110         MST_INTMSKENA = 0;
111         MST_INTSETCLR = 0;
112
113         set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
114         set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
115 }
116
117 #ifdef CONFIG_PM
118
119 static int mainstone_irq_resume(struct sys_device *dev)
120 {
121         MST_INTMSKENA = mainstone_irq_enabled;
122         return 0;
123 }
124
125 static struct sysdev_class mainstone_irq_sysclass = {
126         .name = "cpld_irq",
127         .resume = mainstone_irq_resume,
128 };
129
130 static struct sys_device mainstone_irq_device = {
131         .cls = &mainstone_irq_sysclass,
132 };
133
134 static int __init mainstone_irq_device_init(void)
135 {
136         int ret = -ENODEV;
137
138         if (machine_is_mainstone()) {
139                 ret = sysdev_class_register(&mainstone_irq_sysclass);
140                 if (ret == 0)
141                         ret = sysdev_register(&mainstone_irq_device);
142         }
143         return ret;
144 }
145
146 device_initcall(mainstone_irq_device_init);
147
148 #endif
149
150
151 static struct resource smc91x_resources[] = {
152         [0] = {
153                 .start  = (MST_ETH_PHYS + 0x300),
154                 .end    = (MST_ETH_PHYS + 0xfffff),
155                 .flags  = IORESOURCE_MEM,
156         },
157         [1] = {
158                 .start  = MAINSTONE_IRQ(3),
159                 .end    = MAINSTONE_IRQ(3),
160                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
161         }
162 };
163
164 static struct platform_device smc91x_device = {
165         .name           = "smc91x",
166         .id             = 0,
167         .num_resources  = ARRAY_SIZE(smc91x_resources),
168         .resource       = smc91x_resources,
169 };
170
171 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
172 {
173         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
174                 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
175         return 0;
176 }
177
178 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
179 {
180         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
181                 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
182 }
183
184 static long mst_audio_suspend_mask;
185
186 static void mst_audio_suspend(void *priv)
187 {
188         mst_audio_suspend_mask = MST_MSCWR2;
189         MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
190 }
191
192 static void mst_audio_resume(void *priv)
193 {
194         MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
195 }
196
197 static pxa2xx_audio_ops_t mst_audio_ops = {
198         .startup        = mst_audio_startup,
199         .shutdown       = mst_audio_shutdown,
200         .suspend        = mst_audio_suspend,
201         .resume         = mst_audio_resume,
202 };
203
204 static struct platform_device mst_audio_device = {
205         .name           = "pxa2xx-ac97",
206         .id             = -1,
207         .dev            = { .platform_data = &mst_audio_ops },
208 };
209
210 static struct resource flash_resources[] = {
211         [0] = {
212                 .start  = PXA_CS0_PHYS,
213                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
214                 .flags  = IORESOURCE_MEM,
215         },
216         [1] = {
217                 .start  = PXA_CS1_PHYS,
218                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
219                 .flags  = IORESOURCE_MEM,
220         },
221 };
222
223 static struct mtd_partition mainstoneflash0_partitions[] = {
224         {
225                 .name =         "Bootloader",
226                 .size =         0x00040000,
227                 .offset =       0,
228                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
229         },{
230                 .name =         "Kernel",
231                 .size =         0x00400000,
232                 .offset =       0x00040000,
233         },{
234                 .name =         "Filesystem",
235                 .size =         MTDPART_SIZ_FULL,
236                 .offset =       0x00440000
237         }
238 };
239
240 static struct flash_platform_data mst_flash_data[2] = {
241         {
242                 .map_name       = "cfi_probe",
243                 .parts          = mainstoneflash0_partitions,
244                 .nr_parts       = ARRAY_SIZE(mainstoneflash0_partitions),
245         }, {
246                 .map_name       = "cfi_probe",
247                 .parts          = NULL,
248                 .nr_parts       = 0,
249         }
250 };
251
252 static struct platform_device mst_flash_device[2] = {
253         {
254                 .name           = "pxa2xx-flash",
255                 .id             = 0,
256                 .dev = {
257                         .platform_data = &mst_flash_data[0],
258                 },
259                 .resource = &flash_resources[0],
260                 .num_resources = 1,
261         },
262         {
263                 .name           = "pxa2xx-flash",
264                 .id             = 1,
265                 .dev = {
266                         .platform_data = &mst_flash_data[1],
267                 },
268                 .resource = &flash_resources[1],
269                 .num_resources = 1,
270         },
271 };
272
273 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
274 static int mainstone_backlight_update_status(struct backlight_device *bl)
275 {
276         int brightness = bl->props.brightness;
277
278         if (bl->props.power != FB_BLANK_UNBLANK ||
279             bl->props.fb_blank != FB_BLANK_UNBLANK)
280                 brightness = 0;
281
282         if (brightness != 0) {
283                 pxa_gpio_mode(GPIO16_PWM0_MD);
284                 pxa_set_cken(CKEN_PWM0, 1);
285         }
286         PWM_CTRL0 = 0;
287         PWM_PWDUTY0 = brightness;
288         PWM_PERVAL0 = bl->props.max_brightness;
289         if (brightness == 0)
290                 pxa_set_cken(CKEN_PWM0, 0);
291         return 0; /* pointless return value */
292 }
293
294 static int mainstone_backlight_get_brightness(struct backlight_device *bl)
295 {
296         return PWM_PWDUTY0;
297 }
298
299 static /*const*/ struct backlight_ops mainstone_backlight_ops = {
300         .update_status  = mainstone_backlight_update_status,
301         .get_brightness = mainstone_backlight_get_brightness,
302 };
303
304 static void __init mainstone_backlight_register(void)
305 {
306         struct backlight_device *bl;
307
308         bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
309                                        NULL, &mainstone_backlight_ops);
310         if (IS_ERR(bl)) {
311                 printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
312                        PTR_ERR(bl));
313                 return;
314         }
315
316         /*
317          * broken design - register-then-setup interfaces are
318          * utterly broken by definition.
319          */
320         bl->props.max_brightness = 1023;
321         bl->props.brightness = 1023;
322         backlight_update_status(bl);
323 }
324 #else
325 #define mainstone_backlight_register()  do { } while (0)
326 #endif
327
328 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
329         .pixclock               = 50000,
330         .xres                   = 640,
331         .yres                   = 480,
332         .bpp                    = 16,
333         .hsync_len              = 1,
334         .left_margin            = 0x9f,
335         .right_margin           = 1,
336         .vsync_len              = 44,
337         .upper_margin           = 0,
338         .lower_margin           = 0,
339         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
340 };
341
342 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
343         .pixclock               = 110000,
344         .xres                   = 240,
345         .yres                   = 320,
346         .bpp                    = 16,
347         .hsync_len              = 4,
348         .left_margin            = 8,
349         .right_margin           = 20,
350         .vsync_len              = 3,
351         .upper_margin           = 1,
352         .lower_margin           = 10,
353         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
354 };
355
356 static struct pxafb_mach_info mainstone_pxafb_info = {
357         .num_modes              = 1,
358         .lccr0                  = LCCR0_Act,
359         .lccr3                  = LCCR3_PCP,
360 };
361
362 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
363 {
364         int err;
365
366         /*
367          * setup GPIO for PXA27x MMC controller
368          */
369         pxa_gpio_mode(GPIO32_MMCCLK_MD);
370         pxa_gpio_mode(GPIO112_MMCCMD_MD);
371         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
372         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
373         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
374         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
375
376         /* make sure SD/Memory Stick multiplexer's signals
377          * are routed to MMC controller
378          */
379         MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
380
381         err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
382                              "MMC card detect", data);
383         if (err)
384                 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
385
386         return err;
387 }
388
389 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
390 {
391         struct pxamci_platform_data* p_d = dev->platform_data;
392
393         if (( 1 << vdd) & p_d->ocr_mask) {
394                 printk(KERN_DEBUG "%s: on\n", __func__);
395                 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
396                 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
397         } else {
398                 printk(KERN_DEBUG "%s: off\n", __func__);
399                 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
400         }
401 }
402
403 static void mainstone_mci_exit(struct device *dev, void *data)
404 {
405         free_irq(MAINSTONE_MMC_IRQ, data);
406 }
407
408 static struct pxamci_platform_data mainstone_mci_platform_data = {
409         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
410         .init           = mainstone_mci_init,
411         .setpower       = mainstone_mci_setpower,
412         .exit           = mainstone_mci_exit,
413 };
414
415 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
416 {
417         unsigned long flags;
418
419         local_irq_save(flags);
420         if (mode & IR_SIRMODE) {
421                 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
422         } else if (mode & IR_FIRMODE) {
423                 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
424         }
425         if (mode & IR_OFF) {
426                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
427         } else {
428                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
429         }
430         local_irq_restore(flags);
431 }
432
433 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
434         .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
435         .transceiver_mode = mainstone_irda_transceiver_mode,
436 };
437
438 static struct platform_device *platform_devices[] __initdata = {
439         &smc91x_device,
440         &mst_audio_device,
441         &mst_flash_device[0],
442         &mst_flash_device[1],
443 };
444
445 static int mainstone_ohci_init(struct device *dev)
446 {
447         /* setup Port1 GPIO pin. */
448         pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN);  /* USBHPWR1 */
449         pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
450
451         /* Set the Power Control Polarity Low and Power Sense
452            Polarity Low to active low. */
453         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
454                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
455
456         return 0;
457 }
458
459 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
460         .port_mode      = PMM_PERPORT_MODE,
461         .init           = mainstone_ohci_init,
462 };
463
464 static void __init mainstone_init(void)
465 {
466         int SW7 = 0;  /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
467
468         mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
469         mst_flash_data[1].width = 4;
470
471         /* Compensate for SW7 which swaps the flash banks */
472         mst_flash_data[SW7].name = "processor-flash";
473         mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
474
475         printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
476                mst_flash_data[0].name);
477
478         /* system bus arbiter setting
479          * - Core_Park
480          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
481          */
482         ARB_CNTRL = ARB_CORE_PARK | 0x234;
483
484         /*
485          * On Mainstone, we route AC97_SYSCLK via GPIO45 to
486          * the audio daughter card
487          */
488         pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
489
490         GPSR(GPIO48_nPOE) =
491                 GPIO_bit(GPIO48_nPOE) |
492                 GPIO_bit(GPIO49_nPWE) |
493                 GPIO_bit(GPIO50_nPIOR) |
494                 GPIO_bit(GPIO51_nPIOW) |
495                 GPIO_bit(GPIO85_nPCE_1) |
496                 GPIO_bit(GPIO54_nPCE_2);
497
498         pxa_gpio_mode(GPIO48_nPOE_MD);
499         pxa_gpio_mode(GPIO49_nPWE_MD);
500         pxa_gpio_mode(GPIO50_nPIOR_MD);
501         pxa_gpio_mode(GPIO51_nPIOW_MD);
502         pxa_gpio_mode(GPIO85_nPCE_1_MD);
503         pxa_gpio_mode(GPIO54_nPCE_2_MD);
504         pxa_gpio_mode(GPIO79_pSKTSEL_MD);
505         pxa_gpio_mode(GPIO55_nPREG_MD);
506         pxa_gpio_mode(GPIO56_nPWAIT_MD);
507         pxa_gpio_mode(GPIO57_nIOIS16_MD);
508
509         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
510
511         /* reading Mainstone's "Virtual Configuration Register"
512            might be handy to select LCD type here */
513         if (0)
514                 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
515         else
516                 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
517
518         set_pxa_fb_info(&mainstone_pxafb_info);
519         mainstone_backlight_register();
520
521         pxa_set_mci_info(&mainstone_mci_platform_data);
522         pxa_set_ficp_info(&mainstone_ficp_platform_data);
523         pxa_set_ohci_info(&mainstone_ohci_platform_data);
524 }
525
526
527 static struct map_desc mainstone_io_desc[] __initdata = {
528         {       /* CPLD */
529                 .virtual        =  MST_FPGA_VIRT,
530                 .pfn            = __phys_to_pfn(MST_FPGA_PHYS),
531                 .length         = 0x00100000,
532                 .type           = MT_DEVICE
533         }
534 };
535
536 static void __init mainstone_map_io(void)
537 {
538         pxa_map_io();
539         iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
540
541         /* initialize sleep mode regs (wake-up sources, etc) */
542         PGSR0 = 0x00008800;
543         PGSR1 = 0x00000002;
544         PGSR2 = 0x0001FC00;
545         PGSR3 = 0x00001F81;
546         PWER  = 0xC0000002;
547         PRER  = 0x00000002;
548         PFER  = 0x00000002;
549         /*      for use I SRAM as framebuffer.  */
550         PSLR |= 0xF04;
551         PCFR = 0x66;
552         /*      For Keypad wakeup.      */
553         KPC &=~KPC_ASACT;
554         KPC |=KPC_AS;
555         PKWR  = 0x000FD000;
556         /*      Need read PKWR back after set it.       */
557         PKWR;
558 }
559
560 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
561         /* Maintainer: MontaVista Software Inc. */
562         .phys_io        = 0x40000000,
563         .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
564         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
565         .map_io         = mainstone_map_io,
566         .init_irq       = mainstone_init_irq,
567         .timer          = &pxa_timer,
568         .init_machine   = mainstone_init,
569 MACHINE_END