3 years agomemory: smmu: update comment message for t210b01
Sunny Li [Fri, 13 Jul 2018 12:17:19 +0000]
memory: smmu: update comment message for t210b01

Should use t210b01 in any code/comment

Bug 2116505

Change-Id: If1b041c34422f557d7f70e9dd8363c4ff385e955
Reviewed-on: https://git-master.nvidia.com/r/1777842
GVS: Gerrit_Virtual_Submit
Tested-by: Sunny Li <sunnyl@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodt-bindings: memory: tegra: don't use upstream swgroup definitions
Joseph Lo [Fri, 1 Jun 2018 02:06:18 +0000]
dt-bindings: memory: tegra: don't use upstream swgroup definitions

After include "tegra210-mc.h" for MC hot reset definitions, it will
cause multiple re-definitions of SWGROUPs that we use in
"tegra-swgroup.h". So add a flag to isolate that.

Bug 200416069

Change-Id: I1b6dc54158e3272080c97c10b7dd67113db74187
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1747063
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodt-bindings: memory: tegra: add hot reset definitions
Joseph Lo [Fri, 1 Jun 2018 01:49:36 +0000]
dt-bindings: memory: tegra: add hot reset definitions

Add MC hot reset definitions for Tegra210.

Bug 200416069

Change-Id: Ie51a3d714b656315949a8060b2890c247d308b03
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1747062
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodt-bindings: reset: tegra: add reset ID of VI
Joseph Lo [Fri, 1 Jun 2018 01:38:57 +0000]
dt-bindings: reset: tegra: add reset ID of VI

Add reset ID of VI for Tegra210.

Bug 200416069

Change-Id: I73db6e1a72ee7dd0d331e9285dbcc21e7d81efd5
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1747061
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agomemory: smmu: Add iommu-group-id for devices l4t/l4t-r31.0.1 l4t/l4t-r31.1 tegra-l4t-r31.0.1 tegra-l4t-r31.0.2 tegra-l4t-r31.1
David Gilhooley [Fri, 15 Jun 2018 16:30:26 +0000]
memory: smmu: Add iommu-group-id for devices

Add the group ids so devices can
be put into the same IOMMU address space

Bug 200385990

Change-Id: I14b7683231ce7accaa75951e1b8aa3d4245d4e53
Signed-off-by: David Gilhooley <dgilhooley@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1751080
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: fix soctherm sensor numbering
Srikar Srimath Tirumala [Wed, 20 Jun 2018 20:21:03 +0000]
tegra: dt-bindings: fix soctherm sensor numbering

Soctherm sensor numbering was mismatched from upstream dt-bindings
as the DT was shared between K4.4+ and K3.10. Fix this to match
the upstream numbering as K3.10 is no longer supported.

Bug 2201716

Change-Id: Id3a77d2afbcfb2f1de83798e543446121152e4ad
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1756196
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: add a macro for pwm normal polarity rel-30-r2 rel-30-r3
Darren Sun [Thu, 10 May 2018 13:14:57 +0000]
tegra: dt-bindings: add a macro for pwm normal polarity

Add a macro to indicate the normal polarity
of pwm.

Bug 200412263

Change-Id: I3da2a383a437297330faf580eac5fb4fdb2c15a7
Signed-off-by: Darren Sun <darrens@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1711971
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Cyril Raju <craju@nvidia.com>
Reviewed-by: Daniel Fu <danifu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agosoc: tegra: Update T210b01 thermal trip-points
Alex Frid [Tue, 6 Mar 2018 02:27:40 +0000]
soc: tegra: Update T210b01 thermal trip-points

Updated CPU and GPU thermal cap trip-points according to
characterization results.

Change-Id: I0a0cf558f38f2985335fca6a6b325f9641ec7aa6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1669180
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodt-bindings: tegra: fix pre-processor directives
Timo Alho [Tue, 27 Feb 2018 21:06:08 +0000]
dt-bindings: tegra: fix pre-processor directives

rt5659.h has some obviously broken pre-processor directives

.../sound/rt5659.h:17:21: warning: extra tokens at end of #ifndef directive
 #ifndef __LINUX_SND_#define RT5659_H
                     ^
.../sound/rt5659.h:18:21: warning: missing whitespace after the macro name
 #define __LINUX_SND_#define RT5659_H

Fix those.

Bug 1900464

Change-Id: I4bd3dce3cff664aff5bc1facd66a7bb9c1da6750
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1665320
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: add dc flag to disable fbcon
Tow Wang [Fri, 10 Nov 2017 19:37:59 +0000]
tegra: dt-bindings: add dc flag to disable fbcon

Create a flag to disable frame buffer console on specific DCs,
since this is not supported at the per-platform granularity in defconfig.

Bug 2011866
JIRA: EVLR-2092

Change-Id: I675dc13c36f3db9d9d2e05aa1c543efce65b8c18
(cherry picked from commit 8e9b0eb7c3d3d39ebc01147549dbbc559d2c9260)
Signed-off-by: Tow Wang <toww@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1634323
Reviewed-by: Sungwook Kim <sungwookk@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Bhosale <dbhosale@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodt-bindings: tegra: add codec header defines
Sameer Pujar [Tue, 2 Jan 2018 11:09:20 +0000]
dt-bindings: tegra: add codec header defines

Added header for dt-binding of codec, this is inline with rt5659.h
linux header include.

Bug 200376798
Bug 200375021

Change-Id: I17fe5c1fcde3338458e52ea7144420a4508e0140
Reviewed-on: https://git-master.nvidia.com/r/1630001
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodt-bindings: soc: add xavier specific IO DPD ids
Venkat Reddy Talla [Fri, 29 Dec 2017 06:51:51 +0000]
dt-bindings: soc: add xavier specific IO DPD ids

Adding HDMI DP2 and DP3 IO DPD ids which are applicable
only for xavier.
TEGRA_IO_PAD_GROUP_HDMI_DP2
TEGRA_IO_PAD_GROUP_HDMI_DP3

Change-Id: Ifb4b6bca5b733556ddbdf83d566faf773cbc1ae7
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1628298
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Santosh Galma <galmar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoVersion: LK: Update DT bindings version
Vishal Annapurve [Thu, 14 Dec 2017 03:08:58 +0000]
Version: LK: Update DT bindings version

Move following DT configurations to version 2:
TEGRA_XUSB_PADCONTROL_VERSION
TEGRA_XUSB_DT_VERSION
TEGRA_XUDC_DT_VERSION
TEGRA_AUDIO_BUS_DT_VERSION

Bug 200352773

Change-Id: I56c97503e653cccb23b8617dc86ddf2dfd17cfe3
Reviewed-on: https://git-master.nvidia.com/r/1617654
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agosoc: tegra: Move QNX DT binding to V2 version
Viraaj Somayajula [Thu, 26 Oct 2017 09:24:24 +0000]
soc: tegra: Move QNX DT binding to V2 version

QNX currently uses V1 verion DT binding. It is required to move
this DT binding to V2 version, so that V1 version can be deprecated
once Linux k4.4 is deprecated.

Power domain and audio bus DT are still version 1.

Jira ESQC-1691

Change-Id: Ic0b3e39b1bb75e3afd6e4659a5d992e18be7f0c8
Reviewed-on: https://git-master.nvidia.com/r/1616429
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Somayajula Viraaj <sviraaj@nvidia.com>
Reviewed-by: Mohit Dhingra <mdhingra@nvidia.com>
Reviewed-by: Ambika Prasad <ambikap@nvidia.com>
Tested-by: Aparna Nanda <ananda@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Poojan Shah <poojans@nvidia.com>
Reviewed-by: Poojan Shah <poojans@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agosoc: tegra: added pinctrl-tegra-padctl.h
Henry Lin [Wed, 29 Nov 2017 15:45:00 +0000]
soc: tegra: added pinctrl-tegra-padctl.h

pinctrl-tegra-padctl.h is moved from soc/t18x.

Bug 200368675

Change-Id: I5737674b4a7e9adc9cb2272aca903043bef34abd
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1607285
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: add dt-binding for extcon cable ids
Venkat Reddy Talla [Thu, 30 Nov 2017 09:18:58 +0000]
tegra: dt-bindings: add dt-binding for extcon cable ids

Adding dt-bndings header for extcon cable ids to provide
cable id information.

Change-Id: I617e56ac01770564143545c3ce0623b19c1919c1
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1608020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: Add support for LK
Vishal Annapurve [Tue, 21 Nov 2017 10:54:36 +0000]
tegra: dt-bindings: Add support for LK

This change updates the dt bindings to accept LK
as the accepted OS.

Jira SSV-1072

Change-Id: I81fd8ed15ee269fa5d53b1ce4f22e2bc4f03ddac
Reviewed-on: https://git-master.nvidia.com/r/1602342
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Vishal Annapurve <vannapurve@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: remove generic carveout define usage
Pritesh Raithatha [Thu, 16 Nov 2017 04:24:21 +0000]
tegra: dt-bindings: remove generic carveout define usage

Generice carveout define was added temporary.
It is not needed now so removing it.

Bug 200340258

Change-Id: I47d050780d41a9da83f94991fbfbc6ecad09d715
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1599246
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agosoc: tegra: Generate error if OS macro is not defined
Laxman Dewangan [Tue, 17 Oct 2017 12:06:25 +0000]
soc: tegra: Generate error if OS macro  is not defined

It is required to have the different DT bindings for
some of modules across kernel version specially Linux
kernel version. The DT binding of modules are different
for K4.4 and K4.9.

The DTS files are also used by non-Linux OS like QNX etc.

To have the DT binding independent of OS and support multiple
version of same OS and multiple OS, add DT binding version
file which defines the module DT binding version.

It is mandatory requirement to pass the OS macros when
compiling the DTS. If it is not available then generate
compilation error.

Bug 200344258

Change-Id: I6804ef1e3c572626afde31b0e0774ce3fb5a8b84
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572476
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: define versions for cpufreq
Bo Yan [Fri, 10 Nov 2017 05:06:34 +0000]
tegra: dt-bindings: define versions for cpufreq

Define two versions. Version 1 is for old register apertures,
which has different entries for two clusters. Version 2 is for
new binding, which has one single aperture for both clusters.

QNX stays at version #1. Non-OS build also stays at version #1.

Bug 2016207

Change-Id: Ibfe6c58bb7da484d51c61cb8ce496899bc3dea76
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595668
Reviewed-by: Poojan Shah <poojans@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agotegra: dt-bindings: add defines for generic infoframe
Ahung Cheng [Wed, 27 Sep 2017 05:37:51 +0000]
tegra: dt-bindings: add defines for generic infoframe

Add defines for generic-infoframe-type

bug 1994132

Change-Id: Ib23bda78e4ebabe784c47a43f2e5b4b65c94f880
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569151
Reviewed-on: https://git-master.nvidia.com/r/1579577
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Santosh Galma <galmar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

3 years agosoc: tegra: Add DT version macro for boot args
Laxman Dewangan [Wed, 11 Oct 2017 05:52:21 +0000]
soc: tegra: Add DT version macro for boot args

There is difference in the boot argument for different
Linux version. Add macro to change boot argument based
on OS version.

Bug 200344258

Change-Id: Iae7a8ab0071f446bee6f5893cb52bf7e217c61aa
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576735
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agosoc: tegra: Add DT version macro for uart console port
Laxman Dewangan [Wed, 11 Oct 2017 03:27:39 +0000]
soc: tegra: Add DT version macro for uart console port

Some of the OS supports console port in ttyS0 only and some
can support console in any ttySx port.

Add macro to define this limitation so that DTS file can
use this for supporting multiple OS.

Bug 200344258

Change-Id: I2aaee35ee1b6d0ce3dcca8adfeae95e3bb275957
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576669
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>

3 years agosoc: tegra: Add T210b01 DFLL floor trip at 70C
Alex Frid [Thu, 28 Sep 2017 05:39:20 +0000]
soc: tegra: Add T210b01 DFLL floor trip at 70C

Bug 1993768
Bug 1990253

Change-Id: I14fd841cb43b4d1eb27c4c0d2f2bf7da5a614531
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569925
(cherry picked from commit ae51085eee88fecdec59ea4d24686db06cb4003c)
Reviewed-on: https://git-master.nvidia.com/r/1572665
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

3 years agosoc: tegra: Add DT version macro for HSP node
Laxman Dewangan [Thu, 5 Oct 2017 08:54:16 +0000]
soc: tegra: Add DT version macro for HSP node

HSP node differ from Linux kernel version k4.4 to
k4.9. Add DT macro for HSP to define the DT binding
for HSP node as TEGRA_HSP_DT_VERSION.

Bug 200344258

Change-Id: I245c8547c970c35514591014eef28a67b36329ec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573603
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
Reviewed-by: Abhishek Sahu <absahu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Poojan Shah <poojans@nvidia.com>

3 years agosoc: tegra: Add generic dt-binding version file
Laxman Dewangan [Tue, 3 Oct 2017 12:17:15 +0000]
soc: tegra: Add generic dt-binding version file

It is required to have the different DT bindings for
some of modules across kernel version specially Linux
kernel version. The DT binding of modules are different
for K4.4 and K4.9.

The DTS files are also used by non-Linux OS like QNX etc.

To have the DT binding independent of OS and support multiple
version of same OS and multiple OS, add DT binding version
file which defines the module DT binding version.

The module/SoC/platforms specific DTSI file will use these
new modules specific DT binding version files for differentiating
DTs instead of direct OS and its versions.

Add generic dt binding version header to define module specific
DT binding macros for different OS.

Bug 200344258

Change-Id: I5e9274115fead58dafe24ccd32ba0c3de1607e0c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agosoc: tegra: Remove unused DFLL boundaries defines
Alex Frid [Thu, 28 Sep 2017 05:29:46 +0000]
soc: tegra: Remove unused DFLL boundaries defines

Bug 1993768
Bug 1990253

Change-Id: Ifa1f929e366c5711f3ef94d01f7b2d58c0a5046c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569924
(cherry picked from commit e50bb0db4f2624dbe4867cd71a62ad32a28c8dd7)
Reviewed-on: https://git-master.nvidia.com/r/1571079
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agosoc: tegra: Change T210b01 max GPU trip-point
Alex Frid [Fri, 15 Sep 2017 00:59:55 +0000]
soc: tegra: Change T210b01 max GPU trip-point

Changed maximum GPU scaling trip-point from 105C to 90C according to
characterization update.

Bug 1989990

Change-Id: I2528e2218cd4bfb055a842ee7864c7976a8b3975
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560429
(cherry picked from commit 7e4b145c9290eda32b2eea42e1e4cf15a3e71b28)
Reviewed-on: https://git-master.nvidia.com/r/1561110
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agosoc: tegra: Update T210b01 thermal trip-points
Alex Frid [Tue, 12 Sep 2017 19:46:42 +0000]
soc: tegra: Update T210b01 thermal trip-points

Updated CPU and GPU thermal cap trip-points according to
characterization results.

Bug 1975072

Change-Id: I98d63f504331e1825c64c93d4d4784550e6a847b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1558427
(cherry picked from commit 6a94b26a80693e1679ed5176e45f4f0c7a7f9452)
Reviewed-on: https://git-master.nvidia.com/r/1559385
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agosoc: tegra: Update T210b01 thermal trip-points
Alex Frid [Tue, 5 Sep 2017 22:14:21 +0000]
soc: tegra: Update T210b01 thermal trip-points

Updated CPU and SoC thermal cap trip-points according to
characterization results.

Bug 1975072

Change-Id: Ifd5d6f258f4227a8b75ae3dd783c5983856bddca
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1552224
(cherry picked from commit 151ce3018187be09c971c7892cd1e032b2fe01e5)
Reviewed-on: https://git-master.nvidia.com/r/1554781
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

4 years agotegra: dt-bindings: add SIDs for XUSB VFs
Ajay Gupta [Mon, 14 Aug 2017 18:36:52 +0000]
tegra: dt-bindings: add SIDs for XUSB VFs

t19x has four VF with XUSB controller.

Bug 1744893

Change-Id: I092396e20078cf4d1293564b113d4c61e19114ab
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1539885
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Tammineedi <vtammineedi@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agoDT: soc: t210: add reset ID for UARTB
Yong Goo Yi [Wed, 21 Jun 2017 08:16:33 +0000]
DT: soc: t210: add reset ID for UARTB

UARTB need to use separated reset ID from clk ID
otherwise It resets DFLL instead of UARTB.

Bug 1942620

Change-Id: Ic9f33ee9eddae8f444529437782f51f0d080f840
Signed-off-by: Yong Goo Yi <yyi@nvidia.com>
Reviewed-on: http://git-master/r/1506273
(cherry picked from commit 089613f92fae56c9d260178271a38f3c7a63691c)
Reviewed-on: https://git-master.nvidia.com/r/1529347
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agotegra: dt-bindings: Add sclk shared WIFI user ID
Alex Frid [Mon, 19 Jun 2017 23:18:23 +0000]
tegra: dt-bindings: Add sclk shared WIFI user ID

Bug 200267979

Change-Id: I24ca283a21f46550ce46deed62dd94d68ee8b82a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1505256
(cherry picked from commit cebb98a003db047bf03ec561c581ced55652e637)
Reviewed-on: https://git-master.nvidia.com/r/1526607
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agosoc: tegra: Define T210B01 thermal DVFS trips
Alex Frid [Fri, 23 Jun 2017 23:02:09 +0000]
soc: tegra: Define T210B01 thermal DVFS trips

Change-Id: I5babb9eac51296c9793aaa1ffe05d7bb1d7557d2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master/r/1508159
(cherry picked from commit e85092fcc956fe0b50feb39ec30221bc2a5469cd)
Reviewed-on: https://git-master.nvidia.com/r/1527742
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoclk: tegra: correct VI clk ID
Peter De Schrijver [Wed, 21 Jun 2017 09:55:46 +0000]
clk: tegra: correct VI clk ID

The DT clk ID for VI should be 228 as per upstream kernel.

Change-Id: I5b704d72001de4f13851c926632a78a54b65d91a
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1506345
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agomemory: smmu: add swgroup for isp2b1
Krishna Reddy [Sat, 10 Jun 2017 06:08:26 +0000]
memory: smmu: add swgroup for isp2b1

Bug 1811409

Change-Id: I4104b69c238c8d7fce5d232904efe4a2f4d63227
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/1499699
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-on: http://git-master/r/1504492
Tested-by: Samuel Payne <spayne@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoDT: soc: remove kernel version specific include files
Timo Alho [Fri, 19 May 2017 09:14:32 +0000]
DT: soc: remove kernel version specific include files

Instead of providing driver-info.h, pass kernel version from Makefile
(-DKERNEL_VERSION_4_x).

Change-Id: Ic86b744e0d759c26253a1f277aea590011569c88
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/1485755
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoDT: soc: t18x: Remove macro SDMMC_USE_CORE_REGULATOR_HANDLER
Laxman Dewangan [Thu, 18 May 2017 06:52:48 +0000]
DT: soc: t18x: Remove macro SDMMC_USE_CORE_REGULATOR_HANDLER

The macro SDMMC_USE_CORE_REGULATOR_HANDLER is defined to differentiate
the DT property for the SDMMC driver for K3.18 and K4.4. As support
moved to K4.4, the macro is default enabled for K4.4 and later version
of kernel. Support of K3.18 is already deprecated.

Hence it is not require to protect the DT property with macro and keep
the DT default for K44/later version.

Change-Id: Ie7f7efaf5b1aa248cfa789a264e1292fe2699bdc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1484647
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoDT: soc: tegra: remove define WAKEUP_VIA_PM_IRQ_INTERRUPT_CONTROLLER
Laxman Dewangan [Wed, 17 May 2017 12:23:00 +0000]
DT: soc: tegra: remove define WAKEUP_VIA_PM_IRQ_INTERRUPT_CONTROLLER

The support for the SOCs has moved to K4.4 and K4.9 which has
the macro defined WAKEUP_VIA_PM_IRQ_INTERRUPT_CONTROLLER. It
was not defined in k3.18.

As K3.18 is deprecated and hence this macros is not having any
meaning as it always defined. Remove this meaningless macro.

Change-Id: I1aeb32ad3f36fc3f2f9dedf59efc50c1a6fa5611
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1483960
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agoDT: soc: t210: add reset id for XUSB_DEV
Vivek Aseeja [Tue, 2 May 2017 17:58:44 +0000]
DT: soc: t210: add reset id for XUSB_DEV

XUSB_DEV reset id is different from the clock id, so hardcode it.

Bug 200304424

Change-Id: I00e9f25eb34fa9da1b3c579ce0f6eb7948928a1e
Signed-off-by: Vivek Aseeja <vaseeja@nvidia.com>
Reviewed-on: http://git-master/r/1473766
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>

4 years agokernel: dt-bindings: add support for delay in US
Ishwarya Balaji Gururajan [Wed, 29 Mar 2017 16:44:18 +0000]
kernel: dt-bindings: add support for delay in US

add support for delay in microseconds(us).

TDS-1996

Change-Id: Idce592203a161d08d6b07d21abaf01c050aa6c32
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/1454929
(cherry picked from commit 4994528ea043e4600ea09f3f90a49469d7ecb10e)
Reviewed-on: http://git-master/r/1330738
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

4 years agotegra: dt-headers: License update from GPL to MIT
Mudit Jain [Wed, 5 Apr 2017 12:12:00 +0000]
tegra: dt-headers: License update from GPL to MIT

Jira SSV-87

Change-Id: I67cc8af6becf8abe89f50f743f35e8b736d62773
Reviewed-on: http://git-master/r/1460518
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Mudit Jain <muditj@nvidia.com>
Reviewed-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agodt-bindings: Add new T210b01 clock ids
Alex Frid [Fri, 14 Apr 2017 02:37:20 +0000]
dt-bindings: Add new T210b01 clock ids

Bug 1867980

Change-Id: Idea208d71ce6aa8aea62728df0b04d5218c897ac
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1462751
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

4 years agodt-binding: soc: tegra: Add generic ahb header
Rakesh Babu Bodla [Tue, 11 Apr 2017 13:16:23 +0000]
dt-binding: soc: tegra: Add generic ahb header

Add generic ahb header which have the master ids
for all SOCs.

Bug 200295723

Change-Id: I2cb60ca366721c7f7b413bc642a4ab164ecde0f1
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/1460586
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoDT: soc: tegra: Remove defines for TEGRA GPIO from generic header
Laxman Dewangan [Mon, 10 Apr 2017 13:44:55 +0000]
DT: soc: tegra: Remove defines for TEGRA GPIO from generic header

Remove TEGRA GPIO defines from the generic GPIO header for DT
includes. Client needs to use Tegra header for GPIO.

Change-Id: I2db91624ec525fbbcbc10cb7ece36b8433a102a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1459746
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agogpio: core: Decouple open drain/source flag with active low/high
Laxman Dewangan [Fri, 7 Apr 2017 11:10:45 +0000]
gpio: core: Decouple open drain/source flag with active low/high

Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Change-Id: I3ae8f6ab7ca328720c570828d2bebc51fdfea44a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1457908
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agotegra: dt-bindings: add defines for hw-throttle
Srikar Srimath Tirumala [Fri, 17 Mar 2017 16:43:13 +0000]
tegra: dt-bindings: add defines for hw-throttle

Add new defines for specifing GPU HW throttle levels in the DT.

Bug 200233003

Change-Id: Ibe40fe2d5ce6e04a3ac783387aaa01bce5438f18
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1323200
Reviewed-by: Navneet Kumar <navneetk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

4 years agotegra: dt-bindings: make kernel-4.4 default
Timo Alho [Mon, 3 Apr 2017 08:53:01 +0000]
tegra: dt-bindings: make kernel-4.4 default

Currently, when building device trees for kernel-4.9, the build is
identified as k4.4 and k4.9 (KERNEL_VESRION_4_4 and KERNEL_VERSION_4_9
are both declared). Recent changes make k4.4 as default, so stop
declaring KERNEL_VESRION_4_4.

Bug 1453974

Change-Id: I41ba9b6e471a385f5bf26b0fee29e236959d01b9
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/1454005
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agotegra: dt-bindings: remove kernel-3.18 support
Timo Alho [Mon, 3 Apr 2017 08:27:33 +0000]
tegra: dt-bindings: remove kernel-3.18 support

Bug 1899027

Change-Id: Ic40576c47be64ac5627cb9656cf2cbab6ea2a211
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/1453975
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agotegra: dt-bindings: remove unused tegra210-clk.h
Peter De Schrijver [Fri, 10 Feb 2017 12:57:58 +0000]
tegra: dt-bindings: remove unused tegra210-clk.h

3.18 was the last kernel using this. As 3.18 has been removed, we can also
remove this file.

Bug 1843228

Change-Id: I03eda0753577bbebf15d36d2afba58404d1946eb
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1303031
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>

4 years agoRevert "tegra: dt-bindings: add SID defines for SCE_CAM"
Krishna Reddy [Sat, 4 Feb 2017 00:50:44 +0000]
Revert "tegra: dt-bindings: add SID defines for SCE_CAM"

This reverts commit 2c32d3512fd03fb4dbc593bb0fbe937ea26ecd95.

Change-Id: I7c3a825e3d5350d5a1794df149dc12ced1188eb3
Reviewed-on: http://git-master/r/1299024
GVS: Gerrit_Virtual_Submit
Reviewed-by: Damian Halas <dhalas@nvidia.com>
Tested-by: Damian Halas <dhalas@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

4 years agodt-bindings: Add TEGRA210_CLK_BWMGR_EMC id
Alex Frid [Thu, 26 Jan 2017 00:37:54 +0000]
dt-bindings: Add TEGRA210_CLK_BWMGR_EMC id

Bug 200269979

Change-Id: I400ea689a0409e24ea1943c4aec2e801f1a6b2a4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1295588
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

4 years agoDT: soc: tegra: Add powergate header for T210
Laxman Dewangan [Wed, 1 Feb 2017 10:21:09 +0000]
DT: soc: tegra: Add powergate header for T210

Add powergate header for T210 with macros as TEGRA210_POWER_DOMAIN_*.

This is inline with mainline nomenclature adapted for Tegra186.

tegra210-powergate.h header is based on the legacy header
include/dt-binding/soc/nvidia,tegra210-powergate.h with
renaming the macro names.

bug 200257351

Change-Id: Ibb3265bb2cf6b78e94346e13a89ef066a660c878
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1297224
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agotegra: dt-bindings: add SID defines for SCE_CAM
Pekka Pessi [Wed, 11 Jan 2017 16:25:01 +0000]
tegra: dt-bindings: add SID defines for SCE_CAM

Define StreamID separately for SCE_CAM.

Jira CRTC-640
Bug 1841452
Bug 1799032

Change-Id: Ib93be56a6cf948bdb47aac0c50fb9dcaf9a41ce7
Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
Reviewed-on: http://git-master/r/1283582
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

4 years agoDT: soc: tegra: Add generic Tegra powergates ID
Laxman Dewangan [Thu, 26 Jan 2017 05:36:21 +0000]
DT: soc: tegra: Add generic Tegra powergates ID

To have the kernel unification for all SOC, add the generic
tegra powergate header which is superset of all powergate macros.

The mapping is done in source code level to convert the ID to bit
position of the related register.

bug 200257351

Change-Id: I615889079869b0d574490a1b5b659776f795ffa1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1294452
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoDT: soc: tegra: Add missing entries in tegra210 power gate header
Laxman Dewangan [Thu, 26 Jan 2017 05:03:50 +0000]
DT: soc: tegra: Add missing entries in tegra210 power gate header

Add missing power gate macros in tegra210 power gate header to align
this with kernel header.

This makes the copy of the DT binding header same as the kernel
repos.

bug 200257351

Change-Id: I463dec040c111783a15057ed749b6a939f22ffec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1294451
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agotegra: dt-bindings: add ADSP and QSPI_OUT clocks
Peter De Schrijver [Wed, 25 Jan 2017 08:56:56 +0000]
tegra: dt-bindings: add ADSP and QSPI_OUT clocks

This brings the hardware repo copy of tegra210-car.h back in line with the
kernel-4.4 one.

Change-Id: I61ee67b4e28f2f4da3b51d6afa3bc7d4d1dc3996
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1293845
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>

4 years agoDT: soc: tegra: Get rid of chip specific tegra IO pads header
Laxman Dewangan [Fri, 13 Jan 2017 11:22:15 +0000]
DT: soc: tegra: Get rid of chip specific tegra IO pads header

The IO pad macros are unified for all Tegra SOCs at soc/tegra-io-pads.h
instead of chip specific headers. Use this new header and common macro
names for IO pads and remove the legacy header which is no more used.

bug 200259694

Change-Id: I1bc4024746d94044880079693e214d9b0ddba5ab
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1284813
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agodt-binding: soc: tegra: Add generic IO pads header
Laxman Dewangan [Thu, 12 Jan 2017 12:08:52 +0000]
dt-binding: soc: tegra: Add generic IO pads header

Add common IO pads header which have the IO pads name for
all SOCs. This will help to have single header instead of
SoC specific and kernel unifications.

bug 200259694

Change-Id: Ie4270b4a382e51dcf24519bd7e8ba34c79cb27ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1284190
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

4 years agotegra: dt-bindings: Correct TEGRA210_CLK_VI id
Frank Chen [Wed, 11 Jan 2017 06:23:16 +0000]
tegra: dt-bindings: Correct TEGRA210_CLK_VI id

Change TEGRA210_CLK_VI id from 228 back to 20.

Bug 1798951

Change-Id: I9604702978462e238afc0732df80bd39e5c63d0d
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/1283302
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

4 years agotegra: dt-bindings: copy dts binding content to hw repo
Venkat Reddy Talla [Thu, 29 Dec 2016 06:43:38 +0000]
tegra: dt-bindings: copy dts binding content to hw repo

All dts files present in hw repos use dt binding header
from the HW repos, not from kernel repos, copying
dts binding content merged in kernel repos to hw repo
to align with kernel repo dt-binding content.

Change-Id: I15f47ef0e247d76b514d727dac5110ca5da6f81c
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/1278049
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Timo Alho <talho@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agodt-bindings: kernel 4.9: Add driver specific defines for DTS
Timo Alho [Fri, 30 Dec 2016 07:54:41 +0000]
dt-bindings: kernel 4.9:  Add driver specific defines for DTS

Add driver specific defines for DTS to change properties based on
which kernel version or which feature of drivers are used.

Change-Id: If1730b450de67a4083a7d61f2e59740b83995d34
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/1278585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

4 years agodt-binding: add DT binding header for Tegra IO pads
Laxman Dewangan [Wed, 21 Dec 2016 15:53:11 +0000]
dt-binding: add DT binding header for Tegra IO pads

Add DT header for Tegra IO pads for voltage defines.

bug 200256189

Change-Id: I54dfa96543e75f3d62d66271d1ebb5150d45903d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1274924
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agodt-binding: memory: copy tegra186-swgroup.h file content to tegra-swgroup.h
Pritesh Raithatha [Tue, 29 Nov 2016 09:14:57 +0000]
dt-binding: memory: copy tegra186-swgroup.h file content to tegra-swgroup.h

Bug 200249245

Change-Id: Ie96371da6e7c3407a3bfdd84b69d4de3f57a2fe4
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/1261299
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sinha <shsinha@nvidia.com>
Tested-by: Shashank Sinha <shsinha@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>

4 years agotegra: dt-bindings: copy dts binding files to tegra repo
Venkat Reddy Talla [Fri, 14 Oct 2016 07:00:34 +0000]
tegra: dt-bindings: copy dts binding files to tegra repo

Copying dt-binding include files from kernel-4.4 and kernel-3.18
repo to $TOP/hardware/nvidia/soc/tegra repo

Bug 200240180

Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Change-Id: I1dc387da59474231bc1cf7d8a437e2562c1f380b
Reviewed-on: http://git-master/r/1236492
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoInitial empty repository
Amar Agrawal [Wed, 5 Oct 2016 06:58:50 +0000]
Initial empty repository