Revert "t210: soc: Add gpio-line-names for SKU0-B00"
[device/hardware/nvidia/platform/t210/porg.git] / kernel-dts / tegra210-porg-p3448-.dtsi
1 /*
2  * arch/arm64/boot/dts/tegra210-porg-p3448-common.dtsi
3  *
4  * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  *
19  */
20 /dts-v1/;
21 /memreserve/ 0x80000000 0x00020000;
22
23 #include <t210-common-platforms/tegra210-common.dtsi>
24 #include <tegra210-soc/tegra210-sdhci.dtsi>
25 #include <t210-common-platforms/tegra210-thermal-nct72-p2530.dtsi>
26 #include <tegra210-soc/tegra210-thermal-Tboard-Tdiode.dtsi>
27 #include "porg-platforms/tegra210-porg-power-tree-p3448-0000-a00.dtsi"
28 #include "porg-platforms/tegra210-pinmux-drive-sdmmc-common.dtsi"
29 #include "porg-platforms/tegra210-porg-pwm-fan.dtsi"
30 #include "porg-platforms/tegra210-porg-camera.dtsi"
31 #include "porg-platforms/tegra210-porg-camera-rbpcv2-imx219.dtsi"
32 #include "porg-platforms/tegra210-porg-camera-rbpcv2-dual-imx219.dtsi"
33 #include <t210-common-platforms/tegra210-ers-hdmi-e2190-1100-a00.dtsi>
34 #include <t210-common-platforms/tegra210-dp.dtsi>
35 #include "porg-platforms/tegra210-porg-thermal.dtsi"
36 #include "porg-platforms/tegra210-porg-thermal-fan-est.dtsi"
37 #include "porg-platforms/tegra210-porg-keys-p3448-0000-a00.dtsi"
38 #include <dt-bindings/iio/meter/ina3221x.h>
39 #include <tegra210-soc/tegra210-audio.dtsi>
40 #include "porg-platforms/tegra210-porg-cpufreq.dtsi"
41 #include "porg-platforms/tegra210-porg-powermon-p3448-0000-a00.dtsi"
42 #include "porg-plugin-manager/tegra210-porg-eeprom-manager.dtsi"
43 #include "porg-plugin-manager/tegra210-porg-plugin-manager.dtsi"
44 #include <tegra210-soc/mods-simple-bus.dtsi>
45 #include "porg-platforms/tegra210-porg-extcon-p3448-0000-a00.dtsi"
46 #include "porg-platforms/tegra210-porg-p3448-emc-a00.dtsi"
47 #include "porg-platforms/tegra210-porg-pcie.dtsi"
48 #include "porg-platforms/tegra210-porg-prods.dtsi"
49 #include "porg-platforms/tegra210-porg-super-module-e2614.dtsi"
50
51 / {
52         nvidia,boardids = "3448";
53         nvidia,proc-boardid = "3448";
54         nvidia,pmu-boardid = "3448";
55         nvidia,fastboot-usb-pid = <0xb442>;
56
57         chosen {
58                 nvidia,tegra-porg-sku;
59                 stdout-path = "/serial@70006000";
60                 nvidia,tegra-always-on-personality;
61                 no-tnid-sn;
62                 bootargs = "earlycon=uart8250,mmio32,0x70006000";
63         };
64
65         cpus {
66                 cpu@0 {
67                         clocks = <&tegra_car TEGRA210_CLK_CCLK_G>,
68                                  <&tegra_car TEGRA210_CLK_CCLK_LP>,
69                                  <&tegra_car TEGRA210_CLK_PLL_X>,
70                                  <&tegra_car TEGRA210_CLK_PLL_P_OUT4>,
71                                  <&tegra_clk_dfll>;
72                         clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
73                         clock-latency = <300000>;
74                 };
75         };
76
77         rollback-protection {
78                 status = "okay";
79         };
80
81         watchdog@60005100 {
82                 status = "okay";
83         };
84
85         tegra_wdt: watchdog@60005100 {
86                 status = "disabled";
87         };
88
89         host1x {
90                 /* Camera unit clocks */
91                 assigned-clocks = <&tegra_car TEGRA210_CLK_EXTERN3>,
92                                                 <&tegra_car TEGRA210_CLK_CILE>,
93                                                 <&tegra_car TEGRA210_CLK_CILCD>,
94                                                 <&tegra_car TEGRA210_CLK_CILAB>,
95                                                 <&tegra_car TEGRA210_CLK_VI_I2C>,
96                                                 <&tegra_car TEGRA210_CLK_CLK_OUT_3_MUX>,
97                                                 <&tegra_car TEGRA210_CLK_VI>,
98                                                 <&tegra_car TEGRA210_CLK_ISP>,
99                                                 <&tegra_car TEGRA210_CLK_ISPB>;
100                 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>,
101                                                 <&tegra_car TEGRA210_CLK_PLL_P>,
102                                                 <&tegra_car TEGRA210_CLK_PLL_P>,
103                                                 <&tegra_car TEGRA210_CLK_PLL_P>,
104                                                 <&tegra_car TEGRA210_CLK_PLL_P>,
105                                                 <&tegra_car TEGRA210_CLK_EXTERN3>,
106                                                 <&tegra_car TEGRA210_CLK_PLL_C>,
107                                                 <&tegra_car TEGRA210_CLK_PLL_C>,
108                                                 <&tegra_car TEGRA210_CLK_ISP>;
109                 assigned-clock-rates = <24000000>,
110                                                 <102000000>,
111                                                 <102000000>,
112                                                 <102000000>,
113                                                 <102000000>,
114                                                 <24000000>,
115                                                 <408000000>,
116                                                 <408000000>,
117                                                 <0>;
118
119                 /* tegradc.0 */
120                 dc@54200000 {
121                         status = "okay";
122                         nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
123                         nvidia,emc-clk-rate = <300000000>;
124                         nvidia,cmu-enable = <1>;
125                         nvidia,fb-bpp = <32>; /* bits per pixel */
126                         nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
127                         nvidia,dc-or-node = "/host1x/sor1";
128                         nvidia,dc-connector = <&sor1>;
129                         win-mask = <0x7>; /* Assign only wins A/B/C */
130                 };
131                 dc@54240000 {
132                         status = "okay";
133                         nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
134                         nvidia,emc-clk-rate = <300000000>;
135                         nvidia,cmu-enable = <1>;
136                         nvidia,fb-bpp = <32>; /* bits per pixel */
137                         nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
138                         nvidia,dc-or-node = "/host1x/sor";
139                         nvidia,dc-connector = <&sor0>;
140                         win-mask = <0x7>; /* Assign only wins A/B/C */
141                 };
142                 sor {
143                         status = "okay";
144                         nvidia,xbar-ctrl = <2 1 0 3 4>;
145                         dp-display {
146                                 status = "okay";
147                         };
148                 };
149                 sor1 {
150                         /* Compared to Jetson-TX1's baseboard (P2597), HDMI TX
151                          * lanes 0 and 2 have been swapped in Porg's baseboard
152                          * (P3448) making it a straight lane mapping between
153                          * SOR1 and the pad.
154                          */
155                         nvidia,xbar-ctrl = <0 1 2 3 4>;
156                         status = "okay";
157                         hdmi-display {
158                                 status = "okay";
159                         };
160                 };
161                 dpaux {
162                         status = "okay";
163                 };
164                 dpaux1 {
165                         status = "okay";
166                 };
167         };
168
169         pwm@7000a000 {
170                 nvidia,no-clk-sleeping-in-ops;
171         };
172
173         pmc@7000e400 {
174                 #nvidia,wake-cells = <3>;
175                 nvidia,invert-interrupt;
176                 nvidia,suspend-mode = <0>;
177                 nvidia,cpu-pwr-good-time = <0>;
178                 nvidia,cpu-pwr-off-time = <0>;
179                 nvidia,core-pwr-good-time = <4587 3876>;
180                 nvidia,core-pwr-off-time = <39065>;
181                 nvidia,core-pwr-req-active-high;
182                 nvidia,sys-clock-req-active-high;
183
184                 iopad-defaults {
185                         audio-hv-pads {
186                                 pins = "audio-hv";
187                                 nvidia,power-source-voltage = <TEGRA_IO_PAD_VOLTAGE_1800000UV>;
188                         };
189
190                         spi-hv-pads {
191                                 pins = "spi-hv";
192                                 nvidia,power-source-voltage = <TEGRA_IO_PAD_VOLTAGE_1800000UV>;
193                         };
194
195                         gpio-pads {
196                                 pins = "gpio";
197                                 nvidia,power-source-voltage = <TEGRA_IO_PAD_VOLTAGE_1800000UV>;
198                         };
199
200                         sdmmc-io-pads {
201                                 pins = "sdmmc1", "sdmmc3";
202                                 nvidia,enable-voltage-switching;
203                         };
204                 };
205         };
206
207         spi@7000d400 { /* SPI 1 to 40 pin header */
208                 status = "okay";
209                 spi@0 {
210                         compatible = "spidev";
211                         reg = <0x0>;
212                         spi-max-frequency = <33000000>;
213                         controller-data {
214                                 nvidia,enable-hw-based-cs;
215                                 nvidia,rx-clk-tap-delay = <7>;
216                         };
217                 };
218                 spi@1 {
219                         compatible = "spidev";
220                         reg = <0x1>;
221                         spi-max-frequency = <33000000>;
222                         controller-data {
223                                 nvidia,enable-hw-based-cs;
224                                 nvidia,rx-clk-tap-delay = <7>;
225                         };
226                 };
227         };
228
229         spi@7000d600 { /* SPI 2 to 40 pin header */
230                 status = "okay";
231                 spi@0 {
232                         compatible = "spidev";
233                         reg = <0x0>;
234                         spi-max-frequency = <33000000>;
235                         controller-data {
236                                 nvidia,enable-hw-based-cs;
237                                 nvidia,rx-clk-tap-delay = <6>;
238                         };
239                 };
240                 spi@1 {
241                         compatible = "spidev";
242                         reg = <0x1>;
243                         spi-max-frequency = <33000000>;
244                         controller-data {
245                                 nvidia,enable-hw-based-cs;
246                                 nvidia,rx-clk-tap-delay = <6>;
247                         };
248                 };
249         };
250
251         spi@7000d800 {
252                 status = "disabled";
253         };
254
255         spi@7000da00 {
256                 status = "disabled";
257         };
258
259         spi@70410000 {
260                 status = "okay";
261                 spi-max-frequency = <104000000>;
262                 spiflash@0 {
263                         #address-cells = <1>;
264                         #size-cells = <1>;
265                         compatible = "MX25U3235F";
266                         reg = <0>;
267                         spi-max-frequency = <104000000>;
268                         controller-data {
269                                 nvidia,x1-len-limit = <4194304>;
270                                 nvidia,x1-bus-speed = <104000000>;
271                                 nvidia,x1-dymmy-cycle = <8>;
272                                 nvidia,ctrl-bus-clk-ratio = /bits/ 8 <0x01>;
273                         };
274                 };
275         };
276
277         sdhci@700b0600 { /* SDMMC4 for EMMC */
278                 uhs-mask = <0x0>;
279                 mmc-hs400-enhanced-strobe;
280                 built-in;
281                 power-off-rail;
282                 status = "disabled";
283                 bus-width = <8>;
284                 non-removable;
285                 /delete-property/ nvidia,enable-hs533-mode;
286                 no-sdio;
287                 no-sd;
288                 pll_source = "pll_p", "pll_c4_out2";
289                 max-clk-limit = <0xbebc200>;
290         };
291
292         sdhci@700b0400 {
293                 status = "disabled";
294                 /delete-property/ keep-power-in-suspend;
295                 /delete-property/ non-removable;
296                 mmc-ddr-1_8v;
297                 mmc-ocr-mask = <3>;
298                 uhs-mask = <0x0>;
299                 max-clk-limit = <400000>;
300                 tap-delay = <3>;
301         };
302
303         sdhci@700b0200 { /* SDMMC2 for Wifi */
304                 uhs-mask = <0x8>;
305                 power-off-rail;
306                 force-non-removable-rescan;
307                 status = "disabled";
308         };
309
310         sdhci@700b0000 { /* SDMMC1 for SD card */
311                 default-drv-type = <1>;
312                 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) 0>;
313                 sd-uhs-sdr104;
314                 sd-uhs-sdr50;
315                 sd-uhs-sdr25;
316                 sd-uhs-sdr12;
317                 mmc-ddr-1_8v;
318                 mmc-hs200-1_8v;
319                 nvidia,cd-wakeup-capable;
320                 nvidia,update-pinctrl-settings;
321                 nvidia,pmc-wakeup = <&tegra_pmc PMC_WAKE_TYPE_GPIO 35
322                         PMC_TRIGGER_TYPE_NONE>;
323                 uhs-mask = <0xc>;
324                 no-sdio;
325                 no-mmc;
326                 disable-wp;
327                 status = "okay";
328         };
329
330         aconnect@702c0000 {
331                 adma@702e2000 {
332                         status = "okay";
333                 };
334
335                 ahub {
336                         i2s@702d1000 {
337                                 status = "disabled";
338                         };
339
340                         i2s@702d1100 {
341                                 status = "disabled";
342                         };
343
344                         i2s@702d1200 {
345                                 regulator-supplies = "vdd-1v8-dmic";
346                                 vdd-1v8-dmic-supply = <&max77620_sd3>;
347                                 fsync-width = <15>;
348                                 status = "okay";
349                         };
350
351                         i2s@702d1300 {
352                                 regulator-supplies = "vddio-uart";
353                                 vddio-uart-supply = <&max77620_sd3>;
354                                 fsync-width = <15>;
355                                 status = "okay";
356
357                                 /*
358                                  * I2S4 on Jetson Nano uses the I2S4B pads
359                                  * and to use these pads bit 0 in the I2S_CYA
360                                  * register must be set.
361                                  */
362                                 enable-cya;
363                         };
364
365                         i2s@702d1400 {
366                                 status = "disabled";
367                         };
368
369                         dmic@702d4000 {
370                                 regulator-supplies = "vdd-1v8-dmic";
371                                 vdd-1v8-dmic-supply = <&max77620_sd3>;
372                                 status = "okay";
373                         };
374
375                         dmic@702d4100 {
376                                 regulator-supplies = "vdd-1v8-dmic";
377                                 vdd-1v8-dmic-supply = <&max77620_sd3>;
378                                 status = "okay";
379                         };
380
381                         dmic@702d4200 {
382                                 status = "disabled";
383                         };
384                 };
385         };
386
387         hda@70030000 {
388                 status = "okay";
389         };
390
391         tegra_sound: sound {
392                 status = "okay";
393                 compatible = "nvidia,tegra-audio-t210ref-mobile-rt565x";
394                 nvidia,model = "tegra-snd-t210ref-mobile-rt565x";
395
396                 clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
397                          <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
398                          <&tegra_car TEGRA210_CLK_EXTERN1>;
399                 clock-names = "pll_a", "pll_a_out0", "extern1";
400                 assigned-clocks = <&tegra_car TEGRA210_CLK_EXTERN1>;
401                 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
402
403                 nvidia,num-codec-link = <4>;
404
405                 nvidia,audio-routing =
406                         "x Headphone",  "x OUT",
407                         "x IN",         "x Mic",
408                         "y Headphone",  "y OUT",
409                         "y IN",         "y Mic",
410                         "a IN",         "a Mic",
411                         "b IN",         "b Mic";
412
413                 nvidia,xbar = <&tegra_axbar>;
414                 mclk-fs = <256>;
415
416                 hdr40_snd_link_i2s: i2s_dai_link1: nvidia,dai-link-1 {
417                         link-name = "spdif-dit-0";
418                         cpu-dai = <&tegra_i2s4>;
419                         codec-dai = <&spdif_dit0>;
420                         cpu-dai-name = "I2S4";
421                         codec-dai-name = "dit-hifi";
422                         format = "i2s";
423                         bitclock-slave;
424                         frame-slave;
425                         bitclock-noninversion;
426                         frame-noninversion;
427                         bit-format = "s16_le";
428                         srate = <48000>;
429                         num-channel = <2>;
430                         ignore_suspend;
431                         name-prefix = "x";
432                         status = "okay";
433                 };
434                 nvidia,dai-link-2 {
435                         link-name = "spdif-dit-1";
436                         cpu-dai = <&tegra_i2s3>;
437                         codec-dai = <&spdif_dit1>;
438                         cpu-dai-name = "I2S3";
439                         codec-dai-name = "dit-hifi";
440                         format = "i2s";
441                         bitclock-slave;
442                         frame-slave;
443                         bitclock-noninversion;
444                         frame-noninversion;
445                         bit-format = "s16_le";
446                         srate = <48000>;
447                         num-channel = <2>;
448                         ignore_suspend;
449                         name-prefix = "y";
450                         status = "okay";
451                 };
452                 nvidia,dai-link-3 {
453                         link-name = "spdif-dit-2";
454                         cpu-dai = <&tegra_dmic1>;
455                         codec-dai = <&spdif_dit2>;
456                         cpu-dai-name = "DMIC1";
457                         codec-dai-name = "dit-hifi";
458                         format = "i2s";
459                         bit-format = "s16_le";
460                         srate = <48000>;
461                         ignore_suspend;
462                         num-channel = <2>;
463                         name-prefix = "a";
464                         status = "okay";
465                 };
466                 nvidia,dai-link-4 {
467                         link-name = "spdif-dit-3";
468                         cpu-dai = <&tegra_dmic2>;
469                         codec-dai = <&spdif_dit3>;
470                         cpu-dai-name = "DMIC2";
471                         codec-dai-name = "dit-hifi";
472                         format = "i2s";
473                         bit-format = "s16_le";
474                         srate = <48000>;
475                         ignore_suspend;
476                         num-channel = <2>;
477                         name-prefix = "b";
478                         status = "okay";
479                 };
480         };
481
482         extcon {
483                 extcon@0 {
484                         status = "disabled";
485                 };
486         };
487
488         xusb_padctl@7009f000 {
489                 status = "okay";
490
491                 pads {
492                         usb2 {
493                                 status = "okay";
494
495                                 lanes {
496                                         usb2-0 {
497                                                 status = "okay";
498                                                 nvidia,function = "xusb";
499                                         };
500                                         usb2-1 {
501                                                 status = "okay";
502                                                 nvidia,function = "xusb";
503                                         };
504                                         usb2-2 {
505                                                 status = "okay";
506                                                 nvidia,function = "xusb";
507                                         };
508                                 };
509                         };
510
511                         pcie {
512                                 status = "okay";
513
514                                 lanes {
515                                         pcie-0 {
516                                                 status = "okay";
517                                                 nvidia,function = "pcie-x1";
518                                         };
519                                         pcie-1 {
520                                                 status = "okay";
521                                                 nvidia,function = "pcie-x4";
522                                         };
523                                         pcie-2 {
524                                                 status = "okay";
525                                                 nvidia,function = "pcie-x4";
526                                         };
527                                         pcie-3 {
528                                                 status = "okay";
529                                                 nvidia,function = "pcie-x4";
530                                         };
531                                         pcie-4 {
532                                                 status = "okay";
533                                                 nvidia,function = "pcie-x4";
534                                         };
535                                         pcie-5 {
536                                                 status = "okay";
537                                                 nvidia,function = "xusb";
538                                         };
539                                         pcie-6 {
540                                                 status = "okay";
541                                                 nvidia,function = "xusb";
542                                         };
543                                 };
544                         };
545                 };
546
547                 ports {
548                         usb2-0 {
549                                 status = "okay";
550                                 mode = "otg";
551                                 nvidia,usb3-port-fake = <3>;
552                         };
553                         usb2-1 {
554                                 status = "okay";
555                                 mode = "host";
556                         };
557                         usb2-2 {
558                                 status = "okay";
559                                 mode = "host";
560                         };
561                         usb3-0 {
562                                 status = "okay";
563                                 nvidia,usb2-companion = <1>;
564                         };
565                 };
566         };
567
568
569         xusb@70090000 {
570                 phys = <&{/xusb_padctl@7009f000/pads/usb2/lanes/usb2-0}>,
571                                 <&{/xusb_padctl@7009f000/pads/usb2/lanes/usb2-1}>,
572                                 <&{/xusb_padctl@7009f000/pads/usb2/lanes/usb2-2}>,
573                                 <&{/xusb_padctl@7009f000/pads/pcie/lanes/pcie-6}>;
574                 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
575                 #extcon-cells = <1>;
576                 nvidia,pmc-wakeup =
577                         <&tegra_pmc
578                                 PMC_WAKE_TYPE_EVENT 39 PMC_TRIGGER_TYPE_HIGH>,
579                         <&tegra_pmc
580                                 PMC_WAKE_TYPE_EVENT 40 PMC_TRIGGER_TYPE_HIGH>,
581                         <&tegra_pmc
582                                 PMC_WAKE_TYPE_EVENT 41 PMC_TRIGGER_TYPE_HIGH>,
583                         <&tegra_pmc
584                                 PMC_WAKE_TYPE_EVENT 42 PMC_TRIGGER_TYPE_HIGH>,
585                         <&tegra_pmc
586                                 PMC_WAKE_TYPE_EVENT 44 PMC_TRIGGER_TYPE_HIGH>;
587                 nvidia,boost_cpu_freq = <1200>;
588                 status = "okay";
589         };
590
591         xudc@700d0000 {
592                 phys =  <&{/xusb_padctl@7009f000/pads/usb2/lanes/usb2-0}>;
593                 phy-names = "usb2";
594                 charger-detector = <&tegra_usb_cd>;
595                 #extcon-cells = <1>;
596                 status = "okay";
597         };
598
599         tegra_usb_cd: usb_cd {
600                 reg = <0x0 0x7009f000 0x0 0x1000>;
601                 phys = <&{/xusb_padctl@7009f000/pads/usb2/lanes/usb2-0}>;
602                 phy-names = "otg-phy";
603                 status = "disabled";
604         };
605
606         psy_extcon_xudc {
607                 status = "disabled";
608                 /delete-property/ dt-override-status-odm-data;
609         };
610
611         xotg {
612                 status = "disabled";
613                 #extcon-cells = <1>;
614         };
615
616         chosen {
617                 nvidia,bootloader-xusb-enable;
618                 nvidia,bootloader-vbus-enable=<0x1>;
619                 nvidia,fastboot_without_usb;
620                 nvidia,gpu-disable-power-saving;
621                 board-has-eeprom;
622                 firmware-blob-partition = "RP4";
623
624                 verified-boot {
625                         poweroff-on-red-state;
626                 };
627         };
628
629         gpu-dvfs-rework {
630                 status = "okay";
631         };
632
633         pwm_regulators {
634                 compatible = "simple-bus";
635                 #address-cells = <1>;
636                 #size-cells = <0>;
637
638                 cpu_ovr_reg: pwm-regulator@0 {
639                         status = "okay";
640                         reg = <0>;
641                         compatible = "pwm-regulator";
642                         pwms = <&tegra_pwm_dfll 0 2500>;
643                         regulator-name = "vdd-cpu";
644                         regulator-min-microvolt = <708000>;
645                         regulator-max-microvolt = <1323400>;
646                         regulator-always-on;
647                         regulator-boot-on;
648                         voltage-table =
649                                 <708000 0>, <727200 1>, <746400 2>,
650                                 <765600 3>, <784800 4>, <804000 5>,
651                                 <823200 6>, <842400 7>, <861600 8>,
652                                 <880800 9>, <900000 10>, <919200 11>,
653                                 <938400 12>, <957600 13>, <976800 14>,
654                                 <996000 15>, <1015200 16>, <1034400 17>,
655                                 <1053600 18>, <1072800 19>, <1092000 20>,
656                                 <1111200 21>, <1130400 22>, <1149600 23>,
657                                 <1168800 24>, <1188000 25>, <1207200 26>,
658                                 <1226400 27>, <1245600 28>, <1264800 29>,
659                                 <1284000 30>, <1303200 31>, <1322400 32>;
660                 };
661
662                 pwm-regulator@1 {
663                         status = "okay";
664                         reg = <1>;
665                         compatible = "pwm-regulator";
666                         pwms = <&tegra_pwm 1 8000>;
667                         regulator-name = "vdd-gpu";
668                         regulator-min-microvolt = <708000>;
669                         regulator-max-microvolt = <1323400>;
670                         regulator-init-microvolt = <1000000>;
671                         regulator-n-voltages = <62>;
672                         regulator-enable-ramp-delay = <2000>;
673                         enable-gpio = <&max77620 6 0>;
674                         regulator-settling-time-us = <160>;
675                 };
676         };
677
678         soctherm@0x700E2000 {
679                 throttle-cfgs {
680                         throttle_oc1: oc1 {
681                                 nvidia,priority = <0>;
682                                 nvidia,polarity-active-low = <0>;
683                                 nvidia,count-threshold = <0>;
684                                 nvidia,alarm-filter = <0>;
685                                 nvidia,alarm-period = <0>;
686                                 nvidia,cpu-throt-percent = <0>;
687                                 nvidia,gpu-throt-level =
688                                         <TEGRA_SOCTHERM_THROT_LEVEL_NONE>;
689                         };
690
691                         throttle_oc3: oc3 {
692                                 nvidia,priority = <40>;
693                                 nvidia,polarity-active-low = <1>;
694                                 nvidia,count-threshold = <15>;
695                                 nvidia,alarm-filter = <5100000>;
696                                 nvidia,alarm-period = <0>;
697                                 nvidia,cpu-throt-percent = <75>;
698                                 nvidia,gpu-throt-level =
699                                         <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
700                         };
701                 };
702         };
703
704         serial@70006000 { /* UART-A : UART1: Debug */
705                 compatible = "nvidia,tegra210-uart", "nvidia,tegra114-hsuart", "nvidia,tegra20-uart";
706                 console-port;
707                 sqa-automation-port;
708                 /delete-property/ resets;
709                 /delete-property/ reset-names;
710                 status = "okay";
711         };
712
713         serial@70006040 { /* UART-B : UART2 40 pin header */
714                 compatible = "nvidia,tegra114-hsuart";
715                 status = "okay";
716         };
717
718         serial@70006200 { /* UART-C : UART3 : M.2 Key E */
719                 compatible = "nvidia,tegra114-hsuart";
720                 dma-names = "tx";
721                 nvidia,adjust-baud-rates = <921600 921600 100>;
722                 status = "okay";
723         };
724
725         serial@70006300 { /* UART-D not used */
726                 status = "disabled";
727         };
728
729         i2c@7000c700 { /* i2c4 */
730                 status = "okay";
731         };
732
733         i2c@7000d000 {
734                 clock-frequency = <1000000>;
735         };
736
737         dfll-max77621@70110000 {
738                 i2c_dfll: dfll-max77621-integration {
739                         i2c-fs-rate = <1000000>;
740                         pmic-i2c-address = <0x36>;
741                         pmic-i2c-voltage-register = <0x01>;
742                         sel-conversion-slope = <1>;
743                 };
744
745                 dfll_max77621_parms: dfll-max77621-board-params {
746                         sample-rate = <12500>;
747                         fixed-output-forcing;
748                         cf = <10>;
749                         ci = <0>;
750                         cg = <2>;
751                         droop-cut-value = <0xf>;
752                         droop-restore-ramp = <0x0>;
753                         scale-out-ramp = <0x0>;
754                 };
755         };
756
757         dfll_cap: dfll-cdev-cap {
758                 compatible = "nvidia,tegra-dfll-cdev-action";
759                 act-dev = <&tegra_clk_dfll>;
760                 cdev-type = "DFLL-cap";
761                 #cooling-cells = <2>; /* min followed by max */
762         };
763
764         dfll_floor: dfll-cdev-floor {
765                 compatible = "nvidia,tegra-dfll-cdev-action";
766                 act-dev = <&tegra_clk_dfll>;
767                 cdev-type = "DFLL-floor";
768                 #cooling-cells = <2>; /* min followed by max */
769         };
770
771         hdr40_i2c0: i2c@7000c000 {
772                 tegra_nct72: temp-sensor@4c {
773                         status = "disabled";
774                 };
775         };
776
777         hdr40_i2c1: i2c@7000c400 { };
778
779         clock@70110000 {
780                 status = "okay";
781                 vdd-cpu-supply = <&cpu_ovr_reg>;
782                 nvidia,dfll-max-freq-khz = <1479000>;
783                 nvidia,pwm-to-pmic;
784                 nvidia,init-uv = <1000000>;
785                 nvidia,sample-rate = <25000>;
786                 nvidia,droop-ctrl = <0x00000f00>;
787                 nvidia,force-mode = <1>;
788                 nvidia,cf = <6>;
789                 nvidia,ci = <0>;
790                 nvidia,cg = <2>;
791                 nvidia,idle-override;
792                 nvidia,one-shot-calibrate;
793                 nvidia,pwm-period = <2500>; /* 2.5us */
794                 pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
795                 pinctrl-0 = <&dvfs_pwm_active_state>;
796                 pinctrl-1 = <&dvfs_pwm_inactive_state>;
797                 nvidia,align-offset-uv = <708000>;
798                 nvidia,align-step-uv = <19200>;
799         };
800
801         dvfs {
802                 compatible = "nvidia,tegra210-dvfs";
803                 vdd-cpu-supply = <&cpu_ovr_reg>;
804                 nvidia,gpu-max-freq-khz = <921600>;
805         };
806
807         rtc {
808                 nvidia,pmc-wakeup = <&tegra_pmc PMC_WAKE_TYPE_EVENT 16
809                         PMC_TRIGGER_TYPE_HIGH>;
810         };
811
812         nvpmodel {
813                 status = "okay";
814         };
815
816         r8168 {
817                 isolate-gpio = <&gpio TEGRA_GPIO(X, 3) 0>;
818         };
819
820         tegra_udrm: tegra_udrm {
821                 compatible = "nvidia,tegra-udrm";
822         };
823
824         soft_wdt: soft_watchdog {
825                 status = "okay";
826         };
827
828         gpio: gpio@6000d000 {
829                 suspend_gpio: system-suspend-gpio {
830                         status = "okay";
831                         gpio-hog;
832                         output-high;
833                         gpio-suspend;
834                         suspend-output-low;
835                         gpios = <
836                                 TEGRA_GPIO(A, 6) 0
837                                 >;
838                 };
839         };
840
841         leds {
842                 compatible = "gpio-leds";
843                 status = "disabled";
844                 pwr {
845                         gpios = <&gpio TEGRA_GPIO(I, 1) GPIO_ACTIVE_HIGH>;
846                         default-state = "on";
847                         linux,default-trigger = "system-throttle";
848                 };
849         };
850
851         memory-controller@70019000 {
852                 status = "okay";
853         };
854
855         mailbox@70098000 {
856                 status = "okay";
857         };
858
859         memory@80000000 {
860                 device_type = "memory";
861                 reg = < 0x0 0x80000000 0x0 0x80000000 >;
862         };
863
864         pinmux@700008d4 {
865                 dvfs_pwm_active_state: dvfs_pwm_active {
866                         dvfs_pwm_pbb1 {
867                                 nvidia,pins = "dvfs_pwm_pbb1";
868                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
869                         };
870                 };
871
872                 dvfs_pwm_inactive_state: dvfs_pwm_inactive {
873                         dvfs_pwm_pbb1 {
874                                 nvidia,pins = "dvfs_pwm_pbb1";
875                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
876                         };
877                 };
878         };
879
880         pwm@70110000 {
881                 pinctrl-0 = <&dvfs_pwm_active_state>;
882                 pinctrl-1 = <&dvfs_pwm_inactive_state>;
883                 pwm-regulator = <&cpu_ovr_reg>;
884                 status = "okay";
885         };
886
887         nvdumper {
888                 status = "disabled";
889         };
890
891         cpu_edp {
892                 status = "okay";
893                 nvidia,edp_limit = <0x61a8>;
894         };
895
896         gpu_edp {
897                 status = "okay";
898                 nvidia,edp_limit = <0x4e20>;
899         };
900 };
901
902 #if LINUX_VERSION >= 414
903 #include <tegra210-linux-4.14.dtsi>
904 #endif