3 years agovideo: tegra: host: use dynamically allocated wait_queue rel-24-foster-r2
Deepak Nibade [Wed, 20 Jan 2016 13:39:19 +0000]
video: tegra: host: use dynamically allocated wait_queue

In nvhost_syncpt_wait_timeout(), we currently allocate
wait_queue_head on stack using
DECLARE_WAIT_QUEUE_HEAD_ONSTACK()

If wait is complete, then this wait_queue_head will
removed off the stack

But in some rare case if action_wakeup_interruptible()
is called after wait is complete, we try to access
wait_queue_head which is already deleted from stack

To fix this, define wait_queue_head inside nvhost_waitlist
and allocate it dynamically along with waitlist

Bug 200126989

Change-Id: Iad7869323832e6f36c044e0d29fdea62dca762d5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/935161
(cherry picked from commit 80b5c960e95b9f1f4c1401b03d72641ac4b6ccc6)
Reviewed-on: http://git-master/r/1113381
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agohid: jarvis: WAR for cypress controller reset
Ankita Garg [Wed, 23 Mar 2016 08:36:12 +0000]
hid: jarvis: WAR for cypress controller reset

Whenever cypress controller gets reset and
enters bootloader (version mis-match on jarvis
startup or OTA), it pulls all the buttons low,
causing spurious input events. This WAR disables
inputs when all three buttons are either pressed
or released.

Bug 200174400

Change-Id: If916a8f11004fc2e25a6c5131d32f621e2729ea2
Signed-off-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-on: http://git-master/r/1114574
Reviewed-by: Siddardha Naraharisetti <siddardhan@nvidia.com>
Reviewed-by: Spencer Sutterlin <ssutterlin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agopipe: iovec: Fix memory corruption when retrying atomic copy as non-atomic
Ben Hutchings [Tue, 16 Jun 2015 21:11:06 +0000]
pipe: iovec: Fix memory corruption when retrying atomic copy as non-atomic

pipe_iov_copy_{from,to}_user() may be tried twice with the same iovec,
the first time atomically and the second time not.  The second attempt
needs to continue from the iovec position, pipe buffer offset and
remaining length where the first attempt failed, but currently the
pipe buffer offset and remaining length are reset.  This will corrupt
the piped data (possibly also leading to an information leak between
processes) and may also corrupt kernel memory.

This was fixed upstream by commits f0d1bec9d58d ("new helper:
copy_page_from_iter()") and 637b58c2887e ("switch pipe_read() to
copy_page_to_iter()"), but those aren't suitable for stable.  This fix
for older kernel versions was made by Seth Jennings for RHEL and I
have extracted it from their update.

CVE-2015-1805

Bug: 27275324
Change-Id: I459adb9076fcd50ff1f1c557089c4e421b036ec4
References: https://bugzilla.redhat.com/show_bug.cgi?id=1202855
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 85c34d007116f8a8aafb173966a605fb03532f45)
Reviewed-on: http://git-master/r/1114630
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agovideo: tegra: host: check if offset is u32 aligned
Deepak Nibade [Fri, 11 Mar 2016 08:29:20 +0000]
video: tegra: host: check if offset is u32 aligned

In nvhost_ioctl_ctrl_module_regrdwr(), we copy offset
to read/write from user space but we do not have
any check on it

So it is possible for user space to add unaligned
offset and request read/write which would crash the
system

Fix this by explicitly checking alignment of the
offset passed by user space

Bug 1739935

Change-Id: Iea2a07c60500af876b732a0e9d9d08535aa53b5c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1029405
(cherry picked from commit 422baa09a17a6a17f4e572aa5441ca174634de0d)
Reviewed-on: http://git-master/r/1111328
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agogpu: nvgpu: Call ELPG enable/disable on condition
Mahantesh Kumbar [Wed, 9 Mar 2016 07:13:55 +0000]
gpu: nvgpu: Call ELPG enable/disable on condition

Call ELPG enable/disable if ELPG support enabled else ignore

Bug 200156347
Bug 1716764

Change-Id: I0bf4bacb23c087600b0632f806b12e94ebe090a5
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1027030
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 years agogpu: nvgpu: Enable ELPG when disabled due to reset
Mahantesh Kumbar [Wed, 9 Mar 2016 07:00:51 +0000]
gpu: nvgpu: Enable ELPG when disabled due to reset

Enable ELPG back whenever ELPG disable is done due to reset or recovery.
Otherwise elpg_refcnt mismatch doesn\222t engage ELPG correctly

Bug 200156347
Bug 1716764

Change-Id: I16dd47ebc647e631c1ace59099a36c92d4c3abb0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1027020
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 years agoUPSTREAM: KEYS: Fix keyring ref leak in join_session_keyring()
Yevgeny Pats [Tue, 19 Jan 2016 22:09:04 +0000]
UPSTREAM: KEYS: Fix keyring ref leak in join_session_keyring()

(cherry pick from commit 23567fd052a9abb6d67fe8e7a9ccdd9800a540f2)

This fixes CVE-2016-0728.

If a thread is asked to join as a session keyring the keyring that's already
set as its session, we leak a keyring reference.

This can be tested with the following program:

#include <stddef.h>
#include <stdio.h>
#include <sys/types.h>
#include <keyutils.h>

int main(int argc, const char *argv[])
{
int i = 0;
key_serial_t serial;

serial = keyctl(KEYCTL_JOIN_SESSION_KEYRING,
"leaked-keyring");
if (serial < 0) {
perror("keyctl");
return -1;
}

if (keyctl(KEYCTL_SETPERM, serial,
   KEY_POS_ALL | KEY_USR_ALL) < 0) {
perror("keyctl");
return -1;
}

for (i = 0; i < 100; i++) {
serial = keyctl(KEYCTL_JOIN_SESSION_KEYRING,
"leaked-keyring");
if (serial < 0) {
perror("keyctl");
return -1;
}
}

return 0;
}

If, after the program has run, there something like the following line in
/proc/keys:

3f3d898f I--Q---   100 perm 3f3f0000     0     0 keyring   leaked-keyring: empty

with a usage count of 100 * the number of times the program has been run,
then the kernel is malfunctioning.  If leaked-keyring has zero usages or
has been garbage collected, then the problem is fixed.

Bug 1720836

Reported-by: Yevgeny Pats <yevgeny@perception-point.io>
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Don Zickus <dzickus@redhat.com>
Acked-by: Prarit Bhargava <prarit@redhat.com>
Acked-by: Jarod Wilson <jarod@redhat.com>
Signed-off-by: James Morris <james.l.morris@oracle.com>
Change-Id: I10177a58a7b3178eda95017557edaa7298594d06
(cherry picked from commit 9fc5f368bb89b65b591c4f800dfbcc7432e49de5)
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/935565
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit 07be7f19b4c356ce94642d0c2cecb93179a9a9bc)
Signed-off-by: Todd Poynter <tpoynter@nvidia.com>
Reviewed-on: http://git-master/r/936979
(cherry picked from commit 2af5d2a42a8da43f466aed81941174219470486b)
Signed-off-by: Toby Butzon <tbutzon@nvidia.com>
Reviewed-on: http://git-master/r/1031380
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agogpu: nvgpu: validate error notifier offset
Konsta Holtta [Tue, 8 Mar 2016 11:58:11 +0000]
gpu: nvgpu: validate error notifier offset

Make sure that the notifier object fits within the supplied buffer.

Bug 1739183
Bug 1739932

Change-Id: I713574ce797ffc23cec10b5114f469dbadc68f1e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1026410
(cherry picked from commit f476b93eb19b962b8760457102448bd533efc54d)
Reviewed-on: http://git-master/r/1029380
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agomedia: tegra: nvavp: Fix heap overflow
Somasundaram S [Thu, 10 Mar 2016 12:03:11 +0000]
media: tegra: nvavp: Fix heap overflow

Bug 1739930

Increase NVAVP_MAX_RELOCATION_COUNT to max. possible value
and add check to return error if num_relocs in
nvavp_pushbuffer_submit_ioctl exceeds
NVAVP_MAX_RELOCATION_COUNT

Change-Id: Ief36cedd692aa53135fc6a0039b19f18609259dd
Signed-off-by: Somasundaram S <somasundaram@nvidia.com>
Reviewed-on: http://git-master/r/1028913
(cherry-picked from commit <TODO>)
Reviewed-on: http://git-master/r/1029636
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agovideo: tegra: host: validate error notifier offset
Konsta Holtta [Tue, 8 Mar 2016 11:56:19 +0000]
video: tegra: host: validate error notifier offset

Make sure that the notifier object fits within the supplied buffer.

Bug 1739183

Change-Id: Ifbf46eddea86bedf0236851ea1c3f73e5f820beb
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1026409
(cherry picked from commit 4086d2137e9b51137aa335fa264d924c73dea5fc)
Reviewed-on: http://git-master/r/1029382
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agogpu: nvgpu: validate wait notification offset
Konsta Holtta [Tue, 8 Mar 2016 12:35:21 +0000]
gpu: nvgpu: validate wait notification offset

Make sure that the notification object fits within the supplied buffer.

Bug 1739182

Change-Id: Ifb66f848e3758438f37645be6f534f5b60260214
Reviewed-on: http://git-master/r/1026431
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
(cherry-picked from commit <TODO>)
Reviewed-on: http://git-master/r/1029635
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agoxhci: fix off by one error in TRB DMA address boundary check
Mathias Nyman [Mon, 3 Aug 2015 13:07:48 +0000]
xhci: fix off by one error in TRB DMA address boundary check

We need to check that a TRB is part of the current segment
before calculating its DMA address.

Previously a ring segment didn't use a full memory page, and every
new ring segment got a new memory page, so the off by one
error in checking the upper bound was never seen.

Now that we use a full memory page, 256 TRBs (4096 bytes), the off by one
didn't catch the case when a TRB was the first element of the next segment.

This is triggered if the virtual memory pages for a ring segment are
next to each in increasing order where the ring buffer wraps around and
causes errors like:

[  106.398223] xhci_hcd 0000:00:14.0: ERROR Transfer event TRB DMA ptr not part of current TD ep_index 0 comp_code 1
[  106.398230] xhci_hcd 0000:00:14.0: Looking for event-dma fffd3000 trb-start fffd4fd0 trb-end fffd5000 seg-start fffd4000 seg-end fffd4ff0

The trb-end address is one outside the end-seg address.

Bug 1730718

Change-Id: I27bff8497493ea94b357184bd321e7dc478a0a1a
Cc: <stable@vger.kernel.org>
Tested-by: Arkadiusz Miƛkiewicz <arekm@maven.pl>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/1020811
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agokconfig: Foster PRO no idle sata
David DSH [Thu, 3 Mar 2016 20:51:22 +0000]
kconfig: Foster PRO no idle sata

Idle doens't work properly with this feature in.

boot.img size is reduced by 2632 bytes

Bug 1579438
Bug 200176631
Bug 200173379

Change-Id: I4b1f9568bec4aed55ea98726dbbeb6831fcd7bf3
Signed-off-by: David DSH <ddastoussthi@nvidia.com>
(cherry picked from commit 223b9ecdb0321b06b225eb91d25802eaa330a6d8)
Reviewed-on: http://git-master/r/1023631
Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agodrivers: block,scsi: fixup blk_get_request dead queue scenarios
Rajath Shetty [Thu, 3 Mar 2016 01:29:31 +0000]
drivers: block,scsi: fixup blk_get_request dead queue scenarios

The blk_get_request function may fail in low-memory conditions or during
device removal (even if __GFP_WAIT is set). To distinguish between these
errors, modify the blk_get_request call stack to return the appropriate
ERR_PTR. Verify that all callers check the return status and consider
IS_ERR instead of a simple NULL pointer check.

For consistency, make a similar change to the blk_mq_alloc_request leg
of blk_get_request.  It may fail if the queue is dead, or the caller was
unwilling to wait.

This Change is part of the upstream patch:
a492f075450f3ba87de36e5ffe92a9d0c7af9723

Orignal author: Joe Lawrence <joe.lawrence@stratus.com>

Change-Id: I1da5bc8419f43704e87625dac00c8fc4b88db743
Signed-off-by: Rajath Shetty <rshetty@nvidia.com>
Reviewed-on: http://git-master/r/1022949
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>

3 years agogpu: nvgpu: enable use_full_comp_tag_line in gpc mmu
mheyer [Sat, 20 Feb 2016 05:31:24 +0000]
gpu: nvgpu: enable use_full_comp_tag_line in gpc mmu

Also GPC MMU needs to have its PRI_MMU_CTRL_USE_FULL_COMP_TAG_LINE
control bit set.

Bug 1730611

Signed-off-by: Mathias Heyer <mheyer@nvidia.com>
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Change-Id: I01e11de066ea5487bf1d9c8c8eddbf159e4882da
Reviewed-on: http://git-master/r/1014881
(cherry picked from commit d1651bbebe1b3e46d2173dec1651b3d2f4307b40)
Reviewed-on: http://git-master/r/1017445
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 years agomm: release mutex before handle_mm_fault
Krishna Reddy [Tue, 9 Feb 2016 22:17:45 +0000]
mm: release mutex before handle_mm_fault

Release mutex before handle_mm_fault for filemap faults and
reacquire it.

Bug 200172417

Change-Id: I1df9d3529dde9d739e9ba44108edc0fb1e582fa8
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/1012132
Tested-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agodrivers: video: tegra: Add full range HDMI support
Aly Hirani [Thu, 23 Apr 2015 23:41:15 +0000]
drivers: video: tegra: Add full range HDMI support

HDMI sinks by default are only expected to support limited range
which restricts each channel to 16-235, rather than 0-255. The spec also
optionally allows sinks to support full range by declaring a
"quantization selectable" bit in the VCDB block in the EDID.

If the quantiazation selectable is marked as true (independent bools for
RGB/YUV), then the source is allowed to select full range by setting the
RGB/YUV limited/full range bits in the avi infoframe.

This patch adds:
1. A new VMODE flag to indicate that the specific mode is limited range
2. A new FB_CAP_* to indicate that the display supports overriding
RGB/YUV and the associated EDID parsing.
3. Applies the new VMODE LIMITED RANGE to the RGB/YUV modes based
on whether the TV supports overriding the quantization in that color
space as the default.
4. Adds the logic in the hdmi modeset to enable CMU iff we are in RGB
and limited range.
5. Adds the logic in the hdmi driver to set the avi infoframe based on
whether the current mode has the limited range flag set or not.

Bug 1611691

Change-Id: I9c42fea51211c6ed71945a17fe8f1353811951d9
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/937115
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agoFix memory leak when blake is removed
Eric Miao [Tue, 26 Jan 2016 23:12:26 +0000]
Fix memory leak when blake is removed

Bug 200168010

Change-Id: I3310d0e3aca17a4aed9610e42522786c3d661fc9
Signed-off-by: Eric Miao <emiao@nvidia.com>
Signed-off-by: Li Li <lli5@nvidia.com>
Reviewed-on: http://git-master/r/1000107
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agovideo: tegra: host: Update serialize flags
Arto Merilainen [Fri, 15 Jan 2016 10:41:37 +0000]
video: tegra: host: Update serialize flags

Currently some of the units using RESOURCE_PER_CHANNEL_INSTANCE
policy do not have .serialize flag set. As a result our recovery
cannot identify which channel is using the engine at the point
when failure occurs.

This patch enables serialization to ensure that the modules get
reset properly after failure.

Bug 1717101

Change-Id: Iee1a6c8919bb6a3c6bff3b3e2b613b62d030b16d
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/933140
(cherry picked from commit fec1e971b6307c46a443934f51b3e98627ba5cf1)
Reviewed-on: http://git-master/r/999205
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>

3 years agonet: wireless: bcmdhd: Fix Android Bug 25306181
Michael Hsu [Sat, 9 Jan 2016 00:16:08 +0000]
net: wireless: bcmdhd: Fix Android Bug 25306181

Original patch source: https://android.googlesource.com/kernel/msm

Original patch commit message:
> commit 3fffc78f70dc101add8b82af878d53457713d005
> Author: Patrick Tjin <pattjin@google.com>
> Date:   Wed Dec 9 15:24:05 2015 -0800
>
>     net: wireless: bcmdhd: check packet length for event messages
>
>     Check the datalen field is less than the size of
>     packet received from the network.
>
>     Bug: 25306181
>
>     Signed-off-by: Patrick Tjin <pattjin@google.com>
>     Change-Id: I3b021d88a95bd7d4e6e0d745d2527d73487bcadc
>     (cherry picked from commit 10b850b7e82873a14068d24dac4fc2080d46ff76)

Bug 1716690

Change-Id: Ic83eb29fe95ad0c1b50bdd8bcc39982575671e2d
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/999648
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agonet: wireless: bcmdhd: Fix Android Bug 25662233
Michael Hsu [Fri, 8 Jan 2016 23:16:47 +0000]
net: wireless: bcmdhd: Fix Android Bug 25662233

Apply slightly modified version of the following patch.  (Original
patch did not handle 0 length WPS_ID_DEVICE_NAME correctly, so it was
modified to fix 0 length condition.)

Original patch source: https://android.googlesource.com/kernel/msm

Original patch commit message:
> commit 68cdc8df1cb6622980b791ce03e99c255c9888af
> Author: dataanddreams <dataanddreams@gmail.com>
> Date:   Mon Nov 30 17:08:54 2015 -0500
>
>     bcmdhd: Add checks for stack buffer overflows
>
>     These two checks prevent exploitable buffer overflows in two scenarios.
>     1. Long WPS_ID_DEVICE_NAME in WPS info elements
>     2. Invalid SSID determined in certain scan results
>
>     Bug: 25662233
>     Change-Id: Ifb2887737aa6218079745f27d59b5f1364b3892e

Bug 1716690

Change-Id: Ib6bedd8c20185d38a16fb144b6b8ab4393de038f
Signed-off-by: Michael Hsu <mhsu@nvidia.com>
Reviewed-on: http://git-master/r/999649
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agoalsa:hda: enable inject null sample for stereo LPCM
Ashok Mudithanapalli [Thu, 28 Jan 2016 12:09:40 +0000]
alsa:hda: enable inject null sample for stereo LPCM

add check for format along with channel count to
ensure that inject null sample enabled only for
stereo LPCM streams.

Also disable at the time of closing the device.

Bug 1718097

Change-Id: I1e46e49359cccc2b3a95d2706d9281789bbdcc44
Signed-off-by: Ashok Mudithanapalli <ashokm@nvidia.com>
Reviewed-on: http://git-master/r/999397
Reviewed-by: Sanjay Singh Chauhan <schauhan@nvidia.com>
Reviewed-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

3 years agogpu: nvgpu: Control comptagline assignment from kernel
Terje Bergstrom [Thu, 17 Dec 2015 18:12:21 +0000]
gpu: nvgpu: Control comptagline assignment from kernel

On Maxwell comptaglines are assigned per 128k, but preferred big page
size for graphics is 64k. Bit 16 of GPU VA is used for determining
which half of comptagline is used.

This creates problems if user space wants to map a page multiple times
and to arbitrary GPU VA. In one mapping the page might be mapped to
lower half of 128k comptagline, and in another mapping the page might
be mapped to upper half.

Turn on mode where MSB of comptagline in PTE is used instead of bit 16
for determining the comptagline lower/upper half selection.

Bug 1704834

Change-Id: If87e8f6ac0fc9c5624e80fa1ba2ceeb02781355b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/924373
(cherry picked from commit e05803201fd2097e7185dac4554b9237965e5bc8)
Reviewed-on: http://git-master/r/998467
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mathias Heyer <mheyer@nvidia.com>
Tested-by: Mathias Heyer <mheyer@nvidia.com>

3 years agogpu: nvgpu: Add comptag offset to part mappings
Terje Bergstrom [Tue, 24 Nov 2015 23:17:40 +0000]
gpu: nvgpu: Add comptag offset to part mappings

Add offset to comptags when mapping partial buffers.

Bug 1704834

Change-Id: I3405b465bb1373bcc79eb5ecbd93dd1b866abfb4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/922045
(cherry picked from commit 19b6e48ce0536b6716fd4e680bacefff0efec383)
Reviewed-on: http://git-master/r/998466
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mathias Heyer <mheyer@nvidia.com>
Tested-by: Mathias Heyer <mheyer@nvidia.com>

3 years agogpu: nvgpu: check power_on before checking gp_get/put
Deepak Nibade [Mon, 11 Jan 2016 10:52:26 +0000]
gpu: nvgpu: check power_on before checking gp_get/put

gk20a_channel_update() runs in worker thread, and it is possible
that we shutdown GPU while this funtion is still running

Hence, check if GPU is on with flag g->power_on before accessing
gp_get/put

Bug 200165480

Change-Id: Ifcff7c60212923966e36f792f550524275aede22
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/931039
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Roopa Ranganathan <rranganathan@nvidia.com>

3 years agogpu: nvgpu: increase wait time during shutdown
Deepak Nibade [Mon, 11 Jan 2016 10:22:28 +0000]
gpu: nvgpu: increase wait time during shutdown

In GPU shutdown path, we currently wait for 2s to allow
all other work to finish.

Increase this time to 5s in case 2s is insufficient

Bug 200165480

Change-Id: I1bb99568235c327dab53114afb902507fb5f0792
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/931024
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Roopa Ranganathan <rranganathan@nvidia.com>

3 years agoRevert "Revert "gpu: nvgpu: move check_gp_put() and update_gp_get() to worker""
Deepak Nibade [Mon, 11 Jan 2016 10:20:33 +0000]
Revert "Revert "gpu: nvgpu: move check_gp_put() and update_gp_get() to worker""

This reverts commit f5eac948ab8a6729c549d98fa6aa8751ed94095f.

Bug 200165480

Change-Id: Ie94c375463d51829d7696f4bf07830f4c8206bdd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/931023
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Tested-by: Roopa Ranganathan <rranganathan@nvidia.com>

3 years agoRevert "gpu: nvgpu: move check_gp_put() and update_gp_get() to worker"
Vinayak Pane [Sat, 9 Jan 2016 00:02:17 +0000]
Revert "gpu: nvgpu: move check_gp_put() and update_gp_get() to worker"

This reverts commit 06ee8880a37e64b6b507f8e3dd031d7bf9259e6e.

Bug 200165480

Change-Id: I38482e1a45b0adee83ca9734d8b27920f7f234f5
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/930691
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agodrivers: video: tegra: Fix race condition
Aly Hirani [Thu, 7 Jan 2016 22:18:28 +0000]
drivers: video: tegra: Fix race condition

Re-reading tegra_dc_hpd() in the controller_enable() causes a race
condition. By the time controller_enable is called, tegra_dc_hpd() might
be false.

Instead, the correct way is to tie the hdcp state to the
controller_enable and controller_disable and hence, force enable hdcp.

Bug 1717496

Change-Id: Ie05de9c555ef6254f6877aeb35c970997a3d3d16
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/930172
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agoShrink ashmem directly through shmem_fallocate
Tobias Lindskog [Mon, 9 Feb 2015 07:10:39 +0000]
Shrink ashmem directly through shmem_fallocate

When ashmem_shrink is called from direct reclaim on a user thread, a
call to do_fallocate will check for permissions against the security
policy of that user thread.  It can thus fail by chance if called on a
thread that isn't permitted to modify the relevant ashmem areas.

Because we know that we have a shmem file underneath, call the shmem
implementation of fallocate directly instead of going through the
user-space interface for fallocate.

FIX=DMS06243560
Area: Kernel/Linux Kernel

Bug: 21951515
Bug 1715409

Change-Id: Ie98fff18a2bdeb535cd24d4fbdd13677e12681a7
Signed-off-by: Jeff Vander Stoep <jeffv@google.com>
(cherry picked from commit 2ecc7f173a30ee7df10240d6944108252a5f5b7d)
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/928294
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Inamdar Sharif <isharif@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agodrivers: video: tegra: Fix VIC codes
Aly Hirani [Fri, 25 Dec 2015 01:58:09 +0000]
drivers: video: tegra: Fix VIC codes

This should fix the VIC codes for a wide variety of pixclocks. Use a
+/- 0.5% range (VESA DMT spec guidelines) for VIC matching.

Change-Id: Ie62072011520555530a61fd2e1eedb7e25e672ce
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/927192
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>

3 years agotegra: dc: Round up target HDMI rate
Alex Frid [Sat, 19 Dec 2015 22:49:47 +0000]
tegra: dc: Round up target HDMI rate

Since Tegra Clock Framework rounds down when module clock divider is
determined, rounded up target rate for sor clock switch to compensate.

Bug 200162245

Change-Id: Ic6fde0ebf32143609a399a9f6ed2b6805d9f7029
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/926981
Reviewed-by: Aly Hirani <ahirani@nvidia.com>
Tested-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agoInsure seccomp is called on syscall
David DSH [Tue, 22 Dec 2015 04:43:01 +0000]
Insure seccomp is called on syscall

Bug 200147146

Change-Id: Ieef34724948077fd834f9eabc719806f2c4770be
Signed-off-by: David DSH <ddastoussthi@nvidia.com>
Reviewed-on: http://git-master/r/925869
GVS: Gerrit_Virtual_Submit
Reviewed-by: Roopa Ranganathan <rranganathan@nvidia.com>
Tested-by: Roopa Ranganathan <rranganathan@nvidia.com>

3 years agovideo: tegra: hdmi: fix cea vic code search
Ivan Raul Guadarrama [Mon, 21 Dec 2015 14:44:38 +0000]
video: tegra: hdmi: fix cea vic code search

Remove all flags but interlaced from the vmode field
to allow the correct comparison against embedded list.

Bug 200157629

Change-Id: I7ac2a97cbd259bc792122f723825a0ef1b697ff1
Signed-off-by: Ivan Raul Guadarrama <iguadarrama@nvidia.com>
Reviewed-on: http://git-master/r/842959
(cherry picked from commit ba59b240e7674be8ec74453897ca8b8bc871dcd4)
Reviewed-on: http://git-master/r/925547
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

3 years agogpu: nvgpu: move check_gp_put() and update_gp_get() to worker
Deepak Nibade [Mon, 30 Nov 2015 10:39:48 +0000]
gpu: nvgpu: move check_gp_put() and update_gp_get() to worker

We currently call check_gp_put() and update_gp_get()
in submit path and this takes about 5uS for both checks
check_gp_put() - 3.5 uS
update_gp_get() - 1.5 uS

But this book keeping can be moved to gk20a_channel_update()
to save some submit time

Note that check_gp_put() needs to be done inside submit
lock

Bug 200141116

Change-Id: I276400111be0421eb673695e2f2899ff52e344b4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/839232
(cherry picked from commit 289617e8bf01bde9aab45dfa3a1c6a1241e6eb78)
Reviewed-on: http://git-master/r/841583
(cherry picked from commit bdb8b2097de3a6b7ff0fc1f641074b1c9ca99201)
Reviewed-on: http://git-master/r/921948
Tested-by: Nikhil Joshi <nikhilj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agogpu: nvgpu: create sync_fence only if needed
Deepak Nibade [Wed, 7 Oct 2015 10:50:07 +0000]
gpu: nvgpu: create sync_fence only if needed

Currently, we create sync_fence (from nvhost_sync_create_fence())
for every submit
But not all submits request for a sync_fence.

Also, nvhost_sync_create_fence() API takes about 1/3rd of the total
submit path.

Hence to optimize, we can allocate sync_fence
only when user explicitly asks for it using
(NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET &&
NVGPU_SUBMIT_GPFIFO_FLAGS_SYNC_FENCE)

Also, in CDE path from gk20a_prepare_compressible_read(),
we reuse existing fence stored in "state" and that can
result into not returning sync_fence_fd when user asked
for it
Hence, force allocation of sync_fence when job submission
comes from CDE path

Bug 200141116

Change-Id: Ia921701bf0e2432d6b8a5e8b7d91160e7f52db1e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/841584
(cherry picked from commit e8a4b80c4b7cca656cee5a85a50e4bde6097a7bd)
Reviewed-on: http://git-master/r/921947
Tested-by: Nikhil Joshi <nikhilj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agobcmdhd: set correct bw for p2p connection
Bibhay Ranjan [Thu, 3 Dec 2015 13:04:19 +0000]
bcmdhd: set correct bw for p2p connection

if the bw sent from the upper layers does
not match with the bw of the AP connection,
p2p connection happens on MCC always. With
this fix, the bw of the p2p connection is
set as AP's bw.

Bug 1694567

Change-Id: I5f9c73bc51e360e2b3e5e7cf6443d1de4434a136
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: http://git-master/r/841024
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agovideo: tegra: dc: correct typo to parse property
Prafull Suryawanshi [Wed, 9 Dec 2015 09:21:13 +0000]
video: tegra: dc: correct typo to parse property

It was typo mistake to add ! in front of of_find_property()
which caused boardinfo as null caused issue in dsi pad register
write. This change fixes it and now boardinfo read correct.

bug 1708374

Change-Id: I1a92089ddccc1eb2c365dd7d20dda8f0eccb2b71
Signed-off-by: Prafull Suryawanshi <prafulls@nvidia.com>
Reviewed-on: http://git-master/r/843440
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
(cherry picked from commit 28f1bcbfa67eca917d0bf44f038096c7c0d5fd90)
Reviewed-on: http://git-master/r/924575

3 years agoarm64: dts: t210: update cpu-emc frequency table
Somdutta Roy [Mon, 14 Dec 2015 22:59:20 +0000]
arm64: dts: t210: update cpu-emc frequency table

updated the cpu-emc freq ratio table based on
loki-e for power and perf optimization

Bug 200154205

Change-Id: I0679b6fb3ac969b3006c97e7827842a2549d8664
Signed-off-by: Somdutta Roy <somduttar@nvidia.com>
Reviewed-on: http://git-master/r/922735
(cherry picked from commit 5313a620190bcc670ce0c6d956b5c2e1f189119b)
Reviewed-on: http://git-master/r/924321
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Todd Poynter <tpoynter@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agoARM64: dts; Hawkeye: Disable SAR for wifi SKU
Akhilesh Reddy Khumbum [Mon, 14 Dec 2015 23:59:10 +0000]
ARM64: dts; Hawkeye: Disable SAR for wifi SKU

Bug 1712009

Change-Id: I24398165440055c37237596510882d443661844d
Signed-off-by: Steve Rogers <srogers@nvidia.com>
Reviewed-on: http://git-master/r/922762
(cherry picked from commit 03a454a77978ee9084fa0d035a2c79aa13d7116b)
Reviewed-on: http://git-master/r/924259
Reviewed-by: Automatic_Commit_Validation_User

3 years agogpu: nvgpu: add debug msg in ioctl ZBC_SET_TABLE
Gagan Grover [Tue, 15 Dec 2015 06:18:08 +0000]
gpu: nvgpu: add debug msg in ioctl ZBC_SET_TABLE

Print failure message in ioctl NVGPU_GPU_IOCTL_ZBC_SET_TABLE

Bug 200158661

Change-Id: Idfc7b7cc2a64c92bf7c947708de30b5f0151f877
Signed-off-by: Gagan Grover <ggrover@nvidia.com>
Reviewed-on: http://git-master/r/922910
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Gaurav Singh <gauravsingh@nvidia.com>
Reviewed-by: Dhiren Parmar <dparmar@nvidia.com>

3 years agodrivers: video: tegra: Add some more EDID override
Aly Hirani [Sun, 13 Dec 2015 00:02:48 +0000]
drivers: video: tegra: Add some more EDID override

Based on the offline database we've collected, fix some pclks

Bug 1710672

Change-Id: I1711c1d8783385500549942ffe18e3b9ee96de68
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/922297
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodrivers: video: tegra: dc: Add pclk rounding
Aly Hirani [Mon, 14 Dec 2015 01:41:59 +0000]
drivers: video: tegra: dc: Add pclk rounding

This changes the way we round for 1000DIV1001 modes. Instead of trying
to do the exact 60/1.001, do the exact bit of pre-rounding that the
GPU does.

Bug 1711896

Change-Id: I5a8404cacf8aa6c11ddee4cd83183b83570eb8cf
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/922296
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agoHawkeye: Remove TNID in android serial number
wahsu [Tue, 15 Dec 2015 02:52:16 +0000]
Hawkeye: Remove TNID in android serial number

Bug 1695710

Change-Id: I2c82b5f2737e576dbf6023cb5e60c77db41f3ec8
Signed-off-by: wahsu <wahsu@nvidia.com>
Reviewed-on: http://git-master/r/922838
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoAudio: update fw and driver to resolve codec issues
Mark Pereira [Fri, 11 Dec 2015 04:16:57 +0000]
Audio: update fw and driver to resolve codec issues

Change summary:
Updated xml files provided by Audience to resolve issues
with CTS capture and playback failures on Hawkeye.
Update to Hawkeye latest FW is B62297.

Bug 200155576

Change-Id: Iacf4537e1b8bac96edc85adea5fe5a405d9c5976
Signed-off-by: Mark Pereira <mpereira@nvidia.com>
Reviewed-on: http://git-master/r/922137
Reviewed-by: Pierre Gervais <pgervais@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agovideo: tegra: host: finish actmon work if pending
Shridhar Rasal [Thu, 10 Dec 2015 05:15:00 +0000]
video: tegra: host: finish actmon work if pending

- This make sure that, pending work is finished before deinit
  complete to avoid scheduled work queued after deinit.

Bug 200155744

Change-Id: Id0a3a93f4a9b07bf39758be58e4e3c37834b5e5e
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/921284
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Xianhui Wang <xianhuiw@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agovideo: tegra: host: don't init actmon workers always
Shridhar Rasal [Wed, 9 Dec 2015 10:51:20 +0000]
video: tegra: host: don't init actmon workers always

- This enables actmon workers only when work actmon interrupt
 configured. Enabling actmon workers polling based scaling doesn't
 make sense.

Bug 200155744

Change-Id: I0a9f65daa92d5b95292240587527a1d17d9f095e
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/921278
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agoARM64: dts; Hawkeye: add A04 and A05 wifi SKU dts
Venkat Reddy Talla [Fri, 11 Dec 2015 10:19:55 +0000]
ARM64: dts; Hawkeye: add A04 and A05 wifi SKU dts

Adding device tree files to support A04 and A05
Hawkeye wifi board revision platforms.

Bug 1710164

Change-Id: I5d4b7d9187a6e69b08eae849b758b29dd084b4c5
Signed-off-by: Steve Rogers <srogers@nvidia.com>
(cherry picked from commit 217b5766c35dd5cc03a5cf3ab7b4c365f890810d)
Reviewed-on: http://git-master/r/922219
Reviewed-by: Automatic_Commit_Validation_User

3 years ago[DNI] video: tegra: dc: Fixes for seamless boot
Ankita Garg [Thu, 10 Dec 2015 04:02:27 +0000]
[DNI] video: tegra: dc: Fixes for seamless boot

- Set vmode correctly
- Fix incorrect computation of pclk in dc

Bug 200158722

Change-Id: Ie2e120982ea866c27d4891110e52ed6589c9765b
Signed-off-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-on: http://git-master/r/921522
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoARM64: tegra210: hawkeye: set FPS timing to 5120us
Prafull Suryawanshi [Wed, 7 Oct 2015 05:58:06 +0000]
ARM64: tegra210: hawkeye: set FPS timing to 5120us

Set FPS period to 5120 to allow more discharge time to cpu and gpu.

bug 1675404

Change-Id: I2a8299e5e2384a18cb6c1994c6c5ab5769f56a64
Signed-off-by: Prafull Suryawanshi <prafulls@nvidia.com>
Reviewed-on: http://git-master/r/812638
Reviewed-on: http://git-master/r/840853
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm64: t210: adjust core and post soc core timers.
Prafull Suryawanshi [Thu, 3 Dec 2015 05:59:42 +0000]
arm64: t210: adjust core and post soc core timers.

With new cpu fps settings, we need recalculated core timer
values to make sure smooth lp0 entry-exit.

bug 1675404

Change-Id: Ica958df763e5b45e35fdf4d4f4c8ed00cd5188b0
Signed-off-by: Prafull Suryawanshi <prafulls@nvidia.com>
Reviewed-on: http://git-master/r/840837
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoDNI: drivers: video: tegra: Fix pclk rounding
Aly Hirani [Thu, 10 Dec 2015 22:26:55 +0000]
DNI: drivers: video: tegra: Fix pclk rounding

This change targets specific modes we've found through our tools that
would lead to pclk rounding issues.

For now, specifically target to a certain pclk.

This is a massive hack that should be eventually fixed with the pclk
rounding bug.

Bug 1710672

Change-Id: Id861e370e138c9c88fea89d18ca7348e89abd74e
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/921615
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Tao Xie <txie@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

3 years agopagemap: do not leak physical addresses to non-privileged userspace
Kirill A. Shutemov [Mon, 7 Dec 2015 23:24:08 +0000]
pagemap: do not leak physical addresses to non-privileged userspace

[ Upstream commit ab676b7d6fbf4b294bf198fb27ade5b0e865c7ce ]

As pointed by recent post[1] on exploiting DRAM physical imperfection,
/proc/PID/pagemap exposes sensitive information which can be used to do
attacks.

This disallows anybody without CAP_SYS_ADMIN to read the pagemap.

[1] http://googleprojectzero.blogspot.com/2015/03/exploiting-dram-rowhammer-bug-to-gain.html

[ Eventually we might want to do anything more finegrained, but for now
  this is the simple model.   - Linus ]

bug 200160374

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Konstantin Khlebnikov <khlebnikov@openvz.org>
Acked-by: Andy Lutomirski <luto@amacapital.net>
Cc: Pavel Emelyanov <xemul@parallels.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Mark Seaborn <mseaborn@chromium.org>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
Change-Id: I85acefa5c77fcd26d4fde436c37870d41bb8062e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/842648
Reviewed-by: Robert Shih <rshih@nvidia.com>
Tested-by: Robert Shih <rshih@nvidia.com>

3 years agoirqchip: tegra: set FIQ shadows offset
Ian Chang [Wed, 25 Nov 2015 08:41:16 +0000]
irqchip: tegra: set FIQ shadows offset

Set FIQ shadows offset to fix kernel
warnning.

bug 200117915

Change-Id: I3c27df9183d46f6ff8c4a3cc784089b34f6035c8
Signed-off-by: Ian Chang <ianc@nvidia.com>
Reviewed-on: http://git-master/r/837793
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Yu <alleny@nvidia.com>
Reviewed-by: Robert Shih <rshih@nvidia.com>

3 years agothermal: soctherm: use zone_enable for DT case
Santosh Katvate [Wed, 2 Dec 2015 09:45:34 +0000]
thermal: soctherm: use zone_enable for DT case

therm->tz is populated only in non-DT case.
So Use zone_enable to decide if thermal zone is disabled in DT case.

Bug 200157257

Change-Id: I5fd679fe7c4aad76231c82bd8cc7d94c3971cff4
Signed-off-by: Santosh Katvate <skatvate@nvidia.com>
Reviewed-on: http://git-master/r/840993
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dhiren Parmar <dparmar@nvidia.com>

3 years agodrivers: video: tegra: Blacklist pclk for a TV
Aly Hirani [Wed, 9 Dec 2015 20:49:34 +0000]
drivers: video: tegra: Blacklist pclk for a TV

Adds a blacklist for the SUHD 8500 HDR TV. It apparently doesn't like us
setting 60/1.001 and rather us do 59.94.

Given the time frame, this is the lowest risk fix.

Bug 200158125

Change-Id: I865a81300d36508977521c25653442b4915f5774
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/843751
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agodrivers: video: tegra: Add blacklist for a user TV
Aly Hirani [Wed, 9 Dec 2015 00:21:16 +0000]
drivers: video: tegra: Add blacklist for a user TV

This change:

1. Adds back the blacklist mechanism from rel-22
2. Removes all existing blacklists and brings in a blacklist for a user
reported TV which does not support YUV420 4K.

Bug 1710631

Change-Id: I39492daf53cda7e9ffcf5d6232281cb746aa611a
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/843693
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoRevert "video: tegra: hdcp: disable hdcp when unsupported"
Anand Prasad [Wed, 9 Dec 2015 01:52:08 +0000]
Revert "video: tegra: hdcp: disable hdcp when unsupported"

This reverts commit 3d14e82dcb772a897e77a22f1a6730a94fb6daaa.

Bug 200147700

Change-Id: I525da09602a6818b2b751752edf89e817ae8e245
Signed-off-by: Anand Prasad <anprasad@nvidia.com>
Reviewed-on: http://git-master/r/843269
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoplatform: tegra: Fix typo in setmode function
Frank Chen [Mon, 7 Dec 2015 21:47:21 +0000]
platform: tegra: Fix typo in setmode function

Fix typo in IMX132 driver set mode fuction

Bug 1662157

Change-Id: I94d8ef249773d2707fa6ff36dc744e2450f1d2b5
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/843000
Reviewed-by: Anton Kondratenko <akondratenko@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Todd Poynter <tpoynter@nvidia.com>

3 years agoiio: proximity: SAR v.21
Erik Lilliebjerg [Wed, 2 Dec 2015 01:07:13 +0000]
iio: proximity: SAR v.21

- Add device tree byte streams for external state low and high.
  When an external entity writes a status state to the SAR driver's external
  function sar_external_status, the corresponding DT byte stream is executed
  depending on the value written (0 or 1).
- Update documentation that explains this.

Bug 200137195

Change-Id: Ie1e3dd606f764d9cafa1b6bc170f46e86206a5f6
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/840111
(cherry picked from commit 2f647cb0af8352d63ae24a5ad7d5b86a28df94d9)
Reviewed-on: http://git-master/r/842605
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agonvi: udpate period time when aux device is enabled
wahsu [Mon, 7 Dec 2015 11:31:57 +0000]
nvi: udpate period time when aux device is enabled

bug 200158162

Change-Id: Ie684d6da30ac26ebb54488e25163f3852343267c
Signed-off-by: wahsu <wahsu@nvidia.com>
Reviewed-on: http://git-master/r/842270
(cherry picked from commit 2b87f9dbcb49569a782232f00eb7ad89ada5b204)
Reviewed-on: http://git-master/r/842598
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agodma:tegra: avoid int overflow for transferred cnt
Christopher Freeman [Tue, 6 May 2014 20:13:58 +0000]
dma:tegra: avoid int overflow for transferred cnt

bytes_transferred will overflow during long audio playbacks.  Since the
driver only ever consults this value modulo bytes_requested, store the value
modulo bytes_requested to prevent overflow.

BUG=chrome-os-partner:28376
TEST=Video/audio playback for >4 hours

Bug 200157067

Change-Id: I67ec972a6abcda0944728592c6c6ff319ea2486b
Reviewed-on: https://chromium-review.googlesource.com/198540
(cherry picked from commit a7ca1e2b0d1bbfa8ea480ac30fee73b85039881e)
Signed-off-by: Christopher Freeman <cfreeman@nvidia.com>
Signed-off-by: Diwakar Paliwal <dpaliwal@nvidia.com>
Reviewed-on: http://git-master/r/841406
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dhiren Parmar <dparmar@nvidia.com>

3 years agodriver: hid-nvidia-blake: fix allocation size of loc
Pritesh Raithatha [Tue, 17 Nov 2015 12:31:32 +0000]
driver: hid-nvidia-blake: fix allocation size of loc

Bug 200116059
Bug 200159297

Coverity id: 13435, 13439

Change-Id: I8d777b745b2f8b6722d8bc0e21c634449594ed4f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/836880
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agovideo: tegra: dc: remove redundant flag check
Naveen Kumar S [Thu, 3 Dec 2015 10:25:37 +0000]
video: tegra: dc: remove redundant flag check

While identifying VIC, aspect ratio flag is again being
checked after comparing few basic mode parameters. Hence
removing the redundant flag comparision. This avoids failure
in VIC identification when a mode does not specify  aspect ratio.

bug 200148145

Change-Id: I6298480b7d7a12c05c393276e5432bcd5e7dcd38
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/840954
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

3 years agogpu: nvgpu: rework private command buffer free path
Deepak Nibade [Wed, 4 Nov 2015 08:36:37 +0000]
gpu: nvgpu: rework private command buffer free path

We currently allocate private command buffers (wait_cmd
and incr_cmd) before submitting the job but we never
free them explicitly.
When private command queue of the channel is full, we
then try to recycle/remove free command buffers.
But this recycling happens during submit path, and
hence that particular submit path takes much longer

Rework this as below :
- add reference of command buffers to job structure
- when job completes, free the command buffers
  explicitly
- remove the code to recycle buffers since it should
  not be needed now

Note that command buffers need to be freed in order of
their allocation. Ensure this with error print before
freeing the command buffer entry

Bug 200141116
Bug 1698667

Change-Id: Id4b69429d7ad966307e0d122a71ad55076684307
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/827638
(cherry picked from commit c6cefd69b71c9b70d6df5343b13dfcfb3fa99598)
Reviewed-on: http://git-master/r/835818
Reviewed-on: http://git-master/r/838594
GVS: Gerrit_Virtual_Submit
Tested-by: Kiran SJ <ksj@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agogpu: nvgpu: support skipping buffer refcounting in submit
Deepak Nibade [Thu, 29 Oct 2015 09:50:50 +0000]
gpu: nvgpu: support skipping buffer refcounting in submit

In job submission path, we always take refcount on all
the mapped buffers to safeguard against case where user
space releases the buffer early

But in case user space itself is doing proper buffer
management, kernel need not take refcounts on all the
buffers - which is also a overhead in submit path

Hence, provide a new submit flag
NVGPU_SUBMIT_GPFIFO_FLAGS_SKIP_BUFFER_REFCOUNTING to
optionally skip taking refcounts on all the buffers

Also, if we do not take refcounts, then no need to drop
any refcounts in gk20a_channel_update() as well

Bug 1698667
Bug 200141116

Change-Id: I81bb7a03240300b691c70bcec04ea1badd5934f4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/824718
(cherry picked from commit 8c8978fa303ec4e6db0233becdbdcbad4a248173)
Reviewed-on: http://git-master/r/833327
Reviewed-on: http://git-master/r/838593
GVS: Gerrit_Virtual_Submit
Tested-by: Kiran SJ <ksj@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agogpu: nvgpu: set aggressive_sync_destroy at runtime
Deepak Nibade [Fri, 23 Oct 2015 10:11:21 +0000]
gpu: nvgpu: set aggressive_sync_destroy at runtime

We currently set "aggressive_destroy" flag to destroy
sync object statically and for each sync object

Move this flag to per-platform structure so that it
can be set per-platform for all the sync objects

Also, set the default value of this flag as "false"
and set it to "true" once we have more than 64
channels in use

Bug 200141116

Change-Id: I1bc271df4f468a4087a06a27c7289ee0ec3ef29c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/822041
(cherry picked from commit 98741e7e88066648f4f14490c76b61dbff745103)
Reviewed-on: http://git-master/r/835817
Reviewed-on: http://git-master/r/838592
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agogpu: nvgpu: remove temporary gpfifo allocation in submit path
Deepak Nibade [Mon, 26 Oct 2015 13:17:55 +0000]
gpu: nvgpu: remove temporary gpfifo allocation in submit path

In GPU job submit path gk20a_ioctl_channel_submit_gpfifo(),
we currently allocate a temporary gpfifo, copy user space
gpfifo content into this temporary buffer, and then copy
temp buffer content into channel's gpfifo.

Allocation/copy/free of temporary buffer adds additional
overhead

Rewrite this sequence such that gk20a_submit_channel_gpfifo()
can receive either a pre-filled gpfifo or pointer to
user provided args.
And then we can direclty copy the user provided gpfifo
into the channel's gpfifo

Also, if command buffer tracing is enabled, we still need
to copy user provided gpfifo into temporaty buffer for reading
But that should not cause overhead in real world use case

Bug 200141116

Change-Id: I7166c9271da2694059da9853ab8839e98457b941
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/823386
(cherry picked from commit 3e0702db006c262dd8737a567b8e06f7ff005e2c)
Reviewed-on: http://git-master/r/835816
Reviewed-on: http://git-master/r/838591
GVS: Gerrit_Virtual_Submit
Tested-by: Kiran SJ <ksj@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agoARM: tegra: hawkeye:added touch_clk_sel gpio
David Pu [Fri, 20 Nov 2015 19:54:33 +0000]
ARM: tegra: hawkeye:added touch_clk_sel gpio

added touch_clk_sel gpio which need to be explictly pull low/high
to select touch clock(external or internal clock)

Bug 1706267

Change-Id: I1b70bdddbc362a7a2eb2dd42d5c3087cc3fbf2f3
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/836030
(cherry picked from commit 95ee5c90c15565bb55e57ceadb5229ca49fed339)
Reviewed-on: http://git-master/r/840230
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Todd Poynter <tpoynter@nvidia.com>

3 years agoinput: touch: sharp:add touch_clk_sel control.
David Pu [Fri, 20 Nov 2015 19:57:00 +0000]
input: touch: sharp:add touch_clk_sel control.

touch_clk_sel GPIO need to be configured correctly no matter active
stylus feature is enabled or not.

Bug 1706267

Change-Id: I5381a60b4e86e1562804eed08bb7165b58eb6921
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/836029
(cherry picked from commit 778a4f14fb4980b2a17f59375a34ca9124a0a787)
Reviewed-on: http://git-master/r/840229
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoRevert "Revert "input: touch: sharp: turn off TOUCH_CLK by default.""
David Pu [Mon, 23 Nov 2015 06:29:28 +0000]
Revert "Revert "input: touch: sharp: turn off TOUCH_CLK by default.""

This reverts commit aea857137f1733436bde5f4b0a9a6b0552e16adc.

Bug 1706267

Change-Id: I1628c717030cdc05fdc235f4aaf22591c1966108
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/836392
(cherry picked from commit e7e977f3bdc9c0d06e73fda8d07447221ddffc36)
Reviewed-on: http://git-master/r/840228
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoinput: touch: sharp:fix unbalanced irq disable.
David Pu [Tue, 17 Nov 2015 23:12:34 +0000]
input: touch: sharp:fix unbalanced irq disable.

it is not multi-process safe when accessing touch driver sysfs
/sys/class/misc/touch/wakeup_enable and
/sys/class/input/input0/enabled at same time.
it leads to wakeup_enable flag inconsistent state during changing
waekup_enable and enabled node at sametime. In such case disable_irq
would be called twice and it will never comes back to balanced
state(changing between irq depth between -1 and 0 instead of 0 and 1).

This change keeps irq always enabled after touch input is enabled.
Also move enable/disable irq wake to system suspend/resume routine to
keep it always balanced.

Bug 1709007
Bug 1702947

Change-Id: I732909ebffc139cce6ed92b2388284dbf817c7e2
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/834216
(cherry picked from commit 6b85505fba68ceaf061fcc7a951e16d19339c00e)
Reviewed-on: http://git-master/r/837259
Reviewed-by: Todd Poynter <tpoynter@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

3 years agoneigh: Better handling of transition to NUD_PROBE state
Erik Kline [Wed, 2 Dec 2015 10:01:20 +0000]
neigh: Better handling of transition to NUD_PROBE state

[1] When entering NUD_PROBE state via neigh_update(), perhaps received
from userspace, correctly (re)initialize the probes count to zero.

This is useful for forcing revalidation of a neighbor (for example
if the host is attempting to do DNA [IPv4 4436, IPv6 6059]).

[2] Notify listeners when a neighbor goes into NUD_PROBE state.

By sending notifications on entry to NUD_PROBE state listeners get
more timely warnings of imminent connectivity issues.

The current notifications on entry to NUD_STALE have somewhat
limited usefulness: NUD_STALE is a perfectly normal state, as is
NUD_DELAY, whereas notifications on entry to NUD_FAILURE come after
a neighbor reachability problem has been confirmed (typically after
three probes).

Bug 200154120

Change-Id: I3ee05ab3489173824d38a4b3790bcf0840e0dc40
Signed-off-by: Erik Kline <ek@google.com>
Acked-By: Lorenzo Colitti <lorenzo@google.com>
Acked-by: Hannes Frederic Sowa <hannes@stressinduktion.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: kraghavender <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/840347
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Om Prakash Singh <omp@nvidia.com>
Tested-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-by: Dhiren Parmar <dparmar@nvidia.com>

3 years agodrivers: video: tegra: Add 1000/1001 for HDMI_EXT
Aly Hirani [Mon, 30 Nov 2015 02:37:15 +0000]
drivers: video: tegra: Add 1000/1001 for HDMI_EXT

Previous changed limited 1000/1001 modes to only CEA SVD. A problem
raised by this was with the modes that were read from the HDMI EXT
blocks. They supported 1000/1001 as well.

This change marks the HDMI EXT modes as such and modifies the 1000/1001
code to consider these modes too.

Bug 200156983

Change-Id: I0c774fb75efac6f51b51f75b1badeeb47e90b66c
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/839054
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agoST8: DTS: disable ltr proxmity device
wahsu [Sun, 29 Nov 2015 06:03:24 +0000]
ST8: DTS: disable ltr proxmity device

Proximity is not used in data only and wifi sku on ST8 device.

Bug 200148651

Change-Id: I01f2d5f960ccdf1dacbb92fe802426a9839fd1dd
Signed-off-by: wahsu <wahsu@nvidia.com>
Reviewed-on: http://git-master/r/839015
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Chuang <echuang@nvidia.com>

3 years agoarm: dt: p1761: Correct name-format of a DT entry
Petlozu Pravareshwar [Mon, 23 Nov 2015 12:20:41 +0000]
arm: dt: p1761: Correct name-format of a DT entry

Correct name-format of a ehci DT entry.

Bug 200153623

Change-Id: Ie1ef144a4aeca2a2999a389a99d22380f870dc02
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/837741
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agousb: phy: Correct usb device speed information
Petlozu Pravareshwar [Mon, 23 Nov 2015 12:17:46 +0000]
usb: phy: Correct usb device speed information

When turn_off_vbus_on_lp0 is set, we disconnect
VBUS before going to LP0 and re-enable it after
LP0 wakeup.

Present code assumes device speed info after LP0
is same as before LP0 which is not true if there
is a swapping of devices when system is in LP0.
Hence set speed as UNKNOWN in such condition.

Bug 200153623

change-Id: I129b88ecc8ad743a0a65341dcb0a7b6001f24ff8
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/837740
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agovideo: tegra: dc: update VIC identification
Naveen Kumar S [Thu, 26 Nov 2015 09:55:39 +0000]
video: tegra: dc: update VIC identification

Adding few more checks to help VIC identification.
Comparing 1001/1000 value of pixclock to take care of
pclk rounding-off issue. Also, comparing mode->flag value
helps in choosing the CEA mode with matching aspect ratio.

bug 200148145
bug 200145631
bug 1689283

Change-Id: Ia80ba4dd3337772b24b74ee355a1032d59b31d9d
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/838452
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agodrivers: video: tegra: dc: Fix VIC for a few modes
Naveen Kumar S [Fri, 20 Nov 2015 14:15:10 +0000]
drivers: video: tegra: dc: Fix VIC for a few modes

This change fixes the VIC not being set correctly on a few modes. For
1000/1001 modes, the pixclock is now reverted back to the mode
corresponding to the CEA modedb before it is compared.

Since the refresh in the mode database is also not trustable, it
compares the modes from the CEA modedb with a +/- 1 offset

Bug 200148145
Bug 200145631
Bug 1689283

Change-Id: I3742b4d090c26d6c1fc3e2f4af44fd1389079d1a
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/837681
Reviewed-by: Tao Xie <txie@nvidia.com>
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>

3 years agodrivers: video: tegra: Mark 1000/1001 for SVD only
Aly Hirani [Mon, 23 Nov 2015 20:16:50 +0000]
drivers: video: tegra: Mark 1000/1001 for SVD only

As per the CEA spec, only the modes coming from the CEA SVD are capable
of the dual frame rate (that is 60 Hz also supporting 59.94, etc). This
uses the previous change to look at modes that are marked as CEA and
creates a 1000/1001 mode only for those.

bug 1689283

Change-Id: Iba55d8f7ca9b06af7baa3f9e12822130f0f3337c
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
(cherry picked from commit 427bd89b96c96ca3450693f69f71500acaa22d95)
Reviewed-on: http://git-master/r/836961
Reviewed-by: Soumenkumar Dey <sdey@nvidia.com>
Tested-by: Soumenkumar Dey <sdey@nvidia.com>
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>

3 years agovideo: fbmon: identify cea vic modes
Ivan Raul Guadarrama [Wed, 18 Nov 2015 18:19:49 +0000]
video: fbmon: identify cea vic modes

Add the FB_VMODE_IS_DETAILED flag to identify detailed modes.
Add the FB_VMODE_IS_CEA flag and correctly identify
detailed timings which are also valid CEA modes.

Bug 1691633
bug 1689283

Change-Id: I04a1b6e6c6c725fb8d1e467994f071b9855f56a0
Signed-off-by: Ivan Raul Guadarrama <iguadarrama@nvidia.com>
(cherry picked from commit ddce3ef0a203b490c5b471b7d379254534c2ceac)
Reviewed-on: http://git-master/r/836952
Reviewed-by: Soumenkumar Dey <sdey@nvidia.com>
Tested-by: Soumenkumar Dey <sdey@nvidia.com>
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>

3 years agostaging: ozwpan: Make oz_pd_stop atomic
Spencer Sutterlin [Tue, 17 Nov 2015 02:50:02 +0000]
staging: ozwpan: Make oz_pd_stop atomic

Change responsibility of holding g_polling_lock to caller of
oz_services_stop()

Bug 200151967

Change-Id: I3a1d5d12d1c03153a62555c3ccd4121e90671afa
Signed-off-by: Spencer Sutterlin <ssutterlin@nvidia.com>
Reviewed-on: http://git-master/r/833613
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
(cherry picked from commit 7d3b6be98e84526eef2d731e544d58f1d6f309dd)
Reviewed-on: http://git-master/r/837862
Reviewed-by: Dhiren Parmar <dparmar@nvidia.com>
Tested-by: Dhiren Parmar <dparmar@nvidia.com>

3 years agoTEMP: stop_machine: serialize disable IRQ sequence
Prafull Suryawanshi [Mon, 2 Nov 2015 09:09:02 +0000]
TEMP: stop_machine: serialize disable IRQ sequence

bug 200044022

On T124 platforms, we hit a hang on cpu_down(cpu=3) where
CPU3 gets stuck waiting on the gic irq_controller_lock in
gic_eoi_irq. The other CPUs have already entered the
DISABLE_IRQ stop machine state at this point.
This therefore causes the watchdog to timeout and the
system to reset. Given that we have the stopper thread
scheduled (preemption disabled), the 'hang scenario' most
likely manifests itself due to some sort of issue in
the irq context. Sequentially entering the DISABLE_IRQ
state from CPU3->CPU0 seem to somehow prevent this hang.

This change is only meant to be a temporary workaround
to improve system stability and is by no means a fix
of any sort. To that end, it is wrapped in a CONFIG
option that is turned off by default.

Change-Id: Ic50ecd5a6d429706e4f68bcd133707fae4e692ce
Signed-off-by: Prafull Suryawanshi <prafulls@nvidia.com>
Reviewed-on: http://git-master/r/836921
Reviewed-by: Dhiren Parmar <dparmar@nvidia.com>
Tested-by: Dhiren Parmar <dparmar@nvidia.com>

3 years agovideo: tegra: dc: moved KSV reads before V'
Sharath Sarangpur [Mon, 23 Nov 2015 23:04:41 +0000]
video: tegra: dc: moved KSV reads before V'

Moved KSV reads before reading V'

bug 200144160

Change-Id: If74570c2e37e6d9df5aada1a055d104ebe65449e
Signed-off-by: Sharath Sarangpur <ssarangpur@nvidia.com>
Reviewed-on: http://git-master/r/837486
Reviewed-by: Mitch Luban <mluban@nvidia.com>

3 years agoRevert "arm64: t210: change post soc core time"
Todd Poynter [Mon, 16 Nov 2015 20:07:20 +0000]
Revert "arm64: t210: change post soc core time"

Bug 1675404
Bug 200154032

This reverts commit 82282fddfd05de8181a43764617e35674d1b5ed1.

Change-Id: I1c8cda9ea6e1e18458e1cf856534ac0e621f0061
Signed-off-by: Todd Poynter <tpoynter@nvidia.com>
Reviewed-on: http://git-master/r/837208
Reviewed-by: Automatic_Commit_Validation_User

3 years agoRevert "ARM64: tegra210: hawkeye: set FPS timing to 5120us"
Todd Poynter [Mon, 16 Nov 2015 20:06:53 +0000]
Revert "ARM64: tegra210: hawkeye: set FPS timing to 5120us"

Bug 1675404
Bug 200154032

This reverts commit b852d0d200d6f44b707b353bf92bd57c54aa2f8e.

Change-Id: I5b02f7c97cb69241fd42f7ef4fde7c1019f3cf31
Signed-off-by: Todd Poynter <tpoynter@nvidia.com>
Reviewed-on: http://git-master/r/837207

3 years agoRevert "input: touch: sharp: turn off TOUCH_CLK by default."
David Pu [Fri, 20 Nov 2015 19:49:21 +0000]
Revert "input: touch: sharp: turn off TOUCH_CLK by default."

This reverts commit 11208e8d20f890ddf72bf81e8f609e26019c83e2.

it causes bug 1706267. reverting it.
original Bug 1704518

Change-Id: I96dc461b265ea2cc56ae483fb5448e9d16e4d199
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/836025
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoarm: tegra12: Enable hid/Jarvis support
Rene Houle [Thu, 29 Oct 2015 01:22:29 +0000]
arm: tegra12: Enable hid/Jarvis support

Bug 1695822

Change-Id: I553dcaf025c69039e0f215066f435f256c1fa972

Signed-off-by: Rene Houle <rhoule@nvidia.com>
Change-Id: If38241713db95202cfda086177d8e56c59bfd8dd
Reviewed-on: http://git-master/r/824432
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agoarch: arm: boot: dts: remove cy8c for Darcy
Martin Gao [Thu, 19 Nov 2015 03:00:16 +0000]
arch: arm: boot: dts: remove cy8c for Darcy

- Darcy uses pwm based led, and therefore no long needs this.

Change-Id: I3c2d10922da6dbe55c4ee98213b5066abbc885a1
Signed-off-by: Martin Gao <marting@nvidia.com>
Reviewed-on: http://git-master/r/834937
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Fu <danifu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agoregulator: max77620: fix setting active discharge
Damon Duan [Thu, 19 Nov 2015 03:36:40 +0000]
regulator: max77620: fix setting active discharge

MAX77620 has different settings to enable active
discharge:
-for Step-Down, need set nADE bit to 0
-for LDO, need set ADE bit to 1

Bug 1698711

Change-Id: I498b153ac11c32ef046e63b9bde5c286e17b3e2e
Signed-off-by: Damon Duan <danield@nvidia.com>
Reviewed-on: http://git-master/r/834996
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hayden Du <haydend@nvidia.com>

3 years agoARM64:jetson-cv: add dt support for A03 revision
Damon Duan [Mon, 16 Nov 2015 08:40:00 +0000]
ARM64:jetson-cv: add dt support for A03 revision

Jetson-CV A03 revision needs below settings in bootloader:
- enable low-battery shut down(MBLPD)
- disable active discharge for LDO4
Add support in DT for these settings.

Bug 1698711

Change-Id: Ic7604fc32c0650b185525d45bf1bf5c54738b8b4
Signed-off-by: Damon Duan <danield@nvidia.com>
Reviewed-on: http://git-master/r/833366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hayden Du <haydend@nvidia.com>
GVS: Gerrit_Virtual_Submit

3 years agoRevert "arm64: t210: Enable the MCC in WiFi"
kraghavender [Mon, 16 Nov 2015 11:58:15 +0000]
Revert "arm64: t210: Enable the MCC in WiFi"

This reverts commit b47674285ada3105f72b88a755f24907cea26138.

Bug 1693638

Change-Id: I7660873174b902ec67ac8f72570534217aee51af
Signed-off-by: Kasturi Raghavender <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/833299
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 years agommc: debugfs: added timing spec for HS400
Anubhav jain [Tue, 17 Nov 2015 07:45:53 +0000]
mmc: debugfs: added timing spec for HS400

-timing spec for HS400 mode was not defined.
So added timing spec for HS400 mode.

Change-Id: Id5d2b11a18980e633170ac0280c826dd736711eb
Signed-off-by: Anubhav jain <anubhavj@nvidia.com>
Reviewed-on: http://git-master/r/833740
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agousb: phy: tegra: add pm_stay_awake/pm_relax during otg work
Rakesh Babu Bodla [Tue, 17 Nov 2015 05:52:18 +0000]
usb: phy: tegra: add pm_stay_awake/pm_relax during otg work

Ensure suspend events don't trigger during otg
workqueue function is running, using
pm_stay_awake/pm_relax.

Bug 200148068
Bug 200141477

Change-Id: Idf9ae907eb563f3849fa420ce3b73b1635083fe4
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/833693
Reviewed-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agoarm64: t210: config: enable Intel 82576 NIC driver
Vidya Sagar [Wed, 18 Nov 2015 11:58:42 +0000]
arm64: t210: config: enable Intel 82576 NIC driver

Bug 200144579

Change-Id: Ibadbd0418914844a1d6613cdf3a6bdb5c5eee785
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/834649
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agoarm64: ptm: ignore PTM config file register reading
Chun XU [Fri, 13 Nov 2015 10:28:06 +0000]
arm64: ptm: ignore PTM config file register reading

Reading T210 A57 PTM registers causes kernel hang
when PTM has not been power.

This is a WAR.

Bug 200146743

Change-Id: I0c3d847c737eedfaacd600813a581c34bc819e51
Signed-off-by: Chun XU <chunx@nvidia.com>
Reviewed-on: http://git-master/r/833592
Reviewed-by: Allen Yu <alleny@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hayden Du <haydend@nvidia.com>

3 years agowireless: bcmdhd: Set/get dhd_msg_level using module param
Srinivas Ramachandran [Tue, 13 Oct 2015 22:13:58 +0000]
wireless: bcmdhd: Set/get dhd_msg_level using module param

Android utility tools to configure the msg_level in the DHD are
not available for platforms like L4T. Allow the msg_level variable
as a module param so that it can be configured at runtime via sysfs

Bug 1686560

Change-Id: Ibc480bd6eebea446ba453e2e58c37d1744cfb2a9
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: http://git-master/r/817239
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/834306
Tested-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoDNI: nvdec: Enable nvdec clock forever for foster
Soumen Kumar Dey [Thu, 15 Oct 2015 05:58:05 +0000]
DNI: nvdec: Enable nvdec clock forever for foster

This change does the following to make sure that NVDEC
registers can be written anytime for foster.

* Enable nvdec clock forever
* Disable nvdec powergating
* Disable host1x powergating

Bug 1599524

Change-Id: Ie87b4ec17c7246266ce024619f0424ea69667ec8
Signed-off-by: Soumen Kumar Dey <sdey@nvidia.com>
Signed-off-by: Mahesh Lagadapati <mlagadapati@nvidia.com>
Reviewed-on: http://git-master/r/818025
Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>

3 years agopower: extcon: set ac cable state true always
Venkat Reddy Talla [Tue, 17 Nov 2015 11:14:33 +0000]
power: extcon: set ac cable state true always

Add support to set ac cable state true always
based on DT property
power-supply,default-ac-cable-connected

Bug 1690367

Change-Id: Ib2fabba59bfeecfb7201a447b26eb4a6ba6acc0f
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/833894
Tested-by: Murali Duggireddy <mduggireddy@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agoARM64: t210: foster: enable power supply extcon
Venkat Reddy Talla [Mon, 16 Nov 2015 10:16:20 +0000]
ARM64: t210: foster: enable power supply extcon

Enabling power supply extcon interface to report
input cable type from kernel to framework layer,
adding power-supply,default-ac-cable-connected
property to set ac cable state true always.

Bug 1690367

Change-Id: I260dc64fd4126536871aebb3a94e8810ebc1ffff
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/833239
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Murali Duggireddy <mduggireddy@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>