6 years agoCHROMEOS: config: disable DEBUG_LL
Rhyland Klein [Wed, 17 Oct 2012 16:14:10 +0000]
CHROMEOS: config: disable DEBUG_LL

Now that the kernel won't crash if DEBUG_LL is disabled and the
bootloader passes the 'D' in the uart scratch register to signal the
debug uart, disable the extra unnecessary kernel logging.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: Ic296993011aa0c1f8fc9dd155a946922633928e9
Reviewed-on: http://git-master/r/145297
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R23dc5889caf5279e14d2f33535eb81236358ec73

6 years agomisc: nct: section mismatch fix
Bitan Biswas [Wed, 12 Sep 2012 09:45:04 +0000]
misc: nct: section mismatch fix

Fix section mismatch error for nct thermal sensor driver

Bug 1038578

Change-Id: I39c86896ab50a11b30c3b975b9d20190417bebb3
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/132797
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/145291
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R20369b69e1d9affb6fc43232d761bfff705aada5

6 years agoarm: tegra: dalmore/pluto: Fix section mismatch warning
Animesh Kishore [Thu, 27 Sep 2012 05:28:52 +0000]
arm: tegra: dalmore/pluto: Fix section mismatch warning

Bug 1055400
Bug 1038578

Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/139220
(cherry picked from commit e94c0f27d4905934d354fb949573592c7f710231)

Change-Id: I09204704b6d4f1abbbead396f67e0b288c94a94a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/145289
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rd38d75301223c124770861553c6b350eea903187

6 years agoasoc: tegra: Have single platform data for VCMs
Nitin Pai [Wed, 29 Aug 2012 13:49:53 +0000]
asoc: tegra: Have single platform data for VCMs

Rename the file tegra_p1852_pdata.h to tegra_vcm_pdata.h for using
generically across all the VCM based platforms.
Added config structure to pass the DAP/DAS configuration for P852
Added support to configure the DAP/DAS on Tegra2.

Bug 1040171

Reviewed-on: http://git-master/r/128224
(cherry picked from commit fca5e1c5407f17d6860003ca4db4e27b459a0fbe)

Change-Id: I9dba53f6e182550b8267666a37533317d07433db

Signed-off-by: Nitin Pai <npai@nvidia.com>
Change-Id: I7ef9052fb32c680d1d3be623e61669000deccd2e
Reviewed-on: http://git-master/r/145263
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R6303d4a74786ed3aa90f64508e29466b74ab78eb

6 years agonor: Assigning static mapping for 64MB NOR Flash.
Sumeet Gupta [Wed, 17 Oct 2012 08:08:18 +0000]
nor: Assigning static mapping for 64MB NOR Flash.

VMALLOC_END has been pushed up by 16MB to accomodate NOR.

Non-static mapping hogs a lot of vmalloc space.

Bug 1036361
Bug 1160254

Rviewed-on: http://git-master/r/128178
Change-Id: I9913d5983721a0f35116a761131f7338ba26a0c8
Signed-off-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-on: http://git-master/r/145183
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rcbf4e1cbd626c95344e542f12b22d8386bf190c4

6 years agoarch: arm: tegra: regulator calls need the device name
Petlozu Pravareshwar [Wed, 17 Oct 2012 07:34:20 +0000]
arch: arm: tegra: regulator calls need the device name

Device name is passed to the regulator_get API.

Bug 1158664

Change-Id: Iac26dba79964fc49a95eb5f3cecd4ae10019f461
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/145166
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>

Rebase-Id: R86489bab2dea889f571b706aad04ee69b3684f63

6 years agousb: gadget: tegra:change condition for vbus check
Rakesh Bodla [Wed, 17 Oct 2012 06:06:21 +0000]
usb: gadget: tegra:change condition for vbus check

Changing the condition for vbus check. VBUS will be
present when OTG cable is connected, hence vbus
status will be reflected wrong. Correct status
is tracked through vbus_active variable.

Bug 1158853

Change-Id: Ic904beb5919ddafef5becf39ddac1767cdda79cd
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/145148
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R0e755cf7ba63041c80ffae32164467ea8f275ce5

6 years agoasoc: aic326x machine: fix coverity issue
Sri Krishna chowdary [Tue, 16 Oct 2012 13:33:02 +0000]
asoc: aic326x machine: fix coverity issue

Return if dam_ifc is negative as it cant be negative.

Bug 1046331

Change-Id: I8a09443a99bd215bb24f80a7d4836a32cbc3351e
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144906
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: Rd5f59442e582328492c140734a4c8288c35a1ce0

6 years agousb: gadget: tegra: fix coverity issue
Sri Krishna chowdary [Fri, 12 Oct 2012 15:24:29 +0000]
usb: gadget: tegra: fix coverity issue

req cant be NULL if _req is not NULL

Bug 1046331

Change-Id: Ice984281fe3c670293a4ea80bd88a9aa014e645e
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144108
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R1d8de392e30fb38b702c690ca1b6a7e01e7eafe3

6 years agousb: gadget: tegra: Add AHB prefetch buffer with IOMMU
Hiroshi Doyu [Thu, 11 Oct 2012 09:02:30 +0000]
usb: gadget: tegra: Add AHB prefetch buffer with IOMMU

With PLATFORM_ENABLE_IOMMU, IOMMU'able devices need to work with
IOMMU, where only IOMMU mapped pages are valid. AHB prefetcher for USB
tried to access(read) beyond IOMMU mapped range. To avoid unnecessary
DECERR from IOMMU(SMMU), 128 bytes are appended at the end of USB
buffers at dma_{map,unmap}_single() but cache maint is done with the
original size.

Bug 1049290

Change-Id: I5646c83541eac263f9180bc6ae64e05d1e7c8a51
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/143531
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R14dec1a5f6ebd098753598fe2d43ba0f97653ddf

6 years agoARM: tegra: configs: add MAX77665 flash support
Charlie Huang [Wed, 26 Sep 2012 23:53:43 +0000]
ARM: tegra: configs: add MAX77665 flash support

bug 1035551

Change-Id: I4bd2b1d3a65731a0f8dc351d5feb1f4f47af2780
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
(cherry picked from commit 26ca5dbe241a3b6793e26e2e8289b2bb9cee0d91)
Reviewed-on: http://git-master/r/139132
Reviewed-on: http://git-master/r/141853
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R0ff6b13a163cfc434aa068cd880c0f219f56c104

6 years agoARM: tegra: add config option for io_dpd
Vishal Singh [Tue, 16 Oct 2012 07:39:13 +0000]
ARM: tegra: add config option for io_dpd

Adding a temporary config option for allowing devices listed in
tegra_list_io_dpd[] to go into DPD state.
Since the pins under sdhci DPD groups are used for different
purposes on different platforms, this list should be either in
platform files or should be guarded by a config option. This change
does the latter for now, until a decision is made on this.

Bug 1036567.
Bug 1040511.

Change-Id: Ic2de96d9e506463f140d7a4e998c7a657c9593bc
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/141251
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R07835d6a216fba7c61b4431818ef72b913694889

6 years agoARM: tegra: pinmux: don't use new name for t11x yet
Ray Poudrier [Thu, 18 Oct 2012 23:34:03 +0000]
ARM: tegra: pinmux: don't use new name for t11x yet

Change-Id: Ia24c3876448c03b42bd11fb32b950eb67488cb2a
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/145754
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R97d613ac40bcae6f45b309066e903a238565d6dd

6 years agoarm: tegra: rename pinmux device/driver name
Pritesh Raithatha [Tue, 16 Oct 2012 06:34:05 +0000]
arm: tegra: rename pinmux device/driver name

To avoid confusion/conflict with dt pinmux driver, rename internal
 pinmux device/driver name.

Bug 1003210

Change-Id: I7f061a893ad75727475cc9bf3436779a9b11047f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/144786
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

Rebase-Id: R62bb68bf570edb84869c151f5eff94312ffc51ab

6 years agoARM: tegra: Use cbus for MSENC power sequence
Terje Bergstrom [Mon, 8 Oct 2012 05:09:32 +0000]
ARM: tegra: Use cbus for MSENC power sequence

MSENC requires a low enough PLLC clock to be able to be turned on for
power un-gating. If 3D or other fast unit is active at the same time,
PLLC is set to too high rate and MSENC cannot be turned on.

Use the cbus clock to allow clock framework to set the PLL to correct
rate.

Bug 1060834

Change-Id: Id83c33b9a5f2f29466cc55243310642a5f53fd99
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/142190
(cherry picked from commit 94c16a960d7649bdb4b6369ae2a1cdd3fa369d71)
Reviewed-on: http://git-master/r/144889
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R7cec7a0572098ff8e2805ecfedef399ce576d9cc

6 years agoarm: tegra: pluto: Add ad5816 focuser support
Sudhir Vyas [Tue, 16 Oct 2012 11:11:52 +0000]
arm: tegra: pluto: Add ad5816 focuser support

Add focuser support for pluto.

Bug 1056458

Change-Id: Icd3c33a6da732a78aba4fe452e56d54192106171
Reviewed-on: http://git-master/r/141724
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/144835
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: Rf3b74dae88cd5387431d0a8562b2f7274f25b5a4

6 years agoCHROMEOS: config: enable e-Crypt FS
Rhyland Klein [Mon, 15 Oct 2012 17:24:51 +0000]
CHROMEOS: config: enable e-Crypt FS

At some point ecrypt fs support was disabled. It is required for
Chromeos so enable it again.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I582601d8f0e6fcb7cc3281e6f76b375758f1682b
Reviewed-on: http://git-master/r/144647
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R2416fe77c82345fa96977c7539052d715ed2cdd2

6 years agochromeos: disable TEGRA_AVP and MEDIASERVER
Rhyland Klein [Tue, 9 Oct 2012 17:36:23 +0000]
chromeos: disable TEGRA_AVP and MEDIASERVER

Disable TEGRA_AVP and MEDIASERVER as they seem to be deprecated now.

Change-Id: Id88cf53062d2f8acda86c62bc12127ff6b15aae7
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-on: http://git-master/r/142717
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: Rfe5b1d88793e6d4d9d0a576abd3864e5a65ee33b

6 years agoarm: tegra: pcie: fix coverity issue
Sri Krishna chowdary [Mon, 8 Oct 2012 05:38:38 +0000]
arm: tegra: pcie: fix coverity issue

Check return value.
Deallocate irq properly.

Bug 1046331

Change-Id: I804f671bb04dac4876277ed9365bb2506b188f35
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/142197
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: R8dfc7d89fa0accdfad226a442a92a7b5f85b5276

6 years agobrcmfmac: load firmware based on chip id
Wei Ni [Fri, 28 Sep 2012 09:20:19 +0000]
brcmfmac: load firmware based on chip id

Choose appropriate firmware at runtime so that brcmfmac driver can be used for
both bcm4329 and bcm4330 chipset.

Change-Id: Ia035874dcb2eb0e01a0a1b8818e60c363c9d018e
Signed-off-by: Wei Ni <wni@nvidia.com>
Reviewed-on: http://git-master/r/139622
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R49c6c2563edd8da76e8e07d8c2ca223b022992b3

6 years agoARM: tegra: enterprise: enable wl18xx wireless module support
Rakesh Goyal [Tue, 28 Aug 2012 16:46:08 +0000]
ARM: tegra: enterprise: enable wl18xx wireless module support

Bug 990784
Change-Id: I173df3f7244e7d0b40ae5aad98c72885ff42fdab
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: http://git-master/r/129103
(cherry picked from commit 32b8cc820fc9f3709c23e6b383825d6cdb0a6085)
Reviewed-on: http://git-master/r/134792
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R1bdb7f4f1241a8034c7ae556a763a3c8837e4a2d

6 years agowakeup: change formatting alignement
Shridhar Rasal [Tue, 16 Oct 2012 07:37:54 +0000]
wakeup: change formatting alignement

Just sets proper formatting aligment for wakeup_sources stats.

Change-Id: I4bf41e53e39b892e290de9ee2bfdb25573a205fc
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/144796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R44f773a7e6988132ee2017f96db8dd6aa6caa3b1

6 years agomisc: Removed warnings from MAX1749 driver
Sumit Sharma [Mon, 15 Oct 2012 09:59:43 +0000]
misc: Removed warnings from MAX1749 driver

Removed compile time warnings from MAX1749 vibrator driver

Change-Id: I71521ffb1621fb46cbc51c45d0de7b99836b51d7
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/144526
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Raba8e5607081cbafadb4968207d05e83dc18f36d

6 years agoChromeOS: config: renormalize splitconfig
Christopher Freeman [Fri, 12 Oct 2012 21:38:11 +0000]
ChromeOS: config: renormalize splitconfig

Update splitconfigs with new kconfig options

Change-Id: I9aa83fcabc886932447fe241b34c809374a35cc5
Signed-off-by: Christopher Freeman <cfreeman@nvidia.com>
Reviewed-on: http://git-master/r/144170
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
Tested-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andrew Chew <achew@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R28855f24692a8a2636be057004fd15205cba462d

6 years agoarm: tegra: mc: add config option for PTSA.
Krishna Reddy [Fri, 12 Oct 2012 00:48:10 +0000]
arm: tegra: mc: add config option for PTSA.

Add config option for MC PTSA enable/disable.
Move T11x specific registers to t11x file.

Change-Id: I48a7013937faffdf99b1f54135b0b06da961b156
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143901
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Rebase-Id: Ra60e4393cc04d0d4d7c6eee91dea12c7736fc103

6 years agoarm: tegra: clock: fix coverity issue
Sri Krishna chowdary [Thu, 11 Oct 2012 10:15:56 +0000]
arm: tegra: clock: fix coverity issue

Add Null check before pointer dereference.

Bug 1046331

Change-Id: I88c315671b8ca97ad70d579cc921b1dcccc06e71
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/143579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: R3f8104daa10e1f0db16c2978ae9f590a816daeb7

6 years agoarm: tegra: dalmore: fix coverity issue
Sri Krishna chowdary [Sun, 14 Oct 2012 09:11:06 +0000]
arm: tegra: dalmore: fix coverity issue

Check return values.

Bug 1046331

Change-Id: I090515790bae8c450e00e258ac9b89ce516d37a3
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144377
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: Rb1e328f64c1a68105db5daebdf656f79206bdd54

6 years agousb: otg: tegra: fix coverity issue
Sri Krishna chowdary [Sun, 14 Oct 2012 06:41:20 +0000]
usb: otg: tegra: fix coverity issue

sscanf reads int into host and host is checked
if it is less than 0. This suggests that host should
be int rather than unsigned int.

Bug 1046331

Change-Id: I8ac4d8113b0602625e2a5019f70f29797148ec5d
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/144373
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: R3698b5391e0b0710a7941fee468c7b00580a9d52

6 years agomedia: video: tegra: pass device as argument in power_on
Mallikarjun Kasoju [Fri, 12 Oct 2012 16:04:17 +0000]
media: video: tegra: pass device as argument in power_on

modify power_on api to pass device as argument so that from
board files it can be used to get the regulator in place of NULL

Bug 1154495

Change-Id: I5164fa04a14ef0d405e6c9d51f42efc8e6ce14bf
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/143748
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: Rcdd67f3328b43a53e5d2fe7e51bafc4e0f5f70c0

6 years agoarm: tegra: remove unused file.
Krishna Reddy [Fri, 12 Oct 2012 00:13:24 +0000]
arm: tegra: remove unused file.

Change-Id: Ifd2c3bbb1a21330273efb96388095eb641f45df5
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143890
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

Rebase-Id: Rbc9f47d12acb38179d57fa4cfc569e241d751dfc

6 years agoarm: tegra: la: Program PTSA registers in LA module
Krishna Reddy [Fri, 28 Sep 2012 03:21:56 +0000]
arm: tegra: la: Program PTSA registers in LA module

Change-Id: Iaeac46499af6df3550bf000056b93cc474a9b483
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/139556
(cherry picked from commit 64900b9a27845b201002b07bf7b8537a682f3d38)
Reviewed-on: http://git-master/r/143786
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Rebase-Id: R9b26f42a60597b117e14c92c03727cc27042ba08

6 years agoarm: tegra: la:Add support to set initial static LA values
Krishna Reddy [Fri, 14 Sep 2012 06:32:14 +0000]
arm: tegra: la:Add support to set initial static LA values

Change-Id: I6820aeeb4105509f8ede185c4418c384ad0d91b3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/138721
(cherry picked from commit e42ebbd79029066a30c0b94a3ad1c3055dde3e2f)
Reviewed-on: http://git-master/r/143785
Reviewed-by: Alex Waterman <alexw@nvidia.com>

Rebase-Id: Rfb09e3e7ff2460924e0ebd2dcece4db5319c1f8e

6 years agoarm: tegra: la: Convert error message to WARN_ONCE
Krishna Reddy [Tue, 25 Sep 2012 21:48:00 +0000]
arm: tegra: la: Convert error message to WARN_ONCE

Change-Id: Ie11de7963ea9c9538d6c6a2db971c47f66eb0912
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/138720
(cherry picked from commit 8a9ab8c39e09ab7e9bea494b7f585a6cba7258dd)
Reviewed-on: http://git-master/r/143783
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R71917ffcdf7db63c2298b1d787e3d72b027d73b6

6 years agoARM: tegra: move uart debug port initialization into common file.
Laxman Dewangan [Thu, 11 Oct 2012 13:44:10 +0000]
ARM: tegra: move uart debug port initialization into common file.

There is lots of duplicate code for initializing
the debug port for all platform.
Move this to board-common file so that duplicate code
can be avoided.

Change-Id: I3e8a10cd3db4db21d6752a0b689136bfe9828197
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/143721
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R0ee5cb4caae5d563a0a9df9a1d69b1846b974ebd

6 years agoasoc: tegra: handle multiple registrations for switch device
Nikesh Oswal [Tue, 9 Oct 2012 13:31:38 +0000]
asoc: tegra: handle multiple registrations for switch device

Multiple machine drivers try to register the switch device,
this change ensures that switch device is registered only once

Bug 1002694

Change-Id: If23acb08aad36d5b4c466e7092e261b0bc18d02a
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/142681
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R526d0f84a1d6c5c3a9b1ae1c744311cbfe974b94

6 years agoARM: tegra11: Call cpu_pm callback in LP2 later
Bo Yan [Sun, 30 Sep 2012 00:06:54 +0000]
ARM: tegra11: Call cpu_pm callback in LP2 later

GIC function tegra_gic_notifier disables interrupt in CPU interface
for callback event CPU_PM_ENTER. Once interrupt is disabled in
CPU interface, wfi instruction can't be used to clock gate since
no interrupt can pass through the GIC to bring CPU out of clock
gating.

Move cpu_pm_enter and cpu_pm_exit closer to the final power gating
code, basically make sure all fallback to clock gating are outside
of cpu_pm_enter and cpu_pm_exit pair, i.e. no clock gating can happen
after interrupt pass through is disabled in CPU interface.

Change-Id: I36d56a0f5e83b86070c3a0a1bc60066e2d0892af
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/139957
(cherry picked from commit c661833556d9757899428e81bb738335ff742586)
Reviewed-on: http://git-master/r/143974
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R4afd0aea5eb99f364458f5a00d37fd3240aef9c0

6 years agoARM: tegra11x: Fix the secondary CPU start up
Bo Yan [Tue, 25 Sep 2012 04:05:48 +0000]
ARM: tegra11x: Fix the secondary CPU start up

The secondary CPU startup sequence of t11x is different because
flow controller behavior has changed, so fix it accordingly

Change-Id: I26aa26593943fde0cf7b599b4fca04644715ca4a
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/138705
(cherry picked from commit 79ecf6b4ba3902b1b5bd79d8d4942884a8dc78eb)
Reviewed-on: http://git-master/r/143973
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R1fbf3fe1f0c175f930ed452cdf2d3758eaa392c2

6 years agoARM: tegra11: clock: Enable dual cbus sourced by PLLC2/3
Alex Frid [Thu, 4 Oct 2012 23:51:51 +0000]
ARM: tegra11: clock: Enable dual cbus sourced by PLLC2/3

Restore dual c2bus/c3bus operations, removed initial floor settings
to re-enable bus scaling.

Change-Id: I97aa8951c8fd00c5e5a3d0a3c9f945762373438c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/141784
(cherry picked from commit 8636b4a7ed1efeffd0f0d36430065e55ec65b97b)
Reviewed-on: http://git-master/r/143972
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R515b644fbdc6daa85b7dfb27245163e8e57b60ad

6 years agoARM: tegra11: clock: Update PLLC2/C3 configuration
Alex Frid [Tue, 25 Sep 2012 21:50:06 +0000]
ARM: tegra11: clock: Update PLLC2/C3 configuration

- Lower vco min to 600MHz
- Do not allow multiples of 3 as post divider values
- Extend unlock frame number

Change-Id: I6cda72842f9258f43400d4213880e6e3e7b6febd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/138754
(cherry picked from commit 8dea2e5438e76717931b34f5ee3d1f9a88703f0b)
Reviewed-on: http://git-master/r/143971
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: Ra1e42335e76263a5ce79f73ef01217ae19dbdd1c

6 years agosensors: Invensense: Add debug register interface.
Robert Collins [Wed, 19 Sep 2012 16:46:10 +0000]
sensors: Invensense:  Add debug register interface.

Change-Id: I4d13fde5437e9b956609c89a28266a238713d513
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/133827
(cherry picked from commit e449744c9e16d7339b1c771c9f36118da23e3a52)
Reviewed-on: http://git-master/r/138749
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: Rff1af70b19c25b83333ab78cec8a164a9a9c2b9f

6 years agoconfigs: enable Invensense MPU
Erik Lilliebjerg [Wed, 15 Aug 2012 08:28:01 +0000]
configs: enable Invensense MPU

Change-Id: Ieeb0b533575e2bb0fc3ca470ce619f0e138bc073
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/132405
(cherry picked from commit b3809d3487784acf3b2f1703c3c5aa731457b873)
Reviewed-on: http://git-master/r/138747
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: R3c9185a10479c069e003f69733ec70227531dfd1

6 years agoinput: misc: Invensense MPU 5.0.1 driver
Robert Collins [Tue, 11 Sep 2012 23:59:16 +0000]
input: misc: Invensense MPU 5.0.1 driver

Change-Id: I6391dc455d615e63d6b15f0f537805c88c259a15
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/132403
(cherry picked from commit de2d18bbe47fca8d56c3e0717b9463a05a110c88)
Reviewed-on: http://git-master/r/138745
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: Rae07eb246785f2c75085d9acbf3aac8ff6b21374

6 years agoarm: tegra: mc: handle arb emem intr alone case
Krishna Reddy [Tue, 9 Oct 2012 02:05:51 +0000]
arm: tegra: mc: handle arb emem intr alone case

when the intrrupt is for arb emem alone, passing interrupt
through other error checks should be avoided.

Bug 1155067

Change-Id: I8c8f12b8951aab285ff4534b32fb28ccb2d365b1
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143325
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R2e2c3944a1b8f0dc42a5d9554fa8dcd1d3775e68

6 years agovideo: tegra: dc: change enable and hotplug_init arguments
Mallikarjun Kasoju [Thu, 11 Oct 2012 11:35:29 +0000]
video: tegra: dc: change enable and hotplug_init arguments

pass device as argument for enable and hotplug_init so that it
can be used in board files to get the regulator using device name.

Bug 1154495

Change-Id: Ib549e4d9f2c6eaf4fbcc24851a3866f2fd3cbf84
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/142702
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R41ca724431705479e3d07387febb52e349e4d774

6 years agoasoc:tegra: disable ext1 clock in suspend
Chandrakanth [Tue, 9 Oct 2012 11:29:52 +0000]
asoc:tegra: disable ext1 clock in suspend

disable ext1 clock in suspend call and enable in resume. disabling
ext1 clock in bias enable/disable is not sufficient now

BUG 1052180

Change-Id: Iff588ac92c2d8cfe62b7a6c597c68b9f1215f64c
Signed-off-by: Chandrakanth <cgorantla@nvidia.com>
Reviewed-on: http://git-master/r/139375
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: R3a7281bab52064fce49c000a8747bce7288e3013

6 years agoARM: tegra: enable io direction macro for T114
aghuge [Fri, 5 Oct 2012 10:52:15 +0000]
ARM: tegra: enable io direction macro for T114

Reviewed-on: http://git-master/r/141923
(cherry picked from commit ff471b3fde278e116da427aafd85e0fd38e7f3f2)

Change-Id: I5cb5e18336e73455ca9f350ac701b3ea8769c5e3
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/143524
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R55a574e2806e5991f5c98cdaddb4c592fb570645

6 years agoARM: tegra11: Dalmore/Pluto: do not use dma mode for spi transfer
Laxman Dewangan [Mon, 1 Oct 2012 15:38:38 +0000]
ARM: tegra11: Dalmore/Pluto: do not use dma mode for spi transfer

The SPI controller produces the rx underrun error randomly
when used in apb dma mode.
Disabling the dma mode of spi transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/140655
(cherry picked from commit 3dd4621f9255cdde2f213e66f4e48c23ce77ec16)

Change-Id: I855ed6c68288fd2817de8f15b063966c60a0538b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143278
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R81bbb587d8553494fcf99948d7620a2d325d5093

6 years agoARM: tegra11: Dalmore/Pluto: Add spi controller data
Laxman Dewangan [Mon, 1 Oct 2012 11:35:43 +0000]
ARM: tegra11: Dalmore/Pluto: Add spi controller data

Adding spi controller data which configure the spi controller
specific to spi device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/140616
(cherry picked from commit f81b7009966a57a928bcd8ab6b66c4e905e533a6)

Change-Id: I672957276b1c0c6f8747d190dbde8f4a4ad7261b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143277
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rd1fe140a35fae27154ddaa2dc8ccf2af6610632d

6 years agoARM: tegra: Dalmore/Pluto: remove spi clock initialization
Laxman Dewangan [Fri, 28 Sep 2012 15:18:09 +0000]
ARM: tegra: Dalmore/Pluto: remove spi clock initialization

remove spi clock initialization from board files as driver
take care of all require configuration.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/139734
(cherry picked from commit 44da485a9cd4c5d7946f569e1319b4ff8b658c96)

Change-Id: Ia3de79dfd2f0937719e767bff03d1acf455c9707
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143276
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R0e993fd7f4bf5deff05991600da93cacbc9cba21

6 years agoARM: tegra: Dalmore/Pluto: enbale dma based transfer for spi
Kunal Agrawal [Wed, 26 Sep 2012 11:49:07 +0000]
ARM: tegra: Dalmore/Pluto: enbale dma based transfer for spi

Configuring spi platform data to enable dma based transfer.

Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/138937
(cherry picked from commit f7428afd295022643d2c9c9837b780d5d418f801)

Change-Id: I837d24d24bfb562a69429930baecd61e7aecc7a8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143275
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R0c9063a9322bd46819fcc776d1852025cc6a389d

6 years agoARM: tegra: Dalmore/Pluto: configure spi platform data
Laxman Dewangan [Mon, 24 Sep 2012 14:04:05 +0000]
ARM: tegra: Dalmore/Pluto: configure spi platform data

Configure spi platform data for:
- non dma based transfer.
- maximum packet size to fifo depth.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/134820
(cherry picked from commit 1697fc32a99c7c9205aa12ba7f6592410b59dd6b)

Change-Id: I9bf497571e1473855bedd8bb9577ac8165a0b10e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143274
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rfca14733d0f1c5e6a137b069a461393d694f1744

6 years agoARM: tegra: pluto: pullup SPI4 data pins.
Linqiang Pu [Thu, 20 Sep 2012 03:40:13 +0000]
ARM: tegra: pluto: pullup SPI4 data pins.

Need to internal pullup data pins to make touch work on pluto.

Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/133965
(cherry picked from commit 55e8e4e675df0bbb1f552d1dc2ed449bee4e852c)

Change-Id: I0f7178aa2e22cbf0b44ccced47ad0a58ef0ec284
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143273
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Re3648f59d3cedd287844a708a10f7ea7ba54a2f6

6 years agoarm: tegra: dalmore: enable pullup on SPI4 pins
Xin Xie [Thu, 20 Sep 2012 04:48:54 +0000]
arm: tegra: dalmore: enable pullup on SPI4 pins

Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/133973
(cherry picked from commit f7bdc53ca1c22b8709ff39aefb227eab82023168)

Change-Id: I21f6ec319bff615bff50eafc1642b5cf7a434df1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143272
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rca59e8adfc9abc54c50c0a31f98500f5b7d5ac52

6 years agoARM: tegra: pluto/dalmore: change SPI4 clk to 12MHz
Linqiang Pu [Sat, 22 Sep 2012 00:19:05 +0000]
ARM: tegra: pluto/dalmore: change SPI4 clk to 12MHz

we found data corruption randomly when running at 18MHz.
WARed by changing to 12MHz.

Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/134529
(cherry picked from commit e32980563ca3b52a6f26e5b5b54367080508492b)

Change-Id: I35bd19766bfa5e3338887cbfdfc3034f64915775
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143271
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rdb5fbd5c5e10cada7611725942592402e8a79bf0

6 years agotouch: Raydium: Remove hex blob data structures from board files.
Robert Collins [Sat, 22 Sep 2012 22:49:55 +0000]
touch: Raydium: Remove hex blob data structures from board files.

Reviewed-on: http://git-master/r/134622
(cherry picked from commit cbab2c1dc0216f4acdf18fdb00744fd0b2be57d1)

Change-Id: Id75021f42bfa7d60cf64b364d93bf34e7b99b7bf
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/142741
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R219da00cf0b3652e9103673e7faa9ea0ca43d130

6 years agoasoc: tegra: pcm: Remove platform specific check.
Manoj Gangwal [Wed, 10 Oct 2012 06:45:31 +0000]
asoc: tegra: pcm: Remove platform specific check.

Bug 1035521

Change-Id: I52764a21f6fe5260da22d150aed247e77f3d2084
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/143008
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: Rc46e1d936a4ba056169e9884100a4ca76b88adba

6 years agoasoc: codec: spdif: Remove platfrom related check.
Manoj Gangwal [Wed, 10 Oct 2012 06:38:15 +0000]
asoc: codec: spdif: Remove platfrom related check.

Bug 1035521

Change-Id: I63e6c1850a4c3d26abeb500547ec3a58edcea54d
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/143007
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: Rca29680898bb267a4823c00b80a3e63dd03a0082

6 years agoARM: tegra: isomgr: ISO BW Manager module
Mark Stadler [Thu, 20 Sep 2012 15:56:06 +0000]
ARM: tegra: isomgr: ISO BW Manager module

So drivers can ensure sufficient ISO BW for unit/operations

BUG 1049929

Change-Id: I28fce8e01be71dbf357ef03c47fc47f420278484
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/134109
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R45da1b2b531f4affd7ec87e795fc264b040f83d4

6 years agoARM: tegra: Fix 3D power gating sequence
Terje Bergstrom [Mon, 24 Sep 2012 11:49:30 +0000]
ARM: tegra: Fix 3D power gating sequence

The power gating sequence is generic code. For Tegra11x 3D, the
generic sequence is not correct. Fork the power gating sequence
for Tegra11x, and use sequence from hardware documentation.

Fix also clamping removal to wait for hardware to signal back.

Removes 3D from the powergating skip list. This does not enable power
gating for 3D, as nvhost has a control for that.

Reviewed-on: http://git-master/r/134727
(cherry picked from commit b558b2a2dadcf8441acb10bb8cdbd348f3d96793)

Change-Id: Ieb29a4190e84a43c1f4740d814dd67a065796fd0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143149
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R18a8f47f640634c0c9ae14f7863a46ea90efdc4b

6 years agoARM: tegra: power gate bypass
Bitan Biswas [Mon, 24 Sep 2012 06:01:39 +0000]
ARM: tegra: power gate bypass

CPU power gate is allowed in low level but controlled
by CPU power management code

bug 1053317

Reviewed-on: http://git-master/r/134717
(cherry picked from commit 880e46d014e955418859b18a3e5b3e213fc5f560)

Change-Id: Ifb16b468c6b7511fbf5dc688e13a6b574ceed379
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143148
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R9f63181feb02a0ad5f081e1ab175905a37bb07b6

6 years agoARM: tegra: power gate disable
Bitan Biswas [Sat, 22 Sep 2012 20:55:15 +0000]
ARM: tegra: power gate disable

Power gate is disabled for T11x as part of power features disable

bug 1053317

Reviewed-on: http://git-master/r/134611
(cherry picked from commit babb1014067a9a765ffb83fe7fafda8c60fbb5a8)

Change-Id: Ia00e26a5db0672c266536545a71da1312f48bd6f
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143147
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Ra8720d6b4c369324b9e78fae7d7a0acbc48cd85a

6 years agomfd: palmas: add power off functionality
Mallikarjun Kasoju [Fri, 21 Sep 2012 07:38:56 +0000]
mfd: palmas: add power off functionality

Add power off functionality to turn off palmas PMU
Bug 1051970

Reviewed-on: http://git-master/r/134297
(cherry picked from commit 25dfe79ea1203a4a8b4b6a232237d83a9070537f)

Change-Id: I28a956320894ff036bf479faa9a31a3f2ae7cadf
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143146
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R651e8c059039cd89116435ae085a9b49fda21d5f

6 years agoasoc: tegra: Fix cs42l73 mclk for all sample rates
Rahul Mittal [Fri, 21 Sep 2012 15:08:05 +0000]
asoc: tegra: Fix cs42l73 mclk for all sample rates

Some sample rates were failing due to a check in cs42l73 driver
Fixed mclk to support playback for all sample rates

Reviewed-on: http://git-master/r/134421
(cherry picked from commit 0bbadb7bc04c5f7be8e29fe89fb673c6b5bb24e2)

Change-Id: I0ae620b2e15bea1fd0b7021bebc38a91376e7dee
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143144
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R27bfc6e7b3bde3189dff3a5bfb4abe6dc3e6f8d1

6 years agoARM: tegra11: clock: Peg c2bus at maximum rate
Alex Frid [Fri, 21 Sep 2012 00:03:21 +0000]
ARM: tegra11: clock: Peg c2bus at maximum rate

Reviewed-on: http://git-master/r/134220
(cherry picked from commit fa0021d85d132a1212d211d9b3fae7c98401229b)

Change-Id: I4ee6a69e880b8b8d067233b112f0792f6c9dc29c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143142
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rfd7b9843e96439a40d0062682eea0f0f5e9cb7ea

6 years agoARM: tegra11x: Fix power gating mode
Bo Yan [Thu, 20 Sep 2012 18:20:28 +0000]
ARM: tegra11x: Fix power gating mode

When switching cluster from slow to fast, and if CRAIL is specified by
user in sysfs, force NONCPU instead, since there is no CRAIL for slow
cluster.

Reviewed-on: http://git-master/r/134148
(cherry picked from commit dd4a35406f8f78a11f24b0a741de9a1d7f86fded)

Change-Id: I27eb056a76e8ef5e2480ba4101252415e44eb6c3
Signed-off-by: Bo Yan <byan@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143141
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R32f361794ddc0d29a690c5085adc40f882c16448

6 years agoarm: tegra: pluto: Add startup_delay to fixed regs
Gaurav Batra [Fri, 21 Sep 2012 01:52:49 +0000]
arm: tegra: pluto: Add startup_delay to fixed regs

Reviewed-on: http://git-master/r/134249
(cherry picked from commit 123a778dd2a079c37298fe89e7a94e21d34c9d84)

Change-Id: I2bfd583ea60e7b09d48623cee48bcfcdcd91cec6
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143140
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R24901ed59144be5bd04101c7ef6f9518dab531f6

6 years agoARM: tegra11x: disable RAM repair
Bo Yan [Thu, 20 Sep 2012 23:40:34 +0000]
ARM: tegra11x: disable RAM repair

It's obvious that RAM repair is causing problems when switching
cluster. Disable it for now.

Reviewed-on: http://git-master/r/134214
(cherry picked from commit 4e72925ef08797e130618db7964e3f87346fa35c)

Change-Id: I07bf0a744d1d9bfa6758f8f10f104d03a68314c6
Signed-off-by: Bo Yan <byan@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143139
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R5693e38b48fd07f24688423ea72b8ef0f5fae210

6 years agoARM: tegra: dsi: Fix panel init sequence
Krishna Yarlagadda [Fri, 21 Sep 2012 10:44:02 +0000]
ARM: tegra: dsi: Fix panel init sequence

Panel spec recommends delays between each init cmd.
Providing the delay between cmds and increased delay
from sleep to display on

Reviewed-on: http://git-master/r/134360
(cherry picked from commit e314216dac4258e9d8253a3fb9fe264dbd7acdbb)

Change-Id: I0ce03ee8f0d2a10987bce3a9184e3736d5b8c462
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143138
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R05699e1be90a23d145d14c7bae51bf157e684e54

6 years agoARM: tegra: cpuquiet: Bring back hotplug stats support
Peter Boonstoppel [Mon, 10 Sep 2012 20:47:29 +0000]
ARM: tegra: cpuquiet: Bring back hotplug stats support

Hotplug stats are needed for dfs_log and Power Signature. Cpuquiet
provides similar stats in the core layer, but cannot provide stats for
LP cpu, since this is only visible at the driver level.

Bug 1045785

(cherry picked from commit ec6f32c8c39b574a6d01596a8d31060e47d20905)
Reviewed-on: http://git-master/r/134271

Change-Id: I808c5b9597d32d7297257d4cf8767aa0f9ab0473
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143137
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R6dc5d809303f53eb71031c8c947c754426db4889

6 years agoARM: tegra: pluto: fix pinmux warnings
aghuge [Fri, 21 Sep 2012 08:22:05 +0000]
ARM: tegra: pluto: fix pinmux warnings

Reviewed-on: http://git-master/r/133881
(cherry picked from commit 3857891166fd95c3d1627e3b673115bb1cb077c9)

Change-Id: If39574f22d2ae3002dd8921dc929477fb94badc0
Signed-off-by: aghuge <aghuge@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143135
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rff3cc4b793ce1bc5b319721c5ef530ed6af51a64

6 years agoARM: tegra: dalmore: fix pinmux warnings
aghuge [Fri, 21 Sep 2012 08:06:23 +0000]
ARM: tegra: dalmore: fix pinmux warnings

Reviewed-on: http://git-master/r/133864
(cherry picked from commit 9c21f3850f09c1130d7dc65e43ea03be8e147117)

Change-Id: I21f9c424b2d7ea8a054fc836d2df6c4cd5dac0a4
Signed-off-by: aghuge <aghuge@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143134
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rc731ab94b04270e7693c7e663225495f43eeff61

6 years agoARM: tegra: usb: read hot plug only in host mode
Rakesh Bodla [Thu, 20 Sep 2012 06:41:39 +0000]
ARM: tegra: usb: read hot plug only in host mode

Hot plug data is available only in host mode. Guard hotplug
read with host mode.

Bug 1047763
Bug 1050193

Reviewed-on: http://git-master/r/133890
(cherry picked from commit 927cf3665a02d64e13102480aeaa1dbd46080031)

Change-Id: I1fdefc0642e63ab981b2d224bfe5c2f983241170
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143133
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rf069d441f4bca50d302a3e3f793f0234abaeba5c

6 years agoarm: tegra: pluto: Fix panel cold boot failure
Animesh Kishore [Fri, 21 Sep 2012 04:38:21 +0000]
arm: tegra: pluto: Fix panel cold boot failure

Fixing broken panel display for cold boot.

Bug 1051891

Reviewed-on: http://git-master/r/134264
(cherry picked from commit 8b96e8936553e942e8b9f8f5fc2fde7acad251fb)

Change-Id: Iebe917c206a46281334affbdae0a1a8f56a83eef
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143132
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rdf251cbb4ac05a2f7ae8c5a060358ae633a977c0

6 years agoARM: tegra: pluto: correct set voltage
Pradeep Goudagunta [Fri, 21 Sep 2012 00:43:23 +0000]
ARM: tegra: pluto: correct set voltage

regulator set voltage takes uV as inputs not mV.

Reviewed-on: http://git-master/r/134234
(cherry picked from commit e62863e2807067214890687394ef8869bf0effa1)

Change-Id: Iaabff4146cb0ab5906dbe0a7c1c77e016b775318
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143130
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R254692ad478c8c57358bb0eebc00440621db48dd

6 years agoasoc: tegra: Fix for no audio issue
Vijay Mali [Thu, 20 Sep 2012 21:39:07 +0000]
asoc: tegra: Fix for no audio issue

Reviewed-on: http://git-master/r/134171
(cherry picked from commit 31f7ac77f844976fe809a52828dfcf3e440cfb34)

Change-Id: I2a57ec87aae94deba4b4f9e4eddc54e14ecd8a7d
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143129
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R7f0da8f54434c7f6705d9ff6956001699c806ba8

6 years agoARM: tegra11: clock: Round down CPU rate when run on pll
Alex Frid [Wed, 19 Sep 2012 20:36:21 +0000]
ARM: tegra11: clock: Round down CPU rate when run on pll

Maximum rate for CPU clock is determined When dfll is CPU clock
source. It cannot be achieved if CPU is running on pll. Round
down CPU rate request in the latter case, respectively, to avoid
dvfs max voltage violation errors.

Reviewed-on: http://git-master/r/133968
(cherry picked from commit 628231ca70f92a2f7a772a3e2669faa5ca09a179)

Change-Id: Ia827b07af7d5113f08f0575176e6de7db3a0f370
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143127
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R63e0439b05949b12665007941eac453f3bc4b3ca

6 years agoARM: tegra: cluster switch for T11x
Bo Yan [Thu, 20 Sep 2012 01:19:37 +0000]
ARM: tegra: cluster switch for T11x

1. for secondary CPU, always flush L1 only, this is irrespective of
   Cortex A9 or Cortex A15

2. disable cache before flushing it when rail-gating CPU0

3. do not flush cache before entering ARM common code cpu_suspend,
   which by itself will flush cache.

Still, it's highly desirable to flush cache in __cpu_suspend_save,
since this will flush L2 irrespective of A9 or A15.

Reviewed-on: http://git-master/r/133945

Change-Id: I2c6eb20546b5fc8b5432dc73c2f97480cbf29ee8
Signed-off-by: Bo Yan <byan@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143126
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R7aa2a54eb7cb87f99452f44f2a14a559e171cbda

6 years agoarm: tegra: pluto: Fix panel display orientation
Animesh Kishore [Thu, 20 Sep 2012 18:12:25 +0000]
arm: tegra: pluto: Fix panel display orientation

Rotate default panel orientation by 180 degrees.

Reviewed-on: http://git-master/r/134123
(cherry picked from commit 927becf17d1f4994f7ec85aec6ba2c6e78afe070)

Change-Id: I8754ccd617a3778eb76e7e5053f6204299c0e931
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143125
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rfab603147458bb6e938faf56e8a76eed09cf033c

6 years agoarch: arm: config: Update MODS defconfig
Krishna Monian [Thu, 20 Sep 2012 01:49:33 +0000]
arch: arm: config: Update MODS defconfig

- Remove DC, FB, and GRHOST support
- Add ResiserFS, CIFS, AutoFS support
- Disable BT, IPv6, Wireless

Reviewed-on: http://git-master/r/133956
(cherry picked from commit 0178db73d8a5e217a851ace6255c11e1d49b790f)

Change-Id: Id40854485da2b367aa5903b07640bf31d40c5cf6
Signed-off-by: Krishna Monian <kmonian@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143124
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Re86e05f929529d41a35e5fe26f3c8bf8904023f2

6 years agoARM: tegra11: dvfs: Integrate dfll mode data with dvfs table
Alex Frid [Wed, 19 Sep 2012 01:43:03 +0000]
ARM: tegra11: dvfs: Integrate dfll mode data with dvfs table

Since dfll tunning data is tightly coupled with the target clock
characterization (same, that produce dvfs table for the clock),
integrate dfll data with clock dvfs structure.

Reviewed-on: http://git-master/r/133755
(cherry picked from commit b2d2bb293a4742deb970253b213cde21bb92650e)

Change-Id: I278be9d11ccffd7641c7edb5cb309ef4e95c5957
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143123
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R619680deb08f0606cb18a434833137c067b9ff47

6 years agoARM: T11x: core power off during LP0 suspend
Seshendra Gadagottu [Thu, 20 Sep 2012 06:37:36 +0000]
ARM: T11x: core power off during LP0 suspend

For VDD_CORE to be power off, external power gating
for the active cluster needs to be programmed.
For LP cluster, "FLOW_CTRL_CSR_ENABLE_EXT_NCPU"
needs to be set and for fast cluster,
"FLOW_CTRL_CSR_ENABLE_EXT_CRAIL" needs to be set.

Reviewed-on: http://git-master/r/133997
(cherry picked from commit 84a25f2379d871a70cd92e840d89dbc1a22ad0d3)

Change-Id: I42d7da35ee7c38d0b5a7fab55e1f1c47929f1a40
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143122
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R50ad7c565b6888109b6c1fdefd17d908ab7602ac

6 years agoasoc: tegra: Enable DMIC regulator
Dara Ramesh [Sun, 16 Sep 2012 10:12:48 +0000]
asoc: tegra: Enable DMIC regulator

Reviewed-on: http://git-master/r/133077
(cherry picked from commit 08b49126403385d0d3b7a6643abf5964c3c8c107)

Change-Id: If727ac636e6679c9ee9aef9c281c8b62374c2a39
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143121
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rf3cbeccdfde7f4e6a50b30eab2fc74c27fa58730

6 years agoarm: tegra: USB: Regulator release
Suresh Mangipudi [Thu, 20 Sep 2012 04:18:44 +0000]
arm: tegra: USB: Regulator release

During the de-init of the HSIC regulator the regulator
is not freed properly.

Reviewed-on: http://git-master/r/133970
(cherry picked from commit f02498fd19da4dfb4f071220172d0df0f04763a4)

Change-Id: Ib1a52f9a8952e185541b214f2fceb804c52099cd
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143120
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R05585352c175223d96dbcedeb3f16f7c81fb0bf3

6 years agotouch: raydium: Add dalmore pinmux changes.
Laxman Dewangan [Thu, 20 Sep 2012 11:05:22 +0000]
touch: raydium: Add dalmore pinmux changes.

Reviewed-on: http://git-master/r/134065
(cherry picked from commit e780bfe95e5b5a760c3605abd5a1b70748781b17)

Change-Id: I0409c271de504457574cc2ddebff721fbd29f075
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143119
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rc8170ef2721ccde089ef252c244cf43c0acf7f8c

6 years agotouch: Raydium: Add Dalmore board file configs
Robert Collins [Thu, 20 Sep 2012 05:08:36 +0000]
touch: Raydium: Add Dalmore board file configs

Change pinmux for T114, enable touch controller
power, switch spi bus from spi1 to spi4

Bug 1035566

Reviewed-on: http://git-master/r/132475
(cherry picked from commit 0300d86eb19d63785965ec2a42dbe9e23e185a69)

Change-Id: I7733eb804f59d2a1d5f237e5fe2f9c4a960019df
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143118
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rfeeebf041c77bf8da0df75101798c4b076269f56

6 years agotouch: raydium: Add Pluto pinmux definitions for touch.
Robert Collins [Thu, 20 Sep 2012 04:57:34 +0000]
touch: raydium: Add Pluto pinmux definitions for touch.

Reviewed-on: http://git-master/r/133986
(cherry picked from commit 087e7d7c4b621b71eed3b4988be99ae783ace8bd)

Change-Id: I70339b784daa486ef3a1c515cb4d2deac850869e
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143117
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R994754090872ce8218e1a6c939012f25adab2b66

6 years agotouch: raydium: Pluto board file definition.
Robert Collins [Thu, 20 Sep 2012 04:54:44 +0000]
touch: raydium: Pluto board file definition.

Update Pluto board files for Wintek touch
sensor. Use SPI4 instead of SPI1.

Bug 1030747

Reviewed-on: http://git-master/r/133032

Change-Id: I2ae22d60a074373467d2a77c191b896b4ef0c879
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143116
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Ra63238ed3aa971127eaa7d8dab2dd83c37032c77

6 years agotouch: Radyium: Move panel config structures to board files.
Robert Collins [Sun, 16 Sep 2012 18:10:45 +0000]
touch: Radyium: Move panel config structures to board files.

Reviewed-on: http://git-master/r/133110

Change-Id: I93343d2d67982fd05cb2c72b2d983c0f0cff5bf7
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143115
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R8e0c81e45ec3f10cb3e470419191acd3bf52f68c

6 years agoinput: touch: raydium: Update Raydium direct touch driver.
David Jung [Sat, 15 Sep 2012 02:31:11 +0000]
input: touch: raydium:  Update Raydium direct touch driver.

Update Raydium files to support 5 inch touch
sensor from Wintech.

Also adds 5-inch, 10-inch panel support.

Bug 1030747

Reviewed-on: http://git-master/r/133031
(cherry picked from commit 9033bee975273d0dfcc0d9cc8a8c7b97b2e77069)

Change-Id: I846b9d0faba31072113e030aa7102b34074c2585
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143114
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R84f2852e4a5a704feecd90e9b23195ed3fc19d1a

6 years agoARM: tegra11: clock: Increase clk_out2 maximum rate to 40.8MHz
Alex Frid [Tue, 18 Sep 2012 19:31:39 +0000]
ARM: tegra11: clock: Increase clk_out2 maximum rate to 40.8MHz

Reviewed-on: http://git-master/r/133622
(cherry picked from commit d054d22f3b1e2ea4472f9beb60be2ec8778d79e6)

Change-Id: I780812655965bfa7aeb3978766ae6de681ba6dd5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143113
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R75908b7aef0d91acf9718cbd71ba0f08aac1bdaf

6 years agoARM: tegra: pluto: Enable ext control for modem
Pradeep Goudagunta [Thu, 20 Sep 2012 01:26:47 +0000]
ARM: tegra: pluto: Enable ext control for modem

-Set voltage contrain for modem to 850mV.
-Enalble voltage control for modem.

Reviewed-on: http://git-master/r/133949
(cherry picked from commit acbcc47583d1cb798fd4fe5abe815355ab591b51)

Change-Id: I62354c3ca9fc6a09fee365c8ec888631402a97fd
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143112
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R394316aa9324484c35edea7a5c4a5db7e7a025c9

6 years agoARM: T11x: set timer value for cpu power off
Bo Yan [Wed, 19 Sep 2012 22:26:02 +0000]
ARM: T11x: set timer value for cpu power off

This is needed to shut off VDD_CPU in any power state transition
which will lead to CPU rail-off.

These timer settings are not optimal. PMIC datasheet should be
consulted to come up with optimal settings that meet PMIC
requirement and minimize latency when switching off CPU rail.

For cluster switch, a minimum value '2' is used since '0' or '1'
is not a valid option and system will stay in cluster 1 for
at least 'cpu_off_timer', so there is no need to repeat waiting.

Reviewed-on: http://git-master/r/133903

Change-Id: I825c0039150346650db63003ffbea9e72992caf6
Signed-off-by: Bo Yan <byan@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143111
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R19e5bacc95e2190e818691c9b40eaa3221f8ef89

6 years agoarm: tegra: dalmore: Fix coms regulator name
Mohan T [Wed, 19 Sep 2012 21:26:26 +0000]
arm: tegra: dalmore: Fix coms regulator name

Change comms regulator name in palmas smps

Reviewed-on: http://git-master/r/133887
(cherry picked from commit b04feb1ffe1e78cfe663f161a663b4c34f36e084)

Change-Id: I653910cd4537743df451f27a4a91313163084027
Signed-off-by: Mohan T <mohant@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143110
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R83f87f890b3709c18340b3769bfd291013e16de9

6 years agoasoc: tegra: audio pinmux for CS42L73
Vijay Mali [Wed, 19 Sep 2012 06:22:42 +0000]
asoc: tegra: audio pinmux for CS42L73

Reviewed-on: http://git-master/r/133752

Change-Id: I408a6bd97df95b7f804fbe42c026586758ddfb70
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143109
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rd86e8aec141c985783e324009c1e59ba15fed9d7

6 years agoarm: mm: cpa: Use config option to enable/disable cache flush by set/ways
Krishna Reddy [Tue, 18 Sep 2012 20:49:08 +0000]
arm: mm: cpa: Use config option to enable/disable cache flush by set/ways

Reviewed-on: http://git-master/r/133635
(cherry picked from commit 644a8fcb8be8f6a6a2f882d854974fce40e2c744)

Change-Id: I00d12c1a40a56d300396538080eefc68c6ccca9e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143108
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R9682349a32f3e14152aaf4d50c201608166e2c47

6 years agoasoc: tegra: pinmux, gpio for RT5640
Vijay Mali [Tue, 18 Sep 2012 11:34:14 +0000]
asoc: tegra: pinmux, gpio for RT5640

Reviewed-on: http://git-master/r/133495
(cherry picked from commit 81f4822d421e1cfb027b97920cb3221a47b60595)

Change-Id: Iee61d788f85ba3cadf4f861bcc18cdf7c50c944b
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143107
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rf37465a6c60d077aefd45b340d87b68029c6c32b

6 years agoARM: tegra11: dvfs: Fix CL-DVFS force output calculation
Alex Frid [Wed, 19 Sep 2012 02:04:33 +0000]
ARM: tegra11: dvfs: Fix CL-DVFS force output calculation

Reviewed-on: http://git-master/r/133754
(cherry picked from commit a3c0b2d102170cc77a74fd60583e99f161988ad9)

Change-Id: I561024a90bd45f25fb53e0c2590a877e0a5f789b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143105
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R4518df894648226c7373152cce979a3edd8f19e4

6 years agoARM: tegra11: dvfs: Set a floor for CL_DVFS safe voltage
Alex Frid [Tue, 18 Sep 2012 23:01:03 +0000]
ARM: tegra11: dvfs: Set a floor for CL_DVFS safe voltage

Set non-zer floor for CL_DVFS safe voltage.

Reviewed-on: http://git-master/r/133753
(cherry picked from commit af5ba3026ce0d4a6908e7006cab99f2edcabf920)

Change-Id: Id1c4001d866108b94cee596a8fbf4de5533e15ad
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143104
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R60fb44da1114e43e61f4afff2e5b78fcfe0f6947

6 years agoARM: tegra: configs: Add cpuquiet for tegra11
Peter Boonstoppel [Wed, 19 Sep 2012 06:35:12 +0000]
ARM: tegra: configs: Add cpuquiet for tegra11

Compile cpuquiet for tegra11 builds. Cpuquiet will still be disabled
unless enabled from the per-board init.rc files.

Reviewed-on: http://git-master/r/133760

Change-Id: If7186e042c8489b64415bfe6ff203ff0209121c7
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143103
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rde37c8721a4d7dde9a8fa84d95770a8c50707caf

6 years agoarm: arch: dalmore: Update camera clock and regulator
Frank Chen [Wed, 19 Sep 2012 21:04:35 +0000]
arm: arch: dalmore: Update camera clock and regulator

- Change CAM2_MCLK source to VI_SENSOR_CLK
- Set VI_SENSOR_CLK to 24 MHz
- Fix regulator error

Reviewed-on: http://git-master/r/133886
(cherry picked from commit ec5ed191fce35ebc0a7b46f4365dac7177eaff3b)

Change-Id: Ie98916cceee2c0acb89f9f15102e73edebc2b001
Signed-off-by: Frank Chen <frankc@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143102
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rfffb44234fdedd7b3553d4f5207f91a1e8562be6