5 years agoARM: tegra11: clocks: Propagate shared bus update error
Alex Frid [Sun, 20 Jan 2013 05:36:04 +0000]
ARM: tegra11: clocks: Propagate shared bus update error

Returned shared bus update error to the caller of enable and set
rate/parent operations for Tegra11 platforms.

Change-Id: Ie3ac2af277b54c42d20874dbbfc3d2dd507c200b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/195659
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agomedia: video: tegra: update imx091 set mode print
Wei Chen [Wed, 30 Jan 2013 18:19:35 +0000]
media: video: tegra: update imx091 set mode print

enable imx091 set mode info print to help debugging

bug 1219966

Change-Id: Id06aecc3caf37b162889851deea19d0dade75424
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/195234
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Joshua Widen <jwiden@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra11: clock: Update dual cbus user migration
Alex Frid [Sun, 20 Jan 2013 09:10:20 +0000]
ARM: tegra11: clock: Update dual cbus user migration

Removed dual cbus cross-lock mutex if CONFIG_TEGRA_MIGRATE_CBUS_USERS
option is not selected (no bus dependencies in this case).

In case when migrate option is selected, make sure that bus rate is
set even it has not changed (since user migration happens during rate
change).

Change-Id: Ibfab356cd8ff9729eebce22d06e4ce92f8a81a7c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/194033
(cherry picked from commit cb0b7b585adb56639d852bf68cc8376e120c75eb)
Reviewed-on: http://git-master/r/195660
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: clock: Set shared ceiling users "always On"
Alex Frid [Fri, 18 Jan 2013 04:55:33 +0000]
ARM: tegra11: clock: Set shared ceiling users "always On"

Shared ceiling users apply caps to shared bus rate even if they are
disabled (this way shared bus clock can stay disabled when only cap
is applied). To properly reflect this relationship initialize shared
ceiling users in ON state with refcount 1.

Change-Id: I80ff49b0eea993c16c3918709bf9215f7ba97bd7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/192627
(cherry picked from commit 15f5946258c0b9048a219709fd9f6a74258a16c9)
Reviewed-on: http://git-master/r/195658
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Move common core voltage capping code
Alex Frid [Thu, 24 Jan 2013 01:25:11 +0000]
ARM: tegra: dvfs: Move common core voltage capping code

Moved common for Tegra3 and Tegra11 core voltage capping code to
a separate file.

Change-Id: I69c365abdaba80dae64d07c3c3c1c9f8d42cff19
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/193602
(cherry picked from commit 767b28be1063c7057c71bbe999dc9dbc45651462)
Reviewed-on: http://git-master/r/195654
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: use mW values for battery EDP states
Sivaram Nair [Wed, 30 Jan 2013 09:21:12 +0000]
ARM: tegra11: use mW values for battery EDP states

tegra11 board data is changed to specify E-state values in mW.

Change-Id: I6277112a8db5d198f614e4203604699f5b385f0c
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/195482
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomedia: tegra: imx091: use mW E-states
Sivaram Nair [Wed, 30 Jan 2013 09:16:26 +0000]
media: tegra: imx091: use mW E-states

The camera driver's E-states are changes to use mW values instead of mA.

Change-Id: Ib5929cf45404fdf0c5fb332027fa909f5a6efc48
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/195481
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agopower: max17042: use mW E-states for depletion
Sivaram Nair [Wed, 30 Jan 2013 09:11:20 +0000]
power: max17042: use mW E-states for depletion

The battery depletion client is changed to specify its E-states in mW
instead of mA.

Change-Id: I266e2e9179449134a81dec0a80698826fc208e37
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/195480
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra11: use mW values for battery EDP
Sivaram Nair [Wed, 30 Jan 2013 09:01:28 +0000]
ARM: tegra11: use mW values for battery EDP

The battery EDP manager for tegra11 boards needs to start using mW
values instead of mA.

Change-Id: I378b79d0b1e12251526ca8c3acf1105765c8f86b
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/195479
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoEDP: renaming imax to max
Sivaram Nair [Wed, 30 Jan 2013 08:50:57 +0000]
EDP: renaming imax to max

The edp_manager structure's imax member is renamed to max so that it is
not tied to any specific units.

Change-Id: I01f538ec17d3f04d8ad3e7e904e2ba8b4cc0c339
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/195478
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: color correct 5" Sharp 1080p panel
Mitch Luban [Thu, 31 Jan 2013 02:39:27 +0000]
arm: tegra: color correct 5" Sharp 1080p panel

Enable color management for 5" Sharp 1080p panel.

Bug 1220543

Reviewed-on: http://git-master/r/195800
(cherry picked from commit a775c3639c1467598d0e7d4f2b0c37b091583911)

Change-Id: Iab79f1bb0a80b6cd3c5ad18e8cf39765af2bf807
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/196237
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: xhci: tegra: don't disable wakeup event for unused ports
Ajay Gupta [Thu, 31 Jan 2013 03:26:06 +0000]
usb: xhci: tegra: don't disable wakeup event for unused ports

We had seen ELPG loop issue if wakeup event for unused ports are not
disabled. This seems to be due to some programming in USB2 driver which
has been fixed now so there is no need to disable wakeup event for unused
ports.

BUG 1177456

Change-Id: I6bce86cffed826ae5ea294da44334d8afdf7fd0e

Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Change-Id: If9262395bd23a7870a030b11e9253885e40983a3
Reviewed-on: http://git-master/r/196129
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: Henry Lin <henryl@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: board changes due to thermal_trip_info in soctherm
Diwakar Tundlam [Thu, 17 Jan 2013 21:20:56 +0000]
arm: tegra: board changes due to thermal_trip_info in soctherm

Bug 1200075

Change-Id: I7d9b6697e2aa2b13d70edfe8f6fe85d984ffd779
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/192163
(cherry picked from commit bfd5a49db4641cf3d19506f7fb928061385ace94)
Reviewed-on: http://git-master/r/195883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

5 years agothermal: soctherm: use thermal_trip_info struct in soctherm driver
Diwakar Tundlam [Fri, 11 Jan 2013 19:16:10 +0000]
thermal: soctherm: use thermal_trip_info struct in soctherm driver

Bug 1200075

Change-Id: I8921168dbeaacda2f5783954f4f41d319974df81
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/190710
(cherry picked from commit 97df580777f5d7d39f6b84ca08cf64927907da98)
Reviewed-on: http://git-master/r/195882
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

5 years agoARM: tegra: pismo: Fix wrong Tj throttle table pointer
Jinyoung Park [Thu, 31 Jan 2013 06:40:27 +0000]
ARM: tegra: pismo: Fix wrong Tj throttle table pointer

Fixed wrong Tj throttle table pointer.

Change-Id: I95bf45b6e8887f3af5f5c0970a0d5660fbffe70f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/195855
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agomach-tegra: tegra[3,11]: bluesleep as built-in or module
Mursalin Akon [Thu, 24 Jan 2013 22:19:22 +0000]
mach-tegra: tegra[3,11]: bluesleep as built-in or module

allow bluesleep as built-in or module

Bug 1219372

Same CL (minus rebase) was
reviewed-on: http://git-master/r/193946

Change-Id: I2815783c38291c5493e0448cd1a0f9e3bc0daf2d
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/195161
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agoconfig: t114: enable auto load of bcmdhd
Mursalin Akon [Tue, 22 Jan 2013 23:39:56 +0000]
config: t114: enable auto load of bcmdhd

enable auto load of bcmdhd on dalmore

Bug 1222525

Same CL (minus rebase) was
reviewed-on: http://git-master/r/193180

Change-Id: I49639754d712bc5a733694a55172e90c2cad5b80
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/195160
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agoinput: misc: cm3218: add shutdown functionality
Sri Krishna chowdary [Mon, 28 Jan 2013 13:17:16 +0000]
input: misc: cm3218: add shutdown functionality

Bug 1203781

Change-Id: Icd30c5f5772e61043e8e5276c8c53667793611e9
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/194669
(cherry picked from commit f2f0722ea7dd9074b84121716e6f4029ea3cf38c)
Reviewed-on: http://git-master/r/195914
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: Fix Uni-Processor build
Bo Yan [Wed, 30 Jan 2013 20:20:38 +0000]
ARM: tegra: Fix Uni-Processor build

1. Remove unused functions in a Uni-Processor build
2. declare cpu leakage parameters for all 4 CPUs, even if CONFIG_SMP
   is not set

Change-Id: I52baae638051aff732038ae112d9d66f74a849c5
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/195647
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Edgardo Handal <ehandal@nvidia.com>

5 years agoARM: tegra: pluto: Fix for delay in display on wakeup from LP0
Vineel Kumar Reddy Kovvuri [Wed, 30 Jan 2013 11:56:37 +0000]
ARM: tegra: pluto: Fix for delay in display on wakeup from LP0

Fix for delay in display to turn on while waking up from LP0

Bug 1159770

Change-Id: Icb23e5a8fb7da5a41d7ac6764d58c05cf2a5a57c
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/195548
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agochardev: Access control framework for Tegra gmi bus.
Ashutosh Patel [Wed, 30 Jan 2013 06:38:13 +0000]
chardev: Access control framework for Tegra gmi bus.

-provide exclusive access to gmi bus.
-provide priority based access.
-support Asynchronous & synchronous requests.

bug 1047323

Change-Id: I0a630a9120e5a2abd3b0ff6b1e3250005b1136e1
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/189918
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: xhci: tegra: enable regulator first before clock
Ajay Gupta [Tue, 29 Jan 2013 19:23:06 +0000]
usb: xhci: tegra: enable regulator first before clock

This fixes below errro message seen during xusb initialization

"Lock bit on pll pll_e always timeouts "

BUG 1199726

Change-Id: I26e3d70784a9109d63ff70e1b43ebfb35145e9d0
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/195636
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

5 years agoARM: tegra11x: Raise clock rate for C1NC power gating
Bo Yan [Tue, 15 Jan 2013 22:06:27 +0000]
ARM: tegra11x: Raise clock rate for C1NC power gating

The C1NC power gating has long latency when slow cpu runs at very
low clock rate. Raising it to 204MHz can reduce this latency
significantly. The CPU clock is reverted back to its original value
once slow CPU wakes up.

bug 1177454

Change-Id: Idc6122f0a2ba8ad35c963942c60e9cf4a4f0b0c2
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/193501
(cherry picked from commit a71665bb3ddb437536cec00be91e9b201414fc93)
Reviewed-on: http://git-master/r/191455
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>

5 years agoARM: tegra14: clock: Add new clocks
Kaz Fukuoka [Tue, 29 Jan 2013 23:00:49 +0000]
ARM: tegra14: clock: Add new clocks

bug 1213494

Change-Id: I4cdce92a064897d69a8fc715dd3687c0aa6663a0
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/195268
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: clean up definition of sd_brightness
Mitch Luban [Thu, 24 Jan 2013 21:08:53 +0000]
arm: tegra: clean up definition of sd_brightness

In the past each platform declares sd_brightness differently. With this
we initialize sd_brightness in board-panel.c.

Change-Id: I14d7d7d2679644d2a502ebd64de7c232e7ea9d37
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/193932
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: baseband: fix crash when queueing EDP work
Neil Patel [Fri, 25 Jan 2013 22:36:44 +0000]
ARM: tegra: baseband: fix crash when queueing EDP work

Add a check for EDP initialization in the driver before queueing EDP
work on the modem workqueue. Otherwise a BUG() will occur in cases
where the EDP client is not enabled.

Bug 1224860

Change-Id: Ibacb19abfe955244da4a833f39bd0adf13e4f04c
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/194268
(cherry picked from commit d66e95baf6b0eaf94c635992b1ba93d4184cc08b)
Reviewed-on: http://git-master/r/195164
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoARM: tegra: pluto: enable power off on suspend for baseband
Yunfan Zhang [Wed, 23 Jan 2013 03:43:01 +0000]
ARM: tegra: pluto: enable power off on suspend for baseband

Enable hsic phy power off on suspend for ehci2 and ehci3

Bug 1222167

Change-Id: I23f2e004e68822e9e7d6292eee6d632fdb84d81c
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-on: http://git-master/r/193259
(cherry picked from commit 7d5c64de8ec2b65a68f78cea49c3365a37f1d929)
Reviewed-on: http://git-master/r/195037
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoARM: tegra: clock: Add common EMC interface header
Alex Frid [Sat, 19 Jan 2013 05:09:09 +0000]
ARM: tegra: clock: Add common EMC interface header

Change-Id: I78538ad9a0061ba09bad5fb122ff672c93caef88
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/192625
(cherry picked from commit 558a32fde1dce6f34d379da0f33477b5992c1963)
Reviewed-on: http://git-master/r/194928
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: use irq name XUSB instead of USB3
Ajay Gupta [Tue, 29 Jan 2013 01:16:51 +0000]
ARM: tegra: use irq name XUSB instead of USB3

This is to avoid confusion between EHCI and XUSB as
USB3 implies ehci host controller #3

BUG 1057074

Change-Id: I6fd6dbdf8bc41e7892cad719e3d9f02d193a70e5
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/194904
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Bharath Yadav <byadav@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

5 years agoARM: tegra14: clock: Add clk_m divider
Kaz Fukuoka [Sun, 27 Jan 2013 01:06:19 +0000]
ARM: tegra14: clock: Add clk_m divider

bug 1213494

Change-Id: Ibea082f2f52afe04e4f5d077afc6ce1e38220908
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/194426
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: enable config PM_GENERIC_DOMAINS
Mayuresh Kulkarni [Wed, 23 Jan 2013 14:12:58 +0000]
ARM: tegra: enable config PM_GENERIC_DOMAINS

- enable config PM_GENERIC_DOMAINS if config PM
is enabled
- this is needed to enable power domain framework
of linux kernel pm core
- enable this for tegra2/3/11x/14x

for bug 887332

Change-Id: Idf19b0d1cd2190b32133c30d5248a6173a888c0d
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/193417
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: clock: Add BBC clocks
Kaz Fukuoka [Sat, 26 Jan 2013 03:39:59 +0000]
ARM: tegra14: clock: Add BBC clocks

bug 1213494

Change-Id: I1b16517bf345b6719a5f8810fc553f0892dea882
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/194355
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

5 years agoinput: misc: mpu: Add I2C shutdown support
Erik Lilliebjerg [Wed, 16 Jan 2013 10:08:36 +0000]
input: misc: mpu: Add I2C shutdown support

Bug 1202588

Change-Id: I60f3b4e7f3bd4fdf76ad78e29596155edcf65b2f
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/191640
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra11: dvfs: Add CL-DVFS shutdown callback
Alex Frid [Wed, 16 Jan 2013 07:19:13 +0000]
ARM: tegra11: dvfs: Add CL-DVFS shutdown callback

Change-Id: I883b32d7924d9d9b47f76c08b20da66add327dd2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/191913
(cherry picked from commit 965dbfab96b842f50574c8ec092207b465ca0401)
Reviewed-on: http://git-master/r/194436
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra11: dvfs: Add CL-DVFS pm callbacks
Alex Frid [Wed, 16 Jan 2013 03:26:25 +0000]
ARM: tegra11: dvfs: Add CL-DVFS pm callbacks

Moved CL-DVFS closed loop suspend/resume operations from syscore
callbacks to CL-DVFS device power management callbacks.

Change-Id: I6cd175c18037504e2539a51b02b5e89a26313a35
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/191912
(cherry picked from commit 37d1df541838c65677d0ae4eb529de9160336a7f)
Reviewed-on: http://git-master/r/194435
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra: power: Use PLL lock on exit from LP1
Alex Frid [Tue, 15 Jan 2013 04:54:40 +0000]
ARM: tegra: power: Use PLL lock on exit from LP1

Made common clock configuration macros visible for assembler. This
effectively enabled usage of PLL lock indicators when exiting from
LP1 state on Tegra30 and Tegra11 platforms.

Change-Id: If6b94145c9480233cd21f60037ff04722009a4ef
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/191109
(cherry picked from commit 49bbb5db1df6df1dba9cb51a5b62c5c5cf0e1ccc)
Reviewed-on: http://git-master/r/194434
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra11x: use CNTVCT for persistent clock
Bo Yan [Sat, 19 Jan 2013 02:24:12 +0000]
ARM: tegra11x: use CNTVCT for persistent clock

For systems with arch timer, TSC is always running, even during LP0.
virtual counter as source of persistent clock is more accurate. TSC is
guaranteed to be monotonically increasing. The side benefit is to
avoid the locking requirement which seems necessary for Tegra RTC.

Change-Id: I38afc6076d1b8ca90bb9a2bfe3b0cccbfc029cd3
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/192590
(cherry picked from commit 57bd0cc773de467fc0cd8b01ea9f0c5e61e31d1a)
Reviewed-on: http://git-master/r/194363
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

5 years agoARM: tegra114: dalmore: register i2c through DTS file
Laxman Dewangan [Thu, 24 Jan 2013 09:33:53 +0000]
ARM: tegra114: dalmore: register i2c through DTS file

Register all i2c controller through DTS file if CONFIG_OF is
defined.

Change-Id: Ica61fb494ab1ff180892e821e368ef4482dca237
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/193718
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra114: DTS: add dt entry for all i2c controller
Laxman Dewangan [Thu, 24 Jan 2013 09:29:50 +0000]
ARM: tegra114: DTS: add dt entry for all i2c controller

Change-Id: Iee9378b855e4d70bac87de85bf2139d29ddc4c25
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/193717
Reviewed-by: Automatic_Commit_Validation_User

5 years agoaudio: Add Support for OTC.
Vinod Subbarayalu [Thu, 10 Jan 2013 17:25:20 +0000]
audio: Add Support for OTC.

Change-Id: Ib07e3f24a7a697cf3c9efd2c81581c03b1404753
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
(cherry picked from commit b77327d09fc13ed08020ac3cdd8fb13234e00565)
Reviewed-on: http://git-master/r/193492
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra: configs: Enable bcm4335 driver as module
Nagarjuna Kristam [Tue, 15 Jan 2013 09:56:59 +0000]
ARM: tegra: configs: Enable bcm4335 driver as module

Bug 1216788

Change-Id: I9ac944201b94210c25fa125f60ae6110996f332e
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/193397
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agonet: wireless: bcm4335: fix Kconfig and Makefile
Nagarjuna Kristam [Tue, 15 Jan 2013 09:51:36 +0000]
net: wireless: bcm4335: fix Kconfig and Makefile

Fix Kconfig and Makefile to build bcm4335 independently

Bug 1216788

Change-Id: Id52ac1bb2615075b30672536ac01e1d8d347c112
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/193396
GVS: Gerrit_Virtual_Submit
Reviewed-by: Om Prakash Singh <omp@nvidia.com>
Tested-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agonet: wireless: add bcm4335 driver
Nagarjuna Kristam [Tue, 15 Jan 2013 09:45:17 +0000]
net: wireless: add bcm4335 driver

Bug 1216788

Change-Id: Ie1eff46ecd31e65c14aebba69d1bfc2a3ae4cad1
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/193395
GVS: Gerrit_Virtual_Submit
Reviewed-by: Om Prakash Singh <omp@nvidia.com>
Tested-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoarm: tegra: LP0 support for nvshm operation
Martin Chabot [Thu, 8 Nov 2012 15:33:45 +0000]
arm: tegra: LP0 support for nvshm operation

Bug 1052795

Signed-off-by: Martin Chabot <mchabot@nvidia.com>
Change-Id: I4aea1fec5d081209de04e6d74a3c66a1f12554a3
Reviewed-on: http://git-master/r/193063
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agodrivers: staging: nvshm: fix L2 cache issue
Martin Chabot [Tue, 22 Jan 2013 10:20:07 +0000]
drivers: staging: nvshm: fix L2 cache issue

Added dsb() after outer_cache_inv to avoid race condition
Added debug traces (disabled by default)
Only invalidate lower 32B of iobuf on queue dummy element
or it will trash previous iobuf_free operation (leak)

Bug 1217066
Bug 1222277

Change-Id: I17cb28e3374a304aed2508dbb31bfddf33fe403a
Signed-off-by: Martin Chabot <mchabot@nvidia.com>
Reviewed-on: http://git-master/r/193032
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agomedia: video: nvavp: use caller's client id for command buffer ops
Mayuresh Kulkarni [Thu, 24 Jan 2013 08:54:56 +0000]
media: video: nvavp: use caller's client id for command buffer ops

- currently the command buffer is duplicated into nvavp's
nvmap client and then all the operations are done on it
- since the nvavp's nvmap client doesn't have the command
buffer's id, it is new to it and pin/unpin is done again
- instead use client's nvmap client to all the nvmap ops
this will cause pin to fast if client has already done
the pinning before submiting the command buffer

bug 1196851

Change-Id: I12ce77f6c7127f44d7de179ff5604b57f9c04242
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/193707
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoASoC: Tegra: Add new tx and rx ports
Ravindra Lokhande [Wed, 23 Jan 2013 09:50:56 +0000]
ASoC: Tegra: Add new tx and rx ports

Change-Id: I60922b11ec5c0e88cbf0cff901571fed172f0403
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/193352
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra11: clock: Add direct access to CPU backup source
Alex Frid [Fri, 18 Jan 2013 20:31:22 +0000]
ARM: tegra11: clock: Add direct access to CPU backup source

Added CPU backup source access API for CPU idle driver to directly
manipulate rate underneath cpufreq governor.

Change-Id: I837e591148c5ea82e036c6b236c115690313d2c2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/192490
Reviewed-on: http://git-master/r/194440
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra11: dvfs: Add rail nominal voltage read interface
Alex Frid [Sat, 19 Jan 2013 03:29:09 +0000]
ARM: tegra11: dvfs: Add rail nominal voltage read interface

Change-Id: I76d8cebe5b70c70acf95e3feffd2c89a2ce11a05
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/192604
(cherry picked from commit e0427370da2ecea7822e08768ab28465c59d9ad1)
Reviewed-on: http://git-master/r/194439
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra11: power: Enable core EDP support on Tegra11
Alex Frid [Fri, 18 Jan 2013 00:11:17 +0000]
ARM: tegra11: power: Enable core EDP support on Tegra11

Bug 1200217

Change-Id: I367ac46d21fdeb66dfe5dcb985372d18dfad84f0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/192287
Reviewed-on: http://git-master/r/194438
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra11: power: Update core EDP 6A limit table
Alex Frid [Thu, 17 Jan 2013 07:30:35 +0000]
ARM: tegra11: power: Update core EDP 6A limit table

Bug 1200217

Change-Id: I2a6fbcbcaa2a018be27587019a595c0dc7544059
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/192286
(cherry picked from commit 29848156c34aaaf07ed1e28e81dca044a34b2a1e)
Reviewed-on: http://git-master/r/194437
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agomisc: tegra-baseband: fix Coverity forward null issue
Deepak Nibade [Fri, 25 Jan 2013 10:58:48 +0000]
misc: tegra-baseband: fix Coverity forward null issue

Coverity id : 22154

Bug 1046331

Change-Id: I45b051b26c270f000ab3fc5ca939615725550ca6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/194133
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra14: dvfs: Updated with latest tegra11_dvfs
Seshendra Gadagottu [Mon, 21 Jan 2013 22:46:03 +0000]
ARM: tegra14: dvfs: Updated with latest tegra11_dvfs

Disabled Thermal dvfs for bring-up.

Change-Id: Ia5798f67670f01b2cec55b96af78cb67867cd1db
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/192909
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: Add Tegra114 host1x support
Mayuresh Kulkarni [Thu, 13 Dec 2012 10:39:26 +0000]
ARM: tegra: Add Tegra114 host1x support

bug 1041377

Change-Id: I2d8e377b4286c2ccb32edffb9125afcfc361a14a
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/170946
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: host: add DT support
Mayuresh Kulkarni [Thu, 3 Jan 2013 15:14:03 +0000]
video: tegra: host: add DT support

- this commit adds the infrastructure to parse and
allocate device from DT
- it also adds support to parse and add resources from DT
into the newly allocated device
- it also matches the device and drivers using .compatible
property
- of_platform_populate() assigns platform_bus as host1x parent, so
condition in nvhost_get_parent() was modified

bug 1041377

Change-Id: Iba99e27cdd67150b7a3853b8a75149fccea9f9ab
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/145937
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: Fix build break
Kaz Fukuoka [Fri, 25 Jan 2013 00:46:42 +0000]
ARM: tegra14: Fix build break

Change-Id: I29fab3b08a059089976abdf6d8036ad4d6b959b4
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/193981
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: Enable DUAL_CBUS and HAS_CL_DVFS
Kaz Fukuoka [Wed, 23 Jan 2013 03:29:56 +0000]
ARM: tegra14: Enable DUAL_CBUS and HAS_CL_DVFS

Enabled the following CONFIG options.
- CONFIG_TEGRA_DUAL_CBUS
- CONFIG_ARCH_TEGRA_HAS_CL_DVFS

DFLL and DVFS are disabled as follows.
- CONFIG_TEGRA_USE_DFLL_RANGE=0
- CONFIG_TEGRA_CORE_DVFS (not defined)
- CONFIG_TEGRA_CPU_DVFS (not defined)

bug 1213494

Change-Id: Ibe058c2caffdd35f7f9e49d53089186be3a43170
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/193254
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: Add support for Audio and BBC1 test
Ravindra Lokhande [Sat, 24 Nov 2012 16:36:34 +0000]
ARM: tegra: Add support for Audio and  BBC1 test

Change-Id: Ie51377735968e289a7d210cc4480d91ec1be223c
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/190244
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra11x: timer save/restore is removed
Bo Yan [Wed, 23 Jan 2013 02:36:33 +0000]
ARM: tegra11x: timer save/restore is removed

The current timer save and restore is unnecessary because it's done
by broadcast mode entry/exit. The clock event using arch timer does
not support the feature "CLOCK_EVT_MODE_PERIODIC", so there is
nothing comparable to tegra30 in which the periodic load has to be
preserved.

Change-Id: Ia1f91be4f7d1f6e827c95ce013502c77a3c389b0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/193239
(cherry picked from commit de701176ec031f68f3f2c6ecab294745d46c1099)
Reviewed-on: http://git-master/r/193979
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

5 years agoARM: Tegra: Dalmore: Update emc table: T40X
Peter Zu [Sat, 19 Jan 2013 06:36:47 +0000]
ARM: Tegra: Dalmore: Update emc table: T40X

T40X shares the same emc dvfs table as T40T

Change-Id: Ifee2e4b0f93d1e286713e6fb0033ae1564dcec09
Signed-off-by: Peter Zu <pzu@nvidia.com>
Reviewed-on: http://git-master/r/192622
(cherry picked from commit cd0829b4f2894212c40043df830fe05f2d230891)
Reviewed-on: http://git-master/r/193760
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Tested-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: Tegra: Dalmore: Update emc table: T40S
Graziano Misuraca [Mon, 14 Jan 2013 21:19:35 +0000]
ARM: Tegra: Dalmore: Update emc table: T40S

Add emc dvfs table for 792/408/312/204/102/
40.8/20.4/12.75 MHz support on T40S chips

Change-Id: I5a77cce084b76f049fb2a728cb57f13a756d945b
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/191002
(cherry picked from commit a964502287cb2bdb0f86864865b8848d289f7dcb)
Reviewed-on: http://git-master/r/193759
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Tested-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: Tegra: Dalmore: Update emc dvfs table
Graziano Misuraca [Tue, 8 Jan 2013 21:36:43 +0000]
ARM: Tegra: Dalmore: Update emc dvfs table

Add emc dvfs table for 924/792/624/408/
312/204/102/68/40.8/20.4/12.75 MHz support
on T40T chips

Change-Id: I3c463264589345a21506feb7bd63e2ad41972968
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/190721
(cherry picked from commit 20992e95f04f2d619509cc437133a46b5a11ca7d)
Reviewed-on: http://git-master/r/193758
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Tested-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoHID: hid-sony: Silence a GCC mixed declarations and code warning
Sami Liedes [Thu, 24 Jan 2013 15:06:15 +0000]
HID: hid-sony: Silence a GCC mixed declarations and code warning

Swap the order of the declaration of led_data and the call to
hid_info() in sixaxis_set_led_bt() to silence a GCC warning.

Change-Id: I62964e6eb530b86d7cae1b80958285803115a460
Signed-off-by: Sami Liedes <sliedes@nvidia.com>
Reviewed-on: http://git-master/r/193824
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agogpio: max77663: Check gpiochip_remove() return value.
Sami Liedes [Thu, 24 Jan 2013 14:43:23 +0000]
gpio: max77663: Check gpiochip_remove() return value.

gpiochip_remove() return value is not checked in max77663_gpio_probe()
failure path. However gpiochip_remove() is tagged __must_check, hence
this causes a warning.

Add a check that calls dev_err() on failure.

Change-Id: Ice9af31832c34d4dd4b333f41f13f1417f873f0c
Signed-off-by: Sami Liedes <sliedes@nvidia.com>
Reviewed-on: http://git-master/r/193821
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoinput: touch: atmel: Update Ftrace logging.
Vikas Jain [Fri, 18 Jan 2013 06:37:23 +0000]
input: touch: atmel: Update Ftrace logging.

Renamed touchscreen ftrace event to reflect
hardware module it is tracing. With this change,
each touchscreen hardware will have seperate
ftrace events.

Bug 1170830.

Change-Id: I45ffb3a264d958c9732d89bd2b5d4d62a9640267
Signed-off-by: Vikas Jain <vjain@nvidia.com>
Reviewed-on: http://git-master/r/192314
(cherry picked from commit 1293fbcebba2a07f378f6747678864a5ffba017f)
Reviewed-on: http://git-master/r/193664
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: board changes due to thermal_trip_info use in driver
Diwakar Tundlam [Thu, 17 Jan 2013 19:54:37 +0000]
arm: tegra: board changes due to thermal_trip_info use in driver

Bug 1200075

Change-Id: I5feae9296aae7a88585bbfc4a49478bb33602b40
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/192129
(cherry picked from commit 367624c5cebba25671ff8ac2870aa9162ccffac4)
Reviewed-on: http://git-master/r/193897
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: edp changes due to thermal_trip_info use in driver
Diwakar Tundlam [Thu, 17 Jan 2013 19:44:26 +0000]
arm: tegra: edp changes due to thermal_trip_info use in driver

Bug 1200075

Change-Id: I96b01b1caa468c0d376e79b416aeb329e1cb0390
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/190820
(cherry picked from commit bedff5775d6dab5870a777a1b5a1abfc9e23b033)
Reviewed-on: http://git-master/r/193896
Reviewed-by: Automatic_Commit_Validation_User

5 years agomisc: nct1008: use common thermal_trip_info in nct driver
Diwakar Tundlam [Fri, 11 Jan 2013 07:41:38 +0000]
misc: nct1008: use common thermal_trip_info in nct driver

Bug 1200075

Change-Id: I82e5a7ea8dc1e033ebf7d37ab17b39a4217b55e9
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/190574
(cherry picked from commit bf8d7e0d8805ca5a1db1dcd4f396279963d3b235)
Reviewed-on: http://git-master/r/193895
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: imx091: lower max VI clock to 204MHz
Frank Chen [Thu, 17 Jan 2013 00:20:42 +0000]
video: tegra: imx091: lower max VI clock to 204MHz

Lower the max VI clock for imx091 from 250MHz
to 204MHz. This is to match what is currently
specified in the sensor mode table. This is done
by lowering the clock multiplier from 10.41667
to 8.5(24MHz * 8.5 = 204MHz).

On some older T114 platforms, we are not able to
set VI clock to 250MHz due to the slower memory
clock. This will end up slowing our VI_SENSOR
clock and make frame rate lower.

Bug 1207018

Change-Id: Ia8b582c740d57409b28e6aa696c29b85e23dceba
Reviewed-on: http://git-master/r/191825
(cherry picked from commit 7a547b1044ec57bbb5590651a4373ca8cfee7886)

Signed-off-by: Frank Chen <frankc@nvidia.com>
Change-Id: Id566450b6371d06c1ecd22a8824f4ef73bd10b1d
Reviewed-on: http://git-master/r/193496
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra11: clock: Remove Tegra14 lines
Kaz Fukuoka [Wed, 23 Jan 2013 00:10:17 +0000]
ARM: tegra11: clock: Remove Tegra14 lines

Tegra14 is not sharing tegra11_clocks.c any more.

bug 1213494

Change-Id: I2808783817824fe335e76e57603dd9b2d11b561d
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/193198
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: clock: Change PLLC2/C3 sequence
Kaz Fukuoka [Mon, 21 Jan 2013 23:23:24 +0000]
ARM: tegra14: clock: Change PLLC2/C3 sequence

On Tegra14, PLLC2 and PLLC3 sequence is changed from Tegra11
interms of ENABLE and IDDQ.

bug 1217350
bug 1213494
bug 972379
bug 1213494

Change-Id: Ic523e6b3703bbce1aa2b4da46ad59b2344be010b
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/192910
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: clock: WARN_ON for PLLX_MISC3_IDDQ
Kaz Fukuoka [Sat, 19 Jan 2013 03:48:31 +0000]
ARM: tegra14: clock: WARN_ON for PLLX_MISC3_IDDQ

Due to bug 1206550, bootloader doesn't handle
PLLX_MISC3_IDDQ at this point. Because this case is
not serious on FPGA, we treat it as warning for now.
Once bug 1206550 is fixed, this should be changed
to BUG_ON.

bug 1213494
bug 1206550

Change-Id: I2219b5e5cdd9a526be32b4ef0eb80e51cf40c56d
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/192603
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: clock: Fix mux inputs
Kaz Fukuoka [Sat, 19 Jan 2013 02:57:12 +0000]
ARM: tegra14: clock: Fix mux inputs

Change mux inputs to match with the latest Tegra14 spec.

bug 1213494

Change-Id: I75b338a9f831e6ca168233eeceaf7a42e3fd1046
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/192597
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: clock: Remove non-existent blocks
Kaz Fukuoka [Fri, 18 Jan 2013 00:14:19 +0000]
ARM: tegra14: clock: Remove non-existent blocks

Removed the following blocks.
- PLLE, XUSB, PLLREFE
- PCIE, PCIEX, AFI

bug 1213494

Change-Id: I2347e567dca1bcc092bf9286eb99b34ce54d6e5c
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/192212
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agowatchdog: max77660: Add support for system watchdog timer
Laxman Dewangan [Sun, 20 Jan 2013 04:39:22 +0000]
watchdog: max77660: Add support for system watchdog timer

Add watchdog timer driver for MAX77660 system watch dog timer.

Change-Id: I2470f90f924d648d12d8303be6524dd5a2401521
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/192674
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomfd: max77660: add system watchdog timer as mfd sub devices
Laxman Dewangan [Sun, 20 Jan 2013 03:30:44 +0000]
mfd: max77660: add system watchdog timer as mfd sub devices

Add the system watchdog timer driver as mfd sub device of the max77660.

Change-Id: Ib9ddfbf6a81c1abcc0188e8b83c66bbfd20aa178
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/192673
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomfd: max77660: simplify the regmap and i2c client initialisation
Laxman Dewangan [Sun, 20 Jan 2013 03:18:10 +0000]
mfd: max77660: simplify the regmap and i2c client initialisation

Use the loop for initialising the regmap and i2c client for different i2c slave
addresses of the max77660.

Change-Id: I37fdad3f220dbd6152a5f0c56a7740a385e4dd13
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/192671
Reviewed-by: Automatic_Commit_Validation_User

5 years agostaging:nvshm: BB logging channel handled as a tty channel
Alexandre Berdery [Wed, 16 Jan 2013 09:08:11 +0000]
staging:nvshm: BB logging channel handled as a tty channel

Bug 1219150

Change-Id: If322f287f1d56a88bfbd6063deaa145ad2ba308e
Signed-off-by: Alexandre Berdery <aberdery@nvidia.com>
Reviewed-on: http://git-master/r/191618
Reviewed-by: Greg Heinrich <gheinrich@nvidia.com>
Reviewed-by: Martin Chabot <mchabot@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra: dalmore: cleanup key support for 1000 and 1001 SKU
Laxman Dewangan [Thu, 24 Jan 2013 08:31:01 +0000]
ARM: tegra: dalmore: cleanup key support for 1000 and 1001 SKU

The 1001 SKU keys are supported with GPIO keys and KBC keys. Looking
at schematics, we do not need to have Tegra KBC based mapping for 1001
SKU. GPIO keys will suffice the requirements.

Clean-up the key registration and add all keys of 1001 SKU as gpio keys

bug 1222030

Change-Id: I83abacd75c38a3c34571eb54687e85cdeb6e7176
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/193693
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>

5 years agoARM: tegra30: Remove arch timer code from cpuidle
Bo Yan [Tue, 22 Jan 2013 23:35:18 +0000]
ARM: tegra30: Remove arch timer code from cpuidle

The cpuidle code for tegra30 now doesn't contain anything specific
to tegra chips with arch timer. tegra30 doesn't have arch timer.

The CONFIG_HAVE_ARM_TWD references are also removed since it is
always defined for tegra30.

Change-Id: If2d977104b4c179d4aa3b5672f808db7a5467e6f
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/193179
(cherry picked from commit 2c635b5e7720d9edf9867657eb3db5b998d64b8a)
Reviewed-on: http://git-master/r/193508
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

5 years agoARM: tegra11: clock: set IDDQOVERIDE for UTMIPLL
Rakesh Bodla [Tue, 15 Jan 2013 08:17:58 +0000]
ARM: tegra11: clock: set IDDQOVERIDE for UTMIPLL

Setting IDDQ_OVERRIDE for UTMIPLL by default,
otherwise power is consumed on UTMIPLL rail if no
usb device is active. Power is also seen
high once resume from LP0 if it is not set.

Bug 1174123
Bug 1215521

Reviewed-on: http://git-master/r/191177
(cherry picked from commit a0a0ceeeec6a6dbf329e9bd5dcb28b13a9a3b229)

Change-Id: Idb76aa8c5f3f8c722800ef5e1a2493fbc1160cf7
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/193068
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agortc: max77660: Fix usage of max77660 read APIs
Chaitanya Bandi [Sat, 19 Jan 2013 12:04:18 +0000]
rtc: max77660: Fix usage of max77660 read APIs

Bug 1216995

Change-Id: I9052fbd3dab1ac8199854b3fdd2d5471c5061ea1
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/192637
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra_fuse: Add chip revision A02 for T114
Hoang Pham [Sat, 19 Jan 2013 02:31:42 +0000]
ARM: tegra_fuse: Add chip revision A02 for T114

Also correct minor number for T148 A01

Change-Id: If182dc6c7d6c8c6a8407af0b22b9a941184deff7
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/192594
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra14: clock: PLLP fixed rate is 408MHz
Kaz Fukuoka [Sat, 19 Jan 2013 01:05:28 +0000]
ARM: tegra14: clock: PLLP fixed rate is 408MHz

PLLP fixed rate is changed from 216MHz to 408MHz on Tegra14.
HW automatically sets PLLP to this rate.
SW doensn't have to, and does not override this setup.

bug 1213494

Change-Id: I4abdc1e912e38f1370efa1eefc25d690a3b8d4a8
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/192574
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: roth: add leds-pwm
Hao Tang [Sat, 15 Dec 2012 23:35:07 +0000]
ARM: roth: add leds-pwm

Add leds-pwm on roth platform for notification feature

Bug 1198937

Change-Id: I859befd3ef4a8178668d84f2a539fcc25b776e8f
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/171671
(cherry picked from commit 203bd3192ad68d12674343b175230d8a41bdc890)
Reviewed-on: http://git-master/r/191875
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: config: enable leds-pwm and trigger
Hao Tang [Thu, 17 Jan 2013 03:26:29 +0000]
ARM: config: enable leds-pwm and trigger

Bug 1198937

Change-Id: I772a3c6cc6fee23a8d6b9a899e0379b72a2593d8
Signed-off-by: Hao Tang <htang@nvidia.com>
Reviewed-on: http://git-master/r/171672
(cherry picked from commit 1412345f6a19b345c218d2c2aba4e78dba1ddaae)
Reviewed-on: http://git-master/r/191874
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomedia: video: tegra: refactor debugfs support
Wei Chen [Wed, 23 Jan 2013 00:21:35 +0000]
media: video: tegra: refactor debugfs support

refactor camera driver debugfs support and
add support to ov9772 and imx132

bug 1037602

Change-Id: I20bfcd2dce3c21412ee4bfa20ad416a1e8fc4d95
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/191793
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: Enable -Werror in mach-tegra
Kaz Fukuoka [Tue, 8 Jan 2013 03:49:23 +0000]
ARM: tegra: Enable -Werror in mach-tegra

bug 1213479

Change-Id: Ic9318aee5c37d19668c302bd4ee8d12116f86f30
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/189408
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agothermal: platform_data: define common thermal_trip_info structure
Diwakar Tundlam [Thu, 10 Jan 2013 22:59:25 +0000]
thermal: platform_data: define common thermal_trip_info structure

Add a common platform_data header file to share trip point information
among thermal sensor drivers and platform files.

Bug 1200075

Change-Id: Iee5bb387b352c57362156415c6a73bc99539ee00
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/190823
(cherry picked from commit 6f75cb4af4e20029c2d31faa9f6478f959bd0eab)
Reviewed-on: http://git-master/r/193478
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

5 years agoARM: tegra: clocks: state check in resume
Seshendra Gadagottu [Wed, 23 Jan 2013 03:22:04 +0000]
ARM: tegra: clocks: state check in resume

Check the validity of cl_dvfs state before calling
tegra_cl_dvfs_resume.

Change-Id: I977582b13b7570029b9018b49e8beca98095f469
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/193253
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoregulator: max77660: add regulator enable time
Pradeep Goudagunta [Thu, 17 Jan 2013 14:32:26 +0000]
regulator: max77660: add regulator enable time

Add 500us regulators enable time.

Bug 1058717

Change-Id: I1e8824eac9c597f1bdf0ee14295a1eebcdb3c0d1
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/192068
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoregulator: max77660: Fix FPS_REG configuration
Pradeep Goudagunta [Thu, 17 Jan 2013 06:13:29 +0000]
regulator: max77660: Fix FPS_REG configuration

Bug 1210609

Change-Id: I34ab8893f08d6666e6a52f70979f6c8596566fdc
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/191910
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: tegra_bb: fix ipc memory region sizing
Martin Chabot [Tue, 22 Jan 2013 08:31:59 +0000]
arm: tegra: tegra_bb: fix ipc memory region sizing

ipc size was wrongly taken from private size field

Bug 1217721

Change-Id: I18356c25639dbbd354e68e1d56beecdb3d19509d
Signed-off-by: Martin Chabot <mchabot@nvidia.com>
Reviewed-on: http://git-master/r/193001
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Jean-Marc Guiraudet <jguiraudet@nvidia.com>

5 years agocpuquiet: Add GCOV_PROFILE for governors
Juha Tukkinen [Tue, 22 Jan 2013 08:30:28 +0000]
cpuquiet: Add GCOV_PROFILE for governors

Include cpuquiet in GCOV profiling when enabled by defconfig.

Change-Id: Iadac806d4b7efd9e34afa765dbec59f0491b96a8
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/192980
Reviewed-by: Automatic_Commit_Validation_User

5 years agousb: xhci: fix Short Packet handling for isochronous
JC Kuo [Thu, 6 Dec 2012 12:16:19 +0000]
usb: xhci: fix Short Packet handling for isochronous

When Short Packet happens on a multiple-TRBs TD, xHCD needs to
calculate the exact amount of transferred data because upper layer
driver wants it. In order to achieve, xHCD has to:
1. set ISP bit for all TRBs belongs to a IN TD, and
2. set IOC bit for the last TRB of the IN TD.

Once HC detects a Short Transfer, HC will send Short Packet event for
the TRB which encountered Short Packet and also send Short Packet event
fot the last TRB which has IOC bit set.

With those two events, xHCD can calculate the exact amount of bytes which
xHC has completed for the TD. (4.10.1.1)

Bug 1158352

Change-Id: I38f04825ddc3e12f124e12a9abf05a36beb43886
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/192883
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: pcie: Fix section mismatch warning
Jay Agarwal [Mon, 21 Jan 2013 14:25:56 +0000]
ARM: tegra: pcie: Fix section mismatch warning

Bug 1038578

Change-Id: I854791c9c098e94e7065d9115fa9d515c354cc4a
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/192862
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: t14x: Clear DPD_SAMPLE on LP0 exit
aghuge [Mon, 21 Jan 2013 10:41:36 +0000]
ARM: tegra: t14x: Clear DPD_SAMPLE on LP0 exit

Power management code needs to clear
PMC_DPD_SAMPLE during LP0 exit after pinmux
restoration

Bug 1193188

Change-Id: I40247bace4811fa0db69dfba7e952b32ad22a8fc
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/192782
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agomedia: video: tegra: imx091: Add standard preview mode
Frank Chen [Tue, 8 Jan 2013 18:43:34 +0000]
media: video: tegra: imx091: Add standard preview mode

Add standard preview mode (2104x1560) for imx091.

This standard preview mode replaces the low
quality 1052x780 preview mode. This will
improve the auto focuser accuracy.

Bug 1203989

Change-Id: I3be6d47a699bb543befb19e7462ff5a99b4b81d2
Reviewed-on: http://git-master/r/189594
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/192769
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: T148: ceres: Add pinmux support for t148 ceres
aghuge [Mon, 21 Jan 2013 06:29:44 +0000]
ARM: tegra: T148: ceres: Add pinmux support for t148 ceres

Update T148 pinmux and add support for ceres board pinmux

Bug 1178627

Change-Id: Iaa90a65562e71507c11023e8dd52815e68da535a
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/192388
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: emc: Cleanup clock change sequence
Alex Waterman [Sat, 12 Jan 2013 00:15:20 +0000]
arm: tegra: emc: Cleanup clock change sequence

Remove the DDR3 steps from the EMC's clock setting function.
Since T148 will not support DDR3, these steps are no longer
needed.

Remove t114 style trimmer updating. T148 does not have a dual
channel memory controller so trimmers can be packed into the
burst list.

Change-Id: I3aa54ea31f30329198c7846b41c78d155302d8a6
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/190808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>