5 years agomm: get_user_pages: migrate out CMA pages when FOLL_DURABLE flag is set
Vandana Salve [Tue, 10 Jun 2014 09:40:04 +0000]
mm: get_user_pages: migrate out CMA pages when FOLL_DURABLE flag is set

When __get_user_pages() is called with FOLL_DURABLE flag,
ensure that no page in CMA pageblocks gets locked.
This workarounds the permanent migration failures caused
by locking the pages by get_user_pages() call for a long
period of time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: I11b7c87e78f1022d6fded85a1ed6bac73c5f0a7c
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421678
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomm: get_user_pages: use NON-MOVABLE pages when FOLL_DURABLE flag is set
Vandana Salve [Tue, 10 Jun 2014 09:36:34 +0000]
mm: get_user_pages: use NON-MOVABLE pages when FOLL_DURABLE flag is set

Ensure that newly allocated pages, which are faulted in
in FOLL_DURABLE mode comes from non-movalbe pageblocks,
to workaround migration failures with CMA

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: I76d2185cc7e77992db585a71efaa06a5c0105a76
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421677
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agomm: get_user_pages: use static inline
Vandana Salve [Tue, 10 Jun 2014 09:32:16 +0000]
mm: get_user_pages: use static inline

__get_user_pages() is already exported function,
so get_user_pages() can be easily inlined to the
caller functions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: If700fa3c6ead133299fa99a702887584b76e5ffb
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421676
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agomm: introduce migrate_replace_page() for migrating page to the given target
Vandana Salve [Tue, 10 Jun 2014 09:25:32 +0000]
mm: introduce migrate_replace_page() for migrating page to the given target

introduce migrate_replace_page for migrating
page to the given target

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: I5f1d3bcb19ca7d9c9cf7234e8d3472a42c4f40af
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421675
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: T132: Clocks: Update temperature dependent vmin for cpu
Bibek Basu [Fri, 25 Apr 2014 07:31:09 +0000]
ARM: T132: Clocks: Update temperature dependent vmin for cpu

Update temperature dependent vmin for A01 cpu table version p4v4

Bug 1458402

Change-Id: I4a2200eda67278b6d2e3f2696f25c4779169e162
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/401361
(cherry picked from commit a25df4eef43bb682d70b2897ce8e2a6f5bdd9b61)
Reviewed-on: http://git-master/r/421552
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM64: tegra: config: enable DETECT_HUNG_TASK
Bharat Nihalani [Tue, 10 Jun 2014 05:31:03 +0000]
ARM64: tegra: config: enable DETECT_HUNG_TASK

This should help debug bugs that show hard lock-ups.

Bug 200011588

Change-Id: Ib95b0b9be952151c7cc1889c867a4be54cda33f5
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/421448
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agocpuidle-denver: fix return value check
Bharat Nihalani [Tue, 10 Jun 2014 08:31:14 +0000]
cpuidle-denver: fix return value check

of_property_read_u32 returns 0 on SUCCESS. At one of the places,
the return value of this function was checked with non-zero value.

This is corrected with this change.

Bug 1517221

Change-Id: I909f0c86f60a287e336ee2adbd45e0cf6b338d57
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/421522
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agovideo: tegra: dsi: re-init DSI in seamless
Vineel Kumar Reddy Kovvuri [Wed, 4 Jun 2014 05:58:03 +0000]
video: tegra: dsi: re-init DSI in seamless

This patch re-initializes dsi in the kernel even
in seamless mode. This helps reduce the dependency
with bootloader set dsi configuration

Bug 200006804
Bug 1510417

Change-Id: I2f9ae5efd467b95b5d3b0f6568c2379f4f68522e
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/418332
(cherry picked from commit 4e9583d8ceeabb393d355a53641b12c03d8be0e2)
Reviewed-on: http://git-master/r/419541
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: ardbeg: Add dma mask on SDHCI devices.
Naveen Kumar Arepalli [Fri, 30 May 2014 06:53:08 +0000]
ARM: tegra: ardbeg: Add dma mask on SDHCI devices.

Added dma mask on SDHCI devices.

Bug 1486735

Change-Id: Ie6ac1214a56a75828bc04b99290b555b77579474
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/416956
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit aac19d2b0cba665e195f6bd16ffec251184bd80e)
Reviewed-on: http://git-master/r/419445

5 years agommc: sdhci: Use pre-allocated DMA buffers
Naveen Kumar Arepalli [Fri, 30 May 2014 06:47:39 +0000]
mmc: sdhci: Use pre-allocated DMA buffers

Use pre-allocated DMA buffers for ADMA descriptor and Bounce buffer
instead of dynamic DMA mapping.
This improves SDHCI driver performance by reducing dynamic DMA mapping
overhead.

Bug 1486735

Change-Id: Ic9c646437be047d33304339eccc48a825f0a8bcc
Reviewed-on: http://git-master/r/380885
Cherry-picked from commit 7ffcc4cf1a1cec42610c1b55c30b3ec28547a11e

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Change-Id: If850a534ba9fbfd169b4fbefd35ca5922b1d1254
Reviewed-on: http://git-master/r/416955
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 9e58888afe4e66e83eece0a8332c8e7440bd1bcf)
Reviewed-on: http://git-master/r/419444

5 years agotegra: hdmi: remove powergating from state machine
Anshuman Nath Kar [Tue, 3 Jun 2014 23:20:52 +0000]
tegra: hdmi: remove powergating from state machine

Bug 200006368
Bug 200005903

hdmi state machine has an unbalanced powergating which
leads to dc being powergated during flips

Change-Id: I328630dc3b2192587f2ce874e1583a7cef104b51
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
(cherry picked from commit a1ee428ac4d0d86ccc342863080af9ddd2a1c25d)
Reviewed-on: http://git-master/r/418653
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: T132: update dvfs table for E1971
Ishwarya Balaji Gururajan [Mon, 9 Jun 2014 17:56:06 +0000]
ARM: T132: update dvfs table for E1971

update emc dvfs table for E1971 (bowmore)

Bug 1434354

Change-Id: I678805dc4e480be97ac48dadc323b4fc00ce0b4e
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/420723
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: tegra: bowmore: set constraints for sd4 regulator
Bibek Basu [Mon, 9 Jun 2014 10:16:31 +0000]
ARM: tegra: bowmore: set constraints for sd4 regulator

AS3722 sd4 regulator is not OTP programmed. So by default
voltage is 0. We need to provide initial minV and maxV so
as to initialize the regulator properly.

Bug 1454868

Change-Id: I004cee04f97e49ab22f680970bdf8c1941f5e3f1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/420636
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agodrivers: use request_firmware_nowait() instead of request_firmware()
Manikanta [Mon, 9 Jun 2014 05:51:47 +0000]
drivers: use request_firmware_nowait() instead of request_firmware()

During boot request_firmware API call waits for the system partition
to mount, whereas kernel gets stuck at request_firmware API call,
stalling kernel boot for 60 seconds [Timeout for request firmware].
Use request_firmware_nowait API to avoid deadlock.

bug 1520734
bug 200008011

Change-Id: I5a7fcb720c407236108bcac7f36c52b2cd47ee27
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/420452
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agotegra: hdmi: check dc enabled during recheck EDID
Anshuman Nath Kar [Fri, 30 May 2014 02:17:40 +0000]
tegra: hdmi: check dc enabled during recheck EDID

Bug 200002012

Change-Id: Idff34c8acf7aeb409571573838bcf41710cb8434
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
(cherry picked from commit f1cf7ddc5ed94f3fd2ef34f0c22ff931c106a67c)
(cherry picked from commit f8d6f6eb49ed476ad2f9487ded4385fc1bd531f6)
Reviewed-on: http://git-master/r/418656
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoMerge commit 'refs/changes/82/419382/1' of ssh://git-master:12001/linux-3.10 into...
Mandar padmawar [Tue, 10 Jun 2014 14:13:21 +0000]
Merge commit 'refs/changes/82/419382/1' of ssh://git-master:12001/linux-3.10 into promotion_build

Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56

5 years agoarm: tegra: tn8: Wait 50ms before panel reset
Santosh Katvate [Tue, 22 Apr 2014 15:10:20 +0000]
arm: tegra: tn8: Wait 50ms before panel reset

- RST should be low 50ms(min.) after DSI_A_D0_P disabled (after LP state)

Bug 1474583

Change-Id: I88e2f2387432d43296b6c9540719f4392ecb9b6e
Signed-off-by: Santosh Katvate <skatvate@nvidia.com>
Reviewed-on: http://git-master/r/399783
(cherry picked from commit 7e8923f44f2a702c5e432021b030077164c4067e)
Reviewed-on: http://git-master/r/418359
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm64: tegra: enable core dump
Mitch Luban [Tue, 20 May 2014 15:17:04 +0000]
arm64: tegra: enable core dump

Bug 1521482

Change-Id: I1d6756347e35030187a7f2fa61d7128c86ab94a6
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/412103
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agousb: hsic: add delay during hsic phy resume
Martin Chi [Mon, 5 May 2014 01:43:50 +0000]
usb: hsic: add delay during hsic phy resume

25ms delay is added to make sure the resume
signalling to be driven during remote wake-up
on the USB lines for a minimum period of 25ms

10ms delay is added to stabilize the HSIC bus

bug 1451863
bug 1438066

Change-Id: If514bb0b31df54f1b219f2ebfc6a3ca5ea62e6a4
Signed-off-by: Martin Chi <mchi@nvidia.com>
Reviewed-on: http://git-master/r/400932
(cherry picked from commit 0b28b90602d8cbcea8f3b3354524d443ab3d1872)
Reviewed-on: http://git-master/r/420335
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: dtb: keep pcie disable by default
Bibek Basu [Wed, 4 Jun 2014 05:27:03 +0000]
ARM: tegra: dtb: keep pcie disable by default

pcie is not available in all the platforms based
on T124 or T132. So, by default keep it disabled.
Otherwise there are probe errors seen

Bug 1518254

Change-Id: Id869a36dcbb8b46434d91c4f1c1ad4ed5a37c63b
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/418724
(cherry picked from commit d2238db744c35a539d1f219b5c57bc8949d6cd73)
Reviewed-on: http://git-master/r/420375
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: phy: tegra: HSIC: Clear PD_TX during resume
BH Hsieh [Mon, 14 Apr 2014 07:25:34 +0000]
usb: phy: tegra: HSIC: Clear PD_TX during resume

During HSIC resume the PD_TX circuit is to be turned on before
clearing MASTER_ENABLE of PMC.

Bug 1496758

Change-Id: I1127dfc0fc0e3b8dfb63bafa2291483186e06093
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Reviewed-on: http://git-master/r/395683
(cherry picked from commit I1127dfc0fc0e3b8dfb63bafa2291483186e06093)
Reviewed-on: http://git-master/r/420336
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Martin Chi <mchi@nvidia.com>
Tested-by: Martin Chi <mchi@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: print intr code for class error
Deepak Nibade [Thu, 5 Jun 2014 12:37:57 +0000]
gpu: nvgpu: print intr code for class error

Print interrupt code and channel id for unhandled gr class error.

bug 200010403

Change-Id: Iedceaf4b8b6363b26f1836256875fb9b5c43eded
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/419566
(cherry picked from commit 080b9a9e7ea5365ed3ace05d4f117095a8416d19)
Reviewed-on: http://git-master/r/419992
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agogpu: nvgpu: add accessor for gr_class_error
Deepak Nibade [Thu, 5 Jun 2014 11:29:29 +0000]
gpu: nvgpu: add accessor for gr_class_error

Add accessors to read class error code from
NV_PGRAPH_CLASS_ERROR

Bug 200010403

Change-Id: Ia99f50e264f9b8aa93f99994e52424418a2e4f74
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/419565
(cherry picked from commit d9f93d0c9a2aec552cce14147f3f6feb318f330e)
Reviewed-on: http://git-master/r/419991
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: dt: tn8: a03: correct ALS sensor info
Sri Krishna chowdary [Tue, 27 May 2014 19:56:12 +0000]
ARM: tegra: dt: tn8: a03: correct ALS sensor info

Pass correct values for maximum detection range and
power consumed in milli Amps.

Bug 1503943

Change-Id: I78903fc777ceb56aeca6c1fa5b70412be4850a67
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/415397
(cherry picked from commit 3158de305a6543b2f33ecf8e125a6661df872694)
Reviewed-on: http://git-master/r/419965
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agommc: tegra: Ignore err if dvfs overrides are disabled
Pavan Kunapuli [Tue, 13 May 2014 11:22:42 +0000]
mmc: tegra: Ignore err if dvfs overrides are disabled

If dvfs overrides are disabled, continue tuning execution by
treating the dvfs override API return values as expected.

Bug 1516198

Change-Id: I8d27969029ce7b318d23c227e8dfb19793282fea
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/413118
GVS: Gerrit_Virtual_Submit
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
(cherry picked from commit 71edeee1a98a8dc7474781689b0859a32f5aca80)
Reviewed-on: http://git-master/r/419948
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: jetson-tk1: correct regulator init
Bibek Basu [Wed, 4 Jun 2014 09:19:25 +0000]
ARM: tegra: jetson-tk1: correct regulator init

For Jetson-TK1 use laguna_regulator_init

Bug 1518991

Change-Id: I8b715793ba9371d042d4f6d95469978ba1ef9b26
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/418839
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: T132: update dvfs table for PM374
Ishwarya Balaji Gururajan [Fri, 30 May 2014 19:16:16 +0000]
ARM: T132: update dvfs table for PM374

update emc dvfs table for norrin (PM374)

Bug 1427420

Change-Id: Ic389845d420c78dce4f5e2bcf5f9a34b689ceac8
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/417231
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: T132: update DVFS table for E1973
Ishwarya Balaji Gururajan [Fri, 30 May 2014 19:03:11 +0000]
ARM: T132: update DVFS table for E1973

update emc dvfs table for E1973

Bug 1434359

Change-Id: I729a4b30dc6ceaaa1883b075dd588c6ea72d464c
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/417222
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: T132: update SoC dvfs table for DSI, eDP
Ishwarya Balaji Gururajan [Tue, 27 May 2014 00:56:46 +0000]
ARM: T132: update SoC dvfs table for DSI, eDP

Update freq for DSI to 402M and sor to 162M
at 800mV. Update SoC dvfs revision to p4v1l.

Bug 1442659

Change-Id: I2f488d5d5bd2c0be577d4947f9f36d0c4a810596
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/415053
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agovideo: tegra: dc: fix nvsd smooth_k handling
Daniel Solomon [Fri, 18 Apr 2014 04:15:01 +0000]
video: tegra: dc: fix nvsd smooth_k handling

When smooth_k is enabled, the NVSD driver determines
that hardware pixel gain and brightness calculations
are complete when it sees to consecutive and equal
brightness values. However, since multiple raw K
values are mapped to a single brightness value,
this check can be misleading.

To fix this, we continue checking for new brightness
values for a few additional frames after seeing repeating
brightness results. The number of frames is calculated
from smooth_k_incr.

Bug 1502587

Change-Id: I97f2ecd77398cf441ac720b6e306e0a1c89eed5d
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/409111
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: tegra: dvfs: Increase DFLL force guard-band
Alex Frid [Fri, 30 May 2014 18:50:12 +0000]
ARM: tegra: dvfs: Increase DFLL force guard-band

Increased DFLL force voltage request guard-band below maximum voltage
from 1 LUT step to 2 LUT steps per characterization results.

Bug 1442659

Change-Id: Ie34d19174372bc85aa3c44391542406bc6a564de
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/419773
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: tegra: dvfs: Update DFLL tune parameters
Alex Frid [Wed, 4 Jun 2014 06:54:39 +0000]
ARM: tegra: dvfs: Update DFLL tune parameters

- Changed Tune1 parameter according to recent characterization results
- Made Tune0 selection forward looking: applied current settings to
possible future speedo ids (if any is introduced).
- Updated CPU DVFS version to p4v12.

Bug 1442659

Change-Id: I3430fc43a3ff045fd6fbcbfddbe5feda4671a727
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/419772
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agosysedp: tn8: Enable sysedp on P1765
Timo Alho [Fri, 6 Jun 2014 20:16:45 +0000]
sysedp: tn8: Enable sysedp on P1765

Change-Id: I94e6e0bd67991c470c0567ada35efcfbbdae3fc1
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/420192
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoRevert "input: touch: raydium: Code drop V73.9"
Xiaohui Tao [Fri, 6 Jun 2014 17:18:16 +0000]
Revert "input: touch: raydium: Code drop V73.9"

This reverts commit 6c8f204fe29c074287147c7fcc3dfdbd61d038df.

Change-Id: Ic688774004109ac2a8e977eb38fe934bbfac586f
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/420121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: dc: get default mode from EDID
Jong Kim [Thu, 5 Jun 2014 17:56:58 +0000]
video: tegra: dc: get default mode from EDID

Override hard-coded default HDMI mode with the preferred mode
obtained from EDID read. Since the preferred mode is obtained
dynamically from EDID, the default hard-coded HDMI mode is set
to 640x480 @60Hz, which is universally supported.

bug 1495496
bug 200009711

Change-Id: Ib21109ebd5fcff4e0a825d8b20df9357cf08619e
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/393564
(cherry picked from commit 151ac024bc3d27bee424aa33725988e8bf18375d)
Reviewed-on: http://git-master/r/419656
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: thermal: enable pmu support for PM375
Shreshtha Sahu [Thu, 5 Jun 2014 06:47:12 +0000]
arm:  tegra: thermal: enable pmu support for PM375

This patch enables pmu support for soctherm THERMTRIP
on PM375 board.

Bug 200010370

Change-Id: Idb85537794f9036dfc1a0f90090723de24e20ac3
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/419447
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoUpdate from Realtek to resolve speaker pop noise coming back from LP0
Rene Houle [Thu, 29 May 2014 21:52:50 +0000]
Update from Realtek to resolve speaker pop noise coming back from LP0

Bug 200006476

Change-Id: I8269a39840a4e887f8c0405457f9484fd2956e9b
Signed-off-by: Rene Houle <rhoule@nvidia.com>
Reviewed-on: http://git-master/r/418512
Reviewed-by: Pierre Gervais <pgervais@nvidia.com>

5 years agoarm64: nvmap: warn on use of 'uncached' nvmap memory type on arm64
Rich Wiley [Tue, 3 Jun 2014 20:39:00 +0000]
arm64: nvmap: warn on use of 'uncached' nvmap memory type on arm64

Change-Id: I7c6cd5596e6a900996cd8f732285486c69586a6d
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/418487
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: thermal: clean up throttle_table show
Diwakar Tundlam [Mon, 2 Jun 2014 22:10:07 +0000]
arm: tegra: thermal: clean up throttle_table show

Change-Id: I87b198a0a28aab722a5ac43b5bfcac860133cfc2
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/417935
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: t132: emc: update dvfs table fr PM359 Laguna
Rohit Khanna [Fri, 30 May 2014 22:18:32 +0000]
arm: t132: emc: update dvfs table fr PM359 Laguna

Update DVFS table for PM359 from V1 to V2. The main difference between V2 and V1
is due to the emc_reg_calc update from V6.0.0 to V6.0.4.

- Disable SEL_DPD on MID package
- Increase tR2p by 2 for 102MHz CFG

Bug 1427416

Change-Id: I3199fa8a2118b92bc7f5e8c8cf14c0e0e48d2527
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: http://git-master/r/417882
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agovideo: tegra: dc: disable windows on enabled dc
Michael Frydrych [Fri, 30 May 2014 10:38:45 +0000]
video: tegra: dc: disable windows on enabled dc

dc initializes syncpt ids as late as in tegra_dc_init(), thus
hdmi must be plugged at least once, before sync ids are valid.
Disabling windows on hdmi will otherwise lead to attemp of
incrementing invalid syncpt.
If dc is enabled, tegra_dc_init() must have been already called
and it is safe to flush syncpt.

bug 200006556

Change-Id: Ib908bf5fc2ddfbfaff601a9682658c9b7de9dceb
Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-on: http://git-master/r/417057
(cherry picked from commit 41caed9753f7b938bd8c195ca5dafcfcfecede40)
Reviewed-on: http://git-master/r/420000
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoarm64: ptrace: fix empty registers set in prstatus of aarch32 process core
Victor Kamensky [Thu, 5 Jun 2014 18:22:02 +0000]
arm64: ptrace: fix empty registers set in prstatus of aarch32 process core

Currently core file of aarch32 process prstatus note has empty
registers set. As result aarch32 core files create by V8 kernel are
not very useful.

It happens because compat_gpr_get and compat_gpr_set functions can
copy registers values to/from either kbuf or ubuf. ELF core file
collection function fill_thread_core_info calls compat_gpr_get
with kbuf set and ubuf set to 0. But current compat_gpr_get and
compat_gpr_set function handle copy to/from only ubuf case.

Fix is to handle kbuf and ubuf as two separate cases in similar
way as other functions like user_regset_copyout, user_regset_copyin do.

Change-Id: If648f024eccfd96051646a04d799f94bd202bbea
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Reviewed-on: http://git-master/r/419668
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agogpu: nvgpu: fix memory leak of dbg_session
Deepak Nibade [Thu, 5 Jun 2014 05:56:59 +0000]
gpu: nvgpu: fix memory leak of dbg_session

In gk20a_dbg_gpu_dev_release() (when we close nvhost-dgb-gpu sysfs),
we return from function if there is no channel bound to dbg_session
without freeing the dbg_session memory.

If there is no channel bound then do not call dbg_unbind_channel_gk20a()
and then free dbg_session memory always.

Bug 200010382

Change-Id: I90dd2ed3cd72fbc5d429799660daf2a09b974fda
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/419306
(cherry picked from commit aed69a3f2c2ddc6b9b04fff4be6c4771f206f1d6)
Reviewed-on: http://git-master/r/419583
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: dtb: tegra12: laguna: update pmc values
Bibek Basu [Mon, 19 May 2014 11:12:46 +0000]
ARM: dtb: tegra12: laguna: update pmc values

Update PMC values to realistic values proven working
for laguna_t124.

Bug 1501662

Change-Id: I0feb7a6ecee075b6c7115c046cbabe82395ade41
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/411458
(cherry picked from commit a7a43726e6509200042478d9f24ae57c4256a06d)
Reviewed-on: http://git-master/r/419484
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: dc: flush syncpts on release
Michael I. Gold [Wed, 28 May 2014 22:42:19 +0000]
video: tegra: dc: flush syncpts on release

Create a disable_window() function to consolidate operations which are
needed from both release() and controller_disable().

bug 200006556

Change-Id: I07f220e7b6a52c8761bebc294fa5648fb8fd9be8
Signed-off-by: Michael I. Gold <gold@nvidia.com>
Reviewed-on: http://git-master/r/416351
(cherry picked from commit 4a46c87239e1c5ea3d2e53ed349fb8908b2877e5)
Reviewed-on: http://git-master/r/416394
Reviewed-on: http://git-master/r/419061
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agopower: extcon: register for y-cable extcon dev
Rakesh Bodla [Thu, 29 May 2014 12:30:18 +0000]
power: extcon: register for y-cable extcon dev

Register to otg extcon dev for y-cable notification.

Bug 200004368
Bug 1456628

Change-Id: Ie63e29b90885ef713b96d30d05fedbbb89d3cd30
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/416656
(cherry picked from commit 350fe59088ec3016cff15b1627ca26dcaa659919)
Reviewed-on: http://git-master/r/418864
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: otg: tegra: Add extcon device for y-cable
Rakesh Bodla [Wed, 23 Apr 2014 05:58:05 +0000]
usb: otg: tegra: Add extcon device for y-cable

Add extcon device to notify presence of
Y cable connection.

Bug 200004368
Bug 1456628

Change-Id: I6b169167c37e34b072970e38c275aa22ad63b35c
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/400098
(cherry picked from commit 2e8ba18d74dc3091390c9ee3f8c1f4c196935412)
Reviewed-on: http://git-master/r/418863
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: pm375: disable usb device mode
Preetham Chandru R [Tue, 15 Apr 2014 10:03:45 +0000]
ARM: tegra: pm375: disable usb device mode

Disable usb device mode for pm375 rev A-D

Bug 1495952
Bug 200010106

Change-Id: I553d3c05f9a8421ff4900999d9d6e5c21dc5e596
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/404679
(cherry picked from commit 54ca959ccb7aabf0210bd534f065d291be011b9e)
Reviewed-on: http://git-master/r/418342
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agonohz: stat: Fix decreasing idle/iowait times
Sai Gurrappadi [Wed, 4 Jun 2014 00:46:23 +0000]
nohz: stat: Fix decreasing idle/iowait times

Always read nohz idle/iowait counters if nohz is enabled even if the cpu
is offline. This prevents a decreasing counter if a reader reads
/proc/stat before and after a cpu is offlined. Currently /proc/stat
switches between using the nohz counters and the sched-tick counters
both of which are updated independently and could therefore be out of
sync.

Commit "7386cdb nohz: Fix idle ticks in cpu summary line of /proc/stat"
introduced the check to fall back onto using the sched-tick counters
because the nohz counters updated incorrectly when a cpu was offlined.
However, commit "4b0c0f2 tick: Cleanup NOHZ per cpu data on cpu down"
properly fixes the issue by clearing nohz state on cpu-down thereby
preventing faulty nohz counter updates. So we can now safely remove the
cpu_online() checks introduced by 7386cdb.

Bug 200007081
Bug 1512875

Change-Id: I7182f2cc9f36e2019c72522f76cac44a59e8b913
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/419540
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM64: fix KSTK_ESP
Kerwin Wan [Thu, 5 Jun 2014 07:28:31 +0000]
ARM64: fix KSTK_ESP

If a thread is compat, then stack start address is stored in
compat_sp not sp of pt_regs.

Bug 200006667

Change-Id: I4814d4b2a39224e0541ce988f84e038bca7d57bf
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/419378
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

5 years agogpu: nvgpu: Rewrite PMU boot-up sequence
Terje Bergstrom [Wed, 14 May 2014 12:22:49 +0000]
gpu: nvgpu: Rewrite PMU boot-up sequence

Rewrite PMU boot sequence as a state machine. At PMU power-up send
initial messages, and reset state machine. At each reply from PMU,
do the next stage of PMU boot and set state.

As now PMU and FECS boot are independent, we need to ensure engine
idle before saving ZBC.

Change-Id: I1ea747ab794ef08f1784eeabfdae7655d585ff21
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/413230
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: Initialize FECS explicitly on recovery
Terje Bergstrom [Wed, 14 May 2014 12:22:00 +0000]
gpu: nvgpu: Initialize FECS explicitly on recovery

Instead of calling second phase of PMU boot sequence, initialize FECS
directly.

Change-Id: I7f9de0c5ec42049033839d244979f3f3daabf317
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410204
(cherry picked from commit 5a631edd5cf05a4b8c5e8b049256a0e190964859)
Reviewed-on: http://git-master/r/413229
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: tegra: dtb: Add new file to support gpio-keys
Jeetesh Burman [Mon, 17 Mar 2014 09:14:15 +0000]
ARM: tegra: dtb: Add new file to support gpio-keys

Many GPIOs registered as interrupt are not applicable for PM375,
new file added for PM375 to support GPIOs which are applicable for
PM375.

Added file: tegra124-jetson_tk1-keys-pm375-0000-c00-00.dtsi

Bug 1475519

Change-Id: Ic7cdae2afa43751b3ba045f08c62dbb2c36b6562
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/382467
Cherry-picked from 72c6e07c4757f00697316b39c61e8dd0fa3ccb59
Reviewed-on: http://git-master/r/403369
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: Reload ZBC values on rail gate exit
Terje Bergstrom [Tue, 3 Jun 2014 11:47:44 +0000]
gpu: nvgpu: Reload ZBC values on rail gate exit

When exiting rail gate, we reloaded default ZBC values. The correct
behavior is to reload the values.

Bug 1447255

Change-Id: I7aad3586dda91a91a3629062a27001af281b955e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/418346
(cherry picked from commit 97a361eaea7a82e4d69901c3e95a7880099c87bf)
Reviewed-on: http://git-master/r/419287
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoRevert "arm: tegra: soctherm: refactor throt level & vect."
Diwakar Tundlam [Thu, 5 Jun 2014 02:18:29 +0000]
Revert "arm: tegra: soctherm: refactor throt level & vect."

Bug 200009441

This reverts commit 392b7dbbf3d76f2db05eea05bcf8e1bd9610220b.

Change-Id: I6e58562942b391796b8fa337074c3806921f4572
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/419238
Reviewed-by: Tony Ly <tly@nvidia.com>
Tested-by: Tony Ly <tly@nvidia.com>

5 years agoTegra: T124 DSI: pclk divider rounding
Sungwook Kim [Mon, 5 May 2014 19:09:43 +0000]
Tegra: T124 DSI: pclk divider rounding

DSI needs the round-closest for the pclk divider rounding in DC,
meanwhile, other display types need the round-up for DVFS.
Pclk divider settings are in DC and display head, and they
should match.

bug 1487113
bug 1420652

Change-Id: Ifeb38f218194fab40dd99c1d723e6042391da672
Signed-off-by: Sungwook Kim <sungwookk@nvidia.com>
Reviewed-on: http://git-master/r/405394
(cherry picked from commit cf943efbdb55dfd92d479f6c7707c662e6a3f0ea)
Reviewed-on: http://git-master/r/418442
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoRevert "Revert "tegra: T124: HDMI: fix pixel clock setting""
Sungwook Kim [Mon, 5 May 2014 19:00:40 +0000]
Revert "Revert "tegra: T124: HDMI: fix pixel clock setting""

This reverts commit 971ad25804fae40619a9c7683875e5386e49b147.

To bring back the HDMI pixel clock rate setting fix.

bug 1420652
bug 1487113

Change-Id: Ibdcfc1b8f9ffac16dbb3d6fb1cc8fe2b95164850
Signed-off-by: Sungwook Kim <sungwookk@nvidia.com>
Reviewed-on: http://git-master/r/405393
(cherry picked from commit a7cde7b8146d2f9222c75af22e68674ec7e6657e)
Reviewed-on: http://git-master/r/418441
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: T132: DVFS: Cleanup cpufreq table generation
Krishna Sitaraman [Fri, 23 May 2014 22:52:59 +0000]
ARM: T132: DVFS: Cleanup cpufreq table generation

Also update table framework to easily change frequency granularity
below a given frequency.

Change-Id: I068f9e04b037e4b12bff422df5364560187ff777
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/414669
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: handle touch 3v3 parent rail overcurrent
Laxman Dewangan [Tue, 3 Jun 2014 09:49:50 +0000]
ARM: tegra: handle touch 3v3 parent rail overcurrent

When touch rail get enabled, there is chances of parent rail to be
short and drop the voltage output of parent rail to be 0V. This can
cause the malfunctioning of system which depends on parent rail.

Add the SW-WAR for enabling touch rail on P1761-A03 designs.
- Enable LDO3 (3.3V) to load switch output.
- Enable load switch and then disable parent rail.

bug 1494740

Change-Id: I283438f421fa72a284bbb8a539c59d0bffee911c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/418247
(cherry picked from commit e77e1c375c9d6fd27a162c338ce67a106c5a3fc6)
Reviewed-on: http://git-master/r/419341
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

5 years agoregulator: palams: add support for disabling pulldown of LDOs
Laxman Dewangan [Tue, 3 Jun 2014 09:45:36 +0000]
regulator: palams: add support for disabling pulldown of LDOs

Add support for disabling pull down of the LDOs. this is configurable
from platforms.

bug 1494740

Change-Id: I8c3e02f36b3045fa25a8c881a10c686ab9c63967
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/418246
(cherry picked from commit 0894c40230017f0fbb0f463a0c5027738b1d2b1f)
Reviewed-on: http://git-master/r/419339
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

5 years agoregulator: core: add support for disabling parent after enabling rail.
Laxman Dewangan [Tue, 3 Jun 2014 07:02:11 +0000]
regulator: core: add support for disabling parent after enabling rail.

Add support on core driver of regulator to disable parent once the
regulator enable. This is needed for some specific purpose to handle
overcurrent on parent rail due to enabling the rail.

bug 1494740

Change-Id: I95084243975ca5298abbaa23a31007413bdca7a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/418143
(cherry picked from commit a65d4377c02067d8b6105c7fcd1931e20d9e8995)
Reviewed-on: http://git-master/r/419335
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

5 years agousb:hsic: disable PMC master control in usb resume
Martin Chi [Thu, 24 Apr 2014 16:26:24 +0000]
usb:hsic: disable PMC master control in usb resume

disable pmc remote wake-up detection in usb resume
to prevent the pmc remote wake-up during usb
auto-resume, otherwise, the concurrent resume may
cause hsic bus entering unexpected state and
cause 'XactErr' errs.

bug 1476774

Change-Id: I0f1165a1d9316a229c756e75cb905ba6fff88cda
Signed-off-by: Martin Chi <mchi@nvidia.com>
Reviewed-on: http://git-master/r/400933
(cherry picked from commit 19acbead48a7ff4e322ec249d9c37295ca347775)
Reviewed-on: http://git-master/r/419226
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: ehci: Tegra: add echi wake lock
Martin Chi [Tue, 28 Jan 2014 04:51:24 +0000]
usb: ehci: Tegra: add echi wake lock

For now, only apply it in tegra_ehci_irq when it's
triggered by remote wake-up irq, since, without
wake lock hold here, device may continue the
suspend if remote wake-up comes in suspending.

bug 1402295

Change-Id: I49223c0fb80fd793e8886688a96e66101405fdd6
Signed-off-by: Martin Chi <mchi@nvidia.com>
Reviewed-on: http://git-master/r/359426
Reviewed-on: http://git-master/r/385478
(cherry picked from commit a06d6d9eb47428e8a7be09c988fe83cff260acd0)
Reviewed-on: http://git-master/r/419225
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: support 16V voltage for maxim Wall Charger
Philip Rakity [Sun, 1 Jun 2014 19:59:45 +0000]
ARM: tegra: support 16V voltage for maxim Wall Charger

comment from system engineering:

Since the maximum input voltage of the BQ2419x is 17V
it is safe to set the maximum voltage to 16V for all
platforms. 15V is too low. 17V leaves less margin.

voltage reduced to 16V

(cherry picked from commit 7a5749bcbbf9f563690d30f80790a1c678f395c5)
Change-Id: I71632197b6d9ca962250623e5575350adf7b7782
Reviewed-on: http://git-master/r/417480
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/418807
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agooom_kill: change oom_kill.c to use for_each_thread()
Oleg Nesterov [Tue, 21 Jan 2014 23:49:58 +0000]
oom_kill: change oom_kill.c to use for_each_thread()

Change oom_kill.c to use for_each_thread() rather than the racy
while_each_thread() which can loop forever if we race with exit.

Note also that most users were buggy even if while_each_thread() was
fine, the task can exit even _before_ rcu_read_lock().

Fortunately the new for_each_thread() only requires the stable
task_struct, so this change fixes both problems.

Bug 200004307

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: Sergey Dyasly <dserrg@gmail.com>
Tested-by: Sergey Dyasly <dserrg@gmail.com>
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: "Ma, Xindong" <xindong.ma@intel.com>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: "Tu, Xiaobing" <xiaobing.tu@intel.com>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
(cherry picked from commit 1da4db0cd5c8a31d4468ec906b413e75e604b465)

Change-Id: Iecf2804ab94f17adf1bad6d0b2ddc560e66544e6
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/418860
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: thermal: emergency throttle table
Diwakar Tundlam [Mon, 2 Jun 2014 20:49:44 +0000]
arm: tegra: thermal: emergency throttle table

Setup an emergency throttle table with approximately half max
frequencies for use to throttle when severe events (such as PMIC
hotdie alert) happen.

Bug 1506324

Change-Id: Ic4ef397e99af5e84a137d8e3db867a3ec4e07452
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/417898
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>

5 years agothermal: palmas: handle hotdie alert via thermal cdev
Diwakar Tundlam [Sat, 31 May 2014 01:43:24 +0000]
thermal: palmas: handle hotdie alert via thermal cdev

Do not treat hotdie alert as a critical event. Bind a cdev to the
hotdie temp alert IRQ and handle it via thermal framework to throttle
clocks to desired levels.

Bug 1506324

Change-Id: I3ec0166ca579798fd8422826d46aa369c4497571
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/417343
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agointroduce for_each_thread() to replace the buggy while_each_thread()
Oleg Nesterov [Tue, 21 Jan 2014 23:49:56 +0000]
introduce for_each_thread() to replace the buggy while_each_thread()

while_each_thread() and next_thread() should die, almost every lockless
usage is wrong.

1. Unless g == current, the lockless while_each_thread() is not safe.

   while_each_thread(g, t) can loop forever if g exits, next_thread()
   can't reach the unhashed thread in this case. Note that this can
   happen even if g is the group leader, it can exec.

2. Even if while_each_thread() itself was correct, people often use
   it wrongly.

   It was never safe to just take rcu_read_lock() and loop unless
   you verify that pid_alive(g) == T, even the first next_thread()
   can point to the already freed/reused memory.

This patch adds signal_struct->thread_head and task->thread_node to
create the normal rcu-safe list with the stable head.  The new
for_each_thread(g, t) helper is always safe under rcu_read_lock() as
long as this task_struct can't go away.

Note: of course it is ugly to have both task_struct->thread_node and the
old task_struct->thread_group, we will kill it later, after we change
the users of while_each_thread() to use for_each_thread().

Perhaps we can kill it even before we convert all users, we can
reimplement next_thread(t) using the new thread_head/thread_node.  But
we can't do this right now because this will lead to subtle behavioural
changes.  For example, do/while_each_thread() always sees at least one
task, while for_each_thread() can do nothing if the whole thread group
has died.  Or thread_group_empty(), currently its semantics is not clear
unless thread_group_leader(p) and we need to audit the callers before we
can change it.

So this patch adds the new interface which has to coexist with the old
one for some time, hopefully the next changes will be more or less
straightforward and the old one will go away soon.

Bug 200004307

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: Sergey Dyasly <dserrg@gmail.com>
Tested-by: Sergey Dyasly <dserrg@gmail.com>
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Acked-by: David Rientjes <rientjes@google.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: "Ma, Xindong" <xindong.ma@intel.com>
Cc: Michal Hocko <mhocko@suse.cz>
Cc: "Tu, Xiaobing" <xiaobing.tu@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
(cherry picked from commit 0c740d0afc3bff0a097ad03a1c8df92757516f5c)
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Change-Id: Id689cb1383ceba2561b66188d88258619b68f5c6
Reviewed-on: http://git-master/r/419041
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: soctherm: Update temp threshold with critical trip temp
Roger Ma [Mon, 19 May 2014 05:08:56 +0000]
arm: tegra: soctherm: Update temp threshold with critical trip temp

Takes critical trip temp into hardware while updating temperature
UP/DN thresholds to ensure that SW shutsown is working at critical
trip temp with UART log of thermal shutdown even.

Bug 1492653

Change-Id: I10094c3d5ee32171197f792880b85bcdd519e7eb
Signed-off-by: Roger Ma <roma@nvidia.com>
(cherry picked from commit 5eaccbbc5c44b5e4c61e28de256e1e9be7e53b3b)
Reviewed-on: http://git-master/r/418481
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agovideo: tegra: host: assign emc ID to msenc.emc
Jihoon Bang [Wed, 28 May 2014 17:47:05 +0000]
video: tegra: host: assign emc ID to msenc.emc

msenc.emc ID was zero, which is a bug.
Assign EMC ID to msenc.emc clock.

Bug 1517632

Change-Id: I8bb7a87e219aa6b34abf9dd5daaceb08e417eb5f
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/416273
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
(cherry picked from commit 19add0927b5dd7b4e5fd03c753b54465b6ed38a6)
Reviewed-on: http://git-master/r/418472
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agostating: iio: adc: palmas: Add debugfs for auto_conv reading
Jinyoung Park [Wed, 9 Apr 2014 11:13:25 +0000]
stating: iio: adc: palmas: Add debugfs for auto_conv reading

Added a debugfs for auto_conv value reading.

Bug 1514756

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/414751
(cherry picked from commit a7cc5553eb36afa799ae580d2e4c06f399e5bd8f)

Change-Id: Ia7fb91dab51972235885d7a087a84ce4aabd690b
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/418393
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agostaging: iio: adc: palmas: Add current source init
Jinyoung Park [Thu, 20 Mar 2014 08:51:56 +0000]
staging: iio: adc: palmas: Add current source init

Added current source initialization for CH0 and CH3 before
auto conversion configuration.
The current sources should be configured with preferred settings
before perform auto conversion to get expected result of auto conversion.

Bug 1514756

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/414750
(cherry picked from commit d22d48a2ea781aef641498e63c1bbb827a5b0a76)

Change-Id: I1c5440f8021a90f3eee4b80c3f70ab1956ac0cf5
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/418392
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoarm: tegra: thermal: register balanced throttle cdev
Diwakar Tundlam [Mon, 2 Jun 2014 20:25:16 +0000]
arm: tegra: thermal: register balanced throttle cdev

Register balanced throttle tables with tegra-balanced-throttle
sub-layer in thermal. Whether it will be made available on a device or
not will be determined in platform init code by a routine that binds
to its thermal sensor.

Change-Id: I9e403b718e37e19c5376d0177179c135c0b160d0
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/417897

5 years agothermal: remove unused field in info structure
Diwakar Tundlam [Mon, 2 Jun 2014 20:22:57 +0000]
thermal: remove unused field in info structure

Change-Id: I7cc66c88afbfcca6b93e714c778c892dea14ac8f
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/417896
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM64: kernel: Power off in atomic context
Bharat Nihalani [Sat, 31 May 2014 06:03:10 +0000]
ARM64: kernel: Power off in atomic context

This far the device has been powered off in non-atomic context.
This caused unexpected results when the kernel pre-empted the
power off sequence and started running some completely unrelated
task at the very same time. In addition, IRQs were enabled all
time allowing spontaneous interruption of the power off sequence.

This patch modifies the power off to happen in atomic context.

Original author for same change http://git-master/r/#/c/329636/
done for ARM kernel is Arto Merilainen <amerilainen@nvidia.com>

Bug 200007891

Change-Id: I9dfd5523ed838e3c181ef94dcbbb15e3b66419d1
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/418215
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>

5 years agoarm: tegra124: PM375: update port config for xusb
Preetham Chandru R [Thu, 6 Mar 2014 13:45:46 +0000]
arm: tegra124: PM375: update port config for xusb

Bug 1466561

Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Change-Id: I950c55361e305f10944a2210a5b30a69dea52397
Reviewed-on: http://git-master/r/418145
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: tegra: dtb: add DT support for xusb
Preetham Chandru R [Thu, 6 Mar 2014 16:27:11 +0000]
ARM: tegra: dtb: add DT support for xusb

Bug 1466561

Change-Id: I4ce0962a48465a0423c883b41103bdc885ceaa0d
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/418144
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agovideo: tegra: host: Enable VIC power gating
Terje Bergstrom [Fri, 2 May 2014 05:53:40 +0000]
video: tegra: host: Enable VIC power gating

Bug 1450281

Change-Id: Iba9e970489e5640ca840d37b1d013e7fe053cae3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/414938
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoMerge branch 'linux-3.10.40' into rel-21
Ishan Mittal [Thu, 5 Jun 2014 08:01:21 +0000]
Merge branch 'linux-3.10.40' into rel-21

Bug 200004122

Conflicts:
drivers/cpufreq/cpufreq.c
drivers/regulator/core.c
sound/soc/codecs/max98090.c

Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56
Signed-off-by: Ishan Mittal <imittal@nvidia.com>

5 years agogpu: nvgpu: Fault engines on PBDMA error
Terje Bergstrom [Mon, 2 Jun 2014 09:02:26 +0000]
gpu: nvgpu: Fault engines on PBDMA error

On PBDMA error even though the engine might not be wedged, we need to
kick the channel out of engine. Add that logic. Also when channel is
not in engine, we need to remove it from runlist.

Bug 1498688

Change-Id: I5939feb41d0a90635ba313b265c7e3b5d3f48622
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/417730
Reviewed-by: Automatic_Commit_Validation_User

5 years agogpu: nvgpu: Handle PBDMA errors
Terje Bergstrom [Fri, 23 May 2014 09:46:58 +0000]
gpu: nvgpu: Handle PBDMA errors

Add handling for PBDMA errors.

Bug 1498688

Change-Id: Iff391110db1c270c05c76e6a14b7c666da8e3751
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit 85f46d83227893f283d0247937dfa9da3e2d54fd)
Reviewed-on: http://git-master/r/417729
Reviewed-by: Automatic_Commit_Validation_User

5 years agoinput: touch: raydium: Code drop V73.9
Xiaohui Tao [Wed, 28 May 2014 23:00:50 +0000]
input: touch: raydium: Code drop V73.9

Bug 1498826
Bug 1501967
Bug 200008806

Change-Id: Ic9179766890ebbd42bb064cd66e17a4ac959d7c4
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/416356
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm64: tegra132: add MTS interface for Vret for Bowmore E1971
Krishna Sitaraman [Tue, 27 May 2014 23:43:44 +0000]
arm64: tegra132: add MTS interface for Vret for Bowmore E1971

Bug 1470221

Change-Id: I3e54e0eb3ab8d34c78905f6c4be71fd18a679628
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/415469
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agogpu: nvgpu: Remove deferred ELPG enable
Terje Bergstrom [Thu, 15 May 2014 10:57:09 +0000]
gpu: nvgpu: Remove deferred ELPG enable

Prevent the disable ELPG routine from calling deferred re enablement of
ELPG. Remove code related to deferred ELPG enable..

Change-Id: I9401e6e0f26a4e332e50eb38439e2ef6fcb4225d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410203
(cherry picked from commit cf9558aa112476072c3abb02b3d6cae94e21a8bd)
Reviewed-on: http://git-master/r/413228
Reviewed-by: Automatic_Commit_Validation_User

5 years agogpu: nvgpu: Add PMU sent/recvd messages to dbg log
Terje Bergstrom [Wed, 14 May 2014 12:22:00 +0000]
gpu: nvgpu: Add PMU sent/recvd messages to dbg log

Add debug log entries for received and sent PMU messages.

Change-Id: I94cecca76257d74785c13f1c5f97a7233361019f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/410202
(cherry picked from commit ac555ce237d9514eb618a15b7cc2adb505c87f0a)
Reviewed-on: http://git-master/r/413227

5 years agomedia: tegra: nvavp: Fix possible deadlock issue
Somasundaram S [Tue, 13 May 2014 14:54:17 +0000]
media: tegra: nvavp: Fix possible deadlock issue

Running the following with lockdep patches:

su
stop
stop media

results in:

[  121.879482] ======================================================
[  121.885792] [ INFO: possible circular locking dependency detected ]
[  121.892103] 3.10.33-g3a639d14292b-dirty #995 Tainted: G        W
[  121.898392] -------------------------------------------------------
[  121.904684] Binder_2/862 is trying to acquire lock:
[  121.909578]  ((&nvavp->clock_disable_work)){+.+...}, at:
[<ffffffc0000c5a74>] flush_work+0x0/0x288
[  121.918632]
[  121.918632] but task is already holding lock:
[  121.924484]  (&nvavp->open_lock){+.+.+.}, at:
[<ffffffc00065b868>] tegra_nvavp_video_release+0x2c/0x5c
[  121.933908]
[  121.933908] which lock already depends on the new lock.
[  121.933908]
[  121.942118]
[  121.942118] the existing dependency chain (in reverse order) is:
[  121.949625]
-> #2 (&nvavp->open_lock){+.+.+.}:
[  121.954311]        [<ffffffc0001019b0>] __lock_acquire+0x22a8/0x2358
[  121.960708]        [<ffffffc000102234>] lock_acquire+0x98/0x12c
[  121.966663]        [<ffffffc0009fa4a0>] mutex_lock_nested+0x78/0x3b4
[  121.973057]        [<ffffffc00065b624>] clock_disable_handler+0x30/0x9c
[  121.979710]        [<ffffffc0000c47e4>] process_one_work+0x190/0x4e8
[  121.986101]        [<ffffffc0000c4c74>] worker_thread+0x138/0x3c0
[  121.992231]        [<ffffffc0000cbcf0>] kthread+0xd0/0xdc
[  121.997718]        [<ffffffc000084cbc>] ret_from_fork+0xc/0x1c
[  122.003607]
-> #1 (&nvavp->channel_info[channel_id].pushbuffer_lock){+.+...}:
[  122.010989]        [<ffffffc0001019b0>] __lock_acquire+0x22a8/0x2358
[  122.017382]        [<ffffffc000102234>] lock_acquire+0x98/0x12c
[  122.023340]        [<ffffffc0009fa4a0>] mutex_lock_nested+0x78/0x3b4
[  122.029730]        [<ffffffc00065b618>] clock_disable_handler+0x24/0x9c
[  122.036398]        [<ffffffc0000c47e4>] process_one_work+0x190/0x4e8
[  122.042795]        [<ffffffc0000c4c74>] worker_thread+0x138/0x3c0
[  122.048932]        [<ffffffc0000cbcf0>] kthread+0xd0/0xdc
[  122.054367]        [<ffffffc000084cbc>] ret_from_fork+0xc/0x1c
[  122.060237]
-> #0 ((&nvavp->clock_disable_work)){+.+...}:
[  122.065874]        [<ffffffc0009f23ac>] print_circular_bug+0x6c/0x2f8
[  122.072352]        [<ffffffc0001014a4>] __lock_acquire+0x1d9c/0x2358
[  122.078742]        [<ffffffc000102234>] lock_acquire+0x98/0x12c
[  122.084694]        [<ffffffc0000c5ab0>] flush_work+0x3c/0x288
[  122.090472]        [<ffffffc0000c5d80>] __cancel_work_timer+0x84/0x12c
[  122.097034]        [<ffffffc0000c5e34>] cancel_work_sync+0xc/0x18
[  122.103160]        [<ffffffc00065b348>] nvavp_uninit+0x68/0x25c
[  122.109113]        [<ffffffc00065b76c>] tegra_nvavp_release+0xdc/0x150
[  122.115689]        [<ffffffc00065b874>] tegra_nvavp_video_release+0x38/0x5c
[  122.122692]        [<ffffffc000196578>] __fput+0xac/0x228
[  122.128126]        [<ffffffc0001967a8>] ____fput+0x8/0x14
[  122.133556]        [<ffffffc0000c8cfc>] task_work_run+0xc8/0x100
[  122.139596]        [<ffffffc0000abb1c>] do_exit+0x29c/0x998
[  122.145203]        [<ffffffc0000ac280>] do_group_exit+0x38/0xcc
[  122.151156]        [<ffffffc0000bb454>] get_signal_to_deliver+0x2bc/0x600
[  122.157981]        [<ffffffc000087c7c>] do_signal+0x238/0x564
[  122.163760]        [<ffffffc00008819c>] do_notify_resume+0x24/0x5c
[  122.169974]        [<ffffffc000084c20>] work_pending+0x18/0x20
[  122.175841]
[  122.175841] other info that might help us debug this:
[  122.175841]
[  122.196330] Possible unsafe locking scenario:
[  122.196330]
[  122.202269] CPU0                CPU1
[  122.206812] ----                ----
[  122.211355] lock(&nvavp->open_lock);
[  122.215139]                     lock(&nvavp->channel_info[channel_id].pushbuffer_lock);
[  122.224146]                     lock(&nvavp->open_lock);
[  122.230454] lock((&nvavp->clock_disable_work));
[  122.235195]
[  122.235195] *** DEADLOCK ***

Re-order lock sequence in clock_disable_handler to ensure open_lock
is always acquired before acquiring pushbuffer_lock as a possible fix
for the above deadlock scenario.

Bug 1512083

Change-Id: If0ffdd3f1e53baf9599f8cfbb47e48a285817e9e
Signed-off-by: Somasundaram S <somasundaram@nvidia.com>
Reviewed-on: http://git-master/r/408844
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: gadget: tegra: fix usb cable extcon update
Rakesh Bodla [Tue, 20 May 2014 11:43:12 +0000]
usb: gadget: tegra: fix usb cable extcon update

USB cable status  now properly
updated to extcon framework, with which
charging icon will be updated properly.

Bug 1458999
Bug 200002489
Bug 1503711

Change-Id: If509e05e1b0ffd6e1fb34e58b9c01b7345751653
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/412019
(cherry picked from commit 7c1a5e47f5ab792d9d722db32b5c60fc2957c8d9)
Reviewed-on: http://git-master/r/417469
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: TN8: Enable y-cable support for TN8
Rakesh Bodla [Thu, 29 May 2014 05:31:23 +0000]
ARM: tegra: TN8: Enable y-cable support for TN8

Enable the y-cable support for TN8.

Bug 200004368

Change-Id: If0991fc72038f0391e806c0197f88e56f55110c6
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/416533
(cherry picked from commit b7c45565e303a5be63f29e42f95e10160e3b4f17)
Reviewed-on: http://git-master/r/417468
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoextcon: palmas: make aca detection platform dependent
Rakesh Bodla [Tue, 27 May 2014 06:42:18 +0000]
extcon: palmas: make aca detection platform dependent

Make ACA detection platform dependent. Also unset
the mutually explosive property.

Bug 200004368

Change-Id: I2bdd1008dc96debb29542cef0f6b7d4b801c6cd4
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/415127
(cherry picked from commit aa55d35202b5895068bdf8eace842102bf134dab)
Reviewed-on: http://git-master/r/417467
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: support max board voltage for maxim
Philip Rakity [Thu, 24 Apr 2014 16:29:11 +0000]
ARM: tegra: support max board voltage for maxim

new maxim wall charger can be programmed to handle up to
20v output.  Tegra cannot handle loads this high.

define a device tree entry that allows the maximum
board voltage to be known.

bug 1321188
bug 1456402
bug 1459867

(cherry picked from commit db194a402ced2dc582fadcc1aa71155391e1b3d6)
Change-Id: Ibb418dfac64bf226e026c9ec4a0fa6cafc4a5c6e
Reviewed-on: http://git-master/r/409830
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/417039
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: add debounce time to 200ms for magnetic sensor
Laxman Dewangan [Thu, 29 May 2014 10:20:41 +0000]
ARM: tegra: add debounce time to 200ms for magnetic sensor

It is observed that there is huge amount of debounce on the
signal of transtion when smart cover flipped.

Keep the safe value of debounce time of the signal from sensor to
200ms.

bug 200005902

Change-Id: Ic232f832c0ddb7da468ba8aa432985bdba1210e1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/416628
Reviewed-on: http://git-master/r/417767

5 years agopower: lc70903f: return old temp of device read failed
Laxman Dewangan [Thu, 22 May 2014 10:02:39 +0000]
power: lc70903f: return old temp of device read failed

It is observed that device read failed once in while when reading
temp from device. The next read success. To resolve the temp read fail
from device, return last temperature read from device.

bug 200006331

Change-Id: Ic305dbc013a44e71490b9c4defe752319cb22b44
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/413137
Reviewed-on: http://git-master/r/417766

5 years agoarm64: tegra132: add MTS interface for Vret for Bowmore E1973
Krishna Sitaraman [Thu, 29 May 2014 22:06:42 +0000]
arm64: tegra132: add MTS interface for Vret for Bowmore E1973

Bug 1470221

Change-Id: I5cfdaa67faf784388f3456a6f5f58396485bb7ea
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/416795
Reviewed-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Tested-by: Karthik Ramakrishnan <karthikr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: Correct touch regulator.
Jordan Nien [Wed, 28 May 2014 09:38:09 +0000]
arm: tegra: Correct touch regulator.

- Touch regulator for P1761 A03 is ldousb.

Change-Id: I39aea58540d8795c20305eef976536632bc56672
Signed-off-by: Jordan Nien <jnien@nvidia.com>
Reviewed-on: http://git-master/r/416004
(cherry picked from commit b68f6794d0eaeb43aece0422008d23e46ca915b0)
Reviewed-on: http://git-master/r/416972
Reviewed-by: Alex Chen <alchen@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: pinmux: use pull-none for PK2
Jordan Nien [Wed, 21 May 2014 08:25:52 +0000]
arm: tegra: pinmux: use pull-none for PK2

No need to pull up/down for touch INT per Raydium suggestion.

Bug 200002716

Change-Id: I52f4543916637eec8224557fd450e29273e8b3b2
Signed-off-by: Jordan Nien <jnien@nvidia.com>
Reviewed-on: http://git-master/r/412997
(cherry picked from commit 023b46f87d6d251ca7a4d51ea6f2fcd92325babf)
Reviewed-on: http://git-master/r/414796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Chen <alchen@nvidia.com>
Reviewed-by: Tony Hsiao <thsiao@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: edp: clean up t13 edp code
Diwakar Tundlam [Thu, 29 May 2014 22:07:48 +0000]
arm: tegra: edp: clean up t13 edp code

Move t13x edp params into its own file.
Clean up unnecessary core-edp constructs.

Change-Id: I215b52cfdd2db2f806e141e3b88a57492b17c0db
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/416798
Reviewed-by: Automatic_Commit_Validation_User

5 years agoregulator: as3722: add enable_time for regulators
Bibek Basu [Wed, 14 May 2014 09:21:27 +0000]
regulator: as3722: add enable_time for regulators

Add enable time of sd2/3,sd4,sd5 regulator

Bug 1481642

Change-Id: I73e8ff5c34e9db9f13a181e01a268c740ccfb410
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/409334
(cherry picked from commit 747aca06bdf06ea746cbf20fc39ff8f8204e6558)
Reviewed-on: http://git-master/r/417651
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoedp: sysedp: fix unit in batmon debufs prints
Timo Alho [Mon, 26 May 2014 13:07:21 +0000]
edp: sysedp: fix unit in batmon debufs prints

Battery temperatures are reported in 0.1C units, fix the debugfs
prints to not have inconsistent unit.

Bug 200006249

Change-Id: I98ee47d57e8a14750f7746fe15c8db7268b480f0
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/415002
(cherry picked from commit 2c1c13b8941761f630cf34f9d8d5ca5d54b90fc0)
Reviewed-on: http://git-master/r/417624
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agovideo: tegra: dp: fix memleak in tegra_dp_edid
Ishwarya Balaji Gururajan [Sat, 31 May 2014 06:32:52 +0000]
video: tegra: dp: fix memleak in tegra_dp_edid

fix memleak in tegra_dp_edid by freeing modedb
after tegra_edid_get_monspecs

Bug 1518771

Change-Id: Id2e7873e370a3759955602ae2feac037ba94b79a
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/417369
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm64: tegra132: add MTS interface for vret for P1761 and P1765
Hridya [Fri, 30 May 2014 19:16:58 +0000]
arm64: tegra132: add MTS interface for vret for P1761 and P1765

Bug 1470221

Change-Id: Iadf57970008d7e3632cf2ec8b20952f75b42aa23
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/417230
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>