5 years agodvfs: tegra21: Rename thermal safe maximum frequency
Alex Frid [Sat, 18 Oct 2014 02:17:34 +0000]
dvfs: tegra21: Rename thermal safe maximum frequency

Renamed field and function operated on thermal safe maximum frequency
to make it clear that it is fmax at Vmin (not global fmax).

Change-Id: Ie2b5234e87dc5dc03ccdaeb2916f0b776e56b640
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/559058
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoclock: tegra21: Enable CPU-to-EMC rate ratio limits
Alex Frid [Wed, 1 Oct 2014 19:55:39 +0000]
clock: tegra21: Enable CPU-to-EMC rate ratio limits

Change-Id: Icdd0a06146a1a3b5e675f37d2fc9d6479f1fd74d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/552671
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM64: tegra: Add VDD_CORE rail to Tegra21 DT
Alex Frid [Sat, 18 Oct 2014 07:20:51 +0000]
ARM64: tegra: Add VDD_CORE rail to Tegra21 DT

Change-Id: If0d7f055b46edbec367d39affe0f6b7017fd89c1
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/559064
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agoarm: tegra: isomgr: Adding preliminary T210 support
Alex Waterman [Tue, 9 Sep 2014 01:25:25 +0000]
arm: tegra: isomgr: Adding preliminary T210 support

This enables the display clients only for the time being. As more
clients need this support they can be added.

Change-Id: I8d64658fca8622ad7e0baa3e0abb19066c19a092
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/499875
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agomisc: tegra-baseband: remove use_xhci_hsic
Neil Patel [Fri, 17 Oct 2014 14:23:31 +0000]
misc: tegra-baseband: remove use_xhci_hsic

This was re-added due to a merge error.

Bug 1539709

Change-Id: I117d3e9fd4584e64b6103dcdbfa406ad60992366
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/558920
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mark Kuo <mkuo@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoclock: tegra: Record PLL input rate
Alex Frid [Fri, 17 Oct 2014 02:01:28 +0000]
clock: tegra: Record PLL input rate

Stored PLL input rate in the respective configuration structure field.
For now it is redundant, since input rate is passed into configuration
procedure explicitly, but saving it in the structure may be useful as
debug information.

Change-Id: Ic076d45f5128ee522dd5bf8fbc7b5d77d5fdcacd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/558728
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agodvfs: tegra21: Update CPU Vmax to p4v6 DVFS table
Alex Frid [Thu, 16 Oct 2014 22:58:20 +0000]
dvfs: tegra21: Update CPU Vmax to p4v6 DVFS table

Changed CPU Vmax to 1.17V per DVFS table release 6.

Bug 1558421

Change-Id: I851f440cb3f5897289ea1a455e1eef497a33e926
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/558628
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agoclock tegra21: Insert low range SBUS threshold
Alex Frid [Wed, 15 Oct 2014 07:11:27 +0000]
clock tegra21: Insert low range SBUS threshold

Made sure system bus low range rate threshold is inserted into the bus
rounding table, so that low range PLL source is selected when crossing
down the range boundary even if it does not trigger DVFS voltage
change.

Change-Id: Idf4a12c54bc5bf96fdfc131660eeb75c0bb033a2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/558204
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agoclock tegra21: Use SHARED_SCLK macro
Alex Frid [Tue, 14 Oct 2014 06:25:21 +0000]
clock tegra21: Use SHARED_SCLK macro

Used SHARED_SCLK macro to install all system bus users.

Change-Id: I8108bf260995354b4d2cb5d5cabc9a6a0fac208a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/556638
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agor8152: fix setting RTL8152_UNPLUG
hayeswang [Tue, 30 Sep 2014 08:48:01 +0000]
r8152: fix setting RTL8152_UNPLUG

The flag of RTL8152_UNPLUG should only be set when the device is
unplugged, not each time the rtl8152_disconnect() is called.
Otherwise, the device wouldn't be stopped normally.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=f561de33d63aefb97fb0c3653a36fb32d4e8c74a

Change-Id: I7dbc931baa65efa46d572ebd7b93209e6fe01751
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit f561de33d63aefb97fb0c3653a36fb32d4e8c74a)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553398
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: fix the carrier off when autoresuming
hayeswang [Tue, 23 Sep 2014 08:31:47 +0000]
r8152: fix the carrier off when autoresuming

netif_carrier_off would be called when autoresuming, even though
the cable is plugged. This causes some applications do relative
actions when detecting the carrier off. Keep the status of the
carrier, and let it be modified when the linking change occurs.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=445f7f4d62628cb2971db884084d162ecb622ec7

Change-Id: I4998c7585e5e707387242d5fbac6d6b5f1654ba7
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit 445f7f4d62628cb2971db884084d162ecb622ec7)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/552185
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: disable ALDPS
hayeswang [Fri, 19 Sep 2014 07:17:18 +0000]
r8152: disable ALDPS

If the hw is in ALDPS mode, the hw may have no response for accessing
the most registers. Therefore, the ALDPS should be disabled before
accessing the hw in rtl_ops.init(), rtl_ops.disable(), rtl_ops.up(),
and rtl_ops.down(). Regardless of rtl_ops.enable(), because the hw
wouldn't enter ALDPS mode when linking on. The hw would enter the
ALDPS mode after several seconds when link down occurs and the ALDPS
is enabled.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=d70b1137233836be1d71bd53ae60bec6c9e7203c

Change-Id: I29cc1307178e02b2f00df6b1fa9f316ad3b7a0d8
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit d70b1137233836be1d71bd53ae60bec6c9e7203c)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553397
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: fix the checking of the usb speed
hayeswang [Thu, 24 Jul 2014 08:37:43 +0000]
r8152: fix the checking of the usb speed

When the usb speed of the RTL8152 is not high speed, the USB_DEV_STAT[2:1]
should be equal to [0 1]. That is, the STAT_SPEED_FULL should be equal
to 2.

There is a easy way to check the usb speed by the speed field of the
struct usb_device. Use it to replace the original metheod.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=a3cc465d95c32bfb529f69dee7841ecd67525561

Change-Id: I681d5daed3590845003d82faa923de129483ffa6
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Spotted-by: Andrey Utkin <andrey.krieger.utkin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit a3cc465d95c32bfb529f69dee7841ecd67525561)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553396
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: fix r8152_csum_workaround function
hayeswang [Fri, 11 Jul 2014 08:48:27 +0000]
r8152: fix r8152_csum_workaround function

The transport offset of the IPv4 packet should be fixed and wouldn't
be out of the hw limitation, so the r8152_csum_workaround() should
be used for IPv6 packets.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=a91d45f1a343188793d6f2bdf1a72c64015a8255

Change-Id: I984c462e3677bdeb2ebe52dcb1a04654ad8e0a8f
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit a91d45f1a343188793d6f2bdf1a72c64015a8255)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553395
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: support jumbo frame for RTL8153
hayeswang [Thu, 10 Jul 2014 02:58:54 +0000]
r8152: support jumbo frame for RTL8153

The maximum jumbo frame size for RTL8153 is 9K bytes.
Change the max rx packet size to 9K.
Change the use of the shared fifo from 6K (default) to 12K for tx.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=69b4b7a4148e94a3fe7f06f72ee70113a6c61837

Change-Id: Ibac731fdd34664b3a99e5a9c7019b8fbd5a355dd
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit 69b4b7a4148e94a3fe7f06f72ee70113a6c61837)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553394
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: wake up the device before dumping the hw counter
hayeswang [Tue, 8 Jul 2014 06:49:28 +0000]
r8152: wake up the device before dumping the hw counter

The device should be waked up from runtime suspend before dumping
the hw counter.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=0b0302449110ca5ca4350458ed57b971fcb78ec1

Change-Id: Ib67663afdf9830f82d8c09147b3c9cf6f0696e5b
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit 0b0302449110ca5ca4350458ed57b971fcb78ec1)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553393
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: increase the tx timeout
hayeswang [Thu, 3 Jul 2014 03:55:48 +0000]
r8152: increase the tx timeout

When the system is too busy to complete the urb, the tx timout function
would be called. This causes the other tx urbs would be killed, too.
Increase the tx timeout to avoid it.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=b8125404c242a6336eacaa54047b27cfd3fee68e

Change-Id: I5604dca925c50ee71a30ce1c97893adc68dd21a9
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit b8125404c242a6336eacaa54047b27cfd3fee68e)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553392
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: Use kmemdup instead of kmalloc + memcpy
Benoit Taine [Mon, 26 May 2014 15:21:23 +0000]
r8152: Use kmemdup instead of kmalloc + memcpy

This issue was reported by coccicheck using the semantic patch
at scripts/coccinelle/api/memdup.cocci

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=c4438f03ca439daa349d93d7102ed36422dfcd7f

Change-Id: I2987a0a992f6fe7a312bd92b84ab3b954dfa81e8
Signed-off-by: Benoit Taine <benoit.taine@lip6.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit c4438f03ca439daa349d93d7102ed36422dfcd7f)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553391
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agonet: get rid of SET_ETHTOOL_OPS
Aly Hirani [Fri, 3 Oct 2014 18:34:03 +0000]
net: get rid of SET_ETHTOOL_OPS

net: get rid of SET_ETHTOOL_OPS

Dave Miller mentioned he'd like to see SET_ETHTOOL_OPS gone.
This does that.

Mostly done via coccinelle script:
@@
struct ethtool_ops *ops;
struct net_device *dev;
@@
-       SET_ETHTOOL_OPS(dev, ops);
+       dev->ethtool_ops = ops;

Compile tested only, but I'd seriously wonder if this broke anything.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=7ad24ea4bf620a32631d7b3069c3e30c078b0c3e
Cherry-picked the change only to r8152.c

Change-Id: I79339c4fae89f4f8336f349d8855c1ef6ab0c9ba
Suggested-by: Dave Miller <davem@davemloft.net>
Signed-off-by: Wilfried Klaebe <w-lkml@lebenslange-mailadresse.de>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit 7ad24ea4bf620a32631d7b3069c3e30c078b0c3e)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553390
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agor8152: check RTL8152_UNPLUG
hayeswang [Fri, 11 Apr 2014 09:54:31 +0000]
r8152: check RTL8152_UNPLUG

When the device is unplugged, the driver would try to disable the
device. Add checking the flag of RTL8152_UNPLUG to skip setting
the device when it is unplugged. This could shorten the time of
unloading the driver.

From http://git.kernel.org/cgit/linux/kernel/git/davem/net.git/commit/?id=6871438cc4e5307ccda70fa2a246a546300ac9fa

Change-Id: Ifa338e4db38b61ed6d339cce6f4286c69acf3c9a
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from upstream commit 6871438cc4e5307ccda70fa2a246a546300ac9fa)
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/553389
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: dc: Remove dpaux irq access for dp fake panel.
Vinod G [Sat, 11 Oct 2014 01:04:32 +0000]
video: tegra: dc: Remove dpaux irq access for dp fake panel.

Fake Dp doesnot need to access the dpaux interrupt registers.

Change-Id: I58580844401593cd4a6440a79f58c397b1ad87dc
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: http://git-master/r/555655
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: add vDSO support **RUN "make mrproper"**
Alex Van Brunt [Tue, 7 Oct 2014 01:31:15 +0000]
arm: add vDSO support **RUN "make mrproper"**

*** Run "make mrproper" after applying this patch to force header
*** files to be regenereated. Otherwise AT_SYSINFO_EHDR may not be
*** defined.

Add vDSO support for clock_gettime and gettimeofday.

Ensure that the header generation script runs before building files
that may consume the header by adding an arm-obj-y list of files.

bug 1466303

Change-Id: Ic15ee42d4e6ccbdcd56ec6eb4b5c68123031b127
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Signed-off-by: Li Li <lli5@nvidia.com>
Reviewed-on: http://git-master/r/559047
GVS: Gerrit_Virtual_Submit

5 years agoarm64: Add AArch32 vDSO support
Alex Van Brunt [Fri, 7 Mar 2014 21:49:47 +0000]
arm64: Add AArch32 vDSO support

Support vDSO in AArch32 mode for clock_gettime and gettimeofday.

bug 1466303

Change-Id: Ib6b03507cbc89b4d5de3f8adbd59d844ed472244
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/559046
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra12: Add p1859 android DT files
Joshua Cha [Tue, 14 Oct 2014 01:38:13 +0000]
arm: tegra12: Add p1859 android DT files

Bug 200045779

Change-Id: If8c2179a302ea2978b84c3849d7ab1943366dc33
Signed-off-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-on: http://git-master/r/556551
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Kim <bok@nvidia.com>
Tested-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM64: tegra: configs: Enable KMEMLEAK
Sri Krishna chowdary [Fri, 17 Oct 2014 14:10:29 +0000]
ARM64: tegra: configs: Enable KMEMLEAK

https://www.kernel.org/doc/Documentation/kmemleak.txt
  # cat /sys/kernel/debug/kmemleak

Bug 200035959

Change-Id: I9e1cababc87de56c372e1fd7098345bd620e0e8e
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/559315
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agommc: core: Fix manufacture date
kirankumar Bobbu [Tue, 7 Oct 2014 17:49:19 +0000]
mmc: core: Fix manufacture date

Manufacture date is wrongly decoded for emmc 4.41 and later devices.

For devices earlier to emmc 4.41, manufacture year = year field of
cid register + 1997.
For emmc 4.41 and later devices, manufacture year = year field of
cid register + 2013.
For years 2010, 2011 and 2012, encoding is same for all devices, i.e.
manufacture year = year field of cid register + 1997.

As of now, support for devices earlier to emmc 4.41 is present.
This change fixes the decoding date for emmc 4.41 and later devices also.

Bug 200019683

Change-Id: Ie631b24892a2678e0f96f785a82d0bed4854c922
Signed-off-by: kirankumar Bobbu <kbobbu@nvidia.com>
Reviewed-on: http://git-master/r/554272
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshagiri Holi <sholi@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

5 years agofastboot: Update fastboot usb pid in loki dts
Abhishek [Fri, 17 Oct 2014 06:29:23 +0000]
fastboot: Update fastboot usb pid in loki dts

Update fastboot pid in tegra210-loki-e-p2530-0031-e00-00.dts.

Bug 1558554

Change-Id: Ie698a104502cc075f63cad36fd9b9cc403f2c20c
Signed-off-by: Abhishek. <abhishekc@nvidia.com>
Reviewed-on: http://git-master/r/558784
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Reviewed-by: Vivek Kumar <vivekk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: Do not init interrupt mask
Terje Bergstrom [Thu, 16 Oct 2014 07:24:10 +0000]
gpu: nvgpu: Do not init interrupt mask

Interrupt mask init state is correct, so do not touch it.

Bug 1567274

Change-Id: I70673e406944823bd1cbfeee93ec75ce1e1af5da
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/558292

5 years agogpu: nvgpu: vgpu: Fix vgpu mm code build break
Terje Bergstrom [Tue, 21 Oct 2014 09:05:51 +0000]
gpu: nvgpu: vgpu: Fix vgpu mm code build break

Some fields were moved to vm specific fields from global mm fields.
Fix vgpu's mm code to follow that.

Zero page is never allocated in vgpu, so don't free it.

Change-Id: Ieabb33f1f004c9ffeeceabf61029b5bafc391889
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/559818
Reviewed-by: Automatic_Commit_Validation_User

5 years agoiommu/tegra: clean cached mapping on domain destroy
Nitin Sehgal [Mon, 20 Oct 2014 06:32:25 +0000]
iommu/tegra: clean cached mapping on domain destroy

- In case of attach failure mappings are released but cached pointer is
not cleaned.

bug 1418245

Change-Id: I41abaf24250c4eb10a837b6a4de55e14103f25e4
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-on: http://git-master/r/559279
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agogpu: nvgpu: remove register from whitelist
Kirill Artamonov [Sun, 5 Oct 2014 17:35:20 +0000]
gpu: nvgpu: remove register from whitelist

Userspace access to gr_pri_bes_crop_hww_esr removed
on Tegra platform.

Remove gr_pri_bes_crop_hww_esr register from gk20a whitelist.

bug 1456562

Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Change-Id: Id9c3f85e39c970182283a0cdbb87ac5b6b83a534
Reviewed-on: http://git-master/r/553636
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agommc: tegra: remove TUN_CTRL0_TUN_ITERATIONS
Naveen Kumar Arepalli [Tue, 21 Oct 2014 09:31:14 +0000]
mmc: tegra: remove TUN_CTRL0_TUN_ITERATIONS

-remove duplicate definition of SDHCI_VNDR_TUN_CTRL0_TUN_ITERATIONS

Change-Id: I7bf1bfedcde644e2fcf93076ce628038e08ec95a
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/559826
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agodrivers: cpuidle: more realistic residencies
Antti P Miettinen [Fri, 12 Sep 2014 14:56:10 +0000]
drivers: cpuidle: more realistic residencies

Make residency/latency values more realistic.

Change-Id: Ie450f68bd0da785b6510fe165b2d0eb023bc8b54
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/557167
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoarm: tegra: dts: p1859: Add audio support in DT
Simon Je [Tue, 30 Sep 2014 02:41:26 +0000]
arm: tegra: dts: p1859: Add audio support in DT

This change includes device tree changes to enable
audio playback in tegra-virtual dirver as master

Bug 200021055

Change-Id: I1c0a580d47e0f7f8061bcd86af2f93f11b3820d0
Signed-off-by: Simon Je <sje@nvidia.com>
Reviewed-on: http://git-master/r/552030
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: hdmi: Calculate accurate pclk freq
Animesh Kishore [Wed, 15 Oct 2014 11:26:56 +0000]
video: tegra: hdmi: Calculate accurate pclk freq

Bug 200039235

Change-Id: I5c0ef93bd868ffd3b60ef060022f2accc3d8dc09
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/557936
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoARM64: laguna: DT support for pca9546
Pankaj Dabade [Fri, 17 Oct 2014 09:44:36 +0000]
ARM64: laguna: DT support for pca9546

Added DT entries for PCA9546 for laguna-erss.

Bug 200024115

Change-Id: I587bc735d12cf278aee5738c66ff35ae2fd4b847
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/455082
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agommc: tegra: Set HW tuning iterations to 256.
Naveen Kumar Arepalli [Fri, 17 Oct 2014 04:03:05 +0000]
mmc: tegra: Set HW tuning iterations to 256.

-Fix a typo which is setting tuning iterations to
128.

Bug 200046192

Change-Id: I368058215ed19cce3ecbe45d22724d580b3aad49
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/558740
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoARM: vmc30t124: config: enable SND_SOC_TEGRA_VIRT_VCM30T124_SLAVE
Simon Je [Tue, 30 Sep 2014 02:37:06 +0000]
ARM: vmc30t124: config: enable SND_SOC_TEGRA_VIRT_VCM30T124_SLAVE

This change adds defconfig to enable tegra-virtual pcm driver.

Bug 200021055
Bug 200040586

Change-Id: Id678f9ae66fa31e73f91a701ea0aa77832c76485
Signed-off-by: Simon Je <sje@nvidia.com>
Reviewed-on: http://git-master/r/553792
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Haley Teng <hteng@nvidia.com>

5 years agommc: sdhci: tegra: power-off-rail DT support
Bitan Biswas [Fri, 17 Oct 2014 11:53:42 +0000]
mmc: sdhci: tegra: power-off-rail DT support

bug 200043135

Change-Id: Ib356e4ecb8b43e149f0aeca3c3f53adcbc97d844
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/558909

5 years agoARM64: tegra21: dts: enable power-off-rail
Bitan Biswas [Fri, 17 Oct 2014 11:50:12 +0000]
ARM64: tegra21: dts: enable power-off-rail

Enable Tegra sdhci reboot notifier for following
boards through DT property "power-off-rail" :
 - Tegra210 ERS, loki, foster

bug 200043135

Change-Id: Ic58fb8f7669cc348f498b49206a7dd43461c80fe
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/558908
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>

5 years agommc: host: sdhci: tegra: DT: update bindings
Bitan Biswas [Fri, 17 Oct 2014 11:39:23 +0000]
mmc: host: sdhci: tegra: DT: update bindings

New boolean binding power-off-rail enables
reboot notifier

bug 200043135

Change-Id: Ibdc08a81aa6cdf13e81f078caabae688a1d9f1f0
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/558907

5 years agommc: sdhci: tegra: disable rtpm at reboot
Bitan Biswas [Mon, 6 Oct 2014 14:01:07 +0000]
mmc: sdhci: tegra: disable rtpm at reboot

During Boot stress test, we do not want runtime
callbacks to execute. Hence disable runtime
power management callbacks as part of
Tegra sdhci reboot notifier.

bug 200043135

Change-Id: I5d389aa5eb82abb4d3f36f6884001c253fae5a1a
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/553831

5 years agoarm: tegra: config: enable some configs for virtualization
Haley Teng [Mon, 6 Oct 2014 03:25:27 +0000]
arm: tegra: config: enable some configs for virtualization

enable below kernel configs for virtualization in
tegra_vcm30t124_android_defconfig

- CONFIG_TEGRA_HV_NET
- CONFIG_TEGRA_HV_COMM
- CONFIG_TEGRA_GR_VIRTUALIZATION
- CONFIG_VIRT_DRIVERS
- CONFIG_TEGRA_VIRTUALIZATION
- CONFIG_TEGRA_HV_MANAGER

Bug 200041597

Change-Id: I03618db5a02c40e8f89112c04f71e69bd775d309
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/553671
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agogpu: nvgpu: cde: set err properly in oom condition
Konsta Holtta [Wed, 15 Oct 2014 06:52:08 +0000]
gpu: nvgpu: cde: set err properly in oom condition

When gk20a_gmmu_map runs out of memory, set the error code before
returning early, so that caller knows about that cde load didn't succeed
and wouldn't use the bad context.

Change-Id: I1e166c78e39f07df941a29fc4e392a853d97a5c6
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/557273
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: tegra: p1859: enable GPU, DC virtualization for Android as VM1
Haley Teng [Mon, 6 Oct 2014 03:31:04 +0000]
arm: tegra: p1859: enable GPU, DC virtualization for Android as VM1

Android (VM1) is GPU client and owns disp2 (DC1) & HDMI

Bug 200041597

Change-Id: I7032eaa115193395e1dd78d96c2f62b95f4eca0c
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/553672
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: tegra: fix compile error for t132
Antti P Miettinen [Wed, 8 Oct 2014 12:49:32 +0000]
arm64: tegra: fix compile error for t132

Exclude also tegra210_suspend_dram() for non T210 compile.

Change-Id: I472a739a6f0d80b2a1a3f590965e41df9a609d47
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/554612
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoadsp: dfs: check dfs policy before setting freq
Puneet Saxena [Sun, 12 Oct 2014 16:22:06 +0000]
adsp: dfs: check dfs policy before setting freq

while setting freq from actmon, check current dfs
policy.

bug 200045352

Change-Id: Ib1b19a9b404a21a8472c8d551faa8e7c1117e7f5
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/555798
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoNVIDIA-REVIEWERS: Add upstream arm64 module
Alex Van Brunt [Thu, 16 Oct 2014 18:00:08 +0000]
NVIDIA-REVIEWERS: Add upstream arm64 module

Add upstream arm64 module so that internal tools can be used to track
the code and so that engineers know who to get to review any changes
to these files.

Change-Id: Ied87606401a65ab16316f9788fd0f713b7b8342a
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/558505
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agogpu: nvgpu: Implement 64k large page support
Terje Bergstrom [Thu, 16 Oct 2014 12:15:11 +0000]
gpu: nvgpu: Implement 64k large page support

Implement support for 64kB large page size. Add an API to create an
address space via IOCTL so that we can accept flags, and assign one
flag for enabling 64kB large page size.

Also adds APIs to set per-context large page size. This is possible
only on Maxwell, so return error if caller tries to set large page
size on Kepler.

Default large page size is still 128kB.

Change-Id: I20b51c8f6d4a984acae8411ace3de9000c78e82f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agogpu: nvgpu: Common VM initializer
Terje Bergstrom [Fri, 3 Oct 2014 04:32:19 +0000]
gpu: nvgpu: Common VM initializer

Merge initialization code from gk20a_init_system_vm(),
gk20a_init_bar1_vm() and gk20a_vm_alloc_share() into gk20a_init_vm().

Remove redundant page size data, and move the page size fields to be
VM specific.

Bug 1558739
Bug 1560370

Change-Id: I4557d9e04d65ccb48fe1f2b116dd1bfa74cae98e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agogpu: nvgpu: Remove unused symbols
Terje Bergstrom [Thu, 16 Oct 2014 12:07:31 +0000]
gpu: nvgpu: Remove unused symbols

Remove unused symbols in platform file and gk20a.c.

Bug 1558739

Change-Id: If160a75061ecb4ad9cbc4abfb9bc409457299738
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM64: DTS: tegra21: sd card detect enable
Bitan Biswas [Tue, 14 Oct 2014 09:21:50 +0000]
ARM64: DTS: tegra21: sd card detect enable

Tegra GPIO pin for SD card detect on T210 ERS set

Change-Id: Ied250553a955c119d8515a02c63506ebf72fa3d5
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agogk20a: Moved bind fecs to init_gr_support
Mahantesh Kumbar [Tue, 14 Oct 2014 12:14:34 +0000]
gk20a: Moved bind fecs to init_gr_support

-Moved bind fecs from work queue to init_gr_support.
-It makes all CPU->FECS communication to happen before
booting PMU, and after we boot PMU, only PMU talks to
FECS. So it removes possibility to race between CPU
and PMU talking to FECS.

Bug 200032923

Change-Id: I01d6d7f61f5e3c0e788d9d77fcabe5a91fe86c84
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/559733

5 years agogpu: nvgpu: gk20a: Fix non static symbol
Amit Sharma [Tue, 30 Sep 2014 13:12:11 +0000]
gpu: nvgpu: gk20a: Fix non static symbol

Fixed sparse non static symbol warning by making the following symbol 'static':
- to_gk20a_sync_pt
- to_gk20a_timeline

Bug 200032218

Change-Id: Ie0310116aa1500ae8e4838b8a9ad4943a61cfc24
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/552052
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoiommu/tegra: smmu: Fix null dereference
Sri Krishna chowdary [Fri, 17 Oct 2014 11:04:17 +0000]
iommu/tegra: smmu: Fix null dereference

All smmu clients do not have a DT node yet. Hence, add
null check before dereferencing dev->of_node.

Bug 200046511

Change-Id: I3e4eea477a83b8f3ca33f5cca1c1d40739f35d81
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>

5 years agopower: bq2419x: enable wakeup functionality
Laxman Dewangan [Fri, 17 Oct 2014 15:31:34 +0000]
power: bq2419x: enable wakeup functionality

Enable suspend wake functionality from interrupt of bq2419x.

Change-Id: I959558d0bcb471b67a39c5f78e7a54f61029cec3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoextcon: gpio: make extcon-gpio interrupt to early resume
Laxman Dewangan [Fri, 17 Oct 2014 12:10:59 +0000]
extcon: gpio: make extcon-gpio interrupt to early resume

Early resume gpio interrupt so that isr handler can get called
when resuming from suspend due to GPIO toggling.

bug 200041495

Change-Id: I2c4151369340d88b455c1e1e08e6fcf312ba872c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agomfd: max77620: display the sub irqs on resume
Laxman Dewangan [Fri, 17 Oct 2014 12:07:35 +0000]
mfd: max77620: display the sub irqs on resume

When system wakeup from suspend due to wake from PMIC then
display the sub irq of device who generated waekup. This
help on debugging the cause of wakeup.

Change-Id: I6929e3143b7a496b02f15a526778e4b74aa4090f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/558894

5 years agogpio: max77620: make gpio interrupt to early resume
Laxman Dewangan [Fri, 17 Oct 2014 12:06:27 +0000]
gpio: max77620: make gpio interrupt to early resume

Early resume PMIC GPIO interrupt so that isr handler can get called
when resuming from LP0 due to GPIO toggling.

Change-Id: I600c1e5596df18b38f148324906be49eca577604
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agortc: max77620: make RTC interrupt to early resume
Laxman Dewangan [Fri, 17 Oct 2014 12:04:59 +0000]
rtc: max77620: make RTC interrupt to early resume

Early resume PMIC RTC interrupt so that isr handler can get called
when resuming from LP0 due to RTC alarm.

Change-Id: I0626644a27dc618100720b199e70d9b1dbd3345b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoplatform: tegra: prints WAKE enable/status and level properly
Laxman Dewangan [Thu, 16 Oct 2014 12:13:30 +0000]
platform: tegra: prints WAKE enable/status and level properly

As Tegra3 onwards, it is supported the 64 bit for wakeup and not
supporting tegra2x, printing the log for wake enable/level and
status without saying tegra3.

Change-Id: Ibb75cc6b04b7d0b69eeac743fc59e42b51ed5536
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: Report error on failed map
Sami Kiminki [Thu, 16 Oct 2014 16:00:09 +0000]
gpu: nvgpu: Report error on failed map

gk20a_vm_map_buffer() used to ignore silently map requests for
non-dmabuf fd:s. Fix this by returning the error code from
dma_buf_get().

Bug 1566862

Change-Id: If01b03f43b67b17d9fb997d914db871520f50c6e
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>

5 years agogpu: nvgpu: gm20b: write gpccs start only once
Vijayakumar [Fri, 17 Oct 2014 07:00:03 +0000]
gpu: nvgpu: gm20b: write gpccs start only once

Writing start bit twice can confuse falcon and
results in random behavior.

Bug 200040021

Change-Id: I62eb8e4632ac4fc471d931155471084ee0f9d0a4
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agommc: sdhci: sdmmc1/3 vddio voltage changes.
Naveen Kumar Arepalli [Mon, 20 Oct 2014 03:53:12 +0000]
mmc: sdhci: sdmmc1/3 vddio voltage changes.

-Enable Broken SD2.0 Support.
-Limit vddio min and max voltage to 2.8V-3.0V

Bug 1561291

Change-Id: I02e6b98374fc435c8128e284e263769cbdb6000c
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/554180
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM64: tegra21: Enable dynamic printk
Alex Frid [Fri, 17 Oct 2014 00:03:06 +0000]
ARM64: tegra21: Enable dynamic printk

Change-Id: I1e3ed4472db4fa033906af452164d85447dd0da4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/558727
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agovideo: tegra: nvmap: strict carveout alloc check
Hiroshi Doyu [Thu, 16 Oct 2014 00:31:28 +0000]
video: tegra: nvmap: strict carveout alloc check

A little bit strict check which depends less on board files.

Change-Id: If9780ec046fa1878dd1140766f1cb90c016f6f13
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/558177

5 years agommc: increase timeout for MMC COMBO commands
Seshagiri.H [Tue, 14 Oct 2014 05:03:18 +0000]
mmc: increase timeout for MMC COMBO commands

After all COMBO commands are executed we send CMD13
to check for card status if it is moved from PROGRAMMING state.
The max wait timeout was too less for refresh commands.

We need have to wait for minium of 5 sec, becasue of usleep_range
this range can be from 5 to 25 Secs

Bug 200045977
Bug 200044665
Bug 200026104
Bug 1501708

Change-Id: Ic6e91ed48a6e67968ddda0186c4659a1ebc57015
Signed-off-by: Seshagiri.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/556608
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

5 years agoiommu/tegra: of: disable IOMMU PCIe temporary
Hiroshi Doyu [Wed, 15 Oct 2014 00:42:28 +0000]
iommu/tegra: of: disable IOMMU PCIe temporary

HACK: Disable IOMMU PCIe till dynamic loadable module issue is solved.

Bug 1561604

Change-Id: Id0960a4e7f6001175cc6dc21b8403d2865e51a1c
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agopcie: host: tegra: Add MSI 64b address support
Jay Agarwal [Wed, 15 Oct 2014 06:40:48 +0000]
pcie: host: tegra: Add MSI 64b address support

Assign high address for MSI. This is required for
64bit ARCH which may use more than 2GB SDRAM size

Bug 200038760
Bug 1190050

Change-Id: I7b03d6183d72ea2e450a0f775711ce89245039b7
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/557247
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agoARM64: dts: enable nvidia,limit-vddio-max-volt
Naveen Kumar Arepalli [Wed, 15 Oct 2014 11:28:32 +0000]
ARM64: dts: enable nvidia,limit-vddio-max-volt

-enable nvidia,limit-vddio-max-volt for sdmmc1 on loki
-enable nvidia,limit-vddio-max-volt for sdmmc1 and sdmmc3
on ers

Bug 1561291

Change-Id: Ifa1726dba748c97234dd533be0df5b8d000c329f
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/557937
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agommc: tegra: update DT bindings.
Naveen Kumar Arepalli [Fri, 17 Oct 2014 05:55:21 +0000]
mmc: tegra: update DT bindings.

-enable nvidia,limit-vddio-max-volt for sdmmc1/3
if it supports 3.3 V

Bug 1561291

Change-Id: Ie6475d713d6ef6a953e8744ef7d340ac1102ff79
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/558769
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agommc: tegra: Handle H/W tuning data correctly
R Raj Kumar [Thu, 25 Sep 2014 06:08:42 +0000]
mmc: tegra: Handle H/W tuning data correctly

Handle h/w tuned tap delays correctly since
h/w tuning is enabled in T21x platforms
for SDMMC tuning modes

Bug 200046947

Change-Id: Ib5cfdfc11da5ca7863a2fe7fbbe447842e9de4bc
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/538795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoata: ahci: Secondary level clock gating
Preetham Chandru R [Mon, 22 Sep 2014 07:39:53 +0000]
ata: ahci: Secondary level clock gating

 - SATA Second Level Clock Gating Configuration
 - Also update SW Overrides removal

Bug 200035394

Change-Id: If4ec60600caf1c4b57010a1e90b0d4fb8814786b
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/501124
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agodvfs: tegra21: Update GPU Vmax to p4v6 DVFS table
Alex Frid [Thu, 16 Oct 2014 22:15:29 +0000]
dvfs: tegra21: Update GPU Vmax to p4v6 DVFS table

Changed GPU Vmax to 1.15V per DVFS table release 6.

Bug 1558421

Change-Id: I0ff68121a9b89a3fd30485118134c14ca12fd544
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/558615
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agodvfs: tegra21: Integrate p4v3 GPU DVFS table
Alex Frid [Fri, 10 Oct 2014 05:46:13 +0000]
dvfs: tegra21: Integrate p4v3 GPU DVFS table

- Updated GPU DVFS table in non-NA mode
- Added GPU DVFS table in NA-mode (disabled currently)
- Moved GPU Vmin to 950mV
- Restored GPU Vmax to 1225mV

Bug 1558421

Change-Id: Ib20a4542d7e0931ef9953a7e496c791d6409d00b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/555342
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agodvfs: tegra21: Update speedo calculation
Alex Frid [Wed, 1 Oct 2014 04:26:56 +0000]
dvfs: tegra21: Update speedo calculation

Implemented new scheme of determining speedo value for Tegra21 CPU,
GPU, and SoC based on the speedo fusing program revision:

- If speedo revision is 3 or above, apply fused CPU, GPU, SOC speedo
  values as is.

- If speedo revision is 2, convert fused CPU, GPU, SOC speedo values
  using linear equation with fixed coefficients specified for each
  domain.

- If speedo revision is 0 or 1, ignore fused speedo values for CPU,
  SOC - apply constant speedo values specified for these two domains;
  for GPU apply fused speedo value with specified fixed offset.

Bug 1558421

Change-Id: I31bee6dbf5379b216912bf7e01bb0beace34c9b9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/552371
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoplatform: nvadsp: disable dfs and clks on os stop
Nitin Kumbhar [Fri, 10 Oct 2014 09:24:38 +0000]
platform: nvadsp: disable dfs and clks on os stop

When adsp os is stopped, disable adsp actmon, dfs and
clocks.

Bug 200044122

Change-Id: I0dde0302370412c9f2e6e8dabc0dc7a64e251d67
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/555404
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Ajay Nandakumar M <anandakumarm@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: clocks: Allow apb=ahb at higher rates.
Ashwin Joshi [Mon, 6 Oct 2014 11:49:43 +0000]
ARM: tegra: clocks: Allow apb=ahb at higher rates.

Allow APB = AHB even at higher rates. Allow this only for specific
platforms such as vcm30t124.

Bug 200019883

Change-Id: I7dc172bc05b9ad449e15ab8024bf4a2dda76f7ca
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/553782
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoRevert "arm: add vDSO support"
Juha Tukkinen [Fri, 17 Oct 2014 08:50:27 +0000]
Revert "arm: add vDSO support"

Fixes dev-kernel build.

This reverts commit 66234d669978a7db6f8be8d14ad4a9c516f3ce5a.

Change-Id: I4a3c2dd9eb5a3e2e9482483e6ed5fc3c232c5ece
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/558819
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoRevert "arm64: Add AArch32 vDSO support"
Juha Tukkinen [Fri, 17 Oct 2014 09:01:39 +0000]
Revert "arm64: Add AArch32 vDSO support"

Fixes dev-kernel build.

This reverts commit 69e80aab6b4b8bd4b7c67f8ffdb9b7a08a06c168.

Change-Id: I1e6fef3fbafd751c8ccf10d6ecf62454d0707e24
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/558822
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoRevert partially "ARM64: tegra: loki: add e01 dt file"
Terje Bergstrom [Fri, 17 Oct 2014 06:01:56 +0000]
Revert partially "ARM64: tegra: loki: add e01 dt file"

This reverts partially commit 823fe86c474afa0f771bb52b0b13215f004819ac.

Bug 1567212

Change-Id: Ia5383cf2d763a068c9370504e2b327c1e56e5cbc
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/558774
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agofastboot: update pid for t210 dts files
Abhishek [Wed, 15 Oct 2014 07:25:44 +0000]
fastboot: update pid for t210 dts files

Update pid for t210 dts files.

Bug 1558554

Change-Id: I60696631e31cf148bab5b31a178b9260e1b0f182
Signed-off-by: Abhishek. <abhishekc@nvidia.com>
Reviewed-on: http://git-master/r/557921
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: add vDSO support
Alex Van Brunt [Tue, 7 Oct 2014 01:31:15 +0000]
arm: add vDSO support

Add vDSO support for clock_gettime and gettimeofday.

Ensure that the header generation script runs before building files
that may consume the header by adding an arm-obj-y list of files.

bug 1466303

Change-Id: Ie852f03e0edb46419214374db439ea9fdb7dd332
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Signed-off-by: Li Li <lli5@nvidia.com>

5 years agoclock: tegra21: Fix PLLDP rate at 270MHz
Alex Frid [Tue, 14 Oct 2014 06:01:01 +0000]
clock: tegra21: Fix PLLDP rate at 270MHz

The only configuration characterized for PLLDP is 270MHz output rate.
Made PLLDP fixed rate PLL in s/w.

Bug 1548117

Change-Id: Ib3e6d5aa1bd50d97e8c858072fb80977a62044c4
Signed-off-by: Alex Frid <afrid@nvidia.com>

5 years agoarm64: Add AArch32 vDSO support
Alex Van Brunt [Fri, 7 Mar 2014 21:49:47 +0000]
arm64: Add AArch32 vDSO support

Support vDSO in AArch32 mode for clock_gettime and gettimeofday.

bug 1466303

Change-Id: I68d29a1b7307648c873fb7ed1e87cb05a0424bfe
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/381005

5 years agoARM64: DTS: Fix comments in some DTS files
Jay Bhukhanwala [Thu, 16 Oct 2014 19:19:43 +0000]
ARM64: DTS: Fix comments in some DTS files

Bug 1566222

Change-Id: Ib8fe363733407946c194b4ad2533f4d228d780a5
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>

5 years agoARM64: DTS: Fix top level Loki DTS names
Jay Bhukhanwala [Thu, 16 Oct 2014 19:16:10 +0000]
ARM64: DTS: Fix top level Loki DTS names

Bug 1566222

Change-Id: I4960d0239a28d2d6908f826cb8c39a7b7c937604
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>

5 years agoARM64: tegra: loki: add e01 dt file
Ray Poudrier [Wed, 8 Oct 2014 21:33:21 +0000]
ARM64: tegra: loki: add e01 dt file

For now just import E00, but this will diverge soon

Change-Id: I3906eac0f2cc8e529c8d285ac9b5014b16a07430
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>

5 years agoiommu/tegra: smmu: don't enable OF_TEGRA_IOMMU_SMMU by default
Krishna Reddy [Thu, 16 Oct 2014 16:16:53 +0000]
iommu/tegra: smmu: don't enable OF_TEGRA_IOMMU_SMMU by default

Select it when SOC specific IOMMU is enabled.
This fixes the linker error when IOMMU is not enabled.

Bug 1566866

Change-Id: If44e70cdfb23c0cb1aa869e69b1400c43f06de23
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: nvmap: cleanup keyword id
Krishna Reddy [Wed, 15 Oct 2014 21:46:11 +0000]
video: tegra: nvmap: cleanup keyword id

rename nvmap_fd_to_handle to nvmap_handle_get_from_fd to
make it more sensible.
As id is obsolete concept, replace the keyword id to avoid
confusion between id and handle.

Change-Id: I090c1bcff50c61ee88fccbb66359a95468ea929a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: hdmi2: enable clocks before hotplug
Jon Mayo [Sat, 11 Oct 2014 00:32:13 +0000]
video: tegra: hdmi2: enable clocks before hotplug

After a hotplug is detected, enable hdmi/SOR clocks in the hotplug
worker before performing i2c/ddc to fetch EDID.

Added a reference count in the form of get/put functions to avoid
duplicate initialization of sor clocks, but typically the clocks will
go through an enable-disable cycle to fetch the EDID then later when a
mode is set by user space another enable will occur.

Bug 1553445
Bug 1562289
Bug 200040584
Bug 200041788

Change-Id: I672ab48f8136c624970c03ed056dce4e4e73b539
Signed-off-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: check clock in dsi and sor
Jon Mayo [Fri, 10 Oct 2014 23:29:54 +0000]
video: tegra: dc: check clock in dsi and sor

check clock state before performing readl()/writel() in DSI and SOR drivers

Change-Id: I1967e0b66d3be0bb9119bdc21cd9311e4509bdee
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/558511

5 years agovideo: tegra: hdmi2: enable clocks before hotplug
Jon Mayo [Sat, 11 Oct 2014 00:32:13 +0000]
video: tegra: hdmi2: enable clocks before hotplug

After a hotplug is detected, enable hdmi/SOR clocks in the hotplug
worker before performing i2c/ddc to fetch EDID.

Added a reference count in the form of get/put functions to avoid
duplicate initialization of sor clocks, but typically the clocks will
go through an enable-disable cycle to fetch the EDID then later when a
mode is set by user space another enable will occur.

Bug 1553445
Bug 1562289
Bug 200040584
Bug 200041788

Change-Id: I8ab83e79092a920783a4bb14af52753f184019f8
Signed-off-by: Jon Mayo <jmayo@nvidia.com>

5 years agoclock: tegra: add handles for spi parent clocks
Krishna Yarlagadda [Wed, 8 Oct 2014 11:54:39 +0000]
clock: tegra: add handles for spi parent clocks

spi needs to reference spi clock parents for selecting
best clock source. This change adds duplicate clocks for
spi parents.

Bug 200043595

Change-Id: Ic913a841bc0d34a65164324c4bb6962403f523b1
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM64: tegra210: Loki: Enable SD SDR104 mode
R Raj Kumar [Wed, 8 Oct 2014 09:10:29 +0000]
ARM64: tegra210: Loki: Enable SD SDR104 mode

Enabled SDR104 mode for SD device on Loki

Bug 1525697

Change-Id: Icbdeb03048455a384470f590034e70d0fc95a186
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>

5 years agommc: tegra: Enable eMMC HS400 mode
R Raj Kumar [Wed, 8 Oct 2014 09:08:40 +0000]
mmc: tegra: Enable eMMC HS400 mode

Enabled eMMC HS400 mode on Loki

Bug 1525697

Change-Id: Id2ca46b6314b9725c9e1d3fbe05d30ffdeba3118
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>

5 years agommc: tegra: Enable eMMC HS200 mode
R Raj Kumar [Wed, 8 Oct 2014 09:06:17 +0000]
mmc: tegra: Enable eMMC HS200 mode

Enabled eMMC HS200 mode on Loki

Bug 1525697

Change-Id: Iceae66621e7e05f2cb06f6cd1e42023645afc159
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>

5 years agodrivers: i2c: bus: siwtch vii2c to legacy i2c mode
Charlie Huang [Wed, 8 Oct 2014 00:21:02 +0000]
drivers: i2c: bus: siwtch vii2c to legacy i2c mode

switch vii2c to the legacy mode to get more stability and independent
to nvhost.

bug 1561622

Change-Id: I201a469a2e1e545269872bcb0c4e25c3466be744
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

5 years agoclock: tegra21: change owner of vii2c/slowi2c
Charlie Huang [Wed, 8 Oct 2014 00:17:40 +0000]
clock: tegra21: change owner of vii2c/slowi2c

vii2c is switched to legacy i2c mode, the new device name is
tegra21-i2c.6

bug 1561622

Change-Id: I1439e8cdc36a8ffc1e7fac8ab644997d37dbc229
Signed-off-by: Charlie Huang <chahuang@nvidia.com>

5 years agoARM64: tegra: t210 board file update
Charlie Huang [Wed, 8 Oct 2014 00:08:29 +0000]
ARM64: tegra: t210 board file update

remove vii2c nvhost client since we switch vii2c to legacy mode
without the support from nvhost.

bug 1561622

Change-Id: Icba22954a7bcf80dd3620a27c777586e6ffd0802
Signed-off-by: Charlie Huang <chahuang@nvidia.com>