5 years agoplatform: tegra: adsp: fix adsp freq time_in_state residency
Puneet Saxena [Fri, 7 Nov 2014 11:29:31 +0000]
platform: tegra: adsp: fix adsp freq time_in_state residency

update time_in_state histogram under lock.
fix memory allocation for time_in_state.

Change-Id: I1513a83a5debfdf6e8df8d1203f48a11dc6cc88e
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/595947
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomisc: mods: use mutex instead of a spinlock
Chris Dragan [Fri, 7 Nov 2014 13:59:09 +0000]
misc: mods: use mutex instead of a spinlock

Calling functions which can sleep, like remap_pfn_range(),
is illegal when holding a spin lock, so use mutex instead.

Guard against mutex lock failure. Mutex lock can fail when
there is a signal.

Bug 1574276

Change-Id: I48781a5388459d799097cda9e328ab29fdcfd788
Signed-off-by: Chris Dragan <kdragan@nvidia.com>
Reviewed-on: http://git-master/r/596004
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Lael Jones <lajones@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoclock: tegra: fix typecast
Bo Yan [Sat, 8 Nov 2014 01:49:57 +0000]
clock: tegra: fix typecast

Remove unnecessary typecast which actually causes Sparse warning.

The "uintptr_t" typecast is only needed when there is a need to
temporarily save pointer to an integer which is later converted
to pointer again. Here the pointer is directly used for MMIO access,
therefore there is no need to do extra typecasting.

bug 200032218

Change-Id: I4476aa8cabfba05315d7b027e385bdd4a8c547de
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/598937
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm64: tegra: remove Sparse warnings
Bo Yan [Sat, 8 Nov 2014 02:21:33 +0000]
arm64: tegra: remove Sparse warnings

declare functions used only inside module as static.

fix typecasting properly.

include necessary headers to get function declaration.

remove unused function argument in tegra210_suspend_dram

bug 200032218

Change-Id: Ic4842e8f2fe7cdb4f7dff3a6ebbc46d294f6c5ad
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/598944
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoclocksource: Enable -Werror
Bo Yan [Fri, 7 Nov 2014 18:28:15 +0000]
clocksource: Enable -Werror

Turn warning to error when building files in drivers/clocksource

bug 1566945

Change-Id: I1ff02080063d22655f255474baee29753d9c8ab5
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/596065
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoclocksource: tegra: fix Sparse warnings
Bo Yan [Fri, 7 Nov 2014 18:27:03 +0000]
clocksource: tegra: fix Sparse warnings

Local variable "ret" is no longer used in tegra210_timer_setup,
remove it.

Function "tegra_read_sched_clock" is not used in ARM64, so
define it conditionally.

Fix typecasting warnings by inserting intermediate stage of casting.
These typecasts are safe.

bug 1566945

Change-Id: I90bd2e49c7df17ce701a410f4ebf5f04d26e7515
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/596064
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm: tegra: fix IO_ADDRESS macro
Bo Yan [Sat, 8 Nov 2014 00:54:47 +0000]
arm: tegra: fix IO_ADDRESS macro

Add __iomem annotation for IO_ADDRESS macro. This helps fixing
large number of following Sparse warnings:

    warning: cast removes address space of expression

bug 200053816

Change-Id: Icead85967d64b329017041369054bf7318b6a641
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/598913
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoplatform: tegra: ptm: t210: fix ptm_remove
Bo Yan [Sat, 8 Nov 2014 01:09:54 +0000]
platform: tegra: ptm: t210: fix ptm_remove

The  MMIO unmap needs to be done on instances allocated for
all CPUs, not on the pointer itself.

bug 200053816

Change-Id: I0be43928159fb71138c9cfbcc77e7a5e2471d2ed
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/598925
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoplatform: tegra: pm: fix Sparse warning
Bo Yan [Sat, 8 Nov 2014 01:41:38 +0000]
platform: tegra: pm: fix Sparse warning

declare suspend_ctx as static since it's used only in pm.c

bug 200032218
bug 200053816

Change-Id: I004eac25c0b96e890c403c9034bc6f2b36cf39b5
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/598934
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoplatform: tegra: bondout: Fix typecast
Bo Yan [Sat, 8 Nov 2014 00:56:29 +0000]
platform: tegra: bondout: Fix typecast

Fix following Sparse warnings

   warning: incorrect type in argument 1 (different address spaces)

bug 200032218

Change-Id: Id3ac3a549369030cb3ceae112c8cb60a928229c4
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/598914
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agogpu: nvgpu: GPU characteristics additions
Sami Kiminki [Fri, 24 Oct 2014 17:40:57 +0000]
gpu: nvgpu: GPU characteristics additions

Add the following info into GPU characteristics: available big page
sizes, support indicators for sync fence fds and cycle stats, gpc
mask, SM version, SM SPA version and warp count, and IOCTL interface
levels. Also, add new IOCTL to fetch TPC masks.

Bug 1551769
Bug 1558186

Change-Id: I8a47d882645f29c7bf0c8f74334ebf47240e41de
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/562904
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: tegra: vcm30t124: add new dts for single vm
Nitin Sehgal [Wed, 29 Oct 2014 10:25:57 +0000]
arm: tegra: vcm30t124: add new dts for single vm

- create a new dts for virtualized linux
- move ivc device node before iommu to enforce ivc probe before smmu probe.
- Also enable virtual drivers in native kernel defconfig.

bug 1418245

Change-Id: If581466e1be1ffa95e1d2be59a7985ba73f4e613
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-on: http://git-master/r/591174
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Sandeep Trasi <strasi@nvidia.com>

5 years agosecurity: tlk_driver: get_cpu() in place of smp_processor_id()
Vandana Salve [Fri, 7 Nov 2014 11:15:52 +0000]
security: tlk_driver: get_cpu() in place of smp_processor_id()

if DEBUG_PREEMPT is enabled, smp_processor_id() "helpfully"
screams when called outside preemptible, so making use of
get_cpu/put_cpu in place of smp_processor_id

<3>[  168.572811] BUG: using smp_processor_id() in preemptible [00000000] code: vpr-shrink_thre/67
<4>[  168.582061] caller is te_set_vpr_params+0x44/0x100
<4>[  168.586998] CPU: 0 PID: 67 Comm: vpr-shrink_thre Tainted: G        W    3.10.49-g5870b28 #1
<4>[  168.595633] Call trace:
<4>[  168.598439] [<ffffffc000089c78>] dump_backtrace+0x0/0xf4
<4>[  168.603917] [<ffffffc000089f70>] show_stack+0x10/0x1c
<4>[  168.609187] [<ffffffc00035cb90>] dump_stack+0x1c/0x28
<4>[  168.614364] [<ffffffc000371a08>] debug_smp_processor_id+0xd4/0xfc
<4>[  168.620647] [<ffffffc00032f634>] te_set_vpr_params+0x40/0x100
<4>[  168.626413] [<ffffffc0008c6e90>] tegra_update_resize_cfg+0x50/0xa8
<4>[  168.632609] [<ffffffc00050d778>] shrink_chunk_locked+0x1b0/0x288
<4>[  168.638640] [<ffffffc00050d8fc>] shrink_resizable_heap+0xac/0xd8
<4>[  168.644681] [<ffffffc00050ded8>] shrink_thread+0x64/0x90

bug 1517584

Change-Id: Ief7da2098080b764d1946da088cc4d72634f572d
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/595919
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

5 years agogpu: nvgpu: Fix comptag calculation for 64k pages
Terje Bergstrom [Wed, 5 Nov 2014 13:21:32 +0000]
gpu: nvgpu: Fix comptag calculation for 64k pages

Comptags are assigned per 128k. For 64k pages this means we need to
assign same index to two pages. Change the logic to use byte sizes.

Change-Id: If298d6b10f1c1cad8cd390f686d22db103b02d12
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/594403

5 years agoRevert "usb: tegra: xhci: write prod settings from dt"
Sridhar Lavu [Sat, 8 Nov 2014 16:07:52 +0000]
Revert "usb: tegra: xhci: write prod settings from dt"

This reverts commit b005b4df886374f7d4d92ffa1e3232b0c594fbbd.
This commit causes a build regression for some platforms.

Bug 1567693 : original bug
Bug 1575740 : regression bug

Change-Id: I8769706233ba64c65c69799cbac408591224ff9d
Signed-off-by: Sridhar Lavu <slavu@nvidia.com>
Reverts-what-was-Reviewed-on: http://git-master/r/592758
Reviewed-on: http://git-master/r/599040

5 years agoinput: misc: pressure: Enable Werror flag
Sumit Singh [Fri, 7 Nov 2014 12:46:25 +0000]
input: misc: pressure: Enable Werror flag

Enable Werror flag for all the files under
input/misc/pressure directory.

Bug 1566945

Change-Id: Ifec4bf557094a287c0a03c451b6e4f0999d50790
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/595972
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoinput: touch: Fix build warnings
Sumit Singh [Tue, 4 Nov 2014 09:50:47 +0000]
input: touch: Fix build warnings

Fix Warnings:
- format '%d' expects argument of type 'int',
but argument has type 'size_t'
- cast to pointer from integer of different
size,
in drivers/input/touchscreen/rm31080a_ts.c file.

Bug 1566945

Change-Id: Icb2b7cdd9d7734dd105ffde267a9bb5855a27b63
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/593256
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoplatform: adsp: mem: use atomic allocations
Nitin Kumbhar [Fri, 7 Nov 2014 11:44:47 +0000]
platform: adsp: mem: use atomic allocations

Allocate new memory chunk atomically as allocation
is being done in a critical section.

Bug 200053776

Change-Id: I4b2070c0156053f8c195b6255c72f9aabb041c96
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/595936
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoirqchip: gic: handle agic suspended state
Nitin Kumbhar [Wed, 5 Nov 2014 11:15:12 +0000]
irqchip: gic: handle agic suspended state

If AGIC is already suspended, then don't perform
any GIC operations.

Bug 1461655

Change-Id: Id391e88ed7e75bef036bfb04bb99678c77605a85
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/594154
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoplatform: ape: add dev suspend/resume callbacks
Nitin Kumbhar [Tue, 4 Nov 2014 12:40:14 +0000]
platform: ape: add dev suspend/resume callbacks

Add suspend/resume callbacks of devices, which are under
APE power domain, while powering APE OFF/ON. This allows
an APE device to save/restore its state.

Bug 1461655

Change-Id: Ic25aa8b2830ff9ca4e8f16f19b24a2b9645fff86
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/593332
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoplatform: tegra: ape: add ape clk for agic
Nitin Kumbhar [Thu, 9 Oct 2014 11:57:10 +0000]
platform: tegra: ape: add ape clk for agic

Enable ape clock while unpowergating APE before accessing
AGIC. This ape clock is disabled while powergating APE after
saving AGIC state.

Bug 1506805
Bug 1461655

Change-Id: Iba6aa9fa68c09b9a26688732aed1e5fa9a3cfce1
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/555022
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM64: tegra21: enable ape in early init
Nitin Kumbhar [Tue, 4 Nov 2014 12:31:59 +0000]
ARM64: tegra21: enable ape in early init

Enable ape clock during early initialization
of platform.

Bug 1461655

Change-Id: If68425a6111d9892b249d3261a98007d1e0b1084
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/593333
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM64: tegra: configs: disable TEGRA_EMC_APE_DFS
Nitin Kumbhar [Tue, 4 Nov 2014 12:27:41 +0000]
ARM64: tegra: configs: disable TEGRA_EMC_APE_DFS

Disabling APE EMC DFS as it keeps APE power domain
always on.

Bug 1461655

Change-Id: Ifa8bc11a85796ae2fd46b1d0d34dfd6abc7bc1fc
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/593331

5 years agoplatform: nvadsp: fix ape emc dfs exit
Nitin Kumbhar [Tue, 4 Nov 2014 12:55:24 +0000]
platform: nvadsp: fix ape emc dfs exit

If CONFIG_TEGRA_EMC_APE_DFS config is disabled, then
skip APE EMC DFS de-initialization from nvadsp_remove().

Bug 1461655

Change-Id: I7686b216477eb8c7681877c58bae2b1bdb685b66
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/593330
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agonet: wireless: bcmdhd: pick default ampdu_mpdu from dhd flag
Manikanta [Fri, 24 Oct 2014 06:50:18 +0000]
net: wireless: bcmdhd: pick default ampdu_mpdu from dhd flag

If default ampdu_mpdu dhd flag is set in Makefile, pick it from
this flag

bug 200048874

Change-Id: I11f8cf51172b9c068d6946cc7e9005d798778479
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/562732
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agovideo: tegra: dc: Add TEGRA_DC_EXT_SET_CMU_ALIGNED
Daniel Solomon [Mon, 28 Jul 2014 21:14:01 +0000]
video: tegra: dc: Add TEGRA_DC_EXT_SET_CMU_ALIGNED

This ioctl is intended to be used for the purpose
of changing the panel gamma and saturation  while the
panel is on, without the visual artefacts that would
result from disabling CMU during the update, and while
minimizing risk of CPU/DC CMU access collisions.

The ioctl TEGRA_DC_EXT_SET_CMU_ALIGNED updates only
the entries in CMU CSC and LUT2 that have changed since
the last CMU update, keeps CMU enabled while doing
so, and aligns the update with the next FRAME_END_INT.

Bug 1535044

Change-Id: Ibe758f94eccfff72c85e299107b3053378127805
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/556485
(cherry picked from commit 8c8cfd08c0a4c7473bf13f7e1b3cc672b5dbb1fc)
Reviewed-on: http://git-master/r/594597
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agonvdumper: fix static code errors and warnings
Yifei Wan [Thu, 6 Nov 2014 03:53:47 +0000]
nvdumper: fix static code errors and warnings

bug 200032218

Change-Id: I9ca9a8229db5ada5bc84a39bbce8d1ad655e41f8
Signed-off-by: Yifei Wan <ywan@nvidia.com>
Reviewed-on: http://git-master/r/594688
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Peters <mpeters@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm64: Tegra210: Cleanup tegra21_emc_init()
Jay Bhukhanwala [Fri, 11 Jul 2014 23:49:03 +0000]
arm64: Tegra210: Cleanup tegra21_emc_init()

Change-Id: Ia05e145839a613bd9000a2df2afb93ec76b27fbf
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Reviewed-on: http://git-master/r/437403
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm64: dts: t210: configure GPU EDP management
Matt Longnecker [Fri, 31 Oct 2014 23:15:54 +0000]
arm64: dts: t210: configure GPU EDP management

Enable GPU EDP management for T210 platforms according to the T210 GPU
power model provided by NVIDIA's silicon characterization team and
according to the EDP limit provided by the platform design teams.

Bug 200040871
Bug 1572415

Change-Id: Idf223f7b598c39fd883a79cd931b6c76253de13d
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/592256
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agovideo: tegra: dc: Skip SOR programming for linsim
Chao Xu [Wed, 5 Nov 2014 23:09:38 +0000]
video: tegra: dc: Skip SOR programming for linsim

Bug 1520609

Change-Id: Ibcdd15100278ef008e553307e35da711e6105520
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/594531
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aron Wong <awong@nvidia.com>
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm64: dts: t210: configure CPU EDP management
Matt Longnecker [Wed, 5 Nov 2014 04:35:51 +0000]
arm64: dts: t210: configure CPU EDP management

Enable CPU EDP management for T210 platforms according to the T210 CPU
power model provided by NVIDIA's silicon characterization team and
according to the EDP limit provided by the platform design teams.

Bug 200040871
Bug 1572415

Change-Id: I6d25cafaf610d2356485ca418b1e4b9954bb529e
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/594510
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agothermal: tegra: therm_est: handle trip_update
navneet kumar [Thu, 30 Oct 2014 19:02:03 +0000]
thermal: tegra: therm_est: handle trip_update

Add trip_update notification callback and register the same
with the of-thermal

In the callback recalculate thermal threshold limits.

Change-Id: Ia7f3a85cab4cfb5dd5390dbcb783686ec3947262
Signed-off-by: navneet kumar <navneetk@nvidia.com>
Reviewed-on: http://git-master/r/591811
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: Tegra: move temperatures out of cpu-tegra.c
Matt Longnecker [Wed, 5 Nov 2014 00:41:32 +0000]
ARM: Tegra: move temperatures out of cpu-tegra.c

Move knowledge of the CPU temperature out of cpu-tegra.c. The trip
point initialization code used by board files moves to mach-tegra. The
run-time handling of temperature moves to cpu-edp.c.

This change makes it possible for platforms to specify CPU EDP trip
point temperatures via device tree.

Bug 200040871

Change-Id: If6405cce5cd2a3ba59da30d99d85660bb3a98c87
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/593523
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agothermal: tegra: therm_est: use sensor_register2
navneet kumar [Thu, 30 Oct 2014 18:06:57 +0000]
thermal: tegra: therm_est: use sensor_register2

modify the driver to use thermal_zone_of_sensor_register2
API and consolidate the sensor callbacks into a struct.

Change-Id: I15eadad1dbe0dc6fb97d1d8025ed0f15205317c6
Signed-off-by: navneet kumar <navneetk@nvidia.com>
Reviewed-on: http://git-master/r/591810
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agomisc: tegra_ppm: avoid overflow with large IDDQ
Matt Longnecker [Tue, 4 Nov 2014 20:05:46 +0000]
misc: tegra_ppm: avoid overflow with large IDDQ

Raising a large IDDQ value (e.g. much greater than 100mA) to
the third power can quickly lead to overflows with 64-bit arithmetic.
Rearrange tegra_ppm calculations to avoid doing that.

Bug 200040871
Bug 1572415

Change-Id: Iab9f7acefef2653f7e4ea56ad253bf61e21a2a63
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/593421
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoarm: configs: enable GPU & CPU EDP drivers for t210
Matt Longnecker [Wed, 5 Nov 2014 17:42:58 +0000]
arm: configs: enable GPU & CPU EDP drivers for t210

Enable the drivers for CPU & GPU EDP management in
tegra21_android_defconfig

Bug 200040871

Change-Id: I8fd3ac2483f69a7f7b23f99d1cada75be005d57a
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/594454
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agotegra: soctherm: program HVC pskip for CC3
Diwakar Tundlam [Wed, 5 Nov 2014 02:20:52 +0000]
tegra: soctherm: program HVC pskip for CC3

Added a routine to program the pulse skippers for CPU HVC
which is used in CC3 and add a call to it at init.

Bug 1571197

Change-Id: I88c31e361e9db73c7adba8884b128091f3b49d1e
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/593552

5 years agotegra: soctherm: show GPU PSKIP status from HW
Diwakar Tundlam [Wed, 5 Nov 2014 01:34:40 +0000]
tegra: soctherm: show GPU PSKIP status from HW

T210 adds a new bit to reflect the GPU PSKIP vector selected during
throttling. Added code to show the vector in debug show.

Also cleaned up some repetitive code to make it clear.

Change-Id: I23cf7e2bb5d51f3a25efedd21fe2997759158c61
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/593535

5 years agovideo: tegra: dc: disabled HDCP before SOR
Sharath Sarangpur [Fri, 31 Oct 2014 18:40:49 +0000]
video: tegra: dc: disabled HDCP before SOR

disabled HDCP before disabling SOR during shutdown

bug 1569918

Change-Id: I27bbddd6fe6e597fcec4f0281bc89f720f4bbf15
Signed-off-by: Sharath Sarangpur <ssarangpur@nvidia.com>
Reviewed-on: http://git-master/r/592184
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

5 years agofirmware: tegra: update fw tag upon fw load
Antti P Miettinen [Thu, 6 Nov 2014 05:35:51 +0000]
firmware: tegra: update fw tag upon fw load

Firmware tag needs to be updated upon firmware load to
allow modules compiled against the new firmware to be
loaded.

Change-Id: Id62ac072317c485c638e8e17c233aa004393a846
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/594724
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>

5 years agoiommu/arm-smmu: Convert to iommu_capable() API function
Joerg Roedel [Fri, 5 Sep 2014 08:49:34 +0000]
iommu/arm-smmu: Convert to iommu_capable() API function

Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

Conflicts:
drivers/iommu/arm-smmu.c

Change-Id: I397c80b29833d815ae6714777da2943b1626a9bd
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594890

5 years agoiommu/arm-smmu: fix bug in pmd construction
Mitchel Humpherys [Fri, 19 Sep 2014 21:58:42 +0000]
iommu/arm-smmu: fix bug in pmd construction

We are using the same pfn for every pte we create while constructing the
pmd. Fix this by actually updating the pfn on each iteration of the pmd
construction loop.

It's not clear if we can actually hit this bug right now since iommu_map
splits up the calls to .map based on the page size, so we only ever seem to
iterate this loop once. However, things might change in the future that
might cause us to hit this.

Change-Id: Ie3066a6c926486e5cbd18e2cb92522d28ae437b4
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594889

5 years agoiommu/arm-smmu: support MMU-401
Robin Murphy [Thu, 28 Aug 2014 16:52:00 +0000]
iommu/arm-smmu: support MMU-401

MMU-401 is similar to MMU-400, but updated with limited ARMv8 support.

Change-Id: I21fa1d799c8fc111863beac9d7a334ef0752c9ef
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594888

5 years agoiommu/arm-smmu: fix architecture version detection
Robin Murphy [Thu, 28 Aug 2014 16:51:59 +0000]
iommu/arm-smmu: fix architecture version detection

The SMMU driver was relying on a quirk of MMU-500 r2px to identify
the correct architecture version. Since this does not apply to other
implementations, make the architecture version for each supported
implementation explicit.

While we're at it, remove the unnecessary #ifdef since the dependencies
for CONFIG_ARM_SMMU already imply CONFIG_OF.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

Conflicts:
drivers/iommu/arm-smmu.c

Change-Id: I4ec859e3afad45d274fc8387e1fd9c1eca42794b
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594887

5 years agoiommu/arm-smmu: don't bother truncating the s1 output size to VA_BITS
Will Deacon [Mon, 1 Sep 2014 15:24:48 +0000]
iommu/arm-smmu: don't bother truncating the s1 output size to VA_BITS

In order for nested translation to work correctly, we need to ensure
that the maximum output address size from stage-1 is <= the maximum
supported input address size to stage-2. The latter is currently defined
by VA_BITS, since we make use of the CPU page table functions for
allocating out tables and so the driver currently enforces this
restriction by truncating the stage-1 output size during probe.

In reality, this doesn't make a lot of sense; the guest OS is responsible
for managing the stage-1 page tables, so we actually just need to ensure
that the ID registers of the virtual SMMU interface only advertise the
supported stage-2 input size.

This patch fixes the problem by treating the stage-1 and stage-2 input
address sizes separately.

Change-Id: Idfaf4fa9a1949d750f9609a9d7c5bf65052ea2be
Reported-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594886

5 years agoiommu/arm-smmu: use page shift instead of page size to avoid division
Will Deacon [Wed, 30 Jul 2014 10:33:25 +0000]
iommu/arm-smmu: use page shift instead of page size to avoid division

Arbitrary integer division is not available in all ARM CPUs, so the GCC
may spit out calls to helper functions which are not implemented in
the kernel.

This patch avoids these problems in the SMMU driver by using page shift
instead of page size, so that divisions by the page size (as required
by the vSMMU code) can be expressed as a simple right shift.

Change-Id: I9dc27d5287513f2a9e91237db97a15ab59163c29
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594885

5 years agoiommu/arm-smmu: put iommu_domain pointer in dev->archdata.iommu
Will Deacon [Thu, 17 Jul 2014 10:23:51 +0000]
iommu/arm-smmu: put iommu_domain pointer in dev->archdata.iommu

In preparation for nested translation support, stick a pointer to the
iommu_domain in dev->archdata.iommu. This makes it much easier to grab
hold of the physical group configuration (e.g. cbndx) when dealing with
vSMMU accesses from a guest.

Signed-off-by: Will Deacon <will.deacon@arm.com>

Conflicts:
drivers/iommu/arm-smmu.c

Change-Id: Id541a4cc2424d3c3af969b2871124a5f762fdbc4
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594884

5 years agoiommu/arm-smmu: add support for multi-master iommu groups
Will Deacon [Tue, 15 Jul 2014 10:27:08 +0000]
iommu/arm-smmu: add support for multi-master iommu groups

Whilst the driver currently creates one IOMMU group per device, this
will soon change when we start supporting non-transparent PCI bridges
which require all upstream masters to be assigned to the same address
space.

This patch reworks our IOMMU group code so that we can easily support
multi-master groups. The master configuration (streamids and smrs) is
stored as private iommudata on the group, whilst the low-level attach/detach
code is updated to avoid double alloc/free when dealing with multiple
masters sharing the same SMMU configuration. This unifies device
handling, regardless of whether the device sits on the platform or pci
bus.

Signed-off-by: Will Deacon <will.deacon@arm.com>

Conflicts:
drivers/iommu/arm-smmu.c

Change-Id: I3691ed7c3fd502836ff0dddbf14a85cc09f40891
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594883

5 years agoiommu/arm-smmu: allow translation stage to be forced on the cmdline
Will Deacon [Mon, 14 Jul 2014 18:47:39 +0000]
iommu/arm-smmu: allow translation stage to be forced on the cmdline

When debugging and testing code on an SMMU that supports nested
translation, it can be useful to restrict the driver to a particular
stage of translation.

This patch adds a module parameter to the ARM SMMU driver to allow this
by restricting the ability of the probe() code to detect support for
only the specified stage.

Change-Id: Ib361a8932bc811c7050787a7a1ce9d0929f58e57
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594882

5 years agoiommu/arm-smmu: fix corner cases in address size calculations
Will Deacon [Wed, 23 Jul 2014 12:20:43 +0000]
iommu/arm-smmu: fix corner cases in address size calculations

Working out the usable address sizes for the SMMU is surprisingly tricky.
We must take into account both the limitations of the hardware for VA,
IPA and PA sizes but also any restrictions imposed by the Linux page
table code, particularly when dealing with nested translation (where the
IPA size is limited by the input address size at stage-2).

This patch fixes a few corner cases in our address size handling so that
we correctly deal with 40-bit addresses in TTBCR2 and restrict the IPA
size differently depending on whether or not we have support for nested
translation.

Change-Id: I23a6aa0e6a66b8b08a5e72fd8a4985ae969d5ca9
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594881

5 years agoiommu/arm-smmu: fix decimal printf format specifiers prefixed with 0x
Hans Wennborg [Wed, 6 Aug 2014 04:42:01 +0000]
iommu/arm-smmu: fix decimal printf format specifiers prefixed with 0x

The prefix suggests the number should be printed in hex, so use
the %x specifier to do that.

Found by using regex suggested by Joe Perches.

Change-Id: Ie19a75316e74c4415efb87801218ec61d4d01769
Signed-off-by: Hans Wennborg <hans@hanshq.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594880

5 years agoiommu: Remove iommu_domain_has_cap() API function
Joerg Roedel [Fri, 5 Sep 2014 08:57:11 +0000]
iommu: Remove iommu_domain_has_cap() API function

Signed-off-by: Joerg Roedel <jroedel@suse.de>

Conflicts:
drivers/iommu/iommu.c

Change-Id: Ibfc985bad38934530ac5f5eedca2bf4a4c9cf7cd
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594964

5 years agoiommu: Introduce iommu_capable API function
Joerg Roedel [Wed, 3 Sep 2014 16:47:25 +0000]
iommu: Introduce iommu_capable API function

This function will replace the current iommu_domain_has_cap
function and clean up the interface while at it.

Change-Id: Ie533fc60a668c87d550f7dcad482d6052e56b025
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594962

5 years agoiommu/arm-smmu: Do not access non-existing S2CR registers
Olav Haugan [Sat, 23 Aug 2014 00:12:32 +0000]
iommu/arm-smmu: Do not access non-existing S2CR registers

The number of S2CR registers is not properly set when stream
matching is not supported. Fix this and add check that we do not try to
access outside of the number of S2CR regisrers.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
[will: added missing NUMSIDB_* definitions]
Signed-off-by: Will Deacon <will.deacon@arm.com>

Change-Id: I05db4c03e5f3bfd78925249e3540054ebfb85e1e
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594879

5 years agoiommu/arm-smmu: fix s2cr and smr teardown on device detach from domain
Will Deacon [Tue, 15 Jul 2014 10:22:24 +0000]
iommu/arm-smmu: fix s2cr and smr teardown on device detach from domain

When we attach a device to a domain, we configure the SMRs (if we have
any) to match the Stream IDs for the corresponding SMMU master and
program the s2crs accordingly. However, on detach we tear down the s2crs
assuming stream-indexing (as opposed to stream-matching) and SMRs
assuming they are present.

This patch fixes the device detach code so that it operates as a
converse of the attach code.

Cc: <stable@vger.kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>

Conflicts:
drivers/iommu/arm-smmu.c

Change-Id: I379bf78a67faabe47d9931e9613655d21d4e726a
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594878

5 years agoiommu: Convert iommu-caps from define to enum
Joerg Roedel [Wed, 3 Sep 2014 16:34:04 +0000]
iommu: Convert iommu-caps from define to enum

Allow compile-time type-checking.

Signed-off-by: Joerg Roedel <jroedel@suse.de>

Conflicts:
include/linux/iommu.h

Change-Id: I5e81013ee8924bdbddb354b50fa515f69559a343
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594961

5 years agoiommu/tegra: Convert to iommu_capable() API function
Joerg Roedel [Fri, 5 Sep 2014 08:51:37 +0000]
iommu/tegra: Convert to iommu_capable() API function

Cc: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

Conflicts:
drivers/iommu/tegra-gart.c
drivers/iommu/tegra-smmu.c

Change-Id: I2afd853932813dee0b2b21b6f31e919a1f611cda
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594963

5 years agoiommu/arm-smmu: remove pgtable_page_{c,d}tor()
Vladimir Murzin [Fri, 8 Aug 2014 09:31:47 +0000]
iommu/arm-smmu: remove pgtable_page_{c,d}tor()

If split page table lock for PTE tables is enabled (CONFIG_SPLIT_PTLOCK_CPUS
<=NR_CPUS) pgtable_page_ctor() leads to non-atomic allocation for ptlock with
a spinlock held, resulting in:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 466 at kernel/locking/lockdep.c:2742 lockdep_trace_alloc+0xd8/0xf4()
DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags))
Modules linked in:
CPU: 0 PID: 466 Comm: dma0chan0-copy0 Not tainted 3.16.0-3d47efb-clean-pl330-dma_test-ve-a15-a32-slr-m
c-on-3+ #55
[<80014748>] (unwind_backtrace) from [<80011640>] (show_stack+0x10/0x14)
[<80011640>] (show_stack) from [<802bf864>] (dump_stack+0x80/0xb4)
[<802bf864>] (dump_stack) from [<8002385c>] (warn_slowpath_common+0x64/0x88)
[<8002385c>] (warn_slowpath_common) from [<80023914>] (warn_slowpath_fmt+0x30/0x40)
[<80023914>] (warn_slowpath_fmt) from [<8005d818>] (lockdep_trace_alloc+0xd8/0xf4)
[<8005d818>] (lockdep_trace_alloc) from [<800d3d78>] (kmem_cache_alloc+0x24/0x144)
[<800d3d78>] (kmem_cache_alloc) from [<800bfae4>] (ptlock_alloc+0x18/0x2c)
[<800bfae4>] (ptlock_alloc) from [<802b1ec0>] (arm_smmu_handle_mapping+0x4c0/0x690)
[<802b1ec0>] (arm_smmu_handle_mapping) from [<802b0cd8>] (iommu_map+0xe0/0x148)
[<802b0cd8>] (iommu_map) from [<80019098>] (arm_coherent_iommu_map_page+0x160/0x278)
[<80019098>] (arm_coherent_iommu_map_page) from [<801f4d78>] (dmatest_func+0x60c/0x1098)
[<801f4d78>] (dmatest_func) from [<8003f8ac>] (kthread+0xcc/0xe8)
[<8003f8ac>] (kthread) from [<8000e868>] (ret_from_fork+0x14/0x2c)
---[ end trace ce0d27e6f434acf8 ]--

Split page tables lock is not used in the driver. In fact, page tables are
guarded with domain lock, so remove calls to pgtable_page_{c,d}tor().

Cc: <stable@vger.kernel.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

Conflicts:
drivers/iommu/arm-smmu.c

Change-Id: I743048252f643a12873ce854be6d5a4ad7bf219d
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594877

5 years agoiommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1
Olav Haugan [Mon, 4 Aug 2014 18:01:02 +0000]
iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1

Stage-1 context banks do not have the SMMU_CBn_TCR[SL0] field since it
is only applicable to stage-2 context banks.

This patch ensures that we don't set the reserved TCR bits for stage-1
translations.

Change-Id: If796fcbc5949117c7ec271ff9cb532950377d3f7
Cc: <stable@vger.kernel.org>
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry-picked from next-20141106)
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/594876

5 years agoarch:arm:loki: Set TEGRA_DC_OUT_INITIALIZED in loki panel
Ankita Garg [Sat, 4 Oct 2014 00:33:55 +0000]
arch:arm:loki: Set TEGRA_DC_OUT_INITIALIZED in loki panel

Loki 5.6" JDI panel is pre-initialized in the BL.
Set the flag TEGRA_DC_OUT_INITIALIZED in the panel dts
file to indicate this to the kernel so it skips the
panel initialization sequence. Else it causes blank screen
during boot, breaking seamless display.

Bug 200043038

Change-Id: I248cc03e57bb18bbacb56476512d2036844ee7e8
Signed-off-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-on: http://git-master/r/553542
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

5 years agousb: tegra: xhci: write prod settings from dt
Krishna Yarlagadda [Mon, 3 Nov 2014 12:23:50 +0000]
usb: tegra: xhci: write prod settings from dt

Read prod settings from device tree and write using prod
settings apis. Remove all prod settings done within driver.
Portmap will still be programmed from driver.

Bug 1567693

Change-Id: Ie2ee40fff4a598ad3ae58c997f3aaa29a11770d9
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/592758
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Fu <danifu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: add prod settings for xusb
Krishna Yarlagadda [Mon, 3 Nov 2014 12:21:03 +0000]
arm: tegra: add prod settings for xusb

Add production settings in device tree for xusb on T210

Bug 1567693

Change-Id: I0538f5637d98c12d581aeb87144ae604d50e4ad6
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/592757
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Fu <danifu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: hdmi: Fix HDMI connect state
Xia Yang [Tue, 1 Jul 2014 21:04:46 +0000]
video: tegra: hdmi: Fix HDMI connect state

Revert 006fffc2 partially to fix HDMI connect state tracking.

Bug 1459374

Change-Id: Icc1b0eee3ae6f4202b4a46f858d447ad5656aebc
Signed-off-by: Xia Yang <xiay@nvidia.com>
Reviewed-on: http://git-master/r/433313
(cherry picked from commit cdc5a6db139f85d7048669c278822f3832394bcc)
Reviewed-on: http://git-master/r/438984
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agocrypt: tegra-se: fix sleep while atomic
Bo Yan [Thu, 6 Nov 2014 00:40:04 +0000]
crypt: tegra-se: fix sleep while atomic

while running nvcrypttest, following messages are seen:

[ 2165.215568] BUG: sleeping function called from invalid context ...
[ 2165.224606] in_atomic(): 0, irqs_disabled(): 128, pid: 1917, ...
[ 2165.231823] CPU: 0 PID: 1917 Comm: nvcrypttest Tainted: G  ...
[ 2165.241029] Call trace:
[ 2165.243478] [<ffffffc000089c4c>] dump_backtrace+0x0/0xf4
[ 2165.248783] [<ffffffc000089f44>] show_stack+0x10/0x1c
[ 2165.253829] [<ffffffc00035b930>] dump_stack+0x1c/0x28
[ 2165.258875] [<ffffffc0000db8f0>] __might_sleep+0xf0/0xfc
[ 2165.264181] [<ffffffc00018ca30>] __kmalloc+0x6c/0x208
[ 2165.269227] [<ffffffc000095c78>] __iommu_alloc_buffer+0x50/0x264
[ 2165.275223] [<ffffffc00009861c>] arm_iommu_alloc_attrs+0x70/0x15c
[ 2165.281309] [<ffffffc000852fec>] tegra_se_aes_cmac_final+0x308/0x668
[ 2165.287655] [<ffffffc000335ab4>] crypto_ahash_op+0x28/0x34
[ 2165.293131] [<ffffffc000335ad0>] crypto_ahash_final+0x10/0x1c
[ 2165.298871] [<ffffffc0005210a4>] tegra_crypto_sha+0x1b4/0x28c
[ 2165.304607] [<ffffffc000521ff8>] tegra_crypto_dev_ioctl+0x758/0x918
[ 2165.310865] [<ffffffc0001a97a0>] vfs_ioctl+0x18/0x44
[ 2165.315821] [<ffffffc0001aa454>] do_vfs_ioctl+0x21c/0x22c
[ 2165.321211] [<ffffffc0001aa52c>] SyS_ioctl+0xc8/0x174

dma_alloc_coherent can't be called from atomic context. In
tegra_se_aes_cmac_final, it is called after local_irq_save.
Furthermore, if dma_alloc_coherent fails, it will branch to
out without a pairing local_irq_restore.

Fix this by first allocating memory, then disable local irq.
Move sg_miter_start inside the pair of irq save & restore,
this is more logical than interleaving sg_miter_start/stop
with local_irq_save/restore.

Change-Id: I065cec6f69cca0ea1957cb6388f2c9b97fa43dbf
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/594631
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shravani Dingari <shravanid@nvidia.com>

5 years agogpu: nvgpu: Add class numbers to characteristics
Terje Bergstrom [Wed, 5 Nov 2014 08:12:17 +0000]
gpu: nvgpu: Add class numbers to characteristics

Some kernel APIs rely on user space knowing class numbers. Allow
querying the numbers from kernel.

Bug 1567274

Change-Id: Idec2fe8ee983ee74bcbf9dfc98f71bbcc1492cfb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/594402

5 years agoarm: tegra: add delay DSI_D0/CLK and panel reset
Vineel Kumar Reddy Kovvuri [Thu, 16 Oct 2014 11:45:47 +0000]
arm: tegra: add delay DSI_D0/CLK and panel reset

Add delay between DSI_D0/CLK and panel reset

Bug 1563262

Change-Id: I06a248999ea1df9f4258131d2f127ff7017a41c6
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/558405
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: cde: fix err in oom condition
Konsta Holtta [Wed, 5 Nov 2014 13:01:03 +0000]
gpu: nvgpu: cde: fix err in oom condition

use a correct, negative error sign in ENOMEM when gk20a_gmmu_map runs
out of memory.

Change-Id: I4fa8a2cf359a5c98cebdf64d4e3fcc96f478f779
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/594397
Reviewed-by: Jussi Rasanen <jrasanen@nvidia.com>
Tested-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agogpu: nvgpu: cde: Combine H and V passes
Jussi Rasanen [Fri, 3 Oct 2014 09:44:05 +0000]
gpu: nvgpu: cde: Combine H and V passes

When using CDE firmware v1, combine H and V swizzling passes into one
pushbuffer submission. This removes one GPU context switch, almost
halving the time taken for swizzling.

Map only the compbit part of the destination surface.

Bug 1546619

Change-Id: I95ed4e4c2eefd6d24a58854d31929cdb91ff556b
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/553234
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agogpu: nvpgu: cde: fix timeout mgmt, use two lists
Konsta Holtta [Wed, 29 Oct 2014 11:55:32 +0000]
gpu: nvpgu: cde: fix timeout mgmt, use two lists

If a channel timeout occurs, reload only the particular context/channel
where the timeout occurred, instead of destroying whole cde. Reloading
happens by allocating a replacement context and marking the offending
channel as soon-to-be-deleted.

Clean up the code by using two separate lists for free and used
contexts. Rename channel deallocation/allocation functions to better
describe what they do, and annotate the functions that need locking.

Also do not wait for channel idle before submitting, since the acquired
context has a ready channel already.

Bug 200046882

Change-Id: I4155a85ea0ed79e284309eb2ad0042df3938f1e2
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/591235
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: fix sparse warning context imbalance
Shridhar Rasal [Thu, 9 Oct 2014 02:30:57 +0000]
video: tegra: host: fix sparse warning context imbalance

nvhost_intr.c +87: warning: context imbalance in
'process_wait_list' - unexpected unlock
nvost_intr.c +87: warning: context imbalance in
'nvhost_intr_has_pending_jobs' - unexpected unlock
nvhost_intr.c +87: warning: context imbalance in
'nvhost_intr_add_action' - unexpected unlock

sparse reports context imbalance warnings if there is mismatch in
count of lock/unlock in given context. Here lock is acquired in one
context and released in other context which is expected behaviour.

So annonate function declaration with __acquires and __release to inform
sparse.

Bug 200032218

Change-Id: I14a77fbacfeb64b91941c29316e12d5f71795f5a
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/554832
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agogpu: nvgpu: free all vm's when removing support
Konsta Holtta [Wed, 22 Oct 2014 14:39:42 +0000]
gpu: nvgpu: free all vm's when removing support

Remove both bar1 and pmu.

Bug 1476801

Change-Id: I0c194db06b576083ddaab3726b8575ebce473d84
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/592114
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agogpu: nvgpu: don't kfree vm's inside other structs
Konsta Holtta [Wed, 22 Oct 2014 14:33:36 +0000]
gpu: nvgpu: don't kfree vm's inside other structs

Trying to kfree pmu.vm or bar1.vm is not allowed, since they are not
directly allocated. Separate the vm kfree from the actual vm support
removal, so that they can be done individually.

Change-Id: I7628f546b94e0de909371ce315e4cb065e5ef953
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/592112
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agogpu: nvgpu: destroy big page allocator only if set
Konsta Holtta [Fri, 31 Oct 2014 12:07:28 +0000]
gpu: nvgpu: destroy big page allocator only if set

Some vm's do not have big pages.

Bug 1476801

Change-Id: Ic82ca7a1380834ea30582631af224c81fd01e4bb
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/592113
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: configs: P2360: Enable mtd_tests as module for p2360
Bharath H S [Thu, 6 Nov 2014 18:02:41 +0000]
arm: configs: P2360: Enable mtd_tests as module for p2360

This change enables mtd_tests to be built as modules
for p2360.

bug 200052917

Change-Id: Ib51acb02157634b3f6356e757ef9810096ebfcdf
Signed-off-by: Bharath H S <bhs@nvidia.com>
Reviewed-on: http://git-master/r/594965
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>

5 years agocpuidle: tegra: update CC6 residency threshold
Sivaram Nair [Tue, 4 Nov 2014 01:46:38 +0000]
cpuidle: tegra: update CC6 residency threshold

Lower the CC6 residency time to 10 msec (currently 50 msec). 10 msec is
closer to the actual breakeven value and also enables easier
verification.

Change-Id: I82bdfce14994b34503813ec948c646aed329b185
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/593025
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agodrivers: cpuidle: tegra: enter SC states from CC4
Sivaram Nair [Fri, 31 Oct 2014 00:21:09 +0000]
drivers: cpuidle: tegra: enter SC states from CC4

Currently, all SC states are entered from CC6. However, due to power
saving reasons, CC4 is our best deepest cluster idle state. Therefore
enable entering SC states from CC4. In this case, we enter CC4 from C7,
and not from C4 (so the path becomes C7->CC4->SCx).

Bug 1574464

Change-Id: Ib2095f3058b7bf122f703beea4ff0fe7ea45ff8a
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/593024
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agodrivers: cpuidle: refactor tegra210_enter_c7
Sivaram Nair [Fri, 31 Oct 2014 00:18:55 +0000]
drivers: cpuidle: refactor tegra210_enter_c7

C7 is entered from multiple paths - so move this out into a separate
function.

Change-Id: I0c2a071d611654f68c942003c344b3fedc012a90
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/593023
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agofirmware: tegra: IPC for notifying SCx tolerance
Sivaram Nair [Fri, 31 Oct 2014 00:11:49 +0000]
firmware: tegra: IPC for notifying SCx tolerance

We want to enter one of the SC states from C4/CC4 or from C7/CC4,
neither of which calls into bpmp now to indicate their SC state
tolerance. So add one before we can enable these paths.

This breaks ABI, but it is safe because (1) the additional argument is
ignored by current firmware binary and (2) SC states are not enabled.

Since we are changing the interface, we have to update the cpuidle
driver that currently uses the function being changed.

Bug 1574464

Change-Id: I2a19711b0b18aa8f17d4c5063630f8d66a50dbb1
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/593022
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agousb: gadget: xudc: fix memory leak
Henry Lin [Wed, 29 Oct 2014 11:07:00 +0000]
usb: gadget: xudc: fix memory leak

The removed memory block is not used and overwritten after handling
USB_REQ_GET_STATUS or USB_REQ_SET_SEL control request. Once it is
overwritten, it leaks and will cause problem if driver tries to kfree
it.

Bug 200049821

Change-Id: I1cc1b52975d37a21e8e1d35f8e8273acb9df8960
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/591199
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

5 years agousb: gadget: xudc: war for ctrl request
Henry Lin [Thu, 30 Oct 2014 06:54:19 +0000]
usb: gadget: xudc: war for ctrl request

HW cannot process ctrl request with seq_num = 0xfffe or 0xffff
correctly. Driver workaround this by halting control endpoint.

Bug 200033880

Change-Id: Ic9fd3bfb2c6304109b204231adb6848c2407a6cf
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/591568
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

5 years agodrivers: misc: Enable Werror flag
Sumit Singh [Wed, 29 Oct 2014 09:46:14 +0000]
drivers: misc: Enable Werror flag

Enable Werror flag for all the files directly under
drivers/misc directory.

Bug 1566945

Change-Id: If3d9afc695bdb502abec22053e7938e3562ce1b1
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/591134
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agomisc: tegra_ppm: Fix build warning
Sumit Singh [Wed, 29 Oct 2014 09:36:05 +0000]
misc: tegra_ppm: Fix build warning

Fix warnings:
- format '%d' expects argument of type 'int', but argument has type
'ssize_t'
- initialization from incompatible pointer type
in misc/tegra_ppm.c file.

Bug 1566945

Change-Id: I9482409480c4abd9fead393c5fde68b0cc822bea
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/591129
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm: tegra: timer: Fix build warning
Sumit Singh [Wed, 5 Nov 2014 07:25:35 +0000]
arm: tegra: timer: Fix build warning

Fix warning:
'passing argument 1 of 'IS_ERR_OR_NULL' makes pointer
from integer without a cast' in timerinfo_dev_mmap function in
tegra_timerinfo.c file.

Bug 1566945

Change-Id: I233633839d3d2a38523733446a8d1511319c8b13
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/591132
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agomisc: bluedroid_pm: Fix build warnings
Sumit Singh [Sat, 1 Nov 2014 11:40:32 +0000]
misc: bluedroid_pm: Fix build warnings

Fix warnings:
- ignoring return value of 'regulator_enable',
  declared with attribute warn_unused_result
- initialization from incompatible pointer type,
in drivers/misc/bluedroid_pm.c file.
Also take care of the return value from 'regulator_disable'.

Bug 1566945

Change-Id: I202058a9d6350eed4ab64df81b64bcbc05ede1ed
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592317
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agomisc: idle: Fix build warnings
Sumit Singh [Sat, 1 Nov 2014 12:21:41 +0000]
misc: idle: Fix build warnings

Fix warnings:
- unused variable 'filevalue'
- variable 'ker_buf' defined, but not used,
in drivers/misc/force_idle_t132.c file.

Bug 1566945

Change-Id: I5abb3f0769b4668e957a7d4afb7e8e37197b3d0c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592320
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomisc: tegra132: Fix build warnings
Sumit Singh [Sat, 1 Nov 2014 12:33:46 +0000]
misc: tegra132: Fix build warnings

Fix warning:
- unused variable 'cpu',
in drivers/misc/idle_test_t132.c file.

Bug 1566945

Change-Id: I5bd601769c301262bb154384ee7676c3c4c96cce
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592321
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agovideo: tegra: hdmi: Increase edid read max retry
Animesh Kishore [Thu, 6 Nov 2014 17:15:57 +0000]
video: tegra: hdmi: Increase edid read max retry

max retry 20

Bug 200047145

Change-Id: I5bf2c80f038c9d85934ee9bfb18f66735c32459b
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/594957
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agodriver: misc: therm_fan_est: Fix build warnings
Diwakar Tundlam [Tue, 4 Nov 2014 19:41:38 +0000]
driver: misc: therm_fan_est: Fix build warnings

Fix warnings:
- '%ld' expects argument of type 'long int', but argument has type 'int'
- passing argument 3 of 'of_property_read_string'
from incompatible pointer type
- passing argument 1 of 'dev->get_temp' discards 'const' qualifier from
  pointer target type,  expected 'void *' but argument is of type
  'const char *'

in file drivers/misc/therm_fan_est.c.

Bug 1566945

Change-Id: I3ba350e47a7b66c5b5cfab87a70ea3bb0d6f15da
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/593415
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agomedia: video: nvavp: Enable Werror flag
Sumit Singh [Fri, 31 Oct 2014 10:38:05 +0000]
media: video: nvavp: Enable Werror flag

Enable Werror flag for all the files directly under
drivers/media/platform/tegra/nvavp directory.

Bug 1566945

Change-Id: I194226296879e3893e84bec3c1f61a8e404804eb
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592060
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomedia: tegra: nvavp: Fix build warnings
Sumit Singh [Mon, 3 Nov 2014 09:07:56 +0000]
media: tegra: nvavp: Fix build warnings

Fix Warnings:
- cast from pointer to integer of different size
- format '%d' expects argument of type 'int', but argument has type
  ssize_t
- unused variable
- assignment makes integer from pointer without a cast,
in file platform/tegra/nvavp/nvavp_dev.c.

Bug 1566945

Change-Id: I18248aa9251ad357993861d4c45a212f20142909
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592059
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agocpufreq: Enable Werror flag
Sumit Singh [Mon, 3 Nov 2014 11:25:33 +0000]
cpufreq: Enable Werror flag

Enable Werror flag for all the files under
drivers/cpufreq directory.

Bug 1566945

Change-Id: I8f5c60c6b75d9eea3b718c5f84c4412d4780a1a2
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592741
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoinput: Enable Werror flag
Sumit Singh [Mon, 3 Nov 2014 13:54:07 +0000]
input: Enable Werror flag

Enable Werror flag for all the files directly under
drivers/input directory.

Bug 1566945

Change-Id: I94bba21299d1bf234fc75ea1a54679d34806f772
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/592784
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agovideo: tegra: host: remove dead code
Deepak Nibade [Thu, 6 Nov 2014 14:10:14 +0000]
video: tegra: host: remove dead code

In nvhost_ioctl_channel_submit(), we assign hwctx_syncpt_idx
to zero and then check if (hwctx_syncpt_idx == -1) which
will never be true and hence renders code dead

Fix this by removing unnecessary variable hwctx_syncpt_idx,
and the unnecessary check

Coverity defect id : 28281

Bug 1416640

Change-Id: I97a6d6987efc1a6454c293294630e6cba57185e8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>

5 years agoarm64: tegra: remove exuma
Bo Yan [Fri, 7 Nov 2014 03:41:17 +0000]
arm64: tegra: remove exuma

remove the last two remaining exuma files. they are obsolete and not
being used any more

Change-Id: I0eef730de414cbfbe95198bd24102b08c211762c
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/595749
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: hdmi: Add dvi support
Animesh Kishore [Thu, 6 Nov 2014 11:25:15 +0000]
video: tegra: hdmi: Add dvi support

Bug 1558400

Change-Id: I83c2a64ff3dee6a74e4385f9fcc1ac34655e981d
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/594170
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agovideo: tegra: dc: fix uninitialized variables
Deepak Nibade [Thu, 6 Nov 2014 14:00:47 +0000]
video: tegra: dc: fix uninitialized variables

Fix Coverity issue of using uninitialized variables
in hdcp 2.2

Coverity defect id :
28198 28199 28201 28202 28203 28204 28205
28206 28207 28208 28209 28210 28211 28212

Bug 1416640

Change-Id: Ie3b8667e498ddea3da3633e0205aa2655143da72
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/594934
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoplatform: tegra: remove reduntant functions
Prashant Gaikwad [Wed, 15 Oct 2014 08:33:31 +0000]
platform: tegra: remove reduntant functions

Change-Id: Ieaf0056dcf770da13c6214096b656b7031c8cc56
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>

5 years agoplatform: tegra: move powergate function in dir
Prashant Gaikwad [Wed, 15 Oct 2014 08:10:07 +0000]
platform: tegra: move powergate function in dir

There are multiple files related to power gating
functionality. Move all of those in one directory.

Change-Id: I5fbb745629c3eae2ca511e9090b8cd58b750e6a3
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>

5 years agousb: tegra: make local funcs and data to static
Rakesh Babu Bodla [Wed, 5 Nov 2014 09:45:30 +0000]
usb: tegra: make local funcs and data to static

Fix sparse warnings for static data and functions

Bug 200032218

Change-Id: I030cc2aca3b392ff5dd8f9cc02dcd3e402d59bed
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>

5 years agoextcon: adc-jack: Add debounce support
Mallikarjun Kasoju [Wed, 5 Nov 2014 11:41:26 +0000]
extcon: adc-jack: Add debounce support

Add debounce support to make sure ADC values are not read
immediately after getting interrupt.

Bug 1555564

Change-Id: I24ee2f5c192ce384b26151c946abb6a157695c5c
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>