5 years agoarm: tegra: dalmore/pluto: add imx091 nvc driver
Wei Chen [Wed, 31 Oct 2012 19:49:23 +0000]
arm: tegra: dalmore/pluto: add imx091 nvc driver

add board file related changes for imx091 nvc driver

Bug 961418

Change-Id: Ibc179fbfac0e31642158990c0ac77c52076b5ace
Signed-off-by: Wei Chen <wechen@nvidia.com>
Reviewed-on: http://git-master/r/160285
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

5 years agoARM: tegra11: dvfs: Enable CPU and core voltage scaling
Alex Frid [Wed, 31 Oct 2012 08:27:57 +0000]
ARM: tegra11: dvfs: Enable CPU and core voltage scaling

Set configuration options for CPU and core voltage scaling.
No changes in current system behavior (VDD_CPU is scaled,
VDD_CORE is not scaled) is expected, since

- by default after boot DFLL is used as CPU clock source, and
CPU voltage is automatically scaled by CL-DVFS (this change only
enables scaling when/if PLL is used as a clock source)

- EMC DVFS tables requires nominal voltage for all rates, and
effectively prevents core voltage scaling, even if it is enabled

Change-Id: I9a1ee3a9dfce57521dd31f75d767763238be2acc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/160138
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

5 years agoARM: tegra: Kconfig: NVMAP_CACHE_MAINT_BY_SET_WAYS for tegra11x
Hiroshi Doyu [Mon, 5 Nov 2012 11:46:07 +0000]
ARM: tegra: Kconfig: NVMAP_CACHE_MAINT_BY_SET_WAYS for tegra11x

Enable NVMAP_CACHE_MAINT_BY_SET_WAYS for tegra11x

Bug 1158336

Change-Id: I72ac4790c859cd464fafcde4f5da5c45d3d0abeb
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161224
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

5 years agoarm: mm: cpa: Configurable cache_maint_{inner,outer}_threshold
Hiroshi Doyu [Mon, 5 Nov 2012 10:29:35 +0000]
arm: mm: cpa: Configurable cache_maint_{inner,outer}_threshold

Introduce configurable cache_maint_{inner,outer}_threshold via debugfs.

Bug 1158336

Change-Id: I7bb94adadbc41ff65dbd9992920c938df2449b06
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/161209
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra11x: cpuidle: Remove LP2 references
Bo Yan [Tue, 30 Oct 2012 20:51:33 +0000]
ARM: tegra11x: cpuidle: Remove LP2 references

This change completely removes references to lp2 in cpuidle-t11x.c,
some related changes also affect cpuidle-t2.c, cpuidle-t3.c, and a
few other files.

bug 1034196

Change-Id: Ic2387bf614b39bd08ed4b2fc6e996f6fbf8306c0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160017
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

5 years agoarm: tegra: Added MAX77665 vibrator EDP data
Sumit Sharma [Fri, 2 Nov 2012 04:05:33 +0000]
arm: tegra: Added MAX77665 vibrator EDP data

Added EDP states in MAX77665 platform data for EDP implementation

Bug 1043388

Change-Id: Ieae95d196a43526084c11f3ee1063af57b6cc0e0
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/159816
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoasoc: tegra: Rt5640: modify DAPM route table
Vijay Mali [Mon, 5 Nov 2012 14:45:04 +0000]
asoc: tegra: Rt5640: modify DAPM route table

a) register DAPM route table with snd_soc_card structure and
remove the open-coded DAPM add route calls.

b) set card.fully_routed flag to request the ASoC core calculated
unused codec pins, and call snd_soc_dapm_nc_pin() for them.

Bug 1054060

Change-Id: I512b6329bf1328eff172f40d4cc6b59c763f1323
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/161249
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>

5 years agoARM: tegra: configs: Enable ROTH platform support
Pavan Kunapuli [Mon, 5 Nov 2012 08:47:53 +0000]
ARM: tegra: configs: Enable ROTH platform support

Change-Id: I2c56843f1fad3d962be811a4a83e0aae10dedaa5
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/161159
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: dvfs: Update miscellaneous dvfs tables
Alex Frid [Thu, 25 Oct 2012 07:07:38 +0000]
ARM: tegra11: dvfs: Update miscellaneous dvfs tables

- Updated dvfs tables for SBUS (system clock), Host1x, and VI clocks
- Updated maximum limits for Host1x and MSELECT clocks
- Allowed only integer divisors for Host1x, VI, and MSELECT clocks

Change-Id: I4128cde767609a6bf4ccc3dd85a0f060feaa2dcb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147681
(cherry picked from commit 03a2546f2745dab8a8adda72777a062b7c113865)
Reviewed-on: http://git-master/r/161070
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: clock: Do not allow 1:1.5 clock dividers ratio
Alex Frid [Thu, 25 Oct 2012 06:45:24 +0000]
ARM: tegra11: clock: Do not allow 1:1.5 clock dividers ratio

Change-Id: Iac26d1144b45247c3b5c70a47e26a1fba228b4d0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147680
(cherry picked from commit 723f73ae73cacb4274b2b671a8454f5741dae712)
Reviewed-on: http://git-master/r/161069
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: dvfs: Update LP CPU dvfs table
Alex Frid [Thu, 25 Oct 2012 05:59:18 +0000]
ARM: tegra11: dvfs: Update LP CPU dvfs table

Change-Id: I47c5f2eae9ad0cbb1685c232308cc30bf7b2e6bf
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147679
(cherry picked from commit ed29f1c25fe727023f8624536a78fbe45ab91689)
Reviewed-on: http://git-master/r/161068
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: dvfs: Updated dvfs tables of c-bus modules
Alex Frid [Wed, 24 Oct 2012 22:06:36 +0000]
ARM: tegra11: dvfs: Updated dvfs tables of c-bus modules

Updated dvfs tables of c-bus modules per characterization.
Moved EPP from c3bus and c2bus, since it is closely matching 2d/3d
rates. As a result bus assignments:

c2bus = 2D, 3D, and EPP modules
c3bus = MSENC, SE, TESEC, and VDE modules

Change-Id: I78f6336a459f7959a18071c91c299e0247dbeb6f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147326
(cherry picked from commit 034654b06d2b9d089202a193a872d47f2367d930)
Reviewed-on: http://git-master/r/161067
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: dvfs: Reduce core voltage range
Alex Frid [Wed, 24 Oct 2012 21:15:25 +0000]
ARM: tegra11: dvfs: Reduce core voltage range

For initial testing of core voltage scaling s/w reduced core voltage
range from [0.9V ... 1.125V] to [1.0V ... 1.120V].

Bug 116126

Change-Id: Ieb21a45d3ecb3a228c2a122cb78aeb2daaaef3d2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147325
(cherry picked from commit 1282fa23b54c2cfdedfeaa439a1cb5945d04b5ad)
Reviewed-on: http://git-master/r/161066
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra: fuse: fix the minor number for T11x A01 version.
Krishna Reddy [Sat, 3 Nov 2012 00:53:19 +0000]
arm: tegra: fuse: fix the minor number for T11x A01 version.

The minor number is set to 0 instead of 1 for A01.

Change-Id: I5ffa98f740d4cb6d88ac96d787fe6b463feaf7f0
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/161039
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: dalmore: fix multiple GPIO mapping
aghuge [Fri, 2 Nov 2012 09:07:46 +0000]
ARM: tegra: dalmore: fix multiple GPIO mapping

GPIO_PK4 is sued for TS_RESET and not for
EXT_MIC

Bug 1052495

Change-Id: Id078dc732be969b01a9348a01bdef30bd1ee0a3e
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/160830
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: David Jung <djung@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: Added platform data for max77665 haptics driver
Sumit Sharma [Wed, 31 Oct 2012 09:21:02 +0000]
arm: tegra: Added platform data for max77665 haptics driver

Added platform data for MAXIM77665 haptics driver in board file

Bug 1157818
Bug 1043388
Bug 1157811

Change-Id: I387f6d589c0e23b2cbdc1b74cc21e3d615f9c985
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/160766
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: config: Added max77665 haptics driver support
Sumit Sharma [Wed, 31 Oct 2012 09:06:41 +0000]
arm: tegra: config: Added max77665 haptics driver support

Enabled MAXIM 77665 haptics driver support config variable in defconfig

Bug 1157818
Bug 1043388
Bug 1157811

Change-Id: Id05c3fd545c1f6bae05d2a7b48b7f61b48995d4b
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/160765
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agopluto: add interface to check the power of bl
Kerwin Wan [Thu, 25 Oct 2012 10:37:30 +0000]
pluto: add interface to check the power of bl

bug 1057856

Change-Id: Ie30dc8a724f1c961be1aa9f1972d491b47c1bf64
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/160405
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: Dalmore/pluto: Set drive strengths
Naveen Kumar Arepalli [Tue, 30 Oct 2012 07:01:28 +0000]
ARM: tegra: Dalmore/pluto: Set drive strengths

Enabling HSM for SD Pad groups: SDIO1, SDIO3, GMA
as per characterization team recommendations

Bug 1052592

Change-Id: I6c5f3033effa9f40420ff5f2300ffc0da3ae4041
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/159769
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: Add support to parse pwr_i2c in command line
Chaitanya Bandi [Tue, 30 Oct 2012 06:53:03 +0000]
ARM: tegra: Add support to parse pwr_i2c in command line

Bootloader passes pwr_i2c=1000 if 1Mhz is supported with
PWR_I2C. Parsing this is kernel.

Bug 1158569

Change-Id: I5c6c87e905dceb9d67ef1f23eaf0b70768481061
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/159768
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11x: flush L2 at entry of system suspend
Bo Yan [Wed, 31 Oct 2012 01:55:26 +0000]
ARM: tegra11x: flush L2 at entry of system suspend

since we are no longer flushing L2 cache in cpu_suspend, this has
to be done when we need to enter system suspend.

Change-Id: If84d1b4e8120e48aaea7fc850254ff71474a4399
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160077
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: Tegra11x: defconfig: Build SND_HDA_INTEL as a module
Rahool Paliwal [Mon, 8 Oct 2012 13:21:00 +0000]
ARM: Tegra11x: defconfig: Build SND_HDA_INTEL as a module

Build SND_HDA_INTEL as a module. SND_HDA_INTEL is required for
audio on HDMI. Building it with "y" makes it default ALSA device,
which then blocks all multimedia audio use cases.

Bug 1154979

Change-Id: Id84f3b7d8a0934a9862dad493706c103aa72cce3
Signed-off-by: Rahool Paliwal <rpaliwal@nvidia.com>
Reviewed-on: http://git-master/r/142434
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
(cherry picked from commit 10bedbfd274014808a9f76808734775e91a12c87)
Reviewed-on: http://git-master/r/160783
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: fix pinmux setting for 4.7in JDI panel
Karthik Ramakrishnan [Fri, 2 Nov 2012 02:50:26 +0000]
arm: tegra: fix pinmux setting for 4.7in JDI panel

Modify pinmux table to reincorporate smart panel related changes.

Change-Id: Ic6d4bca25e937bfae6260aff244ca7b4a549f4ed
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/160761
Tested-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra11: clock: Propagate shared bus maximum limit
Alex Frid [Tue, 30 Oct 2012 06:03:01 +0000]
ARM: tegra11: clock: Propagate shared bus maximum limit

Propagated recursively maximum rate limitation down the possible
chain of shared buses (don't exist yet). Made sure shared user
rates are not increased while propagating new maximum rate.

Change-Id: Ie77a4212c75e15fd81a4364f8647a11bdb82ceff
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/160461
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Rename bus user comparison ops
Alex Frid [Sun, 28 Oct 2012 06:28:58 +0000]
ARM: tegra11: clock: Rename bus user comparison ops

Renamed bus user comparison operations from "cbus_user_is_xxx"
to "bus_user_is_xxx", as they can be applied to non cbus users
as well.

Change-Id: Iced5166f368a688675509dfd0d2e37291d13dd1b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/160460
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoCHROMIUM: config: Add t114 splitconfig
Christopher Freeman [Wed, 31 Oct 2012 20:50:54 +0000]
CHROMIUM: config: Add t114 splitconfig

Adds config file for T114/Dalmore for ChromeOS

Signed-off-by: Christopher Freeman <cfreeman@nvidia.com>
Change-Id: Ie9497a4310b73640bccff66db61fc29c69703128
Reviewed-on: http://git-master/r/160312
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andrew Chew <achew@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agoArm: tegra: ahb: Enable AHB prefetch for sdmmc4
naveenk [Tue, 16 Oct 2012 15:19:59 +0000]
Arm: tegra: ahb: Enable AHB prefetch for sdmmc4

Change-Id: I32cbd108998fda75de5ba740370d4aeb9a0c8423
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/159771
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: configs: disble CONFIG_MMC_EMBEDDED_SDIO
Nitin Bindal [Mon, 5 Nov 2012 09:15:18 +0000]
ARM: tegra: configs: disble CONFIG_MMC_EMBEDDED_SDIO

Disble CONFIG_MMC_EMBEDDED_SDIO flag, so that CCCR information
can be read from WiFi chipset.

Bug 1162770

Change-Id: I08f913f528a9eccc246b606309eceae3581f5ea0
Signed-off-by: Nitin Bindal <nbindal@nvidia.com>
Reviewed-on: http://git-master/r/161164
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: usb_phy: Fix HSIC phy power off
Abhishek Shukla [Thu, 1 Nov 2012 18:00:34 +0000]
arm: tegra: usb_phy: Fix HSIC phy power off

- Remove assignment of unused port_speed
variable for HSIC
- Remove HSIC reset during suspend state as
it is causing resume failure sometimes.
- Adding wait for shutting down PHY clock after
setting PHCD bit to turn off the PHY clock.

Bug 1159000

Change-Id: I34bc24a27fe664cb6a77095e51d9e4517d81216c
Signed-off-by: Abhishek Shukla <abhisheks@nvidia.com>
Reviewed-on: http://git-master/r/160623
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: power gate skip update
rrajk [Tue, 30 Oct 2012 07:08:06 +0000]
ARM: tegra: power gate skip update

T11x power gate partition skip list updated. CPU and 3D partitions
are removed from skip list and power gate for these partitions
is controlled by respective modules.

bug 1053317

Reviewed-on: http://git-master/r/134739
(cherry picked from commit cc2038d4f030a57c0b450ee7d51e56776449427f)

Change-Id: Ia72b1b6b7e8620b1bb52eb034a8c6817465a2d61
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/159770
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Garg <sgarg@nvidia.com>

5 years agoarm: tegra: mc: Add config option for tegra errata 1157520.
Krishna Reddy [Wed, 17 Oct 2012 02:16:51 +0000]
arm: tegra: mc: Add config option for tegra errata 1157520.

Add config option for tegra errata 1157520.
Eanble the errata for t11x A01.
Bug 1157520

Change-Id: I9bbd4b0ae2d92bede85897203e88c295b245f38b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/161037
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoDROP Revert "alarmtimer: Fix conflicting definitions of alarmtimer_get_rtcdev"
Dan Willemsen [Wed, 7 Nov 2012 01:16:22 +0000]
DROP Revert "alarmtimer: Fix conflicting definitions of alarmtimer_get_rtcdev"

This reverts commit 266328fd18cd6dcbce4d0371c197f93ae6bc944a.

5 years agoinput: touch: Suspend/Resume correction
Xiaohui Tao [Fri, 26 Oct 2012 22:30:26 +0000]
input: touch: Suspend/Resume correction

Instead of using regulator_get/put, we are using
devm_regulator_get/put

Change-Id: I6e740704648497927bdefbb63f0d39c3323081b6
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/159380
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rb613298d7a1607f86af61b28ca79162aacf65e1d

5 years agoinput: touch: Suspend/Resume updates
David Jung [Thu, 25 Oct 2012 23:10:05 +0000]
input: touch: Suspend/Resume updates

Nvidia updates for suspend/resume
for Raydium touch screen software.

Bug 1054288
Bug 1165520

Change-Id: I6405af7a66fe60120ad6c46b3423ff708457935f
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/147737
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rcdab2dfeb778d973f845a9821c6051d9cd52118c

5 years agoarm: tegra: USB: Fix phy_power_on condition
Petlozu Pravareshwar [Fri, 2 Nov 2012 06:42:12 +0000]
arm: tegra: USB: Fix phy_power_on condition

When the Phy is left powered on; the USB phy should not be programmed.

Bug 1160474

Change-Id: Ifa38769cda74a4be74ac2674e774574c2da574bf
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/160786
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R4d59a3e3cdb3584863a038f57239685fd9dcd8b2

5 years agotouch: raydium: Update to board files
David Jung [Mon, 29 Oct 2012 19:51:10 +0000]
touch: raydium: Update to board files

Nvidia updates to
add names for platform id, clocks to data
descriptors. Correct 1.8V and 3.3V names
for touch screen.

Bug 1054288
Bug 1165520

Change-Id: I0ea7c63775ae64b8ec8386f5fdbe7503787a1e8f
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/159599
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R398782c9ccdecc82e88afcfd145fa5818c4bbb49

5 years agoinput: touch: raydium: add enable/disable
Mallikarjun Kasoju [Tue, 16 Oct 2012 12:51:48 +0000]
input: touch: raydium: add enable/disable

For 'enabled' sysfs provide enable and disable and
invoke respective suspend and resume PM. This functionality will
replace early suspend functionality.

Bug 1063749

Change-Id: I100c6b4d8d4d71861fdacc6b1c0d2efafc8a6b4c
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/147699
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: R3fbbe4bbd47ede02ac2fbf9770232da6d66abbf0

5 years agoarm: tegra: power: Pluto keep 3.3 and 1.8 on
David Jung [Wed, 10 Oct 2012 21:00:45 +0000]
arm: tegra: power: Pluto keep 3.3 and 1.8 on

Modify to keep 3.3V and 1.8V always on
for touch screen and other devices
on those rails. They will use low power
sleep modes instead.
SysEng recommends that both rails be kept
on bc leakage was seen when only one rail
was shut off.

Bug 1155297

Change-Id: I66e5c46ce41a7c3100b6b04c10fc6d19f786cda3
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/147647
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rdeb2c48155c095be640cbc357f44e730b0f1888a

5 years agotouch: raydium: change SPI bus to 18MHz board file
David Jung [Tue, 2 Oct 2012 20:18:55 +0000]
touch: raydium: change SPI bus to 18MHz board file

Update Dalmore to 18 MHz SPI bus.

Bug 1054642

Change-Id: I4a3d9baf6f324271f0b4444176e1152596749a5b
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/147646
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R31fe8db1ed410da0cd4e1f538835cd766ce630f3

5 years agoarm: tegra: suspend/resume will mng clk
David Jung [Fri, 5 Oct 2012 00:08:13 +0000]
arm: tegra: suspend/resume will mng clk

Change board files so that touch suspend/resume
will handle the turning on/off of the clock.

Bug 1054288

Change-Id: I972b86f08f244ed53382da6c87e18bd0899e0206
Reviewed-on: http://git-master/r/#change,141056
(cherry picked from commit d0f27d136d632a1233e024ed4288fe5068979d1a)
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Signed-off-by: David Jung <djung@nvidia.com>
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/147644
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R92067f2020c15b0434f76e1c15fe329ddfaba119

5 years agoarm: tegra: raydium board file slow scan updates
David Jung [Wed, 24 Oct 2012 23:22:35 +0000]
arm: tegra: raydium board file slow scan updates

Nvidia changes to update board files for slow scan.

Bug 1054801

Change-Id: Ibc40c81d8b8e5b6ddcd3abb92e59ab5f74e2ca9f
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/147363
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Rc54303c07c6542cff08b444a82a7c82afb918d01

5 years agoarm: tegra: raydium board files for slow scanning
David Jung [Wed, 24 Oct 2012 22:46:55 +0000]
arm: tegra: raydium board files for slow scanning

Raydium code drop.
Update board files for slow scan mode.

Bug 1054801

Change-Id: I7dab4fab23b3ee4bd1f662f9fba5a687199c259f
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/147345
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R7eafb939230eb0d7afa43f98c2382c050e7f6754

5 years agoinput: touch: raydium: updates for slow scanning
David Jung [Wed, 24 Oct 2012 22:39:38 +0000]
input: touch: raydium: updates for slow scanning

Raydium code drop.
Update for Raydium touch for
Pluto slow scanning

Bug 1054801

Change-Id: Id182035bf7e51ba3431c392ee10a95b5bc518157
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/147343
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R0e9b674d090f90bc23a43c16873f75856ed926a6

5 years agoARM: tegra: Remove A15 sim timer hack
Jeff Smith [Thu, 18 Oct 2012 21:35:34 +0000]
ARM: tegra: Remove A15 sim timer hack

Change-Id: Ifc98bac7bd609419d8d0774f8f129cf666d486c6
Signed-off-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-on: http://git-master/r/146077
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R767404d0a58516fbeadad00f9a1bbd4b087a5279

5 years agoARM: tegra: usb_phy: Tracking circuit power down
srinivas [Wed, 12 Sep 2012 08:38:38 +0000]
ARM: tegra: usb_phy: Tracking circuit power down

1. Bring PD_TX out of power-down mode by writing
UHSIC_PADS_CFG1 register to 0.
2. Bring tracking circuit out of power-down mode by
clearing bit PD_TRK.
3. Add 25usec delay. This allows calibration complete.
4. Power down tracking circuit by setting PD_TRK=1.

Bug 1037962

Change-Id: Iae682af2387237eb15025c0ad705be5fd7293019
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/131727
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R60513fa7497bad72661ebbc997a7910df7bb48cd

5 years agoARM: tegra: soctherm: Update thermal register
Joshua Primero [Tue, 23 Oct 2012 21:29:23 +0000]
ARM: tegra: soctherm: Update thermal register

Update soctherm driver's thermal register call due
to update in Linux Thermal API.

bug 1059470

Change-Id: Ib622f89e680a7fbb44d5212eba525be2c9a64a02
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/159968
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R2d15ad6ad2a15d70e52a7d6fe77fc871f603fe8a

5 years agodrivers: nct: tsensor: Update thermal register
Joshua Primero [Tue, 23 Oct 2012 21:27:18 +0000]
drivers: nct: tsensor: Update thermal register

Updated thermal register function for tsensor and nct thermal
drivers due to Linux thermal API change.

bug 1059470

Change-Id: Ic4ca347c6fcc1aad156122147a7c94a5f3880985
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/159967
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R43104f86721859571b84ba556db0c35aaebd6393

5 years agoarm: tegra: baseband: enable autosuspend for Icera PID 0x310
Neil Patel [Tue, 30 Oct 2012 18:54:34 +0000]
arm: tegra: baseband: enable autosuspend for Icera PID 0x310

Enable autosuspend for all Icera modems with product ID 0x310.

Bug 1167714

Change-Id: Ie94600e80be2fa305383cf36d5d77d92f8513149
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/159947
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Raae9dca47c729b90113f64730f1cc410708e715a

5 years agoarm: tegra: baseband: enable oob remote wake and reset detection
Neil Patel [Thu, 1 Nov 2012 14:43:02 +0000]
arm: tegra: baseband: enable oob remote wake and reset detection

Out of band remote wakeup and reset detection for Icera modems was
disabled during T114 bringup and needs to be re-enabled.

Bug 1169035

Change-Id: I0c720f18bcf91dab01051d6e15a866ae2c8053c7
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/160601
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

Rebase-Id: R35929df775e8531b6b117129668f6e86c4fd7030

5 years agoARM: tegra11x: make SMP disabled compiles
Jong Kim [Fri, 19 Oct 2012 23:32:25 +0000]
ARM: tegra11x: make SMP disabled compiles

Make kernel compiles for disabled CONFIG_SMP.

bug 1057875

Change-Id: Ie7161a86279d31245290f4e74027c1cc5e646790
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/160361
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R4ea53210dffe973551e939137c9f33fce96db316

5 years agoarm: tegra: isomgr: fix incorrect comparison in isomgr.
Krishna Reddy [Wed, 31 Oct 2012 00:14:42 +0000]
arm: tegra: isomgr: fix incorrect comparison in isomgr.

fix incorrect bandwidth available check comparison during reserve.
check for validity of clients.
support specifying the clients based on soc.
fix format issues.
add missing sysfs nodes for isomgr.

Change-Id: Iad7a95b923397e9e8210c9fc42981095f3045bcd
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/160056
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>

Rebase-Id: R67635104ffd92bd171aa91d09161f9fa333a97c4

5 years agoARM: tegra11: dvfs: Update DFLL range configuration
Alex Frid [Sat, 27 Oct 2012 02:01:57 +0000]
ARM: tegra11: dvfs: Update DFLL range configuration

Replaced boolean DFLL usage configuration option with integer
TEGRA_USE_DFLL_RANGE option that specifies default range for
DFLL to be used as CPU clock source:
"0" - DFLL is not used,
"1" - DFLL is used as a source for all CPU rates
"2" - DFLL is used only for high rates above crossover with
PLL dvfs curve

Made sure that valid cvb tables for DFLL and PLL modes provide
crossover between DFLL and PLL dvfs voltage ranges.

Change-Id: Idf50ee15b7a30c10a15360f7be2079586c0118f4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/159728
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R95465facdc3c6d2b402ff3f33819909f86266f06

5 years agoARM: tegra: Kconfig: enable soctherm by default
Joshua Primero [Sat, 20 Oct 2012 22:50:04 +0000]
ARM: tegra: Kconfig: enable soctherm by default

Soctherm is ready to be enabled.

bug 1169070

Change-Id: I51236e333267c88b07e3883813200007059ebb8f
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/146157
(cherry picked from commit e49070901be252c87811eaadf75668337433206a)
Reviewed-on: http://git-master/r/159500
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: Rfa9aec2593d53e2342a81ad1d4d851eaa55a1b50

5 years agoARM: tegra11: secure os: disable normal os timer
Hyung Taek Ryoo [Fri, 26 Oct 2012 14:31:12 +0000]
ARM: tegra11: secure os: disable normal os timer

The timer is handled by the secure os for T11x.
Hence disable timer in normal os when secure os is enabled.

Change-Id: I64639e1f69bca39fdc6e149000f8de8c821ab485
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-on: http://git-master/r/159123
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rfa3d117bcb2505632d827530b3e7820638201bc5

5 years agovideo: tegra: host: use platform bus/driver/device
Mayuresh Kulkarni [Fri, 26 Oct 2012 13:17:24 +0000]
video: tegra: host: use platform bus/driver/device

- this commit replaces the custom nvhost bus/driver/device
with platform bus/driver/device
- this is in preparation to add DT support
- following is the list of notable changes done:

1. chip_ops: The per SoC differences is encapsulated by chip_ops structure.
With nvhost_bus:
- It is hidden in nvhost_bus and exposed APIs to rest of the code.
These APIs land up in correct implementation for current SoC.
With platform_bus:
- I had to make this global and adjust the API accordingly.

2. nvhost_device
With nvhost_bus:
- The struct nvhost_device encapsulates both Linux device driver parts
as well as tegra specific parts.
With platform_bus:
- I had to move the current nvhost_device as a platform_data
for each platform_device. For this I renamed the struct nvhost_device
to struct nvhost_device_data.
- Also, since nvhost_driver is gone, I had to move all the
function pointers in it to struct nvhost_device_data.

3. Device specific private data: Host1x master device has its own
static data (called nvhost_master) which stores the per SoC
sync-point, IRQ info etc.
With nvhost_bus:
- This was stored as device specific platform_data.
With platform_bus:
- The device specific platform_data is now struct nvhost_device_data
(as mentioned above).
- I need to keep it common for all the devices whose code is
part of host1x directory, so that other parts of code that need per-device
info have a unique interface of platform_get_drvdata.
- As a result, I had to add a void * field in struct nvhost_device_data
which now holds per-device specific data and expose APIs to get/set this data.
- As of now, only host1x master parent device code uses this.

4. Per SoC device names:
With nvhost_bus:
- Per SoC device name is SAME for all the SoCs.
- The correct driver get linked to this device via the concept of id_table.
This id_table allows us to connect multiple devices to single driver code
and pass appropriate function pointer specific to SoC (you can check gr3d.c for details).
With platform_bus:
- The id_table usage of platform_bus is different from above.
- To adhere to its need, I had to append the per-SoC device name
with a version field (so gr3d for t20 became gr3d01, for t30 became gr3d02 etc).
- I adjusted the correct names in _probe of such devices.
Also, I adjusted the node names exposed to user space (/dev/host-gr3d etc)
to be consistent across SoCs.
- But this fails for the sysfs entries created by device registration code
of Linux, since during this time the _probe is not called.
So, device name is still appended with version field.

5. Per SoC device registration function: tegraXXX_register_host1x_devices
is the per SoC specific APIs which is called by board-file to register
the host1x and client devices. Host1x has strict requirements for the
parent->child relations i.e. any client of host1x device should have the
parent set properly BEFORE device registration.
With nvhost_bus:
- Setting of parent was taken care by nvhost_device_register call and other helpers.
With platform_bus:
- It is not possible to change parent till _probe of client device returns
(meaning not much of control in our hand). The device driver core,
takes a mutex lock of parent BEFORE calling _probe to avoid changing parent during _probe.
- So, to set correct parent, I changed the return type of
tegraXXX_register_host1x_devices to return pointer to master host1x parent device.

6. platform_get_drvdata calls:
With nvhost_bus:
- Only host1x master parent calls this.
With platform_bus:
- Almost all the common code ends up calling this.
Fortunately, we had designed the APIs such that they take nvhost_device * as argument.
So changing them to platform_device * is in a way easy.

7. Device list: The debug-fs dump code & module-reg-read-write
functionality rely on having a list of host1x devices registered currently.
With nvhost_bus:
- This is readily available since struct bus_type of Linux holds this list.
Moreover, it provides an iterators to access this list.
With platform_bus:
- Since it holds large number of devices in system, it is inefficient
to use the above iterators. Also, it is difficult to have a common matching
criteria for all the devices who have different platform_data.
- As a result, I had to add a simple list using Linux kernel's list implementation.
It holds the list of devices which have their code within host1x directory
and actually use channels (remember tegra-dc and nvavp are outside
host1x code && do not use physical channels they only need sync-point
and host1x hardware alive when they are alive).
I also had to provide 2 iterators one which is used for
module-reg-read-write and other for debug-fs dump.

8. I changed how tegra-dc and nvavp called the host1x externally exposed APIs
(such APIs end with _ext). In current code, they know little too much of
host1x code internals. I now changed to make them independent of host1x internal
implementation and structure know-how. They now simply send their own
platform_device * to the external visible APIs and these APIs
ensures that the call ends up in correct function call.

bug 1041377

Change-Id: I9cd4d506e6f3bde805923ce7c7bbbd37c9ec13c4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/131403
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R6122105630373122c809a152a1b80f59d636bb7a

5 years agoARM: tegra: pluto: add ina219 power monitor devices
Mallikarjun Kasoju [Wed, 17 Oct 2012 15:10:57 +0000]
ARM: tegra: pluto: add ina219 power monitor devices

Bug 1156147

Change-Id: I9e4f01efb6e102c0637b662f6789439efca6a0c9
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/160402
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R8ffbff8fba0fd94a53905ebbdeea34bfdb477087

5 years agoasoc: tegra: cs42173: modify DAPM route table
Dara Ramesh [Wed, 31 Oct 2012 17:40:24 +0000]
asoc: tegra: cs42173: modify DAPM route table

a) register DAPM route table with snd_soc_card structure and
remove the open-coded DAPM add route calls.

b) set card.fully_routed flag to request the ASoC core calculated
unused codec pins, and call snd_soc_dapm_nc_pin() for them.

Bug 1158489
Bug 1052069
Bug 1054060

Change-Id: I43e9f4dab812904e314d460edec0a2bd903f09c6
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/160252
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: Ra0c93ba4a07a630fc01efa0595abbbcdd46639e8

5 years agoTegra11x: defconfig: Add necessary camera devices
Rahool Paliwal [Wed, 31 Oct 2012 08:39:32 +0000]
Tegra11x: defconfig: Add necessary camera devices

This adds MAX776 flash device and AS364X torch device

Bug 1165148

Change-Id: Ied777a08e8f4ba01f6a073024a0e1edc2514aeea
Signed-off-by: Rahool Paliwal <rpaliwal@nvidia.com>
Reviewed-on: http://git-master/r/160141
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Ra8aaa141d28db7a73d52ffaf5b319aaaae6a2b48

5 years agoarm: tegra: USB: Disable STREAM_DISABLE
Petlozu Pravareshwar [Tue, 30 Oct 2012 11:50:33 +0000]
arm: tegra: USB: Disable STREAM_DISABLE

Setting STREAM_DISABLE = 0 for all USB controllers.

Bug 1166838

Change-Id: I6f540aac2175a920d5bd549e5545122b1c886a80
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/159864
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R2a1139b6d41aedad2bb068b41d0bb68e137f8417

5 years agocpuidle: Export target residency
Antti P Miettinen [Mon, 29 Oct 2012 12:37:31 +0000]
cpuidle: Export target residency

Make cpuidle state target residency visible via sysfs.

Change-Id: Ie039bcfa943bdb4aca6cb30ac23356e4b48aa32b
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/159543
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R1008dd339b9698c09b350e1063cce04ebfe6b500

5 years agoARM: tegra11:clock:update UTMIPLL register program
Rakesh Bodla [Wed, 31 Oct 2012 05:17:59 +0000]
ARM: tegra11:clock:update UTMIPLL register program

Update the UTMIPLL register programming sequence
to let hardware control UTMIPLL.

Bug 1057339

Change-Id: I38cca059b3f263de8382f56a5f2a0247e0df8743
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/159449
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R24146394216696fe34fabc4c3cbe7498af48fe97

5 years agoarm: usb: phy: HSIC 2LS WAR using PMC resume
Vinod Atyam [Mon, 22 Oct 2012 10:23:43 +0000]
arm: usb: phy: HSIC 2LS WAR using PMC resume

Enable the 2ls war support during
AP resume and remote wakeup resume.

Bug 1028940

Change-Id: I09dc3c71b95bd83b8612624aa40a94b89d98dda7
Signed-off-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-on: http://git-master/r/146340
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: Rdd8dfcd5dae5d8e8fdd7248e349c091d705274bf

5 years agoarm: tegra: pluto: enable powergate for ve
Daniel Solomon [Thu, 1 Nov 2012 00:15:22 +0000]
arm: tegra: pluto: enable powergate for ve

Enable powergate for VE.

Bug 1059495

Reviewed-on: http://git-master/r/142731
(cherry picked from commit f0706776cd7bd90eaaca3823eeb55256fac013c5)

Change-Id: I66c4c3a6a9a18ba175cc61269f3f4bd95af1ad17
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/145997
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R52194216b6d02572ae42ebaf81e715a35c7d5fa6

5 years agoarm: tegra: rename pinmux device/driver name
Pritesh Raithatha [Fri, 19 Oct 2012 09:30:47 +0000]
arm: tegra: rename pinmux device/driver name

rename all tegra pinmux device/driver with similar names.
platform device name has size limit of 20 char.

Bug 1003210

Change-Id: Idd162fad662a364812010630856c1657b9af9c35
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/145910
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R26a8068210c38efc0406126beefc55cf7a4f4620

5 years agoarm: tegra: emc: Fix the freq to bw conversion API's.
Krishna Reddy [Tue, 30 Oct 2012 23:44:11 +0000]
arm: tegra: emc: Fix the freq to bw conversion API's.

Fix the emc freq to bw conversion and vice versa API's to
return real emc freq and bandwidth numbers based on SOC.

Bug 1167105

Change-Id: I6f244d0f6626e59ed5a3707a2a564ee711a45c43
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/160043
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R872b157e1d48d0ea6cc6f23bed28b3dc54dcd3e1

5 years agoARM: tegra: soctherm: Update bind function
Joshua Primero [Tue, 23 Oct 2012 01:11:34 +0000]
ARM: tegra: soctherm: Update bind function

Updated bind function to reflect new Thermal API.

bug 1059470

Change-Id: I77bff7ac080d663018a938ccd2fa887884ab84a5
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/159964
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R31b74701aaa5833b5ce6099e37ef07d5a31b1b12

5 years agodrivers: nct: tsensor: Update bind function
Joshua Primero [Tue, 23 Oct 2012 01:09:57 +0000]
drivers: nct: tsensor: Update bind function

Update the bind function in the tsensor and nct driver to
reflect the new Thermal API.

bug 1059470

Change-Id: I527383d426ff1f70fe531a02d600735cbedea7b8
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/159963
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rf670aa168e92273e6448c315b33afce72af800cc

5 years agoARM: tegra11: clock: Don't convert EMC shared user requests
Alex Frid [Tue, 30 Oct 2012 03:43:00 +0000]
ARM: tegra11: clock: Don't convert EMC shared user requests

Removed conversion of EMC shared bus users bandwidth requests to EMC
bus width. Let the client drivers do it.

Bug 1167105

Change-Id: I5b7aae3d87f76171bc67cfb9cb6d8480e2122f75
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/159732
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R5bf73206f9692ce73b988f6ec2b6f8dfc1e09719

5 years agoinput:atmel_mxt - add regulator support
Xiaohui Tao [Tue, 23 Oct 2012 19:24:13 +0000]
input:atmel_mxt - add regulator support

Bug 1063749

Change-Id: I47f9f312fbbda99e0746f5017d30d91a38037e35
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/147118
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>

Rebase-Id: R928aeb27087120eeefa1b34356125ffbc92ec207

5 years agoARM: tegra: pluto/dalmore: Enable PMU power off
Mallikarjun Kasoju [Tue, 30 Oct 2012 15:38:12 +0000]
ARM: tegra: pluto/dalmore: Enable PMU power off

Enable power off functionality for pluto and dalmore
Bug 1051970

Change-Id: If8956801fa0eea56a3716686cd6dda3b86f63989
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/134305
(cherry picked from commit 0963e62f86ab2c08c0e02dc28087c0460ebada2a)

Conflicts:

arch/arm/mach-tegra/board-dalmore-power.c
arch/arm/mach-tegra/board-pluto-power.c

Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Change-Id: I93591db9b8fc636456c56a280b03ba8a3722b44e
Reviewed-on: http://git-master/r/159899
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rcd9e198e1b21aa4e36bd1d704b5b4c4e12a52dce

5 years agoARM: tegra: Dalmore/pluto: Set drive strengths
Pavan Kunapuli [Fri, 12 Oct 2012 10:26:30 +0000]
ARM: tegra: Dalmore/pluto: Set drive strengths

Setting the drive type for GMA pad groups.
Changed the drive strength settings of GMA
pad group as per characterization team
recommendations.

Bug 1156152

Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/144031
(Cherry picked from commit 0eca234cfc04bfcd6e5f6a8c1a035319186305cd)

Change-Id: I6df5b3e7bc02b1d39079726d5477b5b2dfbc70d5
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/159819
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R9085d8abf6b8213075ea632f89df8694e564f361

5 years agoARM: tegra: powergate update
Bitan Biswas [Tue, 16 Oct 2012 14:04:48 +0000]
ARM: tegra: powergate update

Tegra11x partition powergate and unpowergate is separated
from older chip implementation

Change-Id: I6669eac81f8c2964139637b5147c07005b594717
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/159760
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rbc92c499be119854995d957e58219aae116c5a47

5 years agopluto: enable PRISM for 1080p Sharp Panel
Mitch Luban [Thu, 18 Oct 2012 05:15:41 +0000]
pluto: enable PRISM for 1080p Sharp Panel

This change enables PRISM on 1080p Sharp panel.

Change-Id: I9f1a9bd410164a307b8de3e5855ac96b601bd6e5
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/159582
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R0feb107fcc3af0e8473379017675fc31f050c799

5 years agousb: gadget: tegra: free resources in case of error
Sri Krishna chowdary [Mon, 29 Oct 2012 12:54:52 +0000]
usb: gadget: tegra: free resources in case of error

Bug 1046331

Change-Id: Ic4f4665c77f2dc3b4c5aeb0e9be5b9e9173fddb0
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/159552
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rd6da02321f722ece346e2ef4a6fd7d0e55a7fde9

5 years agomisc: tegra-cryptodev: fix resource leak
Sri Krishna chowdary [Mon, 29 Oct 2012 11:53:27 +0000]
misc: tegra-cryptodev: fix resource leak

Memory allocated from ablkcipher_request_alloc is
not deallocated before function returns when
crypt_req->keylen is invalid.

Bug 1046331

Change-Id: I9d74159c0653b5b5d08e3d0d00b1919590d7599f
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/159533
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R35219bc071a902129ee2948b023d14e95c8213c0

5 years agoARM: tegra: soctherm: set initial soctherm values
Joshua Primero [Sat, 20 Oct 2012 19:54:16 +0000]
ARM: tegra: soctherm: set initial soctherm values

Set initial soctherm values. This is in preparation for enabling
the hardware.

Change-Id: Id7ad43b39ede0177a3916b9210b7a2e4fbd6eaa6
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/146156
(cherry picked from commit d7cd52519608dd2273105be03a2aab4967f5a3bb)
Reviewed-on: http://git-master/r/159499
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R5239e2048865a08d360c6446d787b88a0ec884f7

5 years agoARM: tegra: pluto: enable ringer switch
aghuge [Mon, 29 Oct 2012 06:07:10 +0000]
ARM: tegra: pluto: enable ringer switch

Bug 1157359

Change-Id: Ie24c09d1e05a98e807bd6beb528d3e8020dfe040
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/159464
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rec1c7bc985adfabea8418e3946e5754b7c29948c

5 years agoARM: tegra: mc: setup chip_specific fn ptrs before enabling interrupts
Chris Johnson [Mon, 29 Oct 2012 05:30:25 +0000]
ARM: tegra: mc: setup chip_specific fn ptrs before enabling interrupts

There are instances when we see that the irq fires before we have setup
the actual chip specific function pointers causing a crash in the mc isr

Change-Id: Ied30c1aafca10d6a1b9745507455e40b55014dc9
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/159456
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rf00779d5db481988cfa373e1630282b26c530894

5 years agoarm: tegra: Add NET_IP_ALIGN in mach memory.h
Mohan T [Tue, 30 Oct 2012 05:31:18 +0000]
arm: tegra: Add NET_IP_ALIGN in mach memory.h

NET_IP_ALIGN needs to be define in mach memory.h
to support Unaligned skb DMA access in network drivers
like USB rndis and usbnet.

Bug 1025704

Change-Id: I7517410f0b311721f2157cfbc36ba4f5db3f1583
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/148675
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: Re61813f29d2aa2a65961e2f50556d9e8dfb88c4e

5 years agopluto: calibrated backlight and PRISM for LG 5"
Mitch Luban [Fri, 21 Sep 2012 08:15:04 +0000]
pluto: calibrated backlight and PRISM for LG 5"

PRISM is enabled and includes backlight adjustments
for LG 5" panel to ensure a linear backlight ramp up.

Bug 1047558
Bug 1027942

Reviewed-on: http://git-master/r/142749
(cherry picked from commit 4064265fc7569fdc4b71e0847070e982bc78d5c4)

Change-Id: I5552635b93dc60810a6c4e9d07d55dfa8384984f
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/147349
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R416c5bdd7b65d5502b6c39ab370ad19482c28669

5 years agousb: ehci: tegra: Add phy pre_suspend callback.
Raj Jayaraman [Thu, 4 Oct 2012 22:33:45 +0000]
usb: ehci: tegra: Add phy pre_suspend callback.

Bug 1054808

Change-Id: I1de98ced6e8e30794907797bba05ad13190597a9
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
Reviewed-on: http://git-master/r/147305
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R889dfb72dcd55675e259be9c5fbe9a6fd9e752e7

5 years agoARM: tegra3: actmon: moving to clk prepre APIs
Sivaram Nair [Tue, 23 Oct 2012 06:35:52 +0000]
ARM: tegra3: actmon: moving to clk prepre APIs

The clk_enable/clk_disable pair of APIs are replaced with
tegra_clk_prepare_enable and tegra_clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: Ia0c8072f673a924ca39b878e8f63475cbef5dcbf
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146779
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R75c1b378798c5f13726ba35395d895b8f71164ab

5 years agoARM: tegra: timer: moving to clk prepare APIs
Sivaram Nair [Tue, 23 Oct 2012 06:31:45 +0000]
ARM: tegra: timer: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
tegra_clk_prepare_enable and tegra_clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I410e8cf8cfbf6622dc1076b22598b7fb55e4f63e
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146778
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R561e29b29798f0078a377609b4b642e9c8e9392b

5 years agoARM: tegra: usb: disable id and vbus wake source
Krishna Yarlagadda [Fri, 28 Sep 2012 11:15:39 +0000]
ARM: tegra: usb: disable id and vbus wake source

Disabling usb id and vbus wake sources

Bug 1056435

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/139658
(cherry picked from commit e6a6bee5f2515f32045adf5f10cb62343f72babd)

Change-Id: I15654bdac5140960f9e6b195e91f56a14e02e76b
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/146741
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R8ce47ef0b01a6599e8ff34b5514f5d66978bc839

5 years agortc: tps65910: Added rtc time init support
Sumit Sharma [Tue, 16 Oct 2012 04:45:38 +0000]
rtc: tps65910: Added rtc time init support

Added support for initializing rtc time
Fixed IRQ numbers in header file
Changed module name fro rtc-tps65910 to tps65910-rtc

Bug 1055083

Change-Id: I067a52ef21e58eb03331d25417062f53e45b082d
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/144765
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R4585be954218589eb815447d12c0ae77900e3d32

5 years agopinctrl: tegra: add suspend-resume support
Pritesh Raithatha [Tue, 16 Oct 2012 10:03:05 +0000]
pinctrl: tegra: add suspend-resume support

Bug 1003210

Change-Id: If6dff8985dfd3c351e6ed24f194efb247e0c63d6
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/144034
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R7c08ec9c6400ccc5ce361d5c7ba3a7e2e3ced224

5 years agoARM: Tegra: XUSB: Remove stubs for xusb_init calls
Krishna Monian [Tue, 30 Oct 2012 02:32:16 +0000]
ARM: Tegra: XUSB: Remove stubs for xusb_init calls

- Remove xusb stub calls
- Revert 442d96a0db540dbc72ed0051e472fb821c23b758.

Change-Id: Ief19f69f8cfaf80e342aeddc222d98c66fe11ed8
Signed-off-by: Krishna Monian <kmonian@nvidia.com>
Reviewed-on: http://git-master/r/159723
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Re44e5a1281244aac3530b43ab044612b82c079f0

5 years agoARM: tegra: clock: Clip CPU boot rate to cpufreq table
Alex Frid [Fri, 26 Oct 2012 02:19:25 +0000]
ARM: tegra: clock: Clip CPU boot rate to cpufreq table

Clipped CPU boot rate to cpufreq table during cpufreq driver
initialization. This would help avoid futile attempts by cpufreq
governor to adjust the rate while dvfs regulators are not ready.

Bug 1060647

Change-Id: I8984c0c53798413887f866f03704b9097f40a361
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147792
(cherry picked from commit d9325e0bd3cdd1b8d8e4989a0018718dfddb84d0)
Reviewed-on: http://git-master/r/159644
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rd6c8d658c0d1931ba3cabb9c544d5f5bf29ab031

5 years agoARM: tegra11: dvfs: Bound CL-DVFS safe voltage setting
Alex Frid [Wed, 24 Oct 2012 04:37:02 +0000]
ARM: tegra11: dvfs: Bound CL-DVFS safe voltage setting

Removed global CL-DVFS non-zero safe output floor imposed on voltage
calculations by commit af5ba3026ce0d4a6908e7006cab99f2edcabf920.

Instead made sure that safe voltage value when switching from open
to closed loop is at least one step above minimum and one step below
maximum (required to provide initial room for closed loop regulation).

Bug 1157439

Change-Id: I5739d0f62ada92d24b0f5230f4cd4368062f0c87
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/147352
(cherry picked from commit 550be6c793f522bb996e311c7da3ff92cf0f88ac)
Reviewed-on: http://git-master/r/159643
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R65b3f80d64c6e879eb67e3a560efa9839807afbd

5 years agoARM: tegra: dvfs: Update rail statistic
Alex Frid [Sat, 20 Oct 2012 06:04:29 +0000]
ARM: tegra: dvfs: Update rail statistic

- Replaced fixed rail bins with per-rail-per-platform bins (by
default use backward compatible 12.5mV bin)
- On Tegra11 set bins for all rails on cvb alignment boundary (10mV)
- Increased maximum number of bins to 50
- Fixed rail voltage report in dfll mode: compensate 1mV adjustment
used in this mode to force voltage update

Change-Id: I0b7fb49900656de33bc77bb8267dbde713a2441f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/146113
Reviewed-on: http://git-master/r/159642
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Ra61edc2a0fec90c4018e7dba6b2c74b32a7e66af

5 years agoARM: Tegra: Dalmore: Support LG 5" Panel
Matt Wagner [Fri, 12 Oct 2012 21:40:58 +0000]
ARM: Tegra: Dalmore: Support LG 5" Panel

Split LG panel out to support it based on Board ID

Bug 1066897

Change-Id: I8c1ef6569ea2e9b9ac0e229594dce1309800a918
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/147755
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R2980dac06b8fd1e07825da6a52f923f54d9b2cd6

5 years agoarm: tegra: pluto: pass device to regulator_enable
Gaurav Batra [Tue, 30 Oct 2012 00:38:29 +0000]
arm: tegra: pluto: pass device to regulator_enable

During conflict resolutions at the time of integration,
a part of the change that took care of this problem was
over-written by another change with a different base.
Which resulted in device argument to be missing from
a few regulator calls. This patch, fixes that issue.

Bug 1166698

Change-Id: I6584968938dd343452c4660ea4e851b3523ef3ff
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/159924
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Rd9099b568c5c39556536e3e155b17c18dc7e43c3

5 years agoARM: tegra: clock: Rename shared bus operations.
Alex Frid [Tue, 30 Oct 2012 04:12:49 +0000]
ARM: tegra: clock: Rename shared bus operations.

Renamed shared_bus operations that are actually applied to bus
user clock (rather than bus clock itself) to shared_bus_user
operations.

Change-Id: Ic73db770264f4890a2c93e54dff16fe6c97d2c3e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/159748
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jin Qian <jqian@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R663f3e86096150bce1d2b04ade526b74d26d5267

5 years agoARM: Tegra: Dalmore: Activate Hall Effect Sensor
Matt Wagner [Wed, 10 Oct 2012 00:17:26 +0000]
ARM: Tegra: Dalmore: Activate Hall Effect Sensor

Set up gpio-key wakeup with the Hall Effect sensor to be SW_LID
to enable lid open and close logic

Bug 1156171

Reviewed-on: http://git-master/r/142805
(cherry picked from commit d6875d355ada98bcaf1785bd6e6f9afcc6890346)

Change-Id: I546302f0768d5ca20b96eae82d90b4cf27a8fa31
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/159670
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R5edbae18b07b7d8a7c0692873fa8b9dd54e57a65

5 years agoARM: tegra: clock: Mark BW users in the clock tree
Alex Frid [Sat, 27 Oct 2012 07:46:38 +0000]
ARM: tegra: clock: Mark BW users in the clock tree

Marked bandwidth shared users with "+" sign in the clock tree.

Change-Id: I9cbc766a6407d6075b2f39638a9f83f22d98e1f7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/159430
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R88bbd1241677767ae3f4353666caa3b91821c61a

5 years agoasoc: tegra: Fix error in checking SMMU flag
Rahul Mittal [Mon, 29 Oct 2012 06:26:23 +0000]
asoc: tegra: Fix error in checking SMMU flag

SMMU flag check was wrong due to which DMA allocs were done using SMMU
Corrected check to disable SMMU allocations

Bug 1160332
Bug 1155696

Change-Id: I154716d1dc93e45f1f9f1c997bf63fa6f23b73bc
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/159472
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: Rc50dc4b3fbac2f336c9a9356b94fddeb3b0ba121

5 years agoARM: Tegra: Dalmore: Add P2454 Board Support
Matt Wagner [Fri, 5 Oct 2012 18:37:17 +0000]
ARM: Tegra: Dalmore: Add P2454 Board Support

Add support for P2454 Board

Bug 1066897
Change-Id: I67d99c474b52439eeaecb08c17b65b90a5c419fb
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/147754
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rb73eddaacee73d49fa23e254bbf104f1a6f4baae

5 years agoARM: tegra: powergate: moving to clk prepare APIs
Sivaram Nair [Tue, 23 Oct 2012 07:20:18 +0000]
ARM: tegra: powergate: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
tegra_clk_prepare_enable and tegra_clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I9980287785eae070d5f75d4f025a202d2867deba
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146792
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R87aafa360373a37676edd70d38059aefd2f01abd

5 years agoARM: tegra: pm: moving to clk prepare APIs
Sivaram Nair [Tue, 23 Oct 2012 07:09:37 +0000]
ARM: tegra: pm: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
tegra_clk_prepare_enable and tegra_clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I24af62c507f40a8393024eda3d853fe7ed29f203
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146791
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R85fb9a4435863c5f8fbbbc892257ca43f1c480b4

5 years agoARM: tegra: csi: moving to clk prepare APIs
Sivaram Nair [Tue, 23 Oct 2012 07:05:35 +0000]
ARM: tegra: csi: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
tegra_clk_prepare_enable and tegra_clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I559cadd1c6ec4a57a1c95c3b48bd6d5687679ab0
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146787
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R86028ba18e00ad8a44074faeec797d9db6f68e63