5 years agomisc: inv_mpu: Remove unused kernel files.
Robert Collins [Wed, 13 Nov 2013 23:10:47 +0000]
misc: inv_mpu:  Remove unused kernel files.

Bug 1406088

Change-Id: Iff64878f908e14c7fd6eee7eafd922e06c7ab7c4
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/330742
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra12: loki: Fix regulator warnings
Frank Chen [Fri, 13 Dec 2013 03:00:44 +0000]
ARM: tegra12: loki: Fix regulator warnings

T124 has two vi channels so we need to specify
vi.0 and vi.1 for avdd_dsi_csi regulator to avoid
kernel warnings

Bug 1327952

Change-Id: I18f389562f7e7c7671f90f016079e3cb0a5ff2f2
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/345133
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Pablo Ceballos <pceballos@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra: dvfs: Exempt top floor from SiMon offset
Alex Frid [Wed, 11 Dec 2013 03:48:52 +0000]
ARM: tegra: dvfs: Exempt top floor from SiMon offset

Made sure that SiMon offset for VDD_CPU rail is not applied to maximum
thermal floor (lowest temperature entry in thermal floor profile).

Bug 1343366

Change-Id: Ide935b1402d4e55350db9b182b20a58858e9c78b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/344511
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Handle SiMon CPU notification
Alex Frid [Tue, 10 Dec 2013 02:26:57 +0000]
ARM: tegra: dvfs: Handle SiMon CPU notification

Registered DFLL call-back with SiMOn notification chain. When SiMOn
grade for DFLL rail (VDD_CPU) is changed, applied the respective offset
to the DFLL thermal floor profile.

Bug 1343366

Change-Id: I5ee2c94473a6ec165d7ec9d4238c3327f67abcfb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/340230
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Initialize CPU DVFS with SiMon offsets
Alex Frid [Sun, 8 Dec 2013 04:45:41 +0000]
ARM: tegra12: dvfs: Initialize CPU DVFS with SiMon offsets

Added GPU SiMon offset array with just 2 entries, since only one CPU
SiMon high grade (besides default) is characterized on Tegra12.

Added thermal floor trip-point above thermal shut-down limit. This
trip-point will be never be crossed, but it allows to separate absolute
DFLL minimum voltage and high temperature thermal floor that depends
on SiMon offset. Set new thermal floor to current default DFLL Vmin,
and decreased DFLL Vmin by the high grade offset.

Bug 1343366

Change-Id: Ibac6f911aede18ba0d5b30a33451eeacf8e6a4d9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/339680
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: dc: fix Coverity issues
Deepak Nibade [Sun, 8 Dec 2013 09:39:18 +0000]
video: tegra: dc: fix Coverity issues

- fix dereference before NULL check
Coverity id : 24636
- fix unchecked return value
Coverity id : 25027
Coverity id : 25028
Coverity id : 25243
Coverity id : 25244

Bug 1416640

Change-Id: If9e7ff59267cfc39d10f99061162176b4c49a34c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/339693
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Sumit Singh <sumsingh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: use alt dvfs
Wen Yi [Sat, 7 Dec 2013 03:09:46 +0000]
video: tegra: use alt dvfs

vdd_core can be scaled based on which window is active.

Bug 1404188

Change-Id: I02d132e0178e09638298c6e4da2d4e76ba79b473
Signed-off-by: Wen Yi <wyi@nvidia.com>
Reviewed-on: http://git-master/r/339591
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra12: DC window and vdd_core relation
Wen Yi [Sat, 7 Dec 2013 03:05:05 +0000]
arm: tegra12: DC window and vdd_core relation

Define a property to represent the fact
that some window may require lower vdd_core
when it's active.

For T124, the window is Window B that is the second
window.

Bug 1404188

Change-Id: I5cb387028dd6362cf861a03f184572c70d3dd829
Signed-off-by: Wen Yi <wyi@nvidia.com>
Reviewed-on: http://git-master/r/339590
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agocpuquiet: Fix locking in driver_unregister
Sai Gurrappadi [Thu, 12 Dec 2013 23:25:53 +0000]
cpuquiet: Fix locking in driver_unregister

cpuquiet_switch_governors needs to be protected with the cpuquiet_lock.

Change-Id: I948d1190a270b9e8b732eaad80a303560fe9f282
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/345013
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: fix section mismatch error on panel j-720p driver
Laxman Dewangan [Thu, 12 Dec 2013 09:18:58 +0000]
ARM: tegra: fix section mismatch error on panel j-720p driver

Fix following section mismatch error:
/**
WARNING: vmlinux.o(.text+0x50e4c): Section mismatch in reference from the
 function dsi_j_720p_5_register_bl_dev() to the (unknown reference) .init.data:(unknown)
The function dsi_j_720p_5_register_bl_dev() references
the (unknown reference) __initdata (unknown).
This is often because dsi_j_720p_5_register_bl_dev lacks a __initdata
annotation or the annotation of (unknown) is wrong.

**/

Change-Id: Ib6323111008c25ea8a5628f988413d0ce637ac7d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/344734

5 years agoxhci: tegra: fix kernel panic in system suspend
Henry Lin [Wed, 27 Nov 2013 06:30:18 +0000]
xhci: tegra: fix kernel panic in system suspend

If xhci driver fails to loading firmware from file during
initialization, it frees all resources it uses and set its
driver data to NULL. But xhci driver doesn't unbind it with
xhci platform device. So, system still calls tegra_xhci_suspend()
during system suspend. And, kernel panic happens when xhci
driver trying to access NULL pointer in system suspend.

Bug 1414486

Change-Id: I7b52ca01508b35f5c9c7523a75318fc3d049122b
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/336069
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agommc: tegra: Switch off idle sdmmc clocks in post resume
Pavan Kunapuli [Thu, 12 Dec 2013 08:57:26 +0000]
mmc: tegra: Switch off idle sdmmc clocks in post resume

Use both card present and mmc->card as indicators for device presence
and turn off the clock in post resume if the device is not present.

Bug 1417148

Change-Id: I48bc2695d3998d3a11fdf9d070e7b275e6da4aed
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/344735
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarch: arm: tegra: vcm30t124: Make LDO5 always on
Bhavesh Parekh [Thu, 12 Dec 2013 09:03:05 +0000]
arch: arm: tegra: vcm30t124: Make LDO5 always on

LDO5 is used to control sdmmc voltage, which is either 1.8V or 3.3V. And
since it controlled via FPS1 of MAX77663, we can't disable/enable the
rail from the S/w unless we move the rail out of FPS control.
So make the LDO5 always on in the S/w, so that regulator framework
doesn't try to call enable/disable routine.

bug 1397523

Change-Id: Ice3d415341a70092835730fddfd106cd8786fba0
Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-on: http://git-master/r/344726
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: fix pri timeout enable
Kevin Huang [Thu, 12 Dec 2013 17:33:18 +0000]
video: tegra: host: fix pri timeout enable

Change-Id: Ib2c0f15ccb028e7f777e39dd516b7dc59a74f741
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/344887
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agocrypto: tegra-se: Add DT support
Shravani Dingari [Tue, 26 Nov 2013 06:04:54 +0000]
crypto: tegra-se: Add DT support

Add DT support for SE driver

Bug 1369830

Change-Id: Iebd0a7f58d0ee6eb3ebc7f75f81690bc1ec972c0
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/334930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarm: tegra: se: Add DT support for SE
Shravani Dingari [Tue, 26 Nov 2013 06:03:18 +0000]
arm: tegra: se: Add DT support for SE

Modify board files to support DT for SE

Bug 1369830

Change-Id: I994c57e0f0878953db4d1b0ce0bd8edccbcc55a8
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/334928
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agomisc: tegra-cryptoev: Simple code modification
Shravani Dingari [Thu, 12 Dec 2013 04:25:09 +0000]
misc: tegra-cryptoev: Simple code modification

Modify code to replace hard-coded numbers
with Macros

Change-Id: Ie550dfdb2eb2677be72c7cf0596cc4ccc97af00b
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/344595
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: pmc: add delay before setting up the PMC
Petlozu Pravareshwar [Thu, 12 Dec 2013 10:46:35 +0000]
usb: pmc: add delay before setting up the PMC

Add delay before turning over the pad configuration
to PMC. By this time usb detectors will provide stable
line values. This change is to address the reset issue
seen with some flash drives during LP0 resume.

Bug 1409337

Change-Id: I5467581653cac712843bde19aff437f0c1238c7e
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/344771
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: phy: tegra: use regulator_enable return value
Petlozu Pravareshwar [Thu, 12 Dec 2013 11:13:21 +0000]
usb: phy: tegra: use regulator_enable return value

Use the regulator_enable() return value and add
error prints. This will also avoid the warning
messages during compilation.

Bug 1411132

Change-Id: Ia6c8550e411252808e4d73b0441c9ad158036dcc
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/338665
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoASoC: tegra-alt: vcm30t124: Fix audio noise
Songhee Baek [Thu, 12 Dec 2013 18:20:49 +0000]
ASoC: tegra-alt: vcm30t124: Fix audio noise

To suuport various sampling rate correctly, machine driver needs
to update hw_param from runtime parameter for dai link, so codec
drivers can set proper params in runtime.

Bug 1409761

Change-Id: Ic4e3326abba58e79c88bd96adac6e06b475f07ee
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/344895
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-by: Gajanan Bhat <gbhat@nvidia.com>

5 years agoarm: tegra: tn8: ffd EMC support
Eric Chuang [Tue, 3 Dec 2013 08:40:32 +0000]
arm: tegra: tn8: ffd EMC support

Bug 1417887

Change-Id: I57bc4236c3d2cab1e0c5a916e29fde5431b42501
Signed-off-by: Eric Chuang <echuang@nvidia.com>
Reviewed-on: http://git-master/r/339376
Reviewed-by: Robert Shih <rshih@nvidia.com>
Tested-by: Robert Shih <rshih@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ryane Luo <ryanel@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: enable PTM/ETB tracing after the LP2
Xin Xie [Wed, 4 Dec 2013 00:14:01 +0000]
arm: tegra: enable PTM/ETB tracing after the LP2

bug 9622188

Change-Id: Id55c9f540891363fcc188dc9fe9d0fff80394810
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/337999
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agothermal: palmas: Add Hot-Die state information
Jinyoung Park [Wed, 11 Dec 2013 00:50:25 +0000]
thermal: palmas: Add Hot-Die state information

Added Hot-Die state information in interrupt handler.

Change-Id: I02398843d95e6477a918c05755bfb641d295c952
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/343896
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agothermal: palmas: Add palmas data into driver data
Jinyoung Park [Thu, 12 Dec 2013 05:30:51 +0000]
thermal: palmas: Add palmas data into driver data

Added the palmas data into the driver data in order to be referred in
callbacks.

Change-Id: I8564fb1e73a2d882c025de982658a93cb6b1472a
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/344624
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: add CoreSight PTM and ETB driver
Xin Xie [Sat, 23 Nov 2013 00:34:28 +0000]
ARM: tegra: add CoreSight PTM and ETB driver

bug 9622188

Change-Id: I35c94ad39abf9de61f1f326948cd5b10ca5b9e37
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/337998
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

5 years agoarm: tegra: tn8: ffd regulator support
Eric Eells [Sat, 23 Nov 2013 00:14:37 +0000]
arm: tegra: tn8: ffd regulator support

Bug 1412441

Change-Id: I93f18c8b88c2f12ccde8f041f6ba76899e0c955a
Signed-off-by: Eric Eells <eeells@nvidia.com>
Reviewed-on: http://git-master/r/345075
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: tn8: ffd fix regulator for modem
Robert Shih [Fri, 13 Dec 2013 00:38:50 +0000]
arm: tegra: tn8: ffd fix regulator for modem

Bug 1412441

Change-Id: I35ffffc39a22aaf83ecafd290c21922acd738151
Signed-off-by: Robert Shih <rshih@nvidia.com>
Reviewed-on: http://git-master/r/345054
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: tegra: always enable RAM repair
Adeel Raza [Tue, 24 Sep 2013 19:57:25 +0000]
ARM: tegra: always enable RAM repair

Always enable RAM repair (irrespective of fuse bits) for non-Tegra11
platforms.

Bug 1366617

Change-Id: I548934ca6fbe9e89b27cf99f8929b261fdbddb89
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/335231
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra: cpu: Ensure CPU freq with suspend freq during pre/post suspend
Jinyoung Park [Thu, 7 Nov 2013 08:27:50 +0000]
ARM: tegra: cpu: Ensure CPU freq with suspend freq during pre/post suspend

Tegra CPU driver fixes CPU freq with a selected suspend freq between
pre-suspend and post-suspend. In this pre/post suspend period, the Tegra
CPU driver ignores CPU freq scaling requests from the CPU freq governor.
But the CPU freq governor keep working until the system suspended.
So the CPU freq governor updates its status even if the system is in
the pre/post suspend period.
This makes an unexpected CPU freq setting issue on post-suspend.
To ensure CPU freq with the suspend freq in the pre/post suspend period,
set a policy min/max freq on CPU freq governor to the suspend freq
via PM QoS at pre-suspend and release the PM QoS setting at post-suspend.

Bug 1354391

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/268955
(cherry picked from commit 9c8338e70cddd6c4518f75944d20611c90e33ad5)

Change-Id: I8efa6dd438a37adc7cadfb1d36eb7340a4e85c79
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/327551
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoarm: tegra12: Fix light thermal HW throttling
Diwakar Tundlam [Wed, 11 Dec 2013 22:54:38 +0000]
arm: tegra12: Fix light thermal HW throttling

Fix light thermal HW throttling cdev registration and its cur_status

Bug 1342361

Change-Id: Ie1ac458539d1525772089724caaad58eae85eca9
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/344514
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra11: dvfs: Update c3bus dvfs tables
Alex Frid [Thu, 3 Oct 2013 03:01:04 +0000]
ARM: tegra11: dvfs: Update c3bus dvfs tables

Updated dvfs tables for c3bus modules on T40S/AP40 parts.

Bug 1377341

Change-Id: I2ae8bd61a28696751d4ab2a3f7368106e9771489
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/281235
(cherry picked from commit 41e9d942cd2585c277b078bc0535cede0fe25652)
Reviewed-on: http://git-master/r/344628
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Fix cbus fine granularity rounding
Alex Frid [Sat, 9 Nov 2013 03:20:17 +0000]
ARM: tegra11: clock: Fix cbus fine granularity rounding

Made sure that rounding rate equal to cbus fine granularity region
threshold returns threshold rate regardless of rounding direction:
up/down (was only up).

Change-Id: I61d33cf400b52e8d51a711a995666a5edb9b0cf3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/328576
(cherry picked from commit 651660986248a50e9440475ea630026b1458daa1)
Reviewed-on: http://git-master/r/344627
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agostaging: ozwpan: Fix an issue with hub_status.
Todd Poynter [Tue, 10 Dec 2013 19:20:38 +0000]
staging: ozwpan: Fix an issue with hub_status.

Update ozwpan to the latest drop from ATMEL to
resolve an issue with hub_status() returning the
wrong status.  This resulted in the USB stack
trying to read the port status continously.

Bug 1415705.

Change-Id: Ia9656b311327a1104cdf4ff601a4335c5d9f390f
Signed-off-by: Todd Poynter <tpoynter@nvidia.com>
Reviewed-on: http://git-master/r/343767
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: tegra: dvfs: Update GPU DVFS debugfs node
Alex Frid [Sun, 8 Dec 2013 03:47:15 +0000]
ARM: tegra: dvfs: Update GPU DVFS debugfs node

Updated GPU DVFS table debugfs node to properly show maximum voltage
across thermal ranges at current SiMon offset (instead of peak maximum
voltage across all SiMon offsets).

Bug 1343366

Change-Id: I3462cb888c944fc42620e7095cd864196124fc0a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/339677
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Handle SiMon GPU notification
Alex Frid [Sun, 8 Dec 2013 01:54:14 +0000]
ARM: tegra12: dvfs: Handle SiMon GPU notification

Registered DVFS call-back with SiMOn notification chain. When SiMOn
grade for GPU rail is changed, switched between default (grade 0) and
shifted by SiMon offset (grade 1) GPU DVFS tables.

Bug 1343366

Change-Id: I76859286c2fc0066a563eceab50a57d1053541f9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/339676
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Initialize GPU DVFS with SiMon offsets
Alex Frid [Sat, 7 Dec 2013 04:37:18 +0000]
ARM: tegra12: dvfs: Initialize GPU DVFS with SiMon offsets

Added GPU SiMon offset array with just 2 entries, since only one GPU
SiMon high grade (besides default) is characterized on Tegra12.

Constructed GPU DVFS table shifted by high grade offset during GPU
initialization. The new table is not used, for now.

Decreased GPU rail minimum voltage limit to include offset.

Bug 1343366

Change-Id: I582fbce28be5d4b721d90fb3bbf1fa1e0c5e3453
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/339675
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agocrypto: tegra-se: avoid ctx save buf from highmem
Hiroshi Doyu [Tue, 10 Dec 2013 11:26:13 +0000]
crypto: tegra-se: avoid ctx save buf from highmem

DMA API(IOMMU) can allocate pages from highmem since IOMMU usually
voids the limitation of accesible page range from HWA. But there's
some special case that a client wants pages accessible within 32bit
explicitly, especially for some PM suspend/resume case here. This
patch gives a hint to DMA API where to allocate pages.

Bug 1414172

Change-Id: I4f457264724d92e2d9fba7993c2c62c165fe2010
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/343646
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoRevert "crypto: tegra-se: alloc ctx save buf from atomic pool"
Hiroshi Doyu [Tue, 10 Dec 2013 11:09:35 +0000]
Revert "crypto: tegra-se: alloc ctx save buf from atomic pool"

This reverts commit 08b47b078d9cccc831d23eeeabaeec18f51c562c.

Bug  1414172

Change-Id: I5050f886aa9e3bc4cdc508f52204506543dfdef4
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/343644
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: alloc highmem w/o GFP_DMA*
Hiroshi Doyu [Tue, 10 Dec 2013 11:23:55 +0000]
ARM: dma-mapping: alloc highmem w/o GFP_DMA*

There's a case that a client wants to avoid highmem explicitly. For
example some PM code lets firmware access to pages during
suspend/resume when IOMMU is off. This allows a client to specify a
type of pages{GPF_DMA,GFP_DMA32} to not contradicting to
GFP_HIGHMEM. This would be valid if AArch64 selects ZONE_DMA(32).

Bug 1414172

Change-Id: I3c97262f9388094dae12a350420a3d184d1e7144
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/343645
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoarm: tegra: Add TEGRA_HDMI_PRIMARY dependency
Emma Yan [Wed, 11 Dec 2013 08:31:16 +0000]
arm: tegra: Add TEGRA_HDMI_PRIMARY dependency

Must disable CONFIG_FRAMEBUFFER_CONSOLE when
CONFIG_TEGRA_HDMI_PRIMARY is enabled. Fix
ardbeg_display_init for HDMI primary.

Bug 1416678
Bug 1407343

Change-Id: I12a6e123c476d95d41f61b31778e48e2754246b4
Signed-off-by: Emma Yan <eyan@nvidia.com>
Reviewed-on: http://git-master/r/340251
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoarm: tegra: update emc dvfs ddr3 v2 (PM358)
Vladislav Sahnovich [Sat, 23 Nov 2013 02:20:47 +0000]
arm: tegra: update emc dvfs ddr3 v2 (PM358)

Change-Id: I6616fc74aa1c94461c6718c92c6779da4082ac3e
Signed-off-by: Vladislav Sahnovich <vsahnovich@nvidia.com>
Reviewed-on: http://git-master/r/334789
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: update emc dvfs ddr3 v2 (1781)
Vladislav Sahnovich [Fri, 22 Nov 2013 07:26:46 +0000]
arm: tegra: update emc dvfs ddr3 v2 (1781)

Change-Id: I98d72c3c033410542389447018549132266026ef
Signed-off-by: Vladislav Sahnovich <vsahnovich@nvidia.com>
Change-Id: If2ab30db6b7d25f61f083ba4bf67606a9d7c6635
Reviewed-on: http://git-master/r/343803
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm:tegra:foster: Removing devices
David Dastous [Tue, 10 Dec 2013 02:12:17 +0000]
arm:tegra:foster: Removing devices

Foster has no sensors when compared to vanilla loki, remove them.

Bug 1415218

Change-Id: Ic37f40f02bf388c8ce77078b97093e37f3f23ab1
Signed-off-by: David Dastous <ddastoussthi@nvidia.com>
Reviewed-on: http://git-master/r/340167
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm:tegra:foster: Disabling Charger and Touch
David Dastous [Fri, 15 Nov 2013 02:17:12 +0000]
arm:tegra:foster: Disabling Charger and Touch

Foster sku has no charger and Touch.
Changes were made in order to remove the registration of those devices.

Bug 1406008

Also added BOARD_SKU_100 for b00

Change-Id: I5507fd6affb68ba0292a90a345992a36e34fce3c
Signed-off-by: David Dastous <ddastoussthi@nvidia.com>
Reviewed-on: http://git-master/r/331438
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

5 years agoARM: tegra: pass DTS file name through proper property
Laxman Dewangan [Thu, 12 Dec 2013 10:45:46 +0000]
ARM: tegra: pass DTS file name through proper property

Pass file name of dts file through nvidia,dtsfilename.

Change-Id: Iee9ae66450435f3155802076a5f05bd105378e94
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/344779
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: update norrin power rails
Charlie Huang [Wed, 4 Dec 2013 00:36:24 +0000]
ARM: tegra: update norrin power rails

bug 1408558

Change-Id: Ia94a53c729786df7f50775a2b23faa7439816241
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/338352
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM:tegra:loki: Set UARTA over SDMMC3 pinmux
Ankita Garg [Thu, 12 Dec 2013 02:04:29 +0000]
ARM:tegra:loki: Set UARTA over SDMMC3 pinmux

- Read odmdata. Bits 17:15= 5 indicate UART over
uSD adapter is desired
- Set SDMMC3 pinmux for UARTA if odm data is set
for UARTA over SDMMC3 pins.

Bug 1350514

Change-Id: I8e4313fc84a558a8fdc06ab9cb20628a1d51de8a
Signed-off-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-on: http://git-master/r/344524
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM:tegra: Support UART over uSD in odmdata
Ankita Garg [Thu, 12 Dec 2013 02:00:29 +0000]
ARM:tegra: Support UART over uSD in odmdata

Bug 1350514

Change-Id: I13d1f5df76eaf332d088bbeb4c504ec968f28b8a
Signed-off-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-on: http://git-master/r/344523
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM:tegra: Parse cmdline to enable UART over uSD card
Ankita Garg [Thu, 12 Dec 2013 01:55:16 +0000]
ARM:tegra: Parse cmdline to enable UART over uSD card

Check if debug_uartport=5. If yes, set uart_over_sd=true.
This variable will be used by specific platform files to
setup pinmux for UART over SDMMC3.

Bug 1350514

Change-Id: Icffbb86c5c877e7e1325649e26249680eefca0f0
Signed-off-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-on: http://git-master/r/334707
Reviewed-by: Tao Xie <txie@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: use proper header file for spi on Macallan/roth/pismo
Laxman Dewangan [Wed, 11 Dec 2013 13:22:42 +0000]
ARM: tegra: use proper header file for spi on Macallan/roth/pismo

The header file linux/spi-tegra.h is not used any more and spi
driver uses the linux/spi/spi-tegra.h.

Use correct header file from board files of Macallan, roth and pismo.

Change-Id: If5a8826eae7b7ec5b651ef14d56e193116b7d0c0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/344231
GVS: Gerrit_Virtual_Submit

5 years agospi: tegra: remove unused header file linux/spi-tegra.h.
Laxman Dewangan [Wed, 11 Dec 2013 13:24:24 +0000]
spi: tegra: remove unused header file linux/spi-tegra.h.

Tegra SPI driver uses the linux/spi/spi-tegra.h as header file and
so removing the linux/spi-tegra.h as it is not used anymore.

Change-Id: Iaf9d226ad2f75a773dff68dfef36a015f9a871da

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I02e43bb047f53406614e5feae6ad3f47bffd8132
Reviewed-on: http://git-master/r/344230
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: tn8: ffd pinmux support
Eric Eells [Thu, 21 Nov 2013 20:20:17 +0000]
arm: tegra: tn8: ffd pinmux support

Bug 1412441

Change-Id: I6dae4a8a107c753292c9c65fd8eb31b49ee9ce97
Signed-off-by: Eric Eells <eeells@nvidia.com>
Reviewed-on: http://git-master/r/335170
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: tn8: add ffd dts file
Eric Eells [Sat, 7 Dec 2013 03:20:24 +0000]
arm: tegra: tn8: add ffd dts file

Bug 1412441
Bug 1417990
Bug 1417887

Change-Id: If6a6b3836469fff3a617ab85a82705c8c4cde746
Signed-off-by: Eric Eells <eeells@nvidia.com>
Reviewed-on: http://git-master/r/344703
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: pod: Tune scaling
Arto Merilainen [Tue, 10 Dec 2013 13:03:24 +0000]
video: tegra: host: pod: Tune scaling

This patch modifies the scaling parameters so that we will keep
higher reserve of computational resources. The patch also modifies
load_max behaviour so that we will react to instantanous load
instead of averaged load.

Bug 1421594

Change-Id: Icc051bd257900be390679cf25fa26d3ea5e4d799
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/343687
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Samuel Russell <samuelr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mandar Potdar <mpotdar@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarch: config: enable sata for t12x
venkatajagadish [Wed, 20 Nov 2013 03:58:30 +0000]
arch: config: enable sata for t12x

Change-Id: Ieb2bcb707fd9d9813163a5c0464531abfa5715be
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>

5 years agoSATA: tegra: Enable firstlevel clockgating
venkatajagadish [Thu, 21 Nov 2013 10:36:13 +0000]
SATA: tegra: Enable firstlevel clockgating

Bug 1364841

Change-Id: Id215695c11b00616eb8c37c3efc81c4be0be0b0d
Signed-off-by: venkatajagadish <vjagadish@nvidia.com>

5 years agoRevert "usb: gadget: tegra: Support charging in LP0"
Rohith Seelaboyina [Thu, 12 Dec 2013 03:35:43 +0000]
Revert "usb: gadget: tegra: Support charging in LP0"

This reverts commit 5ac8c4014b65372fa1c43a6dcf5d9fb0920d7f6f.

Change-Id: I4388ad5ed7b8230ead1e235dcb24dc2f4bef2669
Reviewed-on: http://git-master/r/344577
Reviewed-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Tested-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-by: Rama Kandhala <rkandhala@nvidia.com>

5 years agoRevert "usb: gadget: otg: Allow device to charge in LP0"
Rohith Seelaboyina [Thu, 12 Dec 2013 03:22:31 +0000]
Revert "usb: gadget: otg: Allow device to charge in LP0"

This reverts commit ba8d73f84f4723c3429ca760f5f5c5163e96f1a7.

5 years agousb: gadget: otg: Allow device to charge in LP0
Rohith Seelaboyina [Tue, 10 Dec 2013 04:29:35 +0000]
usb: gadget: otg: Allow device to charge in LP0

Add support for charging of device in LP0, when
vbus detection happens through pmic.

Bug 1406615

Change-Id: Ie52740ae15809ce09b9f116edb892dd6a32e9ff4
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/339823
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agousb: gadget: tegra: Support charging in LP0
Rohith Seelaboyina [Mon, 9 Dec 2013 09:15:32 +0000]
usb: gadget: tegra: Support charging in LP0

Add Support to allow device to charge in LP0
when vbus detection happens through pmic.

Bug 1406615

Change-Id: I1dca65650dd364204d4bd30bc8debda62965b29e
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/339738
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agobcmdhd: key installation timing fix
Kyeong Kim [Wed, 11 Dec 2013 19:03:52 +0000]
bcmdhd: key installation timing fix

In case 43241 is a GO and it RECEIVES 4/4
key msg, so dhd_wait_pend8021x() is not
required for GO mode, hence we have skipped
this for AP/GO mode.

Bug 1392645

Change-Id: Icb1f86c5bfcb2afbd7e26fca9f75d73598d4ca07
Signed-off-by: Kyeong Kim <kyeongk@nvidia.com>
Reviewed-on: http://git-master/r/344360
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoARM: tegra12: ardbeg: board specific skin throttle
Anshul Jain [Wed, 11 Dec 2013 22:25:20 +0000]
ARM: tegra12: ardbeg: board specific skin throttle

This change makes skin thermal throttler board specific as
it is not required by some platforms.

Bug 1364445

Change-Id: If8939f82b268f56d0f3051f14c89cf3b32275d3f
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/344427
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra12: soctherm: Enable GPU hot throttling
Diwakar Tundlam [Tue, 10 Dec 2013 02:11:40 +0000]
ARM: tegra12: soctherm: Enable GPU hot throttling

Enable heavy throttling of GPU close to shutdown limit on CPU and GPU
thermal zones. Also adjust thermal thresholds per latest margins file.

Bug 1342361
Bug 1415030

Change-Id: I6c054b510ade50190b8fc579ddf8f66e90781bde
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/340168
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: host: Non-interruptible syncpt wait
Terje Bergstrom [Tue, 10 Dec 2013 11:38:07 +0000]
video: tegra: host: Non-interruptible syncpt wait

Make the default behavior for in-kernel sync point wait to be
non-interruptible.

Bug 1419760

Change-Id: I8075b0eac2dd0201fab71f68340b2c3b71816647
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/343652
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Tested-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: nvmap: update vpr config before cma mem release
Krishna Reddy [Wed, 11 Dec 2013 19:40:25 +0000]
video: tegra: nvmap: update vpr config before cma mem release

Update vpr config before releasing cma mem to aviod vpr access issues.
Replace BUG_ON in nvmap_cma_heap_create with necessary error handling.
Add new debugfs nodes for resizable carveout.
Bug 1279160

Change-Id: I235caa7857dd1e4729f234e0b694a1dcfdef534b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/344396
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: nvmap: don't map UC/WC as IWB/WB
Krishna Reddy [Thu, 14 Nov 2013 22:19:34 +0000]
video: tegra: nvmap: don't map UC/WC as IWB/WB

Remove support to allow mapping UC/WC as IWB/WB.
This feature is no longer in use not compatible with ION.
Bug 1407581

Change-Id: I29e2d3bab99f9b3c7c9d769f7ddb24d6bf852126
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/331296

5 years agovideo: tegra: dc: only dump windows that exist
Jon Mayo [Wed, 11 Dec 2013 00:28:52 +0000]
video: tegra: dc: only dump windows that exist

When dumping register, avoid accessing things that don't exist.

Change-Id: Ie4feeaba6865211e1b21251a1a4a099100c4a995
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/343881
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>

5 years agoARM: tegra: loki: 5'' jdi panel
Rakesh Iyer [Tue, 3 Dec 2013 18:44:20 +0000]
ARM: tegra: loki: 5'' jdi panel

Bug 1399534

Change-Id: I1e2ff459156ba5c890896a58f20cba825ba04ac0
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: siddardha naraharisetti <siddardhan@nvidia.com>
Reviewed-on: http://git-master/r/337876
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>

5 years agoARM: tegra: dvfs: Fix DFLL voltage mapping
Alex Frid [Tue, 10 Dec 2013 23:25:40 +0000]
ARM: tegra: dvfs: Fix DFLL voltage mapping

Fixed DFLL voltages mapping when maximum voltage is reached by the
frequency below the top one: map all the rest frequencies to maximum
DFLL output.

Bug 1422196

Change-Id: I58394fe54cd6b3196c8adfac911a812b1c4cca1e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/343868
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: dma-mapping: Use %pa for {dma,phys}_addr_t
Hiroshi Doyu [Mon, 9 Dec 2013 11:07:46 +0000]
ARM: dma-mapping: Use %pa for {dma,phys}_addr_t

The data size varis depending on LPAE, 32 or 64. Modified to support
both without any build warnings.

Change-Id: Iacb8cbbffdab9f7148a62315e011c9a3a74d9030
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/339861
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoarm: tegra: remove WP gpio for ardbeg
Hayden Du [Tue, 10 Dec 2013 06:32:04 +0000]
arm: tegra: remove WP gpio for ardbeg

bug 1417119

Change-Id: Ia0e92a89a089f2bb49dffb330f0b7865caa3a353
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/340271
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agovideo: tegra: nvmap: support for carveout resize
Vandana Salve [Thu, 19 Sep 2013 14:22:22 +0000]
video: tegra: nvmap: support for carveout resize

Add support for dynamic carveout resize.
Use CMA APIs for fixed size carveout.
Use CMA+DMA coherent APIs for resizable carveout.

Bug 1279160

Change-Id: I09ca2a3c9ac101e2504b4011eeb808e7f98f1429
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/294255
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: ardbeg: Uninitialized scalar variable
Sumit Singh [Mon, 9 Dec 2013 10:14:44 +0000]
ARM: tegra: ardbeg: Uninitialized scalar variable

Declaring and Initializing local variable at the same time.
This avoid code duplication when initializing in every switch case.
Coverity id : 25259

Bug 1416640

Change-Id: Icd42ec752d61167f6b06ede47a20864f992258c9
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/339847
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: host: Keep track of fixed mappings
Arto Merilainen [Tue, 19 Nov 2013 15:02:38 +0000]
video: tegra: host: Keep track of fixed mappings

This far we have supported fixed mappings without actually checking
that 1) the virtual space has been dedicated for fixed mappings and
2) the mappings do not collide.

This patch adds necessary modifications to keep track of fixed
mappings.

Bug 1369014

Change-Id: Iec1e0d361646c29ca1918d7537d5392ca97d6d87
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/333864
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: Fixes to PMU perfmon code
Arto Merilainen [Tue, 10 Dec 2013 08:21:04 +0000]
video: tegra: host: Fixes to PMU perfmon code

PMU bases timings on the clockrate that is given inside an
initialisation message. If this rate is wrong, we do perfmon
calculations incorrectly. This far we have assumed fixed 500MHz clock
which is not correct.

This patch modifies the PMU initialisation to actually read the
PMU clock frequency from the clock framework. In addition, this patch
modifies perfmon to capture samples 10 times per frame.

Bug 1422029

Change-Id: I7d700a4eeba43630e4f9332bb997cccf19e72aff
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/343562
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: make FECS firmware read-only
Deepak Nibade [Wed, 4 Dec 2013 11:39:13 +0000]
video: tegra: host: make FECS firmware read-only

- use dma_alloc/free_attrs() APIs to allocate memory for
  FECS/GPCCS firmwares
- pass DMA_ATTR_READ_ONLY to above APIs to make these
  firmwares read-only
- use gk20a_gmmu_map() to update gmmu ptes

Bug 1397647
Bug 1309863

Change-Id: Ie932994f7af37a8ffd26c0b1caa22901f4dc76ab
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/339800
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agovideo: tegra: host: use dma APIs for inst_block
Deepak Nibade [Mon, 2 Dec 2013 13:44:06 +0000]
video: tegra: host: use dma APIs for inst_block

- use dma APIs to allocate/free memory of inst_block
  and to get iova, cpuva and physical addresses
- use these addresses wherever required to get cpuva
  or physical address of inst_block

Bug 1397647

Change-Id: Id310528552c592689ebfc04648d0732f279a7429
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/339799
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agovideo: tegra: host: Enable sclk for VI/Camera
Sudhir Vyas [Wed, 27 Nov 2013 09:46:51 +0000]
video: tegra: host: Enable sclk for VI/Camera

Initialize sclk for camera in VIA, VIB, ISPA,
ISPB drivers at 80MHz, to enhance the perf KPI.
80 MHz, because it helps in balance the
trade-off between power and perf.

Bug 1362112

Change-Id: I8a39dad06ea7703570e166f90f42c7ee796f3b2d
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/336135
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: Add camera sclk support
Sudhir Vyas [Wed, 27 Nov 2013 09:35:50 +0000]
ARM: tegra: Add camera sclk support

Bug 1362112

Change-Id: Ib5abfb92cbbe27430115a1501315e6a6e4f1e300
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/336133
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agousb: gadget: android: fix ethaddr override issue
Yunfan Zhang [Mon, 2 Dec 2013 08:22:43 +0000]
usb: gadget: android: fix ethaddr override issue

ethaddr is one byte per segment, if pass the casted char pointer to
sscanf with %02x, the upper mem/bytes will be override unexpectedly.

For 32 bits alignment, the first byte of vendorID will be override
by sscanf(..., "...:%02x", ..., (int *)&rndis->ethaddr[5]).

struct rndis_function_config {
    u8      ethaddr[6];
    u32     vendorID;
    ...
};

Change-Id: I6553036f6d110e77298cfcf8a4e35f348921851d
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-on: http://git-master/r/337184
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agopower: bq24715: Update charging status on UI on bootup
Darbha Sriharsha [Sun, 1 Dec 2013 08:08:56 +0000]
power: bq24715: Update charging status on UI on bootup

Ensure that charging status (charging/discharging)
on UI is updated immediately on bootup.This is done
by reading gpio status which reflect the charger
connection status.

Bug 1271064

Change-Id: Id2b14cff96d117ce885ef3efc30459f4e502ebef
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/337047
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoASoC: Tegra: Fix voice call issues
Ravindra Lokhande [Fri, 6 Dec 2013 16:17:06 +0000]
ASoC: Tegra: Fix voice call issues

Few issues related to voice call for t12x are fixed.

Change-Id: Icc605da183d9187b57695a4284d35b4aa0b577d8
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/339251
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra12: add voice call devices
Ravindra Lokhande [Wed, 13 Nov 2013 12:55:36 +0000]
ARM: tegra12: add voice call devices

added baseband i2s to audio driver platfrom data.
registered i2s0 device

Change-Id: Ifa91ac63e21d39940306bb70f3e208450ad9004c
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/330326
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoNVIDIA-REVIEWERS: designate module owners
Juha Tukkinen [Thu, 19 Sep 2013 10:29:38 +0000]
NVIDIA-REVIEWERS: designate module owners

Add NVIDIA-REVIEWERS to designate NVIDIA module owners.
get_nv_reviewers.py tool uses this as input.

Bug 752047
Bug 1368545

Change-Id: If0429593cd42117dc35e59a170ff4dff4df92565
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/343718
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoregulator: as3722: set the correct current limit
Vince Hsu [Thu, 28 Nov 2013 10:40:12 +0000]
regulator: as3722: set the correct current limit

[Resubmitting as it was reverted due to intermittent issue on GVS]

Change-Id: I324d8b6a0c68a1d58458a0ce3a819453a6c86343
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/340288
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: ardbeg: Enable SDR50 mode for SDMMC3
R Raj Kumar [Tue, 10 Dec 2013 08:40:54 +0000]
ARM: tegra: ardbeg: Enable SDR50 mode for SDMMC3

Enabled SDR50 mode for SD device.

Bug 1323956

Change-Id: I09f25e7159688ecda2b2eb8bbb9b5a3cab7e1166
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/343566
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agostaging: pasr: modify die detection logic
Sri Krishna chowdary [Wed, 4 Dec 2013 11:25:04 +0000]
staging: pasr: modify die detection logic

current logic identifies the die only if die's start address
is divisible by section_size * nr_sections within it.
Hence, facing issues enabling pasr on 4GB devices having a single
die starting at 2GB.

Change the logic to properly identify the die even if the
above pre-condition is not met.

Change-Id: I0a2d54ed76cb808963518e06e593d852a2e95fb0
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/338232
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agonet: wireless: bcmdhd: Fix Division by zero
Mohan T [Fri, 6 Dec 2013 09:24:27 +0000]
net: wireless: bcmdhd: Fix Division by zero

Check divisor values is grater than zero
in qmon_getpersent to avoid division
by zero kernel assertion.

Bug 1417901

Change-Id: I8f3255c1b0f8c975da984389966c9f888187c5c9
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/339075
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: dvfs: Allow voltage table replacement
Alex Frid [Sat, 7 Dec 2013 07:12:40 +0000]
ARM: tegra: dvfs: Allow voltage table replacement

Added interface to replace DVFS voltage table in flight. New table is
installed provided peak voltages across possible tables are specified
in advance, and new voltages do not exceed peaks.

Bug 1343366

Change-Id: I2d8cf553cc8fb9d65d31afe11869104038b4bb4c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/339674
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Add SiMon offsets to DVFS rails
Alex Frid [Wed, 4 Dec 2013 05:55:36 +0000]
ARM: tegra: dvfs: Add SiMon offsets to DVFS rails

Added Silicon Monitor (SiMon) offsets to DVFS rail object. Offsets
will be applied to minimum voltage requirements for the clocks in the
respective rail domain. Implemented interface to verify expected
offsets properties: all offsets should be equal/below zero, listed in
descending order, starting from zero.

Bug 1343366

Change-Id: Icb2afa77fcd60088284baf9b626e513034c0bb9e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/339673
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: power: Add initial SiMon support
Alex Frid [Thu, 5 Dec 2013 02:23:26 +0000]
ARM: tegra: power: Add initial SiMon support

Defined tegra Silicon Monitor (SiMon) domains: CPU, GPU, core. Added
SiMon domain grade notification chain, and debugfs entries.

Bug 1343366

Change-Id: Ieff7ca57af48e5a5a2224fd6800bcccabf8eef5e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/338521
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: loki: Configure soctherm for loki
Anshul Jain [Tue, 10 Dec 2013 01:31:56 +0000]
ARM: tegra12: loki: Configure soctherm for loki

This change, turns on heavy throttling on GPU based on GPU_SOCTHERM
and configures new thermal points.

Bug 1405072

Change-Id: I49ed00fcbc2f9aeb4bbda13c8ef97b5daf300172
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/340156
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: edp: Fix resource leak
Diwakar Tundlam [Tue, 10 Dec 2013 23:00:18 +0000]
ARM: tegra: edp: Fix resource leak

Do not free IN-USE pointer edp_gpu_calculated_limits.

Partial revert of commit 4f9d8923268a597ede0308f4165e46ba97375ffe
(Improperly)-Reviewed-on: http://git-master/r/339061

Bug 1416640

Change-Id: Ie084fb93ccd32b9358ebf1e0331b877c104e397f
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/343845
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra12: soctherm: GPU HW throttling WAR
Diwakar Tundlam [Wed, 20 Nov 2013 23:46:30 +0000]
arm: tegra12: soctherm: GPU HW throttling WAR

Allow enabling HW GPU throttling for thermal and OC alarms.
Implemented WAR discussed in bug. Also modified debug output to show
depth as percent as well.

Bug 1415030

Change-Id: I3c1e401e820713d7f7290f089c42e71531700d28
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/338122

5 years agoarm: tegra: update ardbeg_emc_init for all boards
Anshuman Nath Kar [Thu, 5 Dec 2013 22:57:52 +0000]
arm: tegra: update ardbeg_emc_init for all boards

Change-Id: I118fd7a6b0f6a7cd11e7ae97337f515827b16ca3
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
Reviewed-on: http://git-master/r/338897
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: config: tegra12: enable SATA
Jong Kim [Mon, 9 Dec 2013 23:30:51 +0000]
ARM: config: tegra12: enable SATA

Enable SATA.

bug 1422013

Change-Id: Ic3d1524165679b0f35c359ff648dc520a7972249
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/340089
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

5 years agoARM: tegra: ardbeg: Enable SATA for Laguna-erss
Jong Kim [Mon, 9 Dec 2013 23:22:49 +0000]
ARM: tegra: ardbeg: Enable SATA for Laguna-erss

Enable SATA for Laguna-erss (PM359)

bug 1422013

Change-Id: I74ce480fdb37704a9660ba4638b4143bcbbb5fda
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/340088
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

5 years agovideo: tegra: host: gk20a: reduce gr delays
Prashant Malani [Wed, 2 Oct 2013 21:23:59 +0000]
video: tegra: host: gk20a: reduce gr delays

The delay value used in gr usleep_range calls is
too high. We can start at a much lower value.

Change-Id: I7d196d0e3be0a5cd84e8c4dad537fae043da6274
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/335234
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: tegra: ardbeg: correct HDMI pclk
Jon Mayo [Mon, 9 Dec 2013 21:17:17 +0000]
arm: tegra: ardbeg: correct HDMI pclk

pclk is in Hz and not picoseconds.

Change-Id: I5c63ef430dc9111b9bfe1bad5c46903a97d6dc79
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/340025
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: dc: swap rotated h/v filter check
Jon Mayo [Mon, 9 Dec 2013 21:51:24 +0000]
video: tegra: dc: swap rotated h/v filter check

When determining if the filter should be disabled because input == output,
use the SCAN_COLUMN flag to select the correct dimension.

Bug 1421307

Change-Id: I19dd5575fb41d8a2b6aa3ee12022acd14232afe4
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/340037
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit