5 years agoARM: tegra11: clock: Update host1x bus users
Alex Frid [Sun, 19 May 2013 00:11:06 +0000]
ARM: tegra11: clock: Update host1x bus users

Added override user to host1x bus; renamed nvhost and vi users to be
consistent with other shared users naming convention (dev_id and con_id
names are kept unchanged, so this renaming is transparent for client
drivers).

Change-Id: If6c66b53e5e69c1e0ca59b339e99145848a00ed9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/230084
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: clock: Update host1x bus users
Alex Frid [Sun, 19 May 2013 00:06:27 +0000]
ARM: tegra14: clock: Update host1x bus users

Added override user to host1x bus; renamed nvhost and vi users to be
consistent with other shared users naming convention (dev_id and con_id
names are kept unchanged, so this renaming is transparent for client
drivers).

Change-Id: I19a26fd2a198ce9ec11f625688f42a1ba6cd43b2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/230083
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra14: clock: Add host1x shared bus
Alex Frid [Sat, 18 May 2013 23:17:13 +0000]
ARM: tegra14: clock: Add host1x shared bus

Change-Id: I1174bcd61474a08926707034d60493eb85f0f719
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/230082
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: emc: Preset VREF_DQ in clock change
Alex Waterman [Fri, 17 May 2013 18:14:52 +0000]
ARM: tegra: emc: Preset VREF_DQ in clock change

The E_VREF_DQ bit in XM2DQSPADCTRL2 must be set during a clock change
that switches to VREF mode at least 30 us before the EMC clock change
actually occurs. This change is added to the already existing DQS
preset code that presets RX_FT_REC 30 us in advance of the clock change.

Change-Id: I1882d7ed2fcfea39c435cfac547834ce378bc2c2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/229852
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: calibrate gamma for THOR panel
Mitch Luban [Thu, 21 Mar 2013 03:38:59 +0000]
arm: tegra: calibrate gamma for THOR panel

Colors were over saturated on LG 720p panel because
of gamma.

Bug 1248099

Reviewed-on: http://git-master/r/211115
(cherry picked from commit a6cc8216fd39736d2d624cdcf71f22a5e4d330ae)

Change-Id: I6eede44c64f8968deb51c0ea13a47c4293479977
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/229716
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarch: arm: roth: reduce didim aggressiveness for roth
Mitch Luban [Wed, 1 May 2013 01:41:18 +0000]
arch: arm: roth: reduce didim aggressiveness for roth

Set aggressiveness to 1 and do faster backlight phase in.

Bug 1276704

Reviewed-on: http://git-master/r/224321
(cherry picked from commit 24c81aee73b7660b9e47a42b6cc31d81edbf6437)

Change-Id: Ie9a17b5a42862a0804c4217ca0992514371b1d50
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/229712
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: emc: Move auto-refresh to the CCFIFO
Alex Waterman [Tue, 14 May 2013 17:28:45 +0000]
ARM: tegra: emc: Move auto-refresh to the CCFIFO

Disable and enable auto-refresh in the CCFIFO. This will minimize
risk of letting the DRAM run for too long without a refresh.

Bug 1252872
Bug 1217312

Change-Id: If06ca35e39ce1d5ad3843cb59d4f750eeabd7654
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/229452
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoASoC: Tegra: Prevent audio from suspend during voice call
Ravindra Lokhande [Thu, 16 May 2013 11:44:13 +0000]
ASoC: Tegra: Prevent audio from suspend during voice call

During voice call system is allowed to enter into low power state but
we need to keep audio system clocks and regulators enabled during voice
call.

Bug 1280797

Change-Id: Ib368d6653bda5c40622416abfebd21c889e41e94
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/229338
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: sdhci: Set ddr mode trim delay
Pavan Kunapuli [Wed, 15 May 2013 14:38:31 +0000]
ARM: tegra: sdhci: Set ddr mode trim delay

As per characterization results, ddr mode requires a different trim
delay. Setting ddr trim delay for ceres and atlantis as 0.
For other platforms, setting the ddr trim delay to -1 to continue using
the default trim delay value.

Bug 1270525

Change-Id: I9270c6c93f11fb62414f24fb980c3cf215eea0d1
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/228913
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agovideo: tegra: dc: global alpha on 1 layer blend
Donghan Ryu [Wed, 15 May 2013 14:16:01 +0000]
video: tegra: dc: global alpha on 1 layer blend

global alpha on 1 layer blending showed incorrect
blending because FIX_WEIGHT on B_BLEND_CONTROL_1WIN
is not per-pixel. This change programs premult and
coverage blending mode to produce following output.

premult case
    color.rgba = color.rgba * global_alpha;
    blended_color = previous_color * (1 - color.a) +
                    color;

coverage case
    color.a = color.a * global_alpha;
    blended_color = previous_color * (1 - color.a) +
                    vec4(color.rgb, 1) * color.a;

Bug 1276814

Change-Id: Ibb65fed58603e86ac8af4e4fd32f6c621eb57e7a
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/228908
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Michael I Gold <gold@nvidia.com>

5 years agostaging: nvshm: add call for emc freq floor and flags
Neil Patel [Tue, 14 May 2013 22:13:23 +0000]
staging: nvshm: add call for emc freq floor and flags

Bug 1284210
Bug 1249082

Change-Id: I96517aa3a444adc3513be86daa074b5da8bcb768
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/228522
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Herve Fache <hfache@nvidia.com>
Reviewed-by: Stephane Dion <sdion@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoARM: tegra: dvfs: Check dynamic output config at run-time
Alex Frid [Wed, 8 May 2013 05:39:43 +0000]
ARM: tegra: dvfs: Check dynamic output config at run-time

Switched from compile time differentiation of platforms with/without
support for dynamic update of CL-DVFS output configuration register
to run-time check.

Respectively, replaced macro CL_DVFS_DYNAMIC_OUTPUT_CFG with platform
flag TEGRA_CL_DVFS_DYN_OUTPUT_CFG.

Change-Id: Ia6fe200857982aa28aa4a85b2e6dd5b2a7179335
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/227746
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra14x: cpu idle driver for soc timers
Seshendra Gadagottu [Thu, 11 Apr 2013 22:17:23 +0000]
ARM: tegra14x: cpu idle driver for soc timers

This change is part of preparation for cpu idle
driver to use tegra14x soc timers instead of
arm private(twd) timers.
Added CONFIG_HAVE_ARM_TWD switch for twd code.

Bug 1243194

Change-Id: I33ef2421c34ffff081333c676873ec78ca22613f
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/218713
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agousb: host: tegra: wait for devices to disconnect
Preetham Chandru R [Mon, 18 Mar 2013 14:55:00 +0000]
usb: host: tegra: wait for devices to disconnect

wait for usb devices to disconnect before un-registering ehci.

Bug 1229443
Bug 1238342

Change-Id: Icb302d4e0012c7df12c5c7e67dd6d13a6f7aba01
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/212970
(cherry picked from commit 2d5e13df9711379301e5aa7bb0b982055d429852)
Reviewed-on: http://git-master/r/210404
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoarm: tegra11: clock modify plld setting
Hayden Du [Tue, 14 May 2013 08:24:52 +0000]
arm: tegra11: clock modify plld setting

bug 1259764
bug 1286177

Change-Id: Id548c46179030a682722eefb15a2cf55507c8042
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/228312
(cherry picked from commit dae9e430b4fe4da81a461884f7c3ffee34bf26ab)
Reviewed-on: http://git-master/r/230157
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agommc: tegra: Boost sclk and emc clk's for sdmmc
Naveen Kumar Arepalli [Sun, 19 May 2013 03:42:27 +0000]
mmc: tegra: Boost sclk and emc clk's for sdmmc

Boost emc, sclk clock to 150 MHz for sdmmc
Boosting emc and sclk helps in sdmmc kpi.

Bug 1276208

Change-Id: I472e009b369fcaa87b3c44e2c49a86bf1d857b18
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/230090
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agommc: tegra: Set Autocal pu,pd offsets for sdmmc4
Pavan Kunapuli [Thu, 16 May 2013 09:28:21 +0000]
mmc: tegra: Set Autocal pu,pd offsets for sdmmc4

Setting autocal pull up and pull down offsets to 1 based on the results
from characterization.

Bug 1270525

Change-Id: Ib7f4669e4acb820049c195b46a736bbb9d6318f5
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/228892
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: gadget: tegra: enable sw_vbus before setting run bit
Rohith Seelaboyina [Mon, 13 May 2013 08:49:55 +0000]
usb: gadget: tegra: enable sw_vbus before setting run bit

sw_vbus must be enabled before setting run bit as vbus
line goes to pmc.

Bug 1285915

Change-Id: I2bcda48fea5fbf41d38cadbac6b0bdaac87209f2
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/227455
(cherry picked from commit 679e97fc81a10573f75fd1d7f8bc45fe76ea22db)
Reviewed-on: http://git-master/r/228781
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agomedia: video: tegra: OV7695 sensor kernel driver
kkim [Tue, 23 Apr 2013 05:54:06 +0000]
media: video: tegra: OV7695 sensor kernel driver

Bug 1269275

Change-Id: I2f7b9dded7ed5e06efd5875bc7990afc338ed3ce
Signed-off-by: kkim <kkim@nvidia.com>
Reviewed-on: http://git-master/r/222047
(cherry picked from commit 6c6400265a235744d22854339ec2a8af39646009)
Reviewed-on: http://git-master/r/228216
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: roth: limit eMMC clock to 156MHz
Pavan Kunapuli [Fri, 1 Feb 2013 17:11:34 +0000]
ARM: tegra: roth: limit eMMC clock to 156MHz

Limiting eMMC clock to 156MHz in HS200 mode.
Passing nominal core voltage value through platform data to be used
during tuning for HS200 mode.

Bug 1225343

Change-Id: I1ff4065db505a2b3022a1d9fab10a05c5f3a1a31
(cherry picked from commit f08420c0531a0a46f4e9f3be52ab2c2e08ec3318)
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Jason Zhang <jasozhang@nvidia.com>
Reviewed-on: http://git-master/r/196485
Reviewed-on: http://git-master/r/228207
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: bb: update pll voltage
Neil Patel [Thu, 18 Apr 2013 20:25:08 +0000]
ARM: tegra: bb: update pll voltage

The bbc pll voltage should be 1.1V.

Bug 1257234

Change-Id: I0b2e8f6bdf53527a87978d8f82eca1e5a4fb9931
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/220711
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: edp: Add core EDP capping tables
Prashant Malani [Wed, 15 May 2013 17:39:46 +0000]
ARM: tegra14: edp: Add core EDP capping tables

Add Core EDP capping tables for SKUs.

Bug 1278124

Change-Id: I3f1a22c74af4672be1649b7279e11f272a174c73
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/229077
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: Tegra: Dalmore: Add E1613 EMC DVFS table
Graziano Misuraca [Tue, 29 Jan 2013 19:20:20 +0000]
ARM: Tegra: Dalmore: Add E1613 EMC DVFS table

Bug 1179719

Change-Id: I2a26e9897d424b857e5e08ee379349c90cd4915b
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/195180
(cherry picked from commit c98308fd66c980a4f171f10faf24486895c660c8)
Reviewed-on: http://git-master/r/213216
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agousb: gadget: mtp: increase MTP buffers
Rakesh Bodla [Fri, 8 Mar 2013 12:49:59 +0000]
usb: gadget: mtp: increase MTP buffers

Increase the buffer size to 32KB to improve MTP throughput and
keep the first packet size to 16KB for files greater than 4GB

Bug 1168348
Bug 1216779

Change-Id: I31c78223870b788a67d628005026f6e3608df04f
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207589
(cherry picked from commit b64b3f926455e9cfdff90291525f3d5264b97dd4)
Reviewed-on: http://git-master/r/229671
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: config: Enable GADGET_BOOST_CPU_FREQ
Rakesh Bodla [Fri, 17 May 2013 05:04:21 +0000]
ARM: config: Enable GADGET_BOOST_CPU_FREQ

Enable TEGRA_GADGET_BOOST_CPU_FREQ for improving
USB throughput.

Bug 1216779

Change-Id: I7d7b3c1bf4c9aadba9967b6fc9a3e5981a68a844
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/229670
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: gadget: tegra:Change cpu frequency boost logic
Rakesh Bodla [Mon, 13 May 2013 09:56:36 +0000]
usb: gadget: tegra:Change cpu frequency boost logic

Changing the logic for boosting and unboosting
CPU frequency during USB device transfers for
performance.

Bug 1216779

Change-Id: I8b5378ee9e95c890d2cdc4a614f95e378ffb016f
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/227913
(cherry picked from commit d04550eb0e86946e9c140d966735fffccf98cdf0)
Reviewed-on: http://git-master/r/229668
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoasoc: tegra: AIC3033: shutdown TPA2054D4A
Chandrakanth Gorantla [Thu, 16 May 2013 10:50:39 +0000]
asoc: tegra: AIC3033: shutdown TPA2054D4A

shutdown TPA2054D4A in suspend case and enable it in resume
bug 1265025

Change-Id: I7ac167562f2102a4893431506d2efc4edd8c8bd8
Signed-off-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Reviewed-on: http://git-master/r/229308
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoARM: tegra11: pinmux: correct SDMMC3_CLK_LB_OUT and SDMMC3_CLK_LB_IN offset
Jay Cheng [Thu, 25 Apr 2013 12:14:02 +0000]
ARM: tegra11: pinmux: correct SDMMC3_CLK_LB_OUT and SDMMC3_CLK_LB_IN offset

Change-Id: Ia53a98a5dbf21e4a8779367edb6fba51614f02c7
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
(cherry picked from commit 02dd30c020b00c4bbc2e671e08976d51e92a7b71)
Reviewed-on: http://git-master/r/228989
Reviewed-by: Andy Park <andyp@nvidia.com>
Tested-by: Andy Park <andyp@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

5 years agommc: tegra: Use different trim delay in DDR50 mode
Pavan Kunapuli [Wed, 15 May 2013 14:36:22 +0000]
mmc: tegra: Use different trim delay in DDR50 mode

Option to set a different trim delay value in DDR50 mode if required
for the platform.

Bug 1270525

Change-Id: I25efa2c610f1d5f381cb1b82a8d7bc473576d82a
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/228912
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agonvmap: remove the define NVMAP_HEAP_SYSMEM
Krishna Reddy [Tue, 14 May 2013 23:53:03 +0000]
nvmap: remove the define NVMAP_HEAP_SYSMEM

Bug 1272328

Change-Id: I3657a36080acb58f43d2c2599b1ee7ed35a55da0
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/228552
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>

5 years agomedia: video: tegra: remove reference to SYSMEM heap
Krishna Reddy [Tue, 14 May 2013 23:42:59 +0000]
media: video: tegra: remove reference to SYSMEM heap

Bug 1272328

Change-Id: I11d8b994df2096eb1f196d983939485cd9f6eda4
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/228548
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bryan Wu <pengw@nvidia.com>

5 years agovideo: tegra: dc: log suspend enter time
Andy Park [Fri, 10 May 2013 23:59:35 +0000]
video: tegra: dc: log suspend enter time

log suspend enter time using uS timer

Bug 1279339
Bug 1252226

Change-Id: I7e29d177df78a286d3e3ee905b020f95575175ac
Signed-off-by: Andy Park <andyp@nvidia.com>
(cherry picked from commit 832517518d82fa2bce7c3b85cdd2c56e0b87704a)
Reviewed-on: http://git-master/r/228138
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

5 years agoARM: tegra: add a sysfs to time to go suspend
Andy Park [Fri, 10 May 2013 23:49:40 +0000]
ARM: tegra: add a sysfs to time to go suspend

measure the time from display control disabled to suspending core and
open an access to the data through sysfs. tegra_log_suspend_time
must be called from display control driver when disabled.

Bug 1279339
Bug 1252226

Change-Id: If70135639b2e1eea72d1189f8c5cd32ba7d11bf1
Signed-off-by: Andy Park <andyp@nvidia.com>
(cherry picked from commit 5e21c0030b60ab71ca610ad55b8cfeacee03a980)
Reviewed-on: http://git-master/r/228136
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>

5 years agoarm: tegra: bb: add API to change EMC floor
Vinayak Pane [Fri, 10 May 2013 02:37:05 +0000]
arm: tegra: bb: add API to change EMC floor

Added new function interface to set EMC floor. BBC can change
EMC floor dynamically by RPC via bbc_proxy driver. This new
floor will be used when modem wakes-up next time.

Also added flag to control DSR setting in EMC.

Bug 1284210
Bug 1249082

Change-Id: I74bda10d3f40f233d4fbfd14edff31dc320ebf2d
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/227266
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: pluto: put HV IOs into DPD explicitly during LP1
Daniel Solomon [Fri, 12 Apr 2013 18:36:30 +0000]
ARM: tegra: pluto: put HV IOs into DPD explicitly during LP1

Rail VDDIO_HV is consuming higher power than predicted during LP1,
this could be fixed by explicitly putting the pins on that rail
into DPD mode. And by putting the pins into tristate mode, it
saves additional power during LP1.

bug 1248007

Change-Id: I636a307c6a24d4489b4889a068ccd2d00c6665d3
Signed-off-by: Eric Miao <emiao@nvidia.com>
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/213864
(Cherry picked from fce59945c9a121033d8c0fd6ab623129676e4120)
Reviewed-on: http://git-master/r/226773
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: fuse: error handling for FUSETIME_PGM2
Ken Chang [Mon, 6 May 2013 06:52:33 +0000]
arm: tegra: fuse: error handling for FUSETIME_PGM2

FUSETIME_PGM2 needs to be configured to the correct value before
programming the fuse. We should never use the default value and
assume it is correct if the returned value of pgm_cycles is zero.

Refuse to program the fuses by returning -EPERM for this case.

Bug 1273404

Change-Id: If46b932ee46bb95b11712559f54d337796b72062
Reviewed-on: http://git-master/r/225570
(cherry picked from commit 51185ed615196d519114808c6273f8a0cbead159)
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/229667
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra14: bbc: change emc floor clock
Vinayak Pane [Wed, 15 May 2013 01:58:32 +0000]
ARM: tegra14: bbc: change emc floor clock

Two EMC clocks are assigned to BBC, namely emc_bw
and emc_fl. The emc_fl should be used to set the
floor frequency and emc_bw is used by ISO manager.
Remove old unused definition from the clocks table.

Bug 1284210

Change-Id: I9926bead2dcaee2b1c5d50d21b7ed074f7fa5a78
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/228609
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

5 years agoARM: tegra: usb: Add config option to increase cpu freq
Rohith Seelaboyina [Fri, 3 May 2013 11:01:27 +0000]
ARM: tegra: usb: Add config option to increase cpu freq

Adding an option to increase the cpu frequency
which can be used by the ehci driver.

Bug 1266414

Change-Id: Ic43c4a56e70073ac4f1617bdb6c661fca8aed1d4
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/222525
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
(cherry picked from commit 90ef3ff3df434a42cf0f1b406c6b6bfef4b4350d)
Reviewed-on: http://git-master/r/227811
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: host: host1x clock scaling for vi
Terje Bergstrom [Mon, 11 Feb 2013 20:47:04 +0000]
video: tegra: host: host1x clock scaling for vi

Implement host1x clock scaling for vi driver. As actmon relies on
host1x clocks, we need to readjust the actmon history when host1x
clock is changed.

Bug 1278248

Change-Id: Ibcd3104c5fb674268d5bd54684874c2bd534a4b1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/223066
(cherry picked from commit 66f7e2e8f0336b9aef6daf82742071ca89e58d9a)
Reviewed-on: http://git-master/r/199689
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: ad5816: enable auto-detect support
Gary Fitzer [Mon, 29 Apr 2013 15:14:09 +0000]
video: tegra: ad5816: enable auto-detect support

Bug 1250073

Change-Id: I1c30757d0570e9e4d51f3326d2c0fe233f8cf046
Signed-off-by: Gary Fitzer <gfitzer@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/223895
(cherry picked from commit c3a21f51fc6c5a9935f8e52aa3149ddb0de66ac6)
Reviewed-on: http://git-master/r/228255
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: backlight: lm3528: remove duplicate notify call
Mitch Luban [Wed, 15 May 2013 02:24:32 +0000]
video: backlight: lm3528: remove duplicate notify call

Bug 1277049

Change-Id: I003e7c60ef75da76e9bc89490ecbf0fcc908d5e6
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/228612
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: remove config option NVMAP_ALLOW_SYSMEM
Krishna Reddy [Tue, 14 May 2013 23:51:17 +0000]
video: tegra: remove config option NVMAP_ALLOW_SYSMEM

This config option is not necessary as sysmem support is deprecated
Bug 1272328

Change-Id: I9d5699436c025415839cda50fc584bbf983333a5
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/228551
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>

5 years agovideo: tegra: nvmap: remove sysmem support
Krishna Reddy [Tue, 14 May 2013 23:50:19 +0000]
video: tegra: nvmap: remove sysmem support

sysmem support is no longer necessary in nvmap
Bug 1272328

Change-Id: Ic646e1318ac68ee2ddf26bc5b2233cd5540d2fc2
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/228550
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>

5 years agoarm: tegra: prepare for removal of CONFIG_NVMAP_ALLOW_SYSMEM
Krishna Reddy [Tue, 14 May 2013 23:47:33 +0000]
arm: tegra: prepare for removal of CONFIG_NVMAP_ALLOW_SYSMEM

Bug 1272328

Change-Id: I93639d7ce934a6d532abe077043faf950780a425
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/228549
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: mcerr: Use special VPR and SEC registers
Alex Waterman [Mon, 13 May 2013 23:12:58 +0000]
ARM: tegra: mcerr: Use special VPR and SEC registers

When a SEC or VPR error is handled use the correct special registers
for getting client and other info. The regular status register holds
garbage values in these two cases.

Bug 1275219

Change-Id: I2ea5c02483b39fdee2573be17acea65ea0e5a440
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/228148
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agousb: host: tegra: boost cpu frequency when bus is active
Rohith Seelaboyina [Thu, 9 May 2013 04:23:23 +0000]
usb: host: tegra: boost cpu frequency when bus is active

Boost cpu frequency (based upon TEGRA_EHCI_BOOST_CPU_FREQ)
when the usb bus is active and remove the boost when usb
bus is suspended.

Bug 1266414

Change-Id: Ic5b7b1ecc923caf7da458383112ed0e647448a57
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/226914
(cherry picked from commit 85c49d81cd5c6760567a44878fedbc09c422841d)
Reviewed-on: http://git-master/r/227803
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarm: tegra: atlantis: Backlight calibration for Atlantis
Nishant Suneja [Fri, 10 May 2013 23:48:23 +0000]
arm: tegra: atlantis:  Backlight calibration for Atlantis

bug  1278249

Change-Id: I34fe7412d95fbe9f33c1102188d80764750483cd
Signed-off-by: Nishant Suneja <nsuneja@nvidia.com>
Reviewed-on: http://git-master/r/227686
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: isomgr: pass availble bw during renegotiate call
Krishna Reddy [Fri, 10 May 2013 00:07:02 +0000]
arm: tegra: isomgr: pass availble bw during renegotiate call

Add trace messages for scavenge and scatter calls.
Update dc code to use updated prototype for callback.

Change-Id: Ib35747fb04a02473f40faf0a443f76551ac9e200
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/227224
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoregulator: max77660: Add external control support
Pradeep Goudagunta [Thu, 9 May 2013 08:19:21 +0000]
regulator: max77660: Add external control support

Add external control support by EN1, EN2 and EN3.

Bug 1285805

Change-Id: I61015f8ace44aed6a232b644b7d73fca50f4395e
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/226981
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agomfd: max77660: Move sleep control support
Pradeep Goudagunta [Thu, 9 May 2013 08:16:32 +0000]
mfd: max77660: Move sleep control support

Move sleep control support to regulator driver.

Bug 1285805

Change-Id: If3c81db98badea19fb1f8e5bed7b9d84dd466aa6
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/226980
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: Add NCT access api and sysfs interface
Joshua Cha [Wed, 13 Mar 2013 01:54:55 +0000]
ARM: tegra: Add NCT access api and sysfs interface

NCT is the acronym for Nvidia Configuration Table.
This change provides API to read NCT items from NCT carveout region
and create sysfs interface for userspace to read items.

Bug 1223662

Change-Id: Id6f887fd9c458f4f9c3dfe27f6a95fbe930cfb00
Signed-off-by: Joshua Cha <joshuac@nvidia.com>
Reviewed-on: http://git-master/r/208680
(cherry picked from commit d6234478cd3e92b8c739e806998b9f75e732d714)
Reviewed-on: http://git-master/r/226216
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agommc: tegra: Boost sclk and emc clk's for sdmmc4
Naveen Kumar Arepalli [Wed, 24 Apr 2013 07:53:10 +0000]
mmc: tegra: Boost sclk and emc clk's for sdmmc4

Boost emc clock to 100 MHz
Enable sclk for sdmmc4 and set 80MHz

Bug 1262190

Reviewed-on: http://git-master/r/222371
(cherry picked from commit da84c968d1abebe3bc678f32c77e667a61b12f0a)
Change-Id: Ibb5725ab1a65e57da52250c679bce9f41b181db9
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/225622
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: emc: Program some fields in EMC DVFS
Alex Waterman [Tue, 30 Apr 2013 00:46:05 +0000]
ARM: tegra: emc: Program some fields in EMC DVFS

Two fields in the EMC_CFG register are not shadowed and must be
programmed in the CCFIFO during the clock change. This patch
provides this functionality.

Bug 1266098

Change-Id: Id7fc696e2cffe5b9f433a42c3245591088f0d773
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/224061
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: emc: Add autocalibration programming
Alex Waterman [Fri, 26 Apr 2013 23:39:25 +0000]
ARM: tegra: emc: Add autocalibration programming

This adds auto-cal support to T148. Auto cal is first disabled on a
clock change and then programmed as per the DVFS tables once the clock
change is done.

Bug 1250547

Change-Id: Icb1a77b93b31e6e93830421c7c971342c9c4be09
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/223573
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra11: clock: Complete host1x bus update algorithm
Alex Frid [Fri, 10 May 2013 06:04:31 +0000]
ARM: tegra11: clock: Complete host1x bus update algorithm

Finalized 1x bus rate update algorithm. It now guarantees to switch to
the target parent/rate without violation of max clock limits for any
combination of pll rates and max limits (not just for current Tegra11
settings). It would also attempt to switch without dip in bus rate if
it is possible, but this cannot be guaranteed (example: switch from
408 MHz : 1 to 624 MHz : 2 with maximum 1x bus limit 408 MHz will be
executed as 408 => 204 => 312 MHz, and there is no way to avoid rate
dip in this case).

Change-Id: I073effbcd997cefc949c9f90465227b7026538d6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/227327
(cherry picked from commit 782640e9ccf3b1f00e12de82cc1e8411f4f6c803)
Reviewed-on: http://git-master/r/228652
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoarm: tegra: macallan: only register fuel gauge when using battery
Kerwin Wan [Tue, 7 May 2013 02:31:22 +0000]
arm: tegra: macallan: only register fuel gauge when using battery

Bug 1284421

Reviewed-on: http://git-master/r/225988
(cherry picked from commit d967eaed5f6db808df73d25742c33a965b4afd54)

Change-Id: I77051124f88ddc417bb99b994d0784c5d40d5411
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/228198
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agomisc: nct1008: Add new suspend mode for Tegra LP1
Daniel Solomon [Thu, 4 Apr 2013 00:53:12 +0000]
misc: nct1008: Add new suspend mode for Tegra LP1

For Tegra devices, it is desirable to keep the NCT1008/72
device awake during some suspend states.

Add new "suspend mode" to support this feature, if
CONFIG_TEGRA_LP1_LOW_COREVOLTAGE is set. Required
parameters are passed in through board file data.

Bug 1261915

Change-Id: Ibae7e6a661d817c0cc514373b934665d68d063b7
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/216368
(Cherry picked from e02beb3f82f4164c834797a1855e716645abaf7a)
Reviewed-on: http://git-master/r/226484
Reviewed-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Tested-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomisc: nct1008: Add susupend wakeup params
Daniel Solomon [Tue, 2 Apr 2013 22:51:55 +0000]
misc: nct1008: Add susupend wakeup params

NCT1008/72 devices can be used to wake up the system
for certain thermal events. Add parameters to the platform
data to specify whether this wakeup functionality is
supported, and, if so, what temperature limits should
be used to trigger a wakeup.

Bug 1261915

Change-Id: I708805dafa1669c117e2d1ab7f22fe6afd3f3d8b
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/216365
(cherry picked from commit 9df3a0af2196c496b58b474a1a4b2069dae61918)
Reviewed-on: http://git-master/r/226450
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Tested-by: Karthik Ramakrishnan <karthikr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: Add LP1 temp-based wakeup params
Daniel Solomon [Tue, 2 Apr 2013 22:55:44 +0000]
ARM: tegra: Add LP1 temp-based wakeup params

Add parameters to nct1008_pdata:
- suspend_ext_limit_hi/_lo: limits of allowed
temperature during suspend, outside of which an
interrupt is triggered
- suspend_with_wakeup: function pointer to check for
desired NCT suspend type. For Tegra, this function
returns true if suspend mode is LP1.

Currently this functionality is only added to Pluto.

Bug 1261915

Change-Id: I190721a42ee1e06961368f5c6f7274aa182fd49d
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/216366
(cherry picked from commit 8edbfe81583505ff51687573088615e69d469585)
Reviewed-on: http://git-master/r/226449
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: power: Add LP1 cold low voltage parameter
Daniel Solomon [Tue, 2 Apr 2013 18:44:17 +0000]
ARM: tegra: power: Add LP1 cold low voltage parameter

Currently, if CONFIG_TEGRA_LP1_LOW_COREVOLTAGE is enabled,
we decrease core voltage to a level specified via lp1_core_volt_low
in each platform's board file.

Add another level, lp1_core_volt_low_cold, which will be used if
there's a low temperature core voltage floor set during LP1 entry.
Only one voltage floor exists for T30 and T114, so only one additional
low voltage entry has been added.

Bug 1261915

Change-Id: I614a4176b0bf68d6607a104a980d38589ebd3046
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/216364
(cherry picked from commit b12e9b71552b89664dd8bdfc26e5e33cc9b45056)
Reviewed-on: http://git-master/r/226437
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agogpio: tegra: Add error handling for setting wakeup GPIOs
Daniel Solomon [Wed, 3 Apr 2013 21:45:47 +0000]
gpio: tegra: Add error handling for setting wakeup GPIOs

This allows setting wakeups in LP1 that are not available
in for LP0.

Bug 1261915

Change-Id: Ic8f7c07065c0eb53bb0564d022e36a172924451d
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/216363
(cherry picked from commit 9a8a4923a871d5084b61e500d684f519f6495adf)
Reviewed-on: http://git-master/r/226436
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Tested-by: Karthik Ramakrishnan <karthikr@nvidia.com>

5 years agoARM: tegra: PMIC WDT disable command line support
Bitan Biswas [Thu, 2 May 2013 15:52:43 +0000]
ARM: tegra: PMIC WDT disable command line support

PMIC watchdog enable/disable is passed to kernel from fastboot
 - watchdog=disable indicates watchdog is disabled
 - Watchdog is enabled when watchdog=enable or argument watchdog is missing

bug 1275273

Change-Id: I3b2b5b1916f099e9f7b277e4b29f985647e140ee
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/224920
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoArm: Tegra: Atlantis: Add Atlantis FFD support
Graziano Misuraca [Tue, 30 Apr 2013 23:36:48 +0000]
Arm: Tegra: Atlantis: Add Atlantis FFD support

Add support for Atlantis FFD board.

Bug 127912

Change-Id: I65fa8e55bc9bf0e94a41a7d309be23f690896d95
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/224399
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra: power: Select LP1 low voltage with temperature
Alex Frid [Tue, 2 Apr 2013 04:38:38 +0000]
ARM: tegra: power: Select LP1 low voltage with temperature

Bug 1261915

Change-Id: I3bf1da45bb0ff7866e260228d56a44c0f79fce9a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/215359
(cherry picked from commit 50ef135c30f3f9a0b7758068fbf31d8db4f92893)
Reviewed-on: http://git-master/r/221378
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agommc: tegra: Set MMC_CAP2_HS200 mmc host capability
Naveen Kumar Arepalli [Thu, 9 May 2013 06:43:20 +0000]
mmc: tegra: Set MMC_CAP2_HS200 mmc host capability

1. Set MMC_CAP2_HS200 to indicate that sdmmc host supports
HS200 mode
2. Change tuning high frequency from 156 Mhz to 136 MHz

Bug 1283981
Bug 1278476

Change-Id: I6e6cebc5b5de918342387e8b02906a581bc75999
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/226954
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoarm: tegra: roth: Remove left and right NCT72
Anshul Jain [Fri, 8 Feb 2013 22:28:23 +0000]
arm: tegra: roth: Remove left and right NCT72

The current POR of roth doesn't need left and right NCT sensors. These
sensors have been removed from new revisions of roth boards.

Bug 1233567

Change-Id: I7760f926d0ba7ec097fe0595c6b94c6c5b835b39
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/198919
(cherry picked from commit 9019fc34a7b6c22a1c3ad4ad52a066b1c379c10c)
Reviewed-on: http://git-master/r/228575
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Jason Zhang (SW-TEGRA) <jasozhang@nvidia.com>
Reviewed-by: Jason Zhang (SW-TEGRA) <jasozhang@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: pluto: Use battery info from command line
Chaitanya Bandi [Fri, 3 May 2013 10:53:22 +0000]
ARM: tegra: pluto: Use battery info from command line

Use battery presence information from kernel command line
and indicate through platform data to max77665 charger
and max17042 fuel guage.

Bug 1281739

Change-Id: Icf6ce390da0fc5d6f3dc2d1a2e1f69fe367d1658
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/225220
(cherry picked from commit 1c1424344ce90aff60390ac37b20eda02c53b5c8)
Reviewed-on: http://git-master/r/228278
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agopower: max77665: Get battery presence from pdata
Chaitanya Bandi [Fri, 3 May 2013 10:49:34 +0000]
power: max77665: Get battery presence from pdata

Battery presence will be obtained from platform data.
Removed battery presence detection through reading
temperature.

Bug 1281739

Change-Id: I6ae449cafccf38f75815374da011cc7ca5aba087
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/225219
(cherry picked from commit bba0ed580a2553fc779f2648045f1d9c2108a687)
Reviewed-on: http://git-master/r/228277
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopower: max17042: Get battery presence from pdata
Chaitanya Bandi [Fri, 3 May 2013 10:43:00 +0000]
power: max17042: Get battery presence from pdata

Battery presence will be obtained from platform data.
Removed battery presence detection through reading
temperature.

Bug 1281739

Change-Id: Ic87fe5a8ba4d183a26c7bec616c08a07714a9de6
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/225218
(cherry picked from commit 8c030ab47fcf1e6d9588aa437d254a082926ee60)
Reviewed-on: http://git-master/r/228276
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra14: dvfs: Update sdmmc dvfs tables
Naveen Kumar Arepalli [Wed, 15 May 2013 10:58:34 +0000]
ARM: tegra14: dvfs: Update sdmmc dvfs tables

Update sdmmc dvfs tables for t14x

Bug 1283981
Bug 1278476

Change-Id: I9c0b52fe5704eee40fddedee219648f07ba776fb
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/227445
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoarm: tegra: enable config for pasr
Prashant Gaikwad [Thu, 9 May 2013 07:45:17 +0000]
arm: tegra: enable config for pasr

Bug 1201663
Bug 1276901

Change-Id: I078fb6ceb8f46c9307d57dc801d84814b432747f
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/226968
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: otg: tegra: restructure otg probe
Rakesh Bodla [Tue, 7 May 2013 10:44:38 +0000]
usb: otg: tegra: restructure otg probe

Restructuring the otg probe for readability
and for further developing HNP,SRP protocals.

Change-Id: Iaa78601a5e02849b2c12108e176f06d7f9069447
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/226157
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: dc: enable global alpha on tegra14
Donghan Ryu [Mon, 13 May 2013 13:27:52 +0000]
video: tegra: dc: enable global alpha on tegra14

enable global alpha on tegra14 platform.

Bug 1276814

Change-Id: I880b4d3032720965942133b2a54a284867ce302a
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/227969
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: host: correct runtime pm api usage
Mayuresh Kulkarni [Fri, 10 May 2013 16:00:05 +0000]
video: tegra: host: correct runtime pm api usage

- enable auto-suspend only if clock gate delay != 0
- protect power gate/ungate by mutex

bug 1276972

Change-Id: If525e8a0eb5f001efed74957abc73d1a27307a24
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/227503
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agousb: xhci: tegra: Correct RCTRL and TCTRL programming
Ajay Gupta [Fri, 3 May 2013 21:10:54 +0000]
usb: xhci: tegra: Correct RCTRL and TCTRL programming

Currently common PMC programming incorrectly programs TCTRL
and RCTRL values resulting in automatic connect/disconnect of
a pendrive from Kingston.
- Fixed RCTRL TCTRL logic in usb2.0 driver
- Fixed RCTRL TCTRL programming in xhci driver

Bug 1259555
Bug 1282360

Change-Id: I2aa7d286bfa7392ed60a698f921904a7c13605d9
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/226413
(cherry picked from commit 15101196c5d078b8543feeb9577497273ed79c66)
Reviewed-on: http://git-master/r/228186
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: usb: tegra: WAR for TCTRL/RCTRL
Krishna Yarlagadda [Wed, 8 May 2013 04:36:15 +0000]
ARM: usb: tegra: WAR for TCTRL/RCTRL

WAR for hw issue which occurs when both
synopsys and xusb are in use.
pmc override is required for TCTRL/RCTRL even when
pmc is not in control of bus.

Bug 1259555
Bug 1282360

Change-Id: I129ff41f31c07456bb245a2f78ec88d744a60254
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/226627
(cherry picked from commit e0ef7fd01bb7dcb81aad6d92d43c92a7d8a2ad6e)
Reviewed-on: http://git-master/r/228185
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: xhci: tegra: TRCTRL/RCTRL programming
Krishna Yarlagadda [Wed, 8 May 2013 05:50:53 +0000]
usb: xhci: tegra: TRCTRL/RCTRL programming

TRCTRL/RCTRL values will always be zero due to a hw issue.
A WAR is in place and removing redundant code

Bug 1259555
Bug 1282360

Change-Id: I0281dee1e7790cdafa9778569825b18f680babe7
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/226628
(cherry picked from commit 89f35d4215b1ba6d2984a2f7c7c2a409ceaef09a)
Reviewed-on: http://git-master/r/228184
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: xhci: tegra: enable refPLLE clock
Krishna Yarlagadda [Mon, 29 Apr 2013 08:59:11 +0000]
usb: xhci: tegra: enable refPLLE clock

ss/hs clocks depend on refPLLE clock
Make sure it is turned on before other clocks are used

Bug 1275799

Change-Id: Ice7715b80e535bffb0c2a233489b36556ea299e3
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Ajay Gupta <ajayga@nvidia.com>
Reviewed-on: http://git-master/r/223874
(cherry picked from commit 9455d9894436fc147ba7336924e421efa5e2d76b)
Reviewed-on: http://git-master/r/228183
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: xhci: tegra: Fix handle for command ring empty and configure ep
joyw [Thu, 2 May 2013 04:35:47 +0000]
usb: xhci: tegra: Fix handle for command ring empty and configure ep

This patch is to have error handle when driver stop waiting cmd due to
"Signal" event. There are two issues that may happen when user try to stop
driver through "Signal".

1) Command ring empty, and this may cause HCD fetch a wrong dequeue trb
from cmd_ring for the next command.
2) No recourse clean up for configure ep. This may cause the next time
driver try to enable this endpoint fail.

This patch try to not inc_deq when command ring empty because the command that
going to stop is already finished. And wait for "stop cmd ring" complete.
Since this stop cmd is going to stop configure ep cmd, after "stop cmd ring"
complete indicate we can check configure ep status safely.

Bug 1271936

Change-Id: Id14ba8b8fc234a5924016705993d4382bd032ea5
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: joyw <joyw@nvidia.com>
Reviewed-on: http://git-master/r/224710
(cherry picked from commit b70f74b324d36430ebad03bc17107863f23dc924)
Reviewed-on: http://git-master/r/228182
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

5 years agousb: xhci: tegra: sw WAR for correct TCTRL/RCTRL of USB2 pads
Ajay Gupta [Fri, 29 Mar 2013 22:19:15 +0000]
usb: xhci: tegra: sw WAR for correct TCTRL/RCTRL of USB2 pads

Also updated the programming of  XUSB_PADCTL_USB2_BIAS_PAD_CTL_0_0
as PD and PD_TRK should not always be set to '1'.

Bug 1259555
Bug 1275290

Change-Id: Iccd9818eeff8141043a41e20c25ce8f078c90da1
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/224608
(cherry picked from commit 6cac705bb34584a35daaadc4b3149ffe3a7721bf)
Reviewed-on: http://git-master/r/228181
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: xhci: tegra: Fix SS device detection as HS
Ajay Gupta [Tue, 30 Apr 2013 21:33:09 +0000]
usb: xhci: tegra: Fix SS device detection as HS

commit "usb: xhci: tegra: save leakage power if SS link suspended"
has broken SS device enumeration where we see some SS device gets
detected as HS initially and then later detected as SS.

If ELPG exit happens due to main hcd bus_suspebd call first then
RX_IDLE_OVRD would not be cleared causing SS device getting
detected as HS. Fixing this by making sure RD_IDLE_OVRD is cleared
before loading firmware

Bug 1279725

Change-Id: Ic6c66e36622b8c092bbf6dee765ff216eac0cb64
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/224357
(cherry picked from commit 78f03ef681bde8f7d155670747e1f4f1cd0dc321)
Reviewed-on: http://git-master/r/228180
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agousb: xhci: tegra: save leakage power if SS link suspended
Ajay Gupta [Tue, 23 Apr 2013 17:33:21 +0000]
usb: xhci: tegra: save leakage power if SS link suspended

Bug 1275290

Change-Id: Ibb195b69c1fc08db9cbbc98d5812e88868053882
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/222223
(cherry picked from commit 5cf20ab3dc1c7b4ed5b0c52bbdb420415ead398b)
Reviewed-on: http://git-master/r/228179
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra14: dvfs: add SKU specific entries
Prashant Malani [Mon, 13 May 2013 22:07:27 +0000]
ARM: tegra14: dvfs: add SKU specific entries

Add Core DVFS entries based on SKU and speedo id.

Bug 1246952

Change-Id: Ic2fbebda95741ad6367d61a552d68072462400de
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/228123
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: dvfs: Update cpu dvfs tables
Seshendra Gadagottu [Mon, 13 May 2013 18:54:25 +0000]
ARM: tegra14: dvfs: Update cpu dvfs tables

Update cpu dvfs entries based on silicon
validation data released on 05/09.

Bug 1246952

Change-Id: Ifd69ca871071ca55b787cafa23ccfa91f2a937a3
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/228064
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>

5 years ago ARM: tegra14: fuse: set speedo ids based on fuse
Seshendra Gadagottu [Mon, 13 May 2013 18:43:26 +0000]
 ARM: tegra14: fuse: set speedo ids based on fuse

 Set cpu/core speedo ids based on board sku fused.
 Also updated cpu/core process ids and vdd_core voltage
 limits based on SV data released on 05/09.

 Bug 1246952

Change-Id: I5241bbac7ab5e071560246f18dc2266983d6309d
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/228063
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>

5 years agoARM: tegra: dalmore: add HDMI electrical settings
Jon Mayo [Sat, 6 Apr 2013 02:12:15 +0000]
ARM: tegra: dalmore: add HDMI electrical settings

Bug 1157049

Change-Id: I04af72ed408cec5a53034d5d97212c5c818f0d28
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/221279
(cherry picked from commit 0270277d112cc0f1b8ac9f6490fbe5cc1e79e8d5)
Reviewed-on: http://git-master/r/228060
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

5 years agovideo: tegra: dsi: Fix clk cycle duration calculation
Vineel Kumar Reddy Kovvuri [Tue, 7 May 2013 11:16:30 +0000]
video: tegra: dsi: Fix clk cycle duration calculation

Fix clk cycle duration calculation.

Bug 1255929

Change-Id: I85e962f9cdd2e9989e3e197f32426e9ec1a93c0b
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/226171
(cherry picked from commit d863168a4b84fd79c711037ff383aba4a33badd0)
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/228059
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

5 years agoARM: tegra: always use usec timer for persistent clock
Bo Yan [Sat, 27 Apr 2013 21:05:52 +0000]
ARM: tegra: always use usec timer for persistent clock

The 32K to 12M conversion is imprecise, this causes timer drift across
LP0 cycles. Use usec timer as persistent clock

Reviewed-on: http://git-master/r/223680
(cherry picked from commit 2186ac8b7fbf31d951341ea3a4bda99c8902302e)

Signed-off-by: Bo Yan <byan@nvidia.com>
Change-Id: Ib780eaf5661fcd12cbba2593bab8dd3f2f950641
Reviewed-on: http://git-master/r/228001
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>

5 years agoARM: tegra14: dvfs: Update cpu dvfs entries
Seshendra Gadagottu [Fri, 3 May 2013 00:08:18 +0000]
ARM: tegra14: dvfs: Update cpu dvfs entries

Update cpu dvfs entries based on
SiVal data released on 5/1/2013.

Bug 1246952

Change-Id: Ibda850b0045105552115f903e85ded4f622ec5d0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/225063
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>

5 years agoTegra: DC: Add hotplug detect callback
Graziano Misuraca [Mon, 1 Apr 2013 23:24:57 +0000]
Tegra: DC: Add hotplug detect callback

Add optional hotplug callback.

Bug 1237421

Change-Id: I865c94aede543918eeea34561e5d48fd28c739f9
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/215267
(cherry picked from commit 6b0677e6dd8b4d37be34022fc1801dcddd1daf36)
Reviewed-on: http://git-master/r/224295
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: pcie: fix Coverity issue
Deepak Nibade [Mon, 13 May 2013 10:34:17 +0000]
ARM: tegra: pcie: fix Coverity issue

fix Coverity issue of reading from pointer after free
Coverity id : 23084

Bug 1046331

Change-Id: I17916ad2c0cfee828c50fe148927513a262a7c43
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/227923
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomedia: tegra: dw9718: Fix dw9718 settle time
Michael Lin [Thu, 11 Apr 2013 01:17:28 +0000]
media: tegra: dw9718: Fix dw9718 settle time

Fix focuser settle time

Change-Id: Idab65b6800137d55d04842ff04d721b7847366de
Signed-off-by: Michael Lin <mlin@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/226561
(cherry picked from commit 9f13d206be74a5d630652a9014dd96ee77ea776d)
Reviewed-on: http://git-master/r/227909
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomedia: video: tegra: remove ar0833 frame length settings
Frank Chen [Fri, 5 Apr 2013 21:36:11 +0000]
media: video: tegra: remove ar0833 frame length settings

We should not update frame length register since
it is done by sensor automatically. Force to update
frame length register will cause image to flash when
HDR ratio is bigger than 1:1.

Bug 1267273

Change-Id: Id134c1e35ec60033a7b684de3c2c3d13d9ba933e
Signed-off-by: Frank Chen <frankc@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/216991
(cherry picked from commit 4b35deff807ed8d1ed214edabd33db5d95d51f6a)
Reviewed-on: http://git-master/r/227908
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomedia: video: tegra: Add group hold for ar0833
Frank Chen [Tue, 2 Apr 2013 17:59:51 +0000]
media: video: tegra: Add group hold for ar0833

Add group hold support for ar0833 HDR sensor

Bug 1250073

Change-Id: I7b4f294391a261c861a83f10889b91c086a8e593
Signed-off-by: Frank Chen <frankc@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/215640
(cherry picked from commit d77044150cb1a43a4b9566c2ca5d417f49d8b685)
Reviewed-on: http://git-master/r/227907
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomedia: video: tegra: add ar0833 HDR sensor
Frank Chen [Thu, 27 Dec 2012 23:28:27 +0000]
media: video: tegra: add ar0833 HDR sensor

Add driver support for ar0833 HDR sensor

Bug 1250073

Change-Id: I47033e64955153dbfa510a7470e9999ba26d4208
Signed-off-by: Frank Chen <frankc@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/206769
(cherry picked from commit 3b926a89b0db6fcf74c99f878d5913d84738d250)
Reviewed-on: http://git-master/r/227906
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: dw9718: enable auto-detect support
Gary Fitzer [Mon, 29 Apr 2013 15:24:22 +0000]
video: tegra: dw9718: enable auto-detect support

Bug 1250073

Change-Id: Iabbf3d13e07ce053a74a8b6ff9dca610dfc6e55a
Signed-off-by: Gary Fitzer <gfitzer@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/223898
(cherry picked from commit ed11e971e56dd947f1e98c1df9bdb9bdbceae741)
Reviewed-on: http://git-master/r/227896
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: gizmo: sdmmc4 prefetch,gizmo settings
Pavan Kunapuli [Fri, 10 May 2013 08:58:46 +0000]
ARM: tegra: gizmo: sdmmc4 prefetch,gizmo settings

Removing IMMEDIATE and high priority settings for SDMMC4.
For the prefetcher configured for sdmmc4, using reset values of addr
boundary and inactivity timeout settings.

Bug 1285843
Bug 1280452

Change-Id: Idde5fc025327a52f82dcb153f1f39031e8d8ffd6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/227370
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: Aligning bogomips calculation loop.
Sumeet Gupta [Tue, 16 Apr 2013 11:13:06 +0000]
arm: tegra: Aligning bogomips calculation loop.

The loop in __delay is used to calculate loops per jiffy.
Giving a natural alignment to this loop for consistent performance.

Bug 989625

Change-Id: Ic64d13781b8022e153c8bec5f6f0ccedb3b5a872
Signed-off-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-on: http://git-master/r/219786
(cherry picked from commit dacfea27f5938c8ddc75431200d5aa6e32581fc9)
Reviewed-on: http://git-master/r/227131
Reviewed-by: Simon Hosie <shosie@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoArm: tegra: usb: set run bit soon after disabling PMC
Petlozu Pravareshwar [Thu, 9 May 2013 08:51:35 +0000]
Arm: tegra: usb: set run bit soon after disabling PMC

Set run bit soon after disabling the PMC sothat
the delay in revealing the pmc_lock is avoided.
Also add delay in phy_restore_end sothat the resume
will driven for minimum of 20ms.

Bug 1264731

Change-Id: Id9605d9414ef47c6ed49f45e04774af5a92941f8
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/225276
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agomisc: palmas-sim: sim driver to detect presence
Neil Patel [Mon, 8 Apr 2013 15:30:17 +0000]
misc: palmas-sim: sim driver to detect presence

This driver configures SIM related registers and detects insertion and
removal of SIM cards. If a card is detected, sysfs_notify is called
for sim1_inserted and sim2_inserted. A user application can poll them
and check for detection changes under /sys/class/misc/sim.

Bug 1262965

Change-Id: Ia2836e63883fcf927d5b5ec9703ea374514b7691
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/217405
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>