5 years agothermal: fix warning in add thermal events tracing
Diwakar Tundlam [Thu, 11 Apr 2013 21:32:40 +0000]
thermal: fix warning in add thermal events tracing

Bug 1050412

Change-Id: I1080767ac2711f52aad82e09c0af5a27cf972425
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/218664
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Tested-by: Timo Alho <talho@nvidia.com>

5 years agovideo: tegra: host: fix deadlock in pod_scaling
Ilan Aelion [Thu, 4 Apr 2013 19:59:08 +0000]
video: tegra: host: fix deadlock in pod_scaling

podgov_set_user_ctl to call cancel_work_sync after relinquishing lock.

Bug 1266380

Change-Id: I52ba57cfedca7d861e34810a933297790202fadc
Signed-off-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-on: http://git-master/r/216625
(cherry picked from commit 14f0f26dac55a68a2ef80a51999128874f2c6bc8)
Reviewed-on: http://git-master/r/218588
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Simo Melenius <smelenius@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

5 years agovideo: tegra: dc: add event_inject debugfs
Jon Mayo [Thu, 11 Apr 2013 00:06:20 +0000]
video: tegra: dc: add event_inject debugfs

Add event_inject to tegradc.[01] to inject hotplug and bandwidth events.

Change-Id: I34caa93e1bdd3a68f00ac9a4427f15c01cd896c8
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/218433
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: free bootloader framebuffer correctly
wazhu [Mon, 8 Apr 2013 01:41:29 +0000]
arm: tegra: free bootloader framebuffer correctly

Release bootloader framebuffer back to kernel page allocator.

Bug 1265336

Change-Id: Ib7bee570d5d07e5a1344c10679c6ba813eb4f387
Signed-off-by: wazhu <wazhu@nvidia.com>
Reviewed-on: http://git-master/r/217170
(cherry picked from commit 780abd9a34e10e7e9a9df5c68b9416bb9257ae9d)
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/218412
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: soctherm: Add critical trip to hwmon with callback
Diwakar Tundlam [Thu, 14 Mar 2013 22:33:21 +0000]
arm: tegra: soctherm: Add critical trip to hwmon with callback

Change-Id: I907debaa9ebfd8aa3f04cc6cdb50561803f5736d
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/215930
(cherry picked from commit 39c789d4dda4c041f565fe52d0476e52e719e49d)
Reviewed-on: http://git-master/r/218371
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agothermal: call correct function in crit_show
Diwakar Tundlam [Wed, 3 Apr 2013 00:53:08 +0000]
thermal: call correct function in crit_show

Change-Id: Ibd821693644d94445d90c50fa284f85bfd0178d1
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/215929
(cherry picked from commit e8975c12dd02fb4d643828bcd283e78212e2c40e)
Reviewed-on: http://git-master/r/218370
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: dvfs: round dfll minimum voltage
Seshendra Gadagottu [Wed, 10 Apr 2013 20:01:23 +0000]
ARM: tegra: dvfs: round dfll minimum voltage

Round the dfll minimum voltage to PMIC voltage resolution step.

Bug 1268263

Change-Id: Idbeb1576868bc64c981c8705a49f84663f29591d
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/218344
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoi2c: tegra: move error prints from isr to caller context
Laxman Dewangan [Wed, 10 Apr 2013 09:24:50 +0000]
i2c: tegra: move error prints from isr to caller context

To reduce the interrupt processing time in the isr, moving
the warning/error prints from isr context to caller context
as the status of errors are already saved.

bug 1243783

Change-Id: Ib99801d47658af509948d56780bbf612267ec0c4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/218169
Reviewed-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>

5 years agoARM: tegra14: clocks: Increase host1x max rate
Prashant Malani [Wed, 27 Mar 2013 00:00:21 +0000]
ARM: tegra14: clocks: Increase host1x max rate

Increase to 408 MHz to support higher values
on core DVFS tables.

Bug 1246952

Change-Id: Ib401fc19441e0c5e79e0472124d476cd52a36612
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/213349
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: clock: Add lockdep annotations to clock locks
Sami Liedes [Fri, 1 Feb 2013 13:10:21 +0000]
arm: tegra: clock: Add lockdep annotations to clock locks

The clk tree has a tree of locks, which confuses lockdep analysis.

There is a fairly limited number of clocks, and some of them can
occasionally move around in the tree (change parents).

The most obvious way to un-confuse lockdep here is to make each clock
a lockdep lock class of its own. Each of those classes then contains
both the mutex and the spinlock in struct clk.

This change assumes that, for any pair of clocks (A,B), it cannot
happen that at one point of time A is an ancestor of B and later B is
an ancestor of A. Another way to view this assumption is that it is
possible to give a list of all clocks (this list is not explicitly
encoded anywhere, though) sorted in such a way that if a clock A at
any point in time has a parent P, P is always in the list before A.

If this assumption is broken, a lockdep warning might issue (when
running with CONFIG_LOCKDEP=y), and there might be a need for more
complex lockdep annotations. Apparently this is however dictated by
the hardware, so it should hold.

Bug 1226264

Change-Id: Iaec3d672c4d8ac61c097893c283e5fd41214c712
Signed-off-by: Sami Liedes <sliedes@nvidia.com>
Reviewed-on: http://git-master/r/196472
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoaudio: a2220: Handle probe failure
Vijay Mali [Thu, 4 Apr 2013 15:15:00 +0000]
audio: a2220: Handle probe failure

- Avoid unwanted i2c write calls if probe fails.
- Add seperate function for sending boot message.
- Reduce i2c retry count to 1.
- This ensures graceful exit in case of failure.
- Boot log does not show lot of i2c failure messages after the fix.

Bug 1263841

Change-Id: I8a5f4c335e42aea69647f50afc48494084967825
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/216528
(cherry picked from commit 2ff268712b9cbc6b6ef17a1d06748dd2c985dddc)
Reviewed-on: http://git-master/r/217698
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra: clock: Make EMC BW request calculation common
Alex Frid [Sat, 30 Mar 2013 00:39:46 +0000]
ARM: tegra: clock: Make EMC BW request calculation common

Moved EMC bandwidth request calculation from Tegra11 specific code
to commmon tegra emc file.

Change-Id: Ia6f86cb0a4bf99328792baeeae027fa0931f2337
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/215162
(cherry picked from commit d4d4f4b8555afd621c108beb9cf610d8f74d3208)
Reviewed-on: http://git-master/r/217121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Remove ISO BW double scaling
Alex Frid [Fri, 29 Mar 2013 23:47:51 +0000]
ARM: tegra11: clock: Remove ISO BW double scaling

ISO clients bandwidth requests were scaled up twice in a row: first
to meet iso share allocation, second to account for overall memory
bandwidth efficiency. This commit applies each scale separately and
choose maximum between the two.

Change-Id: Ic5e673ac02402736a2a1fa9e4ae990edef9a4bf7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/215161
(cherry picked from commit d5a9d5e52c3e0bb7c551da1b7471a3530f713a09)
Reviewed-on: http://git-master/r/217120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Re-factor EMC bw requirement calculation
Alex Frid [Tue, 26 Mar 2013 02:58:22 +0000]
ARM: tegra11: clock: Re-factor EMC bw requirement calculation

- Separated iso EMC shared users (display and camera) from other
bandwidth shared users
- Added shared user id flags to EMC shared users that may affect
maximum iso share allocation
- Determined EMC bw requirement as maximum of total bw requested
by all bw users, and iso bw scaled up to guarantee allocated share

Bug 1253271

Change-Id: If4ab7931c668e063cf607fc43b34e1e09574d0bd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212913
(cherry picked from commit 9f1571c6b36a7db42c9cc5e4dd4f8df5089e2064)
Reviewed-on: http://git-master/r/217119
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Add emc use case table
Alex Frid [Tue, 26 Mar 2013 06:31:10 +0000]
ARM: tegra11: clock: Add emc use case table

Added initial table to specify iso bandwidth share dependency on emc
use cases. Just two use cases: display only and display + camera are
identified for now.

Bug 1253271

Change-Id: I499c45914d0296f2106511c8ddecbcdb0a818d7f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212912
(cherry picked from commit e6a58ac6c6eb7faedb7e8fc8ad630092a0bab024)
Reviewed-on: http://git-master/r/217118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: clock: Support variable iso share with emc usage
Alex Frid [Tue, 26 Mar 2013 05:30:32 +0000]
ARM: tegra: clock: Support variable iso share with emc usage

Added mechanism to determine maximum allowed iso bandwidth share
depending on emc usage. Each use case is identified by a combination
of shared emc user clocks turned on. The list of use cases and the
respective iso share percentage is to be provided by chip specific
tables.

This commit only added variable iso share APIs and emc shared users
enumeration. No platform specific tables are specified, and APIs are
not used.

Bug 1253271

Change-Id: If08ce2c0e180de600ccb28b91381066543659180
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/212911
(cherry-picked from commit 5e971cd9a173d6418287e091275c8357bd169dd0)
Reviewed-on: http://git-master/r/217117
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra: macallan: set vdd_rtc to 950mV during lp0
Kerwin Wan [Wed, 20 Mar 2013 06:32:21 +0000]
arm: tegra: macallan: set vdd_rtc to 950mV during lp0

This commit combines f983c88bf407f and 599cee8c196fa
On macallan, vdd_rtc can not be set to 900mV during lp0.
Because when vdd_rtc is set to 900mV, cpu will meet hard hang after
wake up from lp0. Hardware team should do WAT to get the proper margin
for vdd_rtc. Set vdd_rtc to 950mV to avoid this issue now.

Bug 1262674

Change-Id: Ic3ddfeb586a78e6731178bb6bd672dda0ae49566
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/217259
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoarm: tegra: macallan: set initial mode of some smps to NORMAL
Kerwin Wan [Mon, 18 Mar 2013 08:54:00 +0000]
arm: tegra: macallan: set initial mode of some smps to NORMAL

Set the initial mode smps6, smps7, smps8, smps9 to NORMAL
to reduce the power consumption on these rails.

Bug 1255098

Reviewed-on: http://git-master/r/210350
(cherry picked from commit f55062f98cfcc8d3944187bc2f14b205323fb762)

Change-Id: I0458558bb20c243f280a805410a8f2cb5b52e998
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/217258
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoarm: tegra: bbc: fix Coverity issues
Deepak Nibade [Tue, 9 Apr 2013 07:38:54 +0000]
arm: tegra: bbc: fix Coverity issues

handle unchecked return value from function sscanf
Coverity id :
22831 22832 22833 22834
22835 22836 22837 22838

Change-Id: I442d88a9450d8991bf4c6e895245c23e9e1ef2a3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/217826
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoregulator: check for dummy regulator before setting voltage
Vishal Singh [Wed, 10 Apr 2013 03:55:24 +0000]
regulator: check for dummy regulator before setting voltage

Adding check for whether the regulator is dummy before trying to
set its voltage.

Bug 1242910.

Reviewed-on: http://git-master/r/206264
(cherry picked from commit 0a8fe8ecdcb2c3d018bdb30c6d46ad5441c8936e)

Change-Id: I9f3c2cee05b8677acee1500d1fdb6c854229c723
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/208765
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra14: clock: Verify initial cbus pll descendants
Alex Frid [Tue, 9 Apr 2013 06:13:58 +0000]
ARM: tegra14: clock: Verify initial cbus pll descendants

Added initial cbus pll children verification on Tegra14.

Change-Id: I60d21ce63828ca039f5dfffdadd0370ceb924c67
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/217658
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: atlantis: Add sharp 1080p support
Animesh Kishore [Mon, 8 Apr 2013 13:37:05 +0000]
arm: tegra: atlantis: Add sharp 1080p support

-panel driver support
-backlight ic support

Bug 1253675

Change-Id: Ie5314c384ff7b4a4de5833082a2dcb0ccca0cdce
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/217387
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: configs: Add BMP180 module
Erik Lilliebjerg [Tue, 19 Mar 2013 16:51:00 +0000]
arm: tegra: configs: Add BMP180 module

Add BMP180 pressure sensor driver as module.

Bug 1253718
Bug 1242566

Change-Id: Ia2de59ccbe833b9f444fb56234954729edf7b5a3
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/210854
(cherry picked from commit f891baec733e839d02c220fcb934097c29a266be)
Reviewed-on: http://git-master/r/212246
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: board support for sensors
Erik Lilliebjerg [Wed, 20 Mar 2013 07:29:32 +0000]
arm: tegra: board support for sensors

Added support for BMP180 pressure sensor and auto-detection of AKM89XX compass.

Change-Id: I3e45250e7b4e2887d79bd62a402ddcdc0d057b92
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/211081
(cherry picked from commit 00811e96be2c6ac4139a6b24b39cf44ddcf20bda)
Reviewed-on: http://git-master/r/212245
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agogpio: tegra: Fix definition of TEGRA_GPIO_INVALID
Laxman Dewangan [Thu, 17 Jan 2013 12:56:12 +0000]
gpio: tegra: Fix definition of TEGRA_GPIO_INVALID

Make the TEGRA_GPIO_INVALID is -ve so that gpio_is_valid() return false
with this argument.

bug 1214078

(Cherrypicked commit
009d7eb3fa5945f4521a53eaa2234eba754eccaf)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/192051

Change-Id: I9446427d1d7ba2341d0ee79a419b3f8261450e82
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/217814
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoregulator: palmas: fix build warnings
Laxman Dewangan [Thu, 4 Apr 2013 09:07:37 +0000]
regulator: palmas: fix build warnings

Fix following build warnings:

drivers/regulator/palmas-regulator.c: In function 'palmas_disable_smps10_boost':
drivers/regulator/palmas-regulator.c:1035:6: warning: unused variable 'i' [-Wunused-variable]
drivers/regulator/palmas-regulator.c:1032:15: warning: unused variable 'reg' [-Wunused-variable]
drivers/regulator/palmas-regulator.c: In function 'palmas_enable_smps10_boost':
drivers/regulator/palmas-regulator.c:1052:6: warning: unused variable 'i' [-Wunused-variable]
drivers/regulator/palmas-regulator.c: In function 'palmas_enable_ldo8_track':
drivers/regulator/palmas-regulator.c:1077:6: warning: unused variable 'i' [-Wunused-variable]

(Cherrypicked commit
f7d9b94a647c05da629d989ff5b2184da0df1d3b)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/216441

Change-Id: If0337f5acc6c30e3e13be47b8486f18fb4f684b2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/217813
GVS: Gerrit_Virtual_Submit

5 years agoARM: config: tegra11: enable EXTCON_PALMAS
Laxman Dewangan [Sun, 24 Feb 2013 15:37:40 +0000]
ARM: config: tegra11: enable EXTCON_PALMAS

bug 1229629

(Cherrypicked from commit
cf761362461a2056dd49758712ada31881c30749)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/203657

Change-Id: Ib911bb10175bbae150c9f4266dc6d1e592e942c2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/217812
GVS: Gerrit_Virtual_Submit

5 years agomfd: palmas: Fix regmap size for palmas-pinctrl
Sumit Sharma [Tue, 9 Apr 2013 05:45:43 +0000]
mfd: palmas: Fix regmap size for palmas-pinctrl

Fix regmap size for palmas-pinctrl submfd device

Change-Id: I9fd54dbfab33bdfb42d6364302c483497c70f869
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/217654
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoARM: tegra: pluto: enable id detection using pmu
Rakesh Bodla [Tue, 9 Apr 2013 05:06:23 +0000]
ARM: tegra: pluto: enable id detection using pmu

Enable id detection using PMU ID interrupt.

Bug 1227226

Change-Id: Ibb65f1f76fc90062414b015efa65bffdd52c52a7
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/208407
(cherry picked from commit bb08550845c7dd0773a84dba9132c0c23e4f8478)
Reviewed-on: http://git-master/r/217637
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: otg: tegra: mask interrupt status value
Rakesh Bodla [Wed, 3 Apr 2013 12:19:03 +0000]
usb: otg: tegra: mask interrupt status value

ID and VBUS detection can happen through different ways.
Masking the interrupt status based on type of interrupts
enabled in USB controller for correct interrupt status.

Bug 1227226

Change-Id: Ibd5acfacabf78681ff54dcc721879f2935b5f836
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/216129
(cherry picked from commit 8cf73997e720645a2d1c7eadafc3970fcb540873)
Reviewed-on: http://git-master/r/217636
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agodrivers:max77660: Adds support for Linux regular "fast" mode
Alexandre Berdery [Mon, 8 Apr 2013 16:21:45 +0000]
drivers:max77660: Adds support for Linux regular "fast" mode

Using Linux "normal" mode case for both "normal" and "fast", then
setting bits to enable PFM for "fast" and bits to enable PWM for
"normal".

Bug 1248089

Change-Id: I688aa86092e028e17fe3b83e40d95e5de2109653
Signed-off-by: Alexandre Berdery <aberdery@nvidia.com>
Reviewed-on: http://git-master/r/217414
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Neil Patel <neilp@nvidia.com>
Tested-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agommc: tegra: check clk source rate with desired clk
rrajk [Mon, 8 Apr 2013 12:30:50 +0000]
mmc: tegra: check clk source rate with desired clk

Check the source clk rate before calculating the nearest clk
frequency for desired clk rate.

Change-Id: If476d301ee4a8fe5469a26d83551e4bed4758479
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/217367
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra14: bb: fix Coverity issue
Deepak Nibade [Mon, 8 Apr 2013 08:52:14 +0000]
arm: tegra14: bb: fix Coverity issue

fix coverity issue of dereference before NULL check
Coverity id : 22858

Bug 1046331

Change-Id: I58e52754945e2bbdee3a596543548fe562791bea
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/217268
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: macallan: update vbus extcon dev name
Rakesh Bodla [Tue, 9 Apr 2013 04:37:04 +0000]
ARM: tegra: macallan: update vbus extcon dev name

Bug 1262180

Change-Id: I0be93d6435c26ae70b5fe239a86edf43c5c11480
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/214006
(cherry picked from commit 1efdd7b0902fdf53e69fe36688cb547201a9ff0e)
Reviewed-on: http://git-master/r/216533
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: otg: tegra: seperate extcon dev for id, vbus
Rakesh Bodla [Thu, 28 Mar 2013 14:25:51 +0000]
usb: otg: tegra: seperate extcon dev for id, vbus

Use seperate extcon dev for id and vbus.
Platforms can use different pmu for each
detection.

Bug 1262180

Change-Id: I58dcfd4b822089049197855b8241f6f362768243
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/214005
(cherry picked from commit 36997afffa15443d1c4633647e97738f1e524af7)
Reviewed-on: http://git-master/r/216532
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: tegra: add id extcon dev name
Rakesh Bodla [Thu, 28 Mar 2013 14:23:40 +0000]
usb: tegra: add id extcon dev name

Adding id extcon dev name.

Bug 1262180

Change-Id: I9b63e6172856df7a13cfcc8c131fef78e03dfb71
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/214004
(cherry picked from commit b85184e37e176c337cf277414392603a48ca037b)
Reviewed-on: http://git-master/r/216531
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarm: tegra: iomap: Reduce NOR aperture to 64MB when NOR_TEGRA_GMI disabled.
Nitin Sehgal [Wed, 3 Apr 2013 11:54:45 +0000]
arm: tegra: iomap: Reduce NOR aperture to 64MB when NOR_TEGRA_GMI disabled.

bug 1254519

Change-Id: Ib3f176bd16243f11abc8f8b95684203d14f2cf2a
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-on: http://git-master/r/216127
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra: bbc: allow rf regulator control
Neil Patel [Mon, 1 Apr 2013 17:42:39 +0000]
ARM: tegra: bbc: allow rf regulator control

The BBC needs to control the RF regulators to switch between PFM
and PWM mode depending on network mode and also to change voltage
value or switch on/off RF DCDC.

Change-Id: I054b014276bf4906828816cd9b47c40f07e50bdc
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/215114
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoinput: misc: cm3217 light sensor driver
Erik Lilliebjerg [Mon, 1 Apr 2013 01:18:39 +0000]
input: misc: cm3217 light sensor driver

Fixes conflict with other drivers using a static class.

Change-Id: I4da3f2a2438a439a28cddfceb959f8905013cc04
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/214889
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agospi: tegra11: Update debug print
Vijay Mali [Tue, 12 Feb 2013 11:53:25 +0000]
spi: tegra11: Update debug print

dev_info -> dev_dbg

Reviewed-on: http://git-master/r/199996
(cherry picked from commit 74d60d171164695d7bff372247bc2e2d4591ac02)

Change-Id: Ib5b57f09333810aab3dff1e6328b096a331d0722
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/214804
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoinput: misc: sensor drivers
Erik Lilliebjerg [Tue, 19 Mar 2013 04:41:13 +0000]
input: misc: sensor drivers

Sensor drivers for MPU, compass, and pressure.
New features include:
- Improved power management
- Completely powers off when not in use.
- Individual axis power control.
- Auto low power accelerometer.
- HW motion detection that gets an IRQ only when orientation changes.
- Improved performance
- Auto detect POR readiness.
- Auto detect reset/error completion.
- HW access only when needed.
- Streamlined execution path.
- Separate reset control.
- Runtime changes only affect the device being changed (removed carpet
          bombing global resets and disable/enables).
- Separate sample rate for each device.  A device not enabled doesn't inhibit
  a faster rate for an enabled device.
- Multiple MPU slave devices.
- Auto detection of MPU slave devices and allowing an external driver for a
  slave device to use or not use the MPU.
- External bypass mode.  Any external driver can control and lock the MPU
  I2C master bypass mode.
- Improved FIFO control.  Support for all devices to use the FIFO.
- Separate reporting rate for each device.
- Improved timestamping by taking a timestamp before and after the sample and
  using the average.
- Allows generic class driver for slave devices.  All drivers conform to a
  standard API.
- Automatically handle configuration steps to enable a device and make run-time
  changes.
- Improved debug support and added a debug API.
- Add BMP180 pressure driver.
- Added compass high speed feature where compass doesn't prevent the MPU
  devices from going faster than 100Hz.  Needed for camera.
- Added support for 8kHz Gyro and 1kHz accelerometer.  Needed for camera.
- Added support to populate Android sensor_t structure from kernel data.

Bug 1212893
Bug 1161345
Bug 930909
Bug 1224709
Bug 1058689
Bug 1030747
Bug 980723

Change-Id: I6fe9934d842e6e6ceb584095006c9f4775673e9a
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/210592
(cherry picked from commit 90e7c6b815a591eb0bac120c8b595766f2196ecb)
Reviewed-on: http://git-master/r/210407
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agocrypto: tegra-se: Change SE DRBG settings
Shravani Dingari [Tue, 5 Mar 2013 09:35:25 +0000]
crypto: tegra-se: Change SE DRBG settings

Change in encryption mode, reseed interval and RNG source
according to the RNG characterization done

Bug 1058470

Change-Id: Ib2f095315a87424ea7989d89b9e73892957aed37
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/206270
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoHACK: ARM: tegra: Disable AHB prefetch for USB
Ramalingam C [Mon, 8 Apr 2013 06:20:48 +0000]
HACK: ARM: tegra: Disable AHB prefetch for USB

USB needs to support IOMMU correctly with dma mapping API. Disable
AHB prefetcher for USB1 and USB3, until it's done.

Bug 1215880

Change-Id: I7ed2f85c71e5001b05cad8741f4eba2f427974fc
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/217198
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: bbc: set LA based on ISO requests
Neil Patel [Fri, 22 Mar 2013 15:03:56 +0000]
ARM: tegra: bbc: set LA based on ISO requests

The BBCR and BBCW LA values should be set based on ISO bw
reservation requests. The BBCLLR LA value should be set for
640 MB/s so that cache misses are not throttled and is not
expected to change.

Bug 1258931

Change-Id: Ibfcc1fac931bab6600d13aee0e43761a10b801ad
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/212156
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frederic Bossy <fbossy@nvidia.com>
Reviewed-by: Stephane Dion <sdion@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agomisc: max77660-sim: sim drv to detect insert/removal
Shawn Joo [Fri, 22 Mar 2013 11:02:10 +0000]
misc: max77660-sim: sim drv to detect insert/removal

this drv sets sim configuration and detect sim insert/removal.
if sim card is detected, sysfs_notify will be called for sim1_state and sim2_state.
user app should poll them and read them to see current slot status.

Bug 1226197

Change-Id: I4f172e7e97f80051a6d244db6ce055aaaf7ede24
Signed-off-by: Shawn Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/212099
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agomfd: max77660: add sim resource
Shawn Joo [Tue, 12 Mar 2013 14:39:41 +0000]
mfd: max77660: add sim resource

Add sim resource for sim drv.
add sim register values.

Bug 1226197

Change-Id: I3313b9ff72d4f50ebd7ee3fbcbcbeaf81477d570
Signed-off-by: Shawn Joo <sjoo@nvidia.com>
Reviewed-on: http://git-master/r/212097
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoinput: touch: raydium: update touch response
David Jung [Wed, 27 Feb 2013 02:22:43 +0000]
input: touch: raydium: update touch response

Nvidia updates to allow touch to work
after resume.

Bug 1225919

Change-Id: If07272550b9c7892e5c02c3e242f219b0a2f68e9
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/204379
(cherry picked from commit 8752e1473ffe5091768da3a777433bc4f536ca8c)
Reviewed-on: http://git-master/r/206429
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: soctherm: Convert from workqueue to threaded ISR
Diwakar Tundlam [Fri, 29 Mar 2013 01:29:27 +0000]
arm: tegra: soctherm: Convert from workqueue to threaded ISR

Bug 1216535

Change-Id: Ie93c60c71f906457393624ccdbeca679eaef2851
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/214278
(cherry picked from commit a00b71483d4f817ba0c09ebdb62205b7c87b8013)
Reviewed-on: http://git-master/r/216947
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: soctherm: Support configuring OC alarms
Diwakar Tundlam [Tue, 19 Mar 2013 07:23:54 +0000]
arm: tegra: soctherm: Support configuring OC alarms

Added support to program throttling when OC alarms are triggered.
Support OC1-OC5 with CPU+GPU throttling with preset throttle depths.
Disable suspend cooling device when any OC alarm is configured.

Enhanced regs debug node to display more information about OC alarm
configuration and status.

Enable OC4 handling for Pluto.

Bug 1206300
Bug 1216535
Bug 1265498

Includes two subsequent commits that delete some lines added before.
  http://git-master/r/215718 and http://git-master/r/216684

Change-Id: I32eb161ce34ae52725e81c1852d5b00a0b88314a
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/211013
(cherry picked from commit 1f26035e199eb6058db7f576a0de34cd3a37a2c7)
Reviewed-on: http://git-master/r/216946
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoextcon: palmas: Remove duplicate interrupt request
Sumit Sharma [Mon, 8 Apr 2013 09:44:53 +0000]
extcon: palmas: Remove duplicate interrupt request

Remove duplicate irq request in extcon driver

Bug 1267769

Change-Id: I47e0e22bd1f222e5f5e4cedc64751fa880089fd9
Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Reviewed-on: http://git-master/r/217284
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra14: clock: Round emc rate up/down
Alex Frid [Sun, 7 Apr 2013 03:14:24 +0000]
ARM: tegra14: clock: Round emc rate up/down

Added support for bidirectional up/down rounding of emc rate.

Change-Id: I9c83db11478fab1894b694d34ce9025fe6ce2ee7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/217116
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>

5 years agoARM: tegra11: dvfs: Update sdmmc dvfs tables
Alex Frid [Tue, 2 Apr 2013 06:44:51 +0000]
ARM: tegra11: dvfs: Update sdmmc dvfs tables

Change-Id: I579627950d5f06c6dd97807a5fd9d0a62c0443f9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/215400
(cherry picked from commit 7df332067b678e6383c795bb5e0e597a3233afaf)
Reviewed-on: http://git-master/r/217111
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: dc: bandwidth check for >3 windows
Jon Mayo [Sat, 6 Apr 2013 02:00:52 +0000]
video: tegra: dc: bandwidth check for >3 windows

Support an arbitrary number of windows with tegra_dc_find_max_bandwidth

Bug 1227640

Change-Id: I830ac3625f77c5b8a59f4db8f47d0171f77772c2
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/217074
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

5 years agovideo: tegra: dc: HDMI audio pixel clock detection
Jon Mayo [Tue, 2 Apr 2013 22:19:51 +0000]
video: tegra: dc: HDMI audio pixel clock detection

Use list of supported pixel clocks from the audio table to select mode.

Change-Id: I5b4aa2210c65694c14301a4ae68b3e16b1c65a5e
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/217073
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoASoC: Tegra: Use separate structure for ahub bbc1
Ravindra Lokhande [Fri, 5 Apr 2013 16:41:43 +0000]
ASoC: Tegra: Use separate structure for ahub bbc1

Ahub bbc1 interface is different from i2s, use newly added structure
for ahub bbc1 interface.

Change-Id: Ie1077c0c9f7fcc5a495ce2248f184ef4f1078111
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/216937
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoarm: tegra14x: Refactor ahub-bbc1 platform data
Ravindra Lokhande [Fri, 5 Apr 2013 16:37:02 +0000]
arm: tegra14x: Refactor ahub-bbc1 platform data

ahub bbc1 interface is different from i2s, use separate structure for
ahub bbc1 link.

Change-Id: I8b217824b2e2c0bd6a0029feb1af734a9886b7ad
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/216935
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agommc: tegra: Code clean up
Naveen Kumar Arepalli [Mon, 1 Apr 2013 07:04:27 +0000]
mmc: tegra: Code clean up

Remove tegra_3x_sdhci_set_card_clock function, same
functionality can be acheived by removing
SDHCI_QUIRK_NONSTANDARD_CLOCK quirk for 3x devices.

Bug 1239457

Change-Id: I7357683fc6cf5c7ced9ca45f93effa75b533d30d
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/214954
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomfd: palmas: fix irq missing issue
Yunfan Zhang [Tue, 26 Mar 2013 07:52:30 +0000]
mfd: palmas: fix irq missing issue

Should NOT disable irq during suspend, or there might be pending
interrupt to abort suspend flow and make the secondary irq not be
processing that will cause PMIC can't detect coming interrupts any more

Bug 1253337

Change-Id: If7d99647b049446fe4ae7dfdc4c95a8c6577af78
Signed-off-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-on: http://git-master/r/212934
(cherry picked from commit eccf19f0dff37ca0dd98c60cf4606c6d7320a8b2)
Reviewed-on: http://git-master/r/214299
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: gadget: tegra: fix NV-charger detection
Xin Xie [Tue, 26 Feb 2013 01:35:22 +0000]
usb: gadget: tegra: fix NV-charger detection

NV charger is using resistor network to set 2.8v/2.0v for D+/D-. Doing
so, we cannot detect SDP and NV-charger reliably. Instead we need:
 * Implement Data Contact Detection mechanism, so SDP and NV-charger can
   be detected reliably.
 * We also need make difference between NV-charger and non-standard
   charger based on D+/D- line status (non-standard charger D+/D- lines
   can be pulled high or low individually, NV-charger D+/D- line is
   always high)

bug 1236790
bug 1234552

Change-Id: I69789f4f66a16bb82dacb428914ecad37942314a
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/207217
(cherry picked from commit 628b6c4ec0e19fb8dba4d67c84a02079aa5f5412)
Reviewed-on: http://git-master/r/214647
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: Add EMC NOP writes for LP1BB exit
Prashant Malani [Thu, 4 Apr 2013 08:25:58 +0000]
ARM: tegra14: Add EMC NOP writes for LP1BB exit

This adds two writes to EMC_NOP which should be a
part of the LP1 exit code to bring DRAM out of
self-refresh.

Change-Id: I833ee2dc5d9fcbee9dbb48ef0b05e6e4b91488e4
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/216423
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: Remove LP1BB exit staging stage
Prashant Malani [Thu, 4 Apr 2013 07:57:06 +0000]
ARM: tegra14: Remove LP1BB exit staging stage

Remove the code that checks LP1BB exit cause and
goes back to LP1 if wake source was only mem_req.
Instead, wake to active always.

Bug 1257433

Change-Id: I3ab79ab336b84119f46d8fb3611330b905557163
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/216422
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: Improve LP1BB branch code
Prashant Malani [Thu, 4 Apr 2013 07:50:55 +0000]
ARM: tegra14: Improve LP1BB branch code

Once mem_req and mem_req_soon are checked,
we should immediately jump to lp1bb entry
routines and not change the PMC_IPC_STS
or FLOW_IPC_STS register, even they get
restored later.

Bug 1257433

Change-Id: I7dc3732bbfe3b60fd047dd0b783235d66f3816e4
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/216421
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: dvfs: Update dispX CORE DVFS entries
Prashant Malani [Mon, 1 Apr 2013 22:22:52 +0000]
ARM: tegra14: dvfs: Update dispX CORE DVFS entries

Update disp1 and disp2 CORE DVFS entries based
on tables of 4/1/2013.

Bug 1246952

Change-Id: If1a703267bc0f5e0e00e3d31084a1b5093119b25
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/215238
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoregulator: palmas: use correct bit for finding smps enabled or not
Laxman Dewangan [Fri, 15 Mar 2013 10:44:22 +0000]
regulator: palmas: use correct bit for finding smps enabled or not

SMPS registers are cached for higher performance on voltage control
and hence it need to check the proper bits for enabled or not in place
of volatile bits.

bug 1250602

(Chwerrypicked commit e41a88761055f0198a06a6775d413bf0ff574273)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/209976

Change-Id: I8d2e1fca3926c551523a616b605ac5fd93352c33
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/216437
GVS: Gerrit_Virtual_Submit

5 years agomfd: palma: enable cache of SMPS regulator register.
Laxman Dewangan [Tue, 19 Feb 2013 07:36:46 +0000]
mfd: palma: enable cache of SMPS regulator register.

Enable caching of SMPS regulator registers. This reduces
the number of i2c transaction from 7 to 1 when changing
voltage of rail.

bug 1238267

(Cherrypicked commit d6330823db19136d97fcb92fc8707fc5de7b78f5)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/201949

Change-Id: Ida1d1c3a634c1e3c1bf8a8b008aea17aeaa5ced3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/216436
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoregulator: palmas: implement sleep mode configuration
Laxman Dewangan [Mon, 18 Feb 2013 14:39:00 +0000]
regulator: palmas: implement sleep mode configuration

Palma is having different set of bits to configure sleep mode.
Implement the set_sleep_mode for core to configure these bits.

(Cherrypicked commit
fd47bb26916024af70c053ed085129d72d50d756)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/201793

Change-Id: If78c95a3da5a1f875d8588a997c85f1bf01c9638
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/216435
GVS: Gerrit_Virtual_Submit

5 years agoregulator: add support for sleep mode configuration
Laxman Dewangan [Mon, 18 Feb 2013 14:37:37 +0000]
regulator: add support for sleep mode configuration

Some of PMIC like Palma support different bits for configuring
rail's mode which is used in sleep mode of device.

Add support for configuring this mode bits.

(Cherrypicked commit
ebdacaa4bf7e5801d2b0fa70601c7be5c106e402)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/201792

Change-Id: Ib1bbc5164bf71c75c727dc759436e8dcf206f511
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/216434
GVS: Gerrit_Virtual_Submit

5 years agoregulator: palmas: implement errata for ES1.0,ES2.0 and ES2.1
Laxman Dewangan [Sat, 9 Feb 2013 19:36:38 +0000]
regulator: palmas: implement errata for ES1.0,ES2.0 and ES2.1

The device has the errata and sw need to implement the WAR for
proper functioning of the device.

The errata are:
1. SMPS- slew rate (TSTEP) is slower than expected
-----------------------------------------------
when output voltage target is close to previous one

IMPACT: The settling time is greater than specified slew rate in
register map and datasheet for voltage scaling of the SMPS.

DESCRIPTION: Measurement done on WCSP ES2.0, SMPS8, SMPS6, SMPS12
for TSTEP=0x02(5mV/us)
- step from VOUT= 0.5v to 1.65V ==>slew rate is around 5mV/us
- step from VOUT= 0.96v to 1.04V ==>slew rate is around 2.5mV/us
for TSTEP=0x03(2.5mV/us)
- step from VOUT= 0.5v to 1.65V ==>slew rate is around 2.5mV/us
- step from VOUT= 0.96v to 1.04V ==>slew rate is around 1.6mV/us

WORKAROUND: Adapt wait time using above value.

REVISION IMPACTED: ES1.0/ES2.0/ES2.1

2. LDO8_TRACKING: PD in tracking mode
-------------------------------------
IMPACT: Higher consumption and performance impact when LDO8 is set in
tracking mode and LDO is set to have its pull down enabled in OFF mode.

DESCRIPTION: When LDO8 is set in tracking mode and the LDO is set to have
its pull down enabled in OFF, the pull down is also enabled in ACTIVE mode.

WORKAROUND: In tracking mode, bit7 of LDO_PD_CTRL1 register must be set to 0.
When LDO8 is disabled, to have the pull down, bit7 of LDO_PD_CTRL1 register must
then be set to 1.
 In LDO8 regulation mode, behavior is the same as the other LDOs.

REVISION IMPACTED: ES 2.1 ES2.0 ES1.0

bug 1228386
bug 1195226

(Cherrypicked commit c234ec797037e4168a0ce1f87b19347e71d6b909)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/199132

Change-Id: Ib19a21cb722b1bc07d93a0cf866c134672ef8735
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/216432
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: isomgr: Add test mode support
Krishna Reddy [Tue, 2 Apr 2013 00:19:03 +0000]
arm: tegra: isomgr: Add test mode support

Added test mode support to allow test code take over
isomgr for running tets.
Fix debug code assert issue with margin api usage.

Change-Id: I618d23882639be5fa1a4fe705cabdcd94f967267
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/215282
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>

5 years agomisc: tegra-baseband: Add GCOV_PROFILE
Konsta Holtta [Thu, 4 Apr 2013 06:53:56 +0000]
misc: tegra-baseband: Add GCOV_PROFILE

Include tegra-baseband in GCOV profiling when enabled by defconfig.

Change-Id: Ibe6bcc388ac42ffc0050a79dd321292ce5e990e1
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/216406
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: dsi: update display dvfs.
Kevin Huang [Mon, 1 Apr 2013 21:33:01 +0000]
video: tegra: dsi: update display dvfs.

DSI switches mode between LP and HS when display access/exit suspend
mode. Each mode corresponds to different clock rate. Update dc dvfs
when mode is changed.

Bug 1260913

Change-Id: I95b55b2795f659af487c863de9fe0332ca7f5014
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/215194
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: pluto: Change LP1 core voltage
Daniel Solomon [Sun, 17 Mar 2013 22:25:07 +0000]
ARM: tegra: pluto: Change LP1 core voltage

Increase LP1 VDD_CORE voltage from 0.9V to 0.95V due
to low temperature qualification data.

Bug 1035684

Change-Id: I1c75d207d7ed814334d3be4ef1c92bb32c557731
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
(cherry picked from commit 5e31452209ea932d2fe11c8006b5daa1abe1d960)
Reviewed-on: http://git-master/r/215321
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: Board files settings for LP1 Low Core Voltage
Karthik Ramakrishnan [Fri, 25 Jan 2013 03:35:10 +0000]
arm: tegra: Board files settings for LP1 Low Core Voltage

Set the register values for each of the board files to
keep the Core voltage to 0.9V in LP1 in Pluto.

This change is only for those platforms where LP1 is supported.
Dalmore and Roth is not needed.

This change is part of the feature to set VCore to lowest Core
Voltage in LP1
Refer to http://git-master/r/194011 for more details
Bug 1035684

Change-Id: I838bd3b65bab85ae5870b59ac2be6611abbbb075
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Signed-off-by: Hunk Lin <hulin@nvidia.com>
(cherry picked from commit 9e20091237aaae55d171f5100c662a4f32ac8acb)
Reviewed-on: http://git-master/r/194261
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: macallan: using soc_them as cooling devices for DVFS.
Hayden Du [Tue, 19 Mar 2013 02:09:32 +0000]
arm: tegra: macallan: using soc_them as cooling devices for DVFS.

As macallan don't have ext NCT installed, need using onchip therm as
cooling devices for DVFS.

bug 1254951

Change-Id: I9088c6c8d41495ddd531ae2cb51e396fb3dd8fc4
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/210571
(cherry picked from commit d97fb92e43483070372d289c9813332bc1e82346)
Reviewed-on: http://git-master/r/215357
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: dvfs: Specify CL-DVFS tuning margin in mV
Alex Frid [Fri, 5 Apr 2013 06:09:34 +0000]
ARM: tegra: dvfs: Specify CL-DVFS tuning margin in mV

Changed CL-DVFS tuning threshold margin specification from LUT steps
to mV. This change made margin independent of LUT granularity.

Change-Id: Id25d419a4f32eaf6767cd966a78c9a372de3c1f2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/216790
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: dvfs: Update CL-DVFS calibration
Alex Frid [Fri, 5 Apr 2013 04:56:22 +0000]
ARM: tegra11: dvfs: Update CL-DVFS calibration

Enter CL-DVFS DVCO minimum rate calibration procedure whenever the
last requested rate is below minimum rate (instead of indirect check
for output skipper status and estimated voltage).

Change-Id: I55d04141d6323b3719c7c8b6c34d4cd07cce5c21
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/216789
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Hide CL-DVFS skipper rate fluctuation
Alex Frid [Thu, 28 Mar 2013 22:54:45 +0000]
ARM: tegra: dvfs: Hide CL-DVFS skipper rate fluctuation

Return stored requested rate in DFLL get rate operation when target
is below dvco minimum, and output clock skipper is engaged. Skipper
output rates ladder is no longer constant, since dvco minimum rate
calibration was recently introduced. As a result get/set rate calls
in a loop while dvco minimum rate is fluctuating may cause rounding
spiral in either direction. Returning requested rate "as is" allows
to avoid such spiral.

This approach also helps in case when get/set rate loop is executed
across switch between DFLL and PLL. Therefore, now it is possible to
round target rate to the closest skipper output (before rounding up
was used to compensate PLL rounding down)

Bug 1262225

Change-Id: I6840f760cac688d9155fcabd1e14e2449531bdcb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/214414
(cherry picked from commit 6cf8ee2b6c43b9706ab6128f68d0cc65da677fa9)
Reviewed-on: http://git-master/r/216767
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agosecurity: nv_tee_driver: add return origin & input/output param support
Scott Long [Wed, 13 Mar 2013 02:56:16 +0000]
security: nv_tee_driver: add return origin & input/output param support

This change adds basic support for setting the return origin code
for TA service calls.

It also adds support for moving TEE params tagged as output-only
or input/output properly on OpenSession and InvokeCommand ops
from the requesting client (NS user-mode client or another TA)
to the target task and back.

* the nv_tee_driver code was restructured such that all of the
  TEE-specific handling code is now in tee_comms.c; main.c handles
  only very basic top-level API processing

* attempted to clear up return code handling; the top-level ioctl now
  only fails if a bad cmd type is sent in or there is a problem w/user
  buffer handling; once the request gets sent over to tee_comms.c then
  any errors are propogated back via the TEE_Request->result/
  TEE_Request->result_origin fields

* modifed testapp and trusted_app to test the ability to modify
  in/out params to both an OpenSession and InvokeCommand request.

Tested w/tot by running the testapp and testapp_wv multiple times.

Signed-off-by: Scott Long <scottl@nvidia.com>
Change-Id: Ie494384db0e6f47a8eaac7606d80b986390c3133
Reviewed-on: http://git-master/r/211636
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>

5 years agosecurity: nv_tee_driver: kernel driver for tlk
Vandana Salve [Mon, 10 Dec 2012 23:29:06 +0000]
security: nv_tee_driver: kernel driver for tlk

Added basic driver support, ioctl interface
Added support to lock the temporary and the shared memory buffers
Added command parameter descriptor free and used lists
Added shmem descriptor to keep track of pinned buffer
Added support to unpin temp buffers

Change-Id: I048c72bcf98ce0e75264144e66a1f8759b0ba0fe
Reviewed-on: http://git-master/r/169837
Reviewed-on: http://git-master/r/190658
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/212074
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>

5 years agopower: max77665: refactor err code handling
Xin Xie [Thu, 28 Mar 2013 06:38:48 +0000]
power: max77665: refactor err code handling

Bug 1242272

Change-Id: I9dc9d0578557f2de5f3e11c3779f5f3a89bf364b
Signed-off-by: Xin Xie <xxie@nvidia.com>
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/207404
(cherry picked from commit 94db8a56ae1334b0e6fa152ca9ace86acb827554)
Reviewed-on: http://git-master/r/214663
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoasoc: aic326x codec: Switch off MiniDSP during Playback
Vijay Mali [Thu, 14 Mar 2013 05:38:02 +0000]
asoc: aic326x codec: Switch off MiniDSP during Playback

Use "Low Power Playback" mode does not require MiniDSP.
Switch off minidsp during playback usecase.

Bug 1238662

Reviewed-on: http://git-master/r/209428
(cherry picked from commit 6321b6d70aa4f010da100e9cca2ac9f0d556d208)

Change-Id: I1b639ef18ca5b5f65c1b5c4bb5a7242e9d9339b3
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/214807
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra14: CPU DVFS tables update
Seshendra Gadagottu [Mon, 25 Mar 2013 21:06:13 +0000]
ARM: tegra14: CPU DVFS tables update

Updated CPU DVFS tables with new silicon validation data.
Cpu process id's are updated based on cpu speedo value and
separate table is defined for each cpu process id.

Increased maximum CPU clock speed to 2.1 GHz based on new
silicon validation data.

Change-Id: Iab73020fcacded5db9d9f02605e625d1a0f3a169
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/212779
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra14: Set max cpu frequency to 2014.5MHz
Seshendra Gadagottu [Thu, 21 Mar 2013 22:41:51 +0000]
ARM: tegra14: Set max cpu frequency to 2014.5MHz

Maximum fast cluster CPU frequency is limited to 1989MHz
though it can go upto 2014.5MHz because max rate setting
in tegra14_clocks.c. To fix this, fast cluster CPU max
rate is updated to 2014.5MHz.

Change-Id: I604803c771abcd0d76cf708139ce57782e361191
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/211858
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agommc: sdhci: Use SDHCI Quirks to fix t30 h/w issue.
Naveen Kumar Arepalli [Tue, 2 Apr 2013 10:13:30 +0000]
mmc: sdhci: Use SDHCI Quirks to fix t30 h/w issue.

Use SDHCI_QUIRK_DISABLE_CARD_CLOCK quirk to disable
card clock before internal clock
Use SDHCI_QUIRK_DO_DUMMY_WRITE quirk to do a dummy write

Bug 1239457

Change-Id: I35f66f59303f9b58b17b66c5f83cdd8d14facdc3
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/215477
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: thermal: Update due to struct_est_data modification
Jinyoung Park [Thu, 21 Mar 2013 08:48:08 +0000]
ARM: tegra: thermal: Update due to struct_est_data modification

Updated initialization of skin_data because struct therm_est_data in
include/linux/therm_est.h is modified; adding multiple trip points,
removing get_temp callback in struct therm_est_subdevice, and changing
type of devs from flexible array to pointer.

Bug 1233363
Bug 1236444

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211124
(cherry picked from commit 94c53ea26b58197b698014ec1581fe3fecb0c008)

Change-Id: Id170d06ddcffbe546b01003e49fe327f361df4b3
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/215545
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agodrivers: misc: therm_est: Change flexible array to pointer
Jinyoung Park [Thu, 21 Mar 2013 10:58:42 +0000]
drivers: misc: therm_est: Change flexible array to pointer

Changed type of devs from flexible array to pointer in struct therm_est_data.

Bug 1233363
Bug 1236444

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211612
(cherry picked from commit 9fc6a54f282f858b1fb55e6b46c142d4482345e4)

Change-Id: Ic2c9591314aca8e3bea28b85bf53327c5c73039f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/215544
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agodrivers: misc: therm_est: Add therm_est_subdev_get_temp function
Jinyoung Park [Thu, 21 Mar 2013 07:59:54 +0000]
drivers: misc: therm_est: Add therm_est_subdev_get_temp function

Added therm_est_subdev_get_temp function instead of get_temp callback in
struct therm_est_subdevice in order to remove redeundancy code.

Bug 1233363
Bug 1236444

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211539
(cherry picked from commit 02ebe3a815127af786292d1a7d144277aa966b63)

Change-Id: If1126f9227b6821a79ed1d9718ed4cd7cea3c540
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/215543
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agodrivers: misc: therm_est: Add multiple trip points support
Jinyoung Park [Thu, 21 Mar 2013 07:44:38 +0000]
drivers: misc: therm_est: Add multiple trip points support

Replaced cdev_typa and trip_temp to struct thermal_trip_info to support
multiple trip points on therm_est.
And the struct thermal_trip_info has hysteresis for trip temp. So applied
hysteresis to trip temp.

Bug 1233363
Bug 1236444

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/211123
(cherry picked from commit d832906d904916a263c831d1bf55031070818991)

Change-Id: I6ce2806a323c25ec298291d1e4ee067c3adaebfa
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/215542
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoarm: tegra14: clock: fix Coverity Null dereference issue
Deepak Nibade [Thu, 4 Apr 2013 11:55:17 +0000]
arm: tegra14: clock: fix Coverity Null dereference issue

remove unnecessary null check
Coverity id : 22172

Bug 1046331

Change-Id: I46beb57d180067f4d3de5180ae54544f648027ca
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/216486
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agopower: max77660: removing old max7760-charger driver file
Darbha Sriharsha [Thu, 4 Apr 2013 13:59:13 +0000]
power: max77660: removing old max7760-charger driver file

This change is intended to delete max7760-charger driver file that
is now obsolete and the associated header file.

Bug 1178638

Change-Id: I0b75123b5f10b1a75d6b162cb47235de181f9d3c
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/216517
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agomfd: max77660: Add resource entry for charger wdt interrupt
Darbha Sriharsha [Thu, 4 Apr 2013 13:22:35 +0000]
mfd: max77660: Add resource entry for charger wdt interrupt

This change is intended to add a resource entry for
the max77660 charger watchdog timer interrupt

Bug 1178638

Change-Id: I9c0e951f92addfcf123ab00c47935a987e418ca1
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/216507
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra11x: Enable ARM_ERRATA_798181
Bo Yan [Fri, 15 Mar 2013 04:46:30 +0000]
ARM: tegra11x: Enable ARM_ERRATA_798181

Change-Id: I533f1965a93694484a910723c77454a0bd9e5fe0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/209853
(cherry picked from commit 1927a8824de27eea314d7b1a4ac08741edb6daba)
Reviewed-on: http://git-master/r/216187
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomedia: video: edp states not available info
Bibek Basu [Mon, 25 Mar 2013 04:12:02 +0000]
media: video: edp states not available info

This patch changes the EDP states not available from
platform data, warning message into a info message
in kernel log.

Bug 1249598

Change-Id: I957f26d93967cc3f74ee206b2e29783b0e07fc97
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/212450
(cherry picked from commit ada211703028b83fe3c3f0deefb290169d532256)
Reviewed-on: http://git-master/r/214899
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoTI Bluetooth: Adding TI Host Wakeup Driver changes
Anita Kar [Wed, 3 Apr 2013 09:23:55 +0000]
TI Bluetooth: Adding TI Host Wakeup Driver changes

Signed-off-by: Raghavendra Shenoy Mathav <raghavendra.shenoy@ti.com>

Bug 1179655

Change-Id: I904ed2d392b6ff8fbfb00e949f470542387aace4
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197395
(cherry picked from commit 4ee03e6f06df0581272a5899267dd295279d2a4c)
Signed-off-by: Anita Kar <akar@nvidia.com>
Reviewed-on: http://git-master/r/215507
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoTI Bluetooth: Adding TTY HCI driver
Anita Kar [Wed, 3 Apr 2013 08:38:12 +0000]
TI Bluetooth: Adding TTY HCI driver

Signed-off-by: Raghavendra Shenoy Mathav <raghavendra.shenoy@ti.com>

Bug 1179655

Change-Id: Id8a859b421d5829b38738f27a47ca7a989854113
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/196969
(cherry picked from commit 9f7f9fcf9efa0f4c945a9c68a93ce45021f68ebd)
Signed-off-by: Anita Kar <akar@nvidia.com>
Reviewed-on: http://git-master/r/215506
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: config: enable ST_HCI and ST_HOST_WAKE configs
Anita Kar [Wed, 3 Apr 2013 08:49:33 +0000]
ARM: tegra: config: enable ST_HCI and ST_HOST_WAKE configs

Bug 1179655

Change-Id: Idf4bfa33f19654e1acff5d0ef42398352daff281
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197404
(cherry picked from commit f63e41b4f4e0ff5ad6cf23e8c2e677643e79216c)
Signed-off-by: Anita Kar <akar@nvidia.com>
Reviewed-on: http://git-master/r/215478
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: macallan: enable support for wl8
Anita Kar [Wed, 3 Apr 2013 07:53:42 +0000]
ARM: tegra: macallan: enable support for wl8

Bug 1179655

Change-Id: I98ced4d3f59127316a138c421b14609e3bdfe86b
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/197398
(cherry picked from commit 6f789639e36dd15fb7dc00faf5cb5e0dcb1ad2dd)
Signed-off-by: Anita Kar <akar@nvidia.com>
Reviewed-on: http://git-master/r/215475
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: dsi: Remove extra reference clks
Animesh Kishore [Tue, 2 Apr 2013 15:48:42 +0000]
video: tegra: dsi: Remove extra reference clks

Bug 1264864

Change-Id: Ibbe9fa0305ae100f803fcacf85efb8d4131749e3
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/215594
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: pluto: Fix pinmux for tearing signal
Animesh Kishore [Tue, 2 Apr 2013 15:46:38 +0000]
arm: tegra: pluto: Fix pinmux for tearing signal

pin KBC_ROW6 must be muxed to DISPLAYA_ALT.

Bug 1264864

Change-Id: I2e13350d9834b0da3c9fb7264104e727b6aecb70
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/215593
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoARM: tegra: clock: Verify initial cbus pll descendants
Alex Frid [Sun, 17 Mar 2013 06:45:19 +0000]
ARM: tegra: clock: Verify initial cbus pll descendants

During clock initialization verified that children of cbus plls are
either disabled or known cbus clients (the latter will be backed up
on different pll while cbus pll is re-locked).

Change-Id: Ic03caf204e6d96b2ece0dbb8d80c44836c42590b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/210236
(cherry picked from commit dc42b8641fb8a2c31a30eddfe8be15364d60b299)
Reviewed-on: http://git-master/r/214831
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>