5 years agoregulator: tps65090: align driver with mainline
Laxman Dewangan [Thu, 4 Jul 2013 12:50:24 +0000]
regulator: tps65090: align driver with mainline

Aligning the tps65090 regulator driver with mainline driver
with keeping additional feature like setting of wait time of FETs.

bug 1242876

Resubmitting change http://git-master/r/243422 whic was reverted due
to sanity failure due to other change.

Change-Id: I90d974ad3fc862096f0748450c2ff6a94a3797c3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/253253
Reviewed-by: Automatic_Commit_Validation_User

5 years agoasoc: tegra: fix Coverity issues of resource leak
Deepak Nibade [Thu, 25 Jul 2013 05:55:47 +0000]
asoc: tegra: fix Coverity issues of resource leak

- add kfree in error paths which can result into
  possible memory leak
  Coverity id : 23675
  Coverity id : 23676
  Coverity id : 23747

Bug 1329327

Change-Id: Ie2f27029cd3c72cf35f29877a4935f7b22887665
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/253227
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agovideo: tegra: remove VIM2_CLK control from T148
Frank Chen [Wed, 10 Jul 2013 01:49:21 +0000]
video: tegra: remove VIM2_CLK control from T148

Sensor clock gate is now controlled by mclk virtual
driver.

Bug 1306878

Change-Id: I0aa1c6aa8c589a3d2e9e15ab413a0d348ebd9b22
Signed-off-by: Frank Chen <frankc@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/246952
(cherry picked from commit 3dd8008e1d150917f68c70abb145103ee0684bed)
Reviewed-on: http://git-master/r/253168
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra14: clock: Add virtual mclk for camera
Frank Chen [Wed, 10 Jul 2013 01:43:59 +0000]
ARM: tegra14: clock: Add virtual mclk for camera

Add a virtual clock to control sensor mclk and
clock gate.

Bug 1306878

Change-Id: I8f9ecde5e522b504df0ab66655ce5e9181106a85
Signed-off-by: Frank Chen <frankc@nvidia.com>
Signed-off-by: David Schalig <dschalig@nvidia.com>
Reviewed-on: http://git-master/r/246951
(cherry picked from commit 024e9b8f3c53e0bd99d1e2e544170e8493f19b11)
Reviewed-on: http://git-master/r/253167
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

5 years agoARM: tegra: tn8 : update power rail accordingly
Ahung Cheng [Tue, 9 Jul 2013 05:56:50 +0000]
ARM: tegra: tn8 : update power rail accordingly

- Update rails - pwrdet, hdmi, backlight and ddr.
- Add smps45 constraint for vdd_gpu.
- Disable roof_floor for smps45 since external gpio control is not ready in gpu init path.
- Correct init_mode for smps10 and ldo8

Bug 1313128

Change-Id: I7f3c8cdd3b75353e008e676ff399242e1203b4ca
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/250549
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: laguna: ffd: Select native eDP for Laguna FFD
Hayden Du [Thu, 25 Jul 2013 01:02:54 +0000]
arm: tegra: laguna: ffd: Select native eDP for Laguna FFD

Change-Id: I09ea84f6d594df42870580e882b978a23b33d11b
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/253132
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra11: clock: Keep PLL_REFE enabled during init
Alex Frid [Wed, 24 Apr 2013 21:06:40 +0000]
ARM: tegra11: clock: Keep PLL_REFE enabled during init

Enabled PLL_REFE in early kernel initialization, to provide clock for
h/w sequencers initialization. PLL is disabled in late init.

Bug 1275799

Change-Id: Ie79a3f0989fb3a40714659c7ed082dce2d004d5c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/222651
(cherry picked from commit 2578047dd47e02a396f1318200e5abc79edd52be)
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/253047
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agousb: gadget: tegra_udc: fix Coverity issues
Deepak Nibade [Wed, 24 Jul 2013 12:39:38 +0000]
usb: gadget: tegra_udc: fix Coverity issues

- fix missing NULL check which might result into
  dereferencing NULL pointer
  Coverity id : 23657
  Coverity id : 23658

Bug 1329327

Change-Id: I58621f9eb92470b3ca8007d6d9ecb430d853fa6e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/252905
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agovideo: tegra: dc: add missing break statement
Deepak Nibade [Wed, 24 Jul 2013 08:28:42 +0000]
video: tegra: dc: add missing break statement

fix Coverity issue
Coverity id : 23737

Bug 1329327

Change-Id: I57c0c61effbec506a60806b447ccd283568ba854
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/252803
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoregulator: palmas: add support to control rail through gpios
Laxman Dewangan [Tue, 23 Jul 2013 12:48:52 +0000]
regulator: palmas: add support to control rail through gpios

Add support for the enable/disable rails through GPIO by configuring
rails to external control and providing proper GPIOs number.

bug 1325148

Change-Id: I1d80ff80fb39ed1e65ab73e43bf4741894913076
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/252404
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: laguna: Set init voltage for vdd_gpu
Pradeep Goudagunta [Thu, 11 Jul 2013 10:30:10 +0000]
ARM: tegra: laguna: Set init voltage for vdd_gpu

Set initial voltage constrain for vdd_gpu as 1V.

Bug 1321163

Change-Id: I2c7e85b78eeffd648e30399cf3f0facf263a30df
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/247791
(cherry picked from commit 3a7a2a5f66754b669b479d0895f5b5a7cf2a2544)
Reviewed-on: http://git-master/r/252330
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo:tegra:gk20a: support sw methods for compute
Kirill Artamonov [Sat, 20 Jul 2013 22:56:23 +0000]
video:tegra:gk20a: support sw methods for compute

Add interrupt handler for sw compute method.

bug 1320933

Change-Id: I207ed70d292fea573ac2facc4b34122ef9eb45d5
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/251644
(cherry picked from commit d8cc83afef55c05b5299c3ccf491a66af06579f4)
Reviewed-on: http://git-master/r/251694
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo:tegra:gk20a: increase gr idle timeout
Kirill Artamonov [Sun, 21 Jul 2013 04:46:20 +0000]
video:tegra:gk20a: increase gr idle timeout

10 ms timeout can be easily exceeded by a single drawcall.
Use timeout setting defined in Kconfig for nvhost.

Fix timeout implementation for gk20a_fifo_preempt_channel.

bug 1326868
bug 1324432

Change-Id: I430ab4b1f60fd0fc5f84ace55c7f31087bd4599b
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/249964
(cherry picked from commit e7d722830705cbaef8ceb73adc21780c01182810)
Reviewed-on: http://git-master/r/251693
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo:tegra:gk20a: add debugfs knobs for gk20a
Kirill Artamonov [Wed, 10 Jul 2013 00:35:25 +0000]
video:tegra:gk20a: add debugfs knobs for gk20a

Add bool /d/gk20a/timeouts_enabled to enable timeout
detection for gr engine.

Add u32 /d/gk20a/gr_idle_timeout_default_us to tune
timeout value for gr engine.

Add u32 /d/tegra_host/timeout_default_ms to tune
timeout value for nvhost. Default timeout for jobs
in milliseconds. Set to zero for no timeout.

Change-Id: I98ecb77c070ccafbb9e1b0079a85d9a7fef2369c
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/249403
(cherry picked from commit d8658c8bcc5e7c7db6233ab3e1bb377f02f2ad41)
Reviewed-on: http://git-master/r/251692
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agomedia: video: tegra: implement PCL kerner driver
Charlie Huang [Thu, 6 Jun 2013 01:40:07 +0000]
media: video: tegra: implement PCL kerner driver

Implement unified PCL (physical camera layer) kernel driver. It will
virtualize all camera device driver to minimize kernel development.
Instead, camera devices can be configured and controlled solely from
the user space.

bug 1272149

Change-Id: I94614206e94895221e1697f65185e356887b1de3
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/243508
(cherry picked from commit a9be39befa080a7eefeb469e6a73d4e409388b0f)
Reviewed-on: http://git-master/r/247526
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: tegra14: dvfs: fix thermal vdd_cpu min issue
Seshendra Gadagottu [Wed, 12 Jun 2013 19:47:01 +0000]
ARM: tegra14: dvfs: fix thermal vdd_cpu min issue

Thermal trigger points for temperature dependent minimum
voltage for vdd_cpu is not registered correctly. The issue
wrong offset is corrected.

Bug 1241396

Change-Id: I93dcd57ced90f906a318c02579900f2d6cefa773
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/239353
(cherry picked from commit 5e97c40f6f442c14ab7cec6a8100e7846e704dde)
Reviewed-on: http://git-master/r/247329
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra14: dvfs: Update 3d dvfs tables
Seshendra Gadagottu [Tue, 11 Jun 2013 02:26:46 +0000]
ARM: tegra14: dvfs: Update 3d dvfs tables

Update 3d dvfs clock tables based on latest
silicon validation data.

Bug 1246952

Change-Id: Ibe3e09e5047894b750cb1a1bd2ff7c47c8727593
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/239352
(cherry picked from commit 7618cfbdb42d40359b1b20993be3b18ada0605c2)
Reviewed-on: http://git-master/r/247328
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agomach-tegra: allow bluedroid_pm as module
Mursalin Akon [Fri, 19 Jul 2013 21:53:24 +0000]
mach-tegra: allow bluedroid_pm as module

All inclusion of platform data when
bluedroid_pm is configured as module.

Bug 1229035
Bug 1319882

Change-Id: I68cf03a9650fc9a4e97a6db5b3a0c035b5d013a8
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/251508
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

5 years agoregulator: max77660: Unmask ext control only when needed
Laxman Dewangan [Mon, 22 Jul 2013 11:30:29 +0000]
regulator: max77660: Unmask ext control only when needed

In place of unmasking ext control configuration, unmask only
when it is configured through regulator platform data.

bug 1327647

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/251910
(cherry picked from commit 2de6f022e611c89ca43d19646dcb9737ac39b1f5)

Change-Id: I1d7cb4fd7d9833238452262fa7d5be7593b264c1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/252816
Reviewed-by: Automatic_Commit_Validation_User

5 years agoregulator: max77660: do not disable rail if external control
Laxman Dewangan [Wed, 24 Jul 2013 08:43:12 +0000]
regulator: max77660: do not disable rail if external control

If any rail is selected for the external control then do not
disable the rail manually.

Also enable the always-on for externally controlled rail.

Enable the full regualtor constraint to disable the unused rails.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/245102
(cherry picked from commit 00f7dd682c3ef702e4228f375b586ab590533956)

Change-Id: Ie60bfec0ed077312fd5014cb25cc0a754cacfe35
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/252815

5 years agoARM: tegra: dalmore: sdhci platform registration
R Raj Kumar [Wed, 24 Jul 2013 05:00:37 +0000]
ARM: tegra: dalmore: sdhci platform registration

Enabled sdhci registration through platform.
Set max clock limit to 156MHz for eMMC, SD and SDIO.

Bug 1249335

Change-Id: Id4893e4117693d94dc180b05bc01fa91cb4d6f59
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/252738
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Jeetesh Burman <jburman@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agommc: tegra: full win should be 50% of partial win
R Raj Kumar [Wed, 17 Jul 2013 11:50:07 +0000]
mmc: tegra: full win should be 50% of partial win

Continue tuning procedure for full window calculation,
for the full window size is greater or equal to 50% of
partial window size, else choose partial window.

Bug 1320353

Reviewed-on: http://git-master/r/250260
(cherry picked from commit c9c82cd6ae70e5bab292680f34269f09ae7b25d4)
Change-Id: Ibe8e800cfcb106976bedd51e1be3b38fe3904d8f

Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Change-Id: Iaf3fc1dad0a1ee9928ab8c8eae795db048048a8e
Reviewed-on: http://git-master/r/252339
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agommc: tegra: fix no marginal window case condition
R Raj Kumar [Mon, 15 Jul 2013 11:27:06 +0000]
mmc: tegra: fix no marginal window case condition

Fix the condition of partial window quality when there is no marginal
window for both windows.

Bug 1320353

Reviewed-on: http://git-master/r/249167
(cherry picked from commit 9c754a628a9e9469b78668ad1097b192e8d61874)
Change-Id: Ifd5f9b6db4c64182d7508bc8e09c1374cdc944fe

Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Change-Id: I126d4322ea42b336d07edddf1fb75781d1ccef18
Reviewed-on: http://git-master/r/252338
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agovideo: tegra: fix gk20a space alloc
Kevin Huang [Tue, 25 Jun 2013 18:33:07 +0000]
video: tegra: fix gk20a space alloc

Validate gmmu table in buffer map.
Return offset rather than page number.

Bug 1240060.

Change-Id: I54b569ee21558025988b4cf7c8874d7924f4dc65
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/252195
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashish Srivastava <assrivastava@nvidia.com>
Tested-by: Ashish Srivastava <assrivastava@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agoARM: tegra: ardbeg: register UTMI3 along with UTMI2
Rohith Seelaboyina [Tue, 16 Jul 2013 10:09:40 +0000]
ARM: tegra: ardbeg: register UTMI3 along with UTMI2

USB 2.0 controller registers UTMI3 along with UTMI2
as UTMI3_XUSB_PORT_OWNER bit is not allocated
through the odmdata.

Change-Id: Ib6bfc28aedbe0fef8d7a8de1e2cb19ca16cf5dca
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/249621
(cherry picked from commit 819b419d8fa4816acd5122757ac47f45294fb1c9)
Reviewed-on: http://git-master/r/251895
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: fuse: add api for chip minor revision
Naveen Kumar S [Thu, 4 Jul 2013 16:10:06 +0000]
arm: tegra: fuse: add api for chip minor revision

Added function tegra_get_minor_rev() to return minor revision number
of the chip.

Bug 1166110

Change-Id: I087331433cabb35c05fa2ce0bd53013b6fb6624f
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/245330
(cherry picked from commit f29df745d2e97c0feb5f9c195202ca55041fa14c)
Reviewed-on: http://git-master/r/251206
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bryan Wu <pengw@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: change pr_info() to pr_debug()
Shravani Dingari [Thu, 11 Jul 2013 07:11:46 +0000]
ARM: tegra: change pr_info() to pr_debug()

Use pr_debug() instead of pr_info() in
tegra_suspend_check_pwr_stats() as it is blocking
multiple lp0 entries

Bug 1234330

Change-Id: I32c202a58f6ad554efcec030a00f24dd6af52eec
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/247694
(cherry picked from commit 99fe62bebc2675d21ab4753d319d284e527eb25f)
Reviewed-on: http://git-master/r/250699
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: host: tegra: fix delay in driver remove properly
Rohith Seelaboyina [Thu, 27 Jun 2013 12:40:29 +0000]
usb: host: tegra: fix delay in driver remove properly

mdelay is replaced with msleep as the earlier blocks
the cpu and a hang is observed

Bug 1299561

Change-Id: I2c644a6af95ee014a21df2ab6e5d649fc796ee3d
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/243763
(cherry picked from commit c08d3dee06dea7d01d481d1e39c7af09f055921f)
Reviewed-on: http://git-master/r/250674
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: otg: tegra: enable vbus during LP0 resume
Rohith Seelaboyina [Mon, 24 Jun 2013 05:19:09 +0000]
usb: otg: tegra: enable vbus during LP0 resume

enable vbus while resuming from LP0,when ID is low
and vbus is turned before going to LP0

Bug 1298859

Change-Id: I25c03673af623c97fab53710c6de1adfc2f724b3
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/242832
(cherry picked from commit 0162d380221761e5d187521264c2d7f884af335f)
Reviewed-on: http://git-master/r/250671
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: otg: tegra: disable/enable vbus based on cable status
Rohith Seelaboyina [Wed, 19 Jun 2013 08:58:33 +0000]
usb: otg: tegra: disable/enable vbus based on cable status

vbus should be enabled based on cable status after
resuming from LP0.

Bug 1298859

Change-Id: If93010b5cbdf3bf6c6e464bdf80b70362f81df7d
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/240870
(cherry picked from commit 336826534e1c0755157a179b290186532f672bd9)
Reviewed-on: http://git-master/r/250670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: bbc: add thermal zones support
Hervé Fache [Wed, 10 Jul 2013 15:50:46 +0000]
ARM: tegra: bbc: add thermal zones support

BBC thermal information is exported as statistics.  This patch adds a
mechanism based on the modem statistics to create thermal zones for the
BBC-exported temperature sensors.

Bug 1273958

Signed-off-by: Hervé Fache <hfache@nvidia.com>
Change-Id: Id75d9be803a12c39717cfedb53022eeffbf8c239
Reviewed-on: http://git-master/r/247922
(cherry picked from commit f33ea45f628d1fd6c984d4c69512d7090012d22c)
Reviewed-on: http://git-master/r/250665
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agousb: gadget: tegra: add error check conditions
Rohith Seelaboyina [Wed, 10 Jul 2013 06:49:33 +0000]
usb: gadget: tegra: add error check conditions

Add error check conditions for dma_map_single_attrs
we cannot assume they are successfull everytime.

Bug 1320592

Change-Id: I48aeb9d753f8d9a4a11028e3304a72651535dcfe
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/248313
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra12: enable MC domains
Prashant Gaikwad [Tue, 16 Jul 2013 09:06:28 +0000]
arm: tegra12: enable MC domains

Bug 1307958

Change-Id: If52a863cf3d0f2018b8568d06bc6e736912a7732
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/252275
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: add t124 specific devices to MC domain
Prashant Gaikwad [Tue, 16 Jul 2013 08:31:57 +0000]
arm: tegra: add t124 specific devices to MC domain

Bug 1307958

Change-Id: I882409f279d08de718517785e8f57392d0fbc8c7
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/252274
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agodma: tegra: add dma device to MC clock domain
Prashant Gaikwad [Tue, 16 Jul 2013 08:34:34 +0000]
dma: tegra: add dma device to MC clock domain

Bug 1307958

Change-Id: I9bfc27dc81cdb3dd745bbf68372e924be752f717
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/252273
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: use new SMC call for SoC idle state
Prashant Gaikwad [Tue, 9 Jul 2013 07:00:38 +0000]
arm: tegra: use new SMC call for SoC idle state

Bug 1276819

Change-Id: I0b09b8ac73697f11234feab6f414e41e01f7815f
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/246526
(cherry picked from commit a47d87b3baa53cb9096c17358c0289874bc189b1)
Reviewed-on: http://git-master/r/252272
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: instead of false return real wakeup status
Prashant Gaikwad [Wed, 10 Jul 2013 05:46:55 +0000]
arm: tegra: instead of false return real wakeup status

Gen PD uses active wakeup status to decide if resume is
required or not. Return value of dev_may_wakeup which will
make sure that resume is called for all devices in MC clock
domain.

Change-Id: Id04dab8ccfd275af121c86d2003a721c2366868c
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/247024
(cherry picked from commit 60046f0e80b74b4e7f466a25a76245cedf775652)
Reviewed-on: http://git-master/r/252271
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agousb: host: tegra: remove device from domain when unplugged
Prashant Gaikwad [Tue, 9 Jul 2013 09:41:34 +0000]
usb: host: tegra: remove device from domain when unplugged

Change-Id: I62e23e41f7194d3c608f15f0bc1f8bae33b7d210
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/246613
(cherry picked from commit cc4203d0988653eeb7f7cccd68d8bb6494660f9c)
Reviewed-on: http://git-master/r/252270
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: add api to remove device from domain
Prashant Gaikwad [Tue, 9 Jul 2013 09:40:15 +0000]
arm: tegra: add api to remove device from domain

Change-Id: Idfd4b1f91e714dc0368c75214020667a542234ec
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/246612
(cherry picked from commit 76fb4be18abdc47c24952985b8293a52d03e1aab)
Reviewed-on: http://git-master/r/252269
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: add usb ehci and xhci to mc domain
Prashant Gaikwad [Tue, 9 Jul 2013 08:59:15 +0000]
arm: tegra: add usb ehci and xhci to mc domain

Add USB EHCI and XHCI devices to MC clock domain
which controls SoC idle state.

Change-Id: I9b7bd1f0f0feee6d93fe61eb15fd6b50d0627836
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/246580
(cherry picked from commit 9c7641bccb503817b03a9730a4c8413c57c2e17e)
Reviewed-on: http://git-master/r/252268
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: resume device only if floor is not already set
Prashant Gaikwad [Wed, 26 Jun 2013 14:47:35 +0000]
arm: tegra: resume device only if floor is not already set

Bug 1304124

Change-Id: Iad4fe7df0c1749c462cd7de155fa5ecde23f5e28
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/242469
(cherry picked from commit 85ca483b895cfe7c91fc4ff49d17d0adb11fcfcf)
Reviewed-on: http://git-master/r/252267
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: add stub runtime PM for BB
Prashant Gaikwad [Tue, 16 Jul 2013 08:45:32 +0000]
arm: tegra: add stub runtime PM for BB

When modem is active device can not enter SoC idle
state. Add stub runtime PM to notify the BB state
to MC clock domain.

Bug 1304124

Change-Id: I37ad5236706d9b765c5ca64b79bc6c3153e98908
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/241947
(cherry picked from commit 65da4905194c6ecdd91e7cd1fa7e25b68ea01f99)
Reviewed-on: http://git-master/r/252266
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: Use rcuidle trace in idle
Prashant Gaikwad [Wed, 10 Apr 2013 06:34:25 +0000]
arm: tegra: Use rcuidle trace in idle

Change-Id: I8a05e20702a30b9afb92056949ace68499692f97
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/218114
(cherry picked from commit 4e486faa12bc5f465de1fabc1846cc28e03d27f7)
Reviewed-on: http://git-master/r/252265
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: Disable EMC clock in SoC idle state
Prashant Gaikwad [Thu, 25 Apr 2013 12:34:56 +0000]
arm: tegra: Disable EMC clock in SoC idle state

Bug 1294838

Change-Id: I8ba04077b20588b0e9f092ef164712f053b70b8f
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/237510
(cherry picked from commit 22a87133ad417f2cd69e4d83b5fcb84e0ac64ae1)
Reviewed-on: http://git-master/r/252264
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: tegra: common: powergate xusb partitions by default
Bharath Yadav [Wed, 10 Jul 2013 07:26:08 +0000]
ARM: tegra: common: powergate xusb partitions by default

Bug 1320971

Change-Id: Ifbcdac599846ccfedde1cf812b16c545d78e0d86
Signed-off-by: Bharath Yadav <byadav@nvidia.com>
Reviewed-on: http://git-master/r/252206
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

5 years agoARM: tegra12: Enable CPU boost for USB
Rakesh Bodla [Tue, 23 Jul 2013 05:24:08 +0000]
ARM: tegra12: Enable CPU boost for USB

Enabling the CPU boost during USB transfers
for USB performance.

Change-Id: I9f5eed45bbe8234a606d6e2c2a9f6f22c9cf6a66
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/252231
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: dc: Fix blending updates
Rakesh Iyer [Tue, 23 Jul 2013 00:14:05 +0000]
video: tegra: dc: Fix blending updates

For gen2 blending, change in the global alpha needs rewrite to blending regs.

Bug 1329268.

Change-Id: Ic24e11fb17a25bf645e77ba505e0da2abd36cb28
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/252178
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra12: clock: Fix LP0 resume hangup at PLL
Kaz Fukuoka [Thu, 11 Jul 2013 22:26:45 +0000]
ARM: tegra12: clock: Fix LP0 resume hangup at PLL

LP0 resume hanged up where PLL functions tried to print error
message when UART clock is still turned off. Fixed as follows.

- Initialize PLLC4, PLLD2, PLLDP with valid frequencies.
- Remove debug print in clk_set in those PLLs.

bug 1322653

Change-Id: I24bbb5261b00f8fa52638c19835d2e94b9c20b05
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/248062
(cherry picked from commit 5a832c6dfc870e0a6c5d099c34441b561e765361)
Reviewed-on: http://git-master/r/252090
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo:tegra:gk20a: add debugfs switch for L2 cache
Kirill Artamonov [Wed, 10 Jul 2013 00:35:25 +0000]
video:tegra:gk20a: add debugfs switch for L2 cache

Add debugfs boolean /d/gk20a/ltc_enabled
to disable or enable L2 cache of gk20a.

Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Change-Id: I2ce30c592a4775e7cab92ed34b3c4476bb7a1560
Reviewed-on: http://git-master/r/246927
(cherry picked from commit 7edd25eb707767b9bf94a6de5bdf3855b266535e)
Reviewed-on: http://git-master/r/251691
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agodrivers: tegra: gk20a: modify pmu counter settings
Prashant Malani [Thu, 11 Jul 2013 03:27:38 +0000]
drivers: tegra: gk20a: modify pmu counter settings

The PMU counters being used to measure GPU load
and by perfmon, have idle filtering enabled by
default.

This causes the counters to not get updated
correctly. Therefore, we disable idle filtering
for these counters.

Bug 1320968

Change-Id: Iee4d3ace216fd4efcf86b488f283f58a23299ee4
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/251493
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: dc: use set_cursor_image_hw() in tegra_dc_ext_set_cursor_low_latency()
Andy Ritger [Fri, 19 Jul 2013 08:52:40 +0000]
video: tegra: dc: use set_cursor_image_hw() in tegra_dc_ext_set_cursor_low_latency()

Also:
* s/set_cursor_image_hw/set_cursor_start_addr/
* Now that all cursor registers are programmed from helper functions,
  default need_general_update to 0.

Change-Id: Ie8148c9b1313dd363d7171e9e45259b85cf2f4aa
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251271
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add check_cursor_size()
Andy Ritger [Fri, 19 Jul 2013 08:38:12 +0000]
video: tegra: dc: add check_cursor_size()

This validation was missing from the tegra_dc_ext_set_cursor_low_latency()
path.

Change-Id: I43de47b684c2cb461730501f15caf5e252e1fe87
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251270
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add set_cursor_fg_bg()
Andy Ritger [Fri, 19 Jul 2013 08:25:38 +0000]
video: tegra: dc: add set_cursor_fg_bg()

Change-Id: Ic51cf0e96cbd18ba48ac6c73e46f866286d23885
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251269
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add set_cursor_blend()
Andy Ritger [Fri, 19 Jul 2013 08:16:44 +0000]
video: tegra: dc: add set_cursor_blend()

Change-Id: Ic57f41badde2c66db61c433f1b6b600cf968b8d0
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251268
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add set_cursor_enable()
Andy Ritger [Fri, 19 Jul 2013 07:37:18 +0000]
video: tegra: dc: add set_cursor_enable()

Change-Id: Iefb9e9f1e43c1d8d7909e444b3fc61dde76c7776
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251267
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add set_cursor_activation_control()
Andy Ritger [Fri, 19 Jul 2013 09:20:47 +0000]
video: tegra: dc: add set_cursor_activation_control()

Program DC_CMD_REG_ACT_CONTROL to ensure that cursor position is latched
at vsync.

This was missing from the tegra_dc_ext_set_cursor() path.

Change-Id: Ic28ea64d3df5744ff7bc0a246ed720b1cccdd28e
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251266
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add set_cursor_position()
Andy Ritger [Fri, 19 Jul 2013 07:26:50 +0000]
video: tegra: dc: add set_cursor_position()

Move programming of DC_DISP_CURSOR_POSITION, and the CURSOR_UPDATE write
to DC_CMD_STATE_CONTROL, to set_cursor_position().

The return value from set_cursor_position() indicates whether it requires
a GENERAL_UPDATE.

Change-Id: Ib836f764caf08a1ec631b0c6fa6a1c77ece5c90d
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251265
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: add cursor need_general_update
Andy Ritger [Fri, 19 Jul 2013 09:07:15 +0000]
video: tegra: dc: add cursor need_general_update

In the cursor programming functions, add tracking for whether
GENERAL_ACT_REQ needs to be programmed.  So far, need_general_update is
always set.  Subsequent changes will update need_general_update based
on what cursor registers are programmed.

Change-Id: Ib5220efc15ed7a5b028cdf9ecd26041e499c6146
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251264
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: fix DC_DISP_DISP_WIN_OPTIONS programming
Andy Ritger [Fri, 19 Jul 2013 06:59:54 +0000]
video: tegra: dc: fix DC_DISP_DISP_WIN_OPTIONS programming

tegra_dc_ext_set_cursor_low_latency() made several mistakes in programming
DC_DISP_DISP_WIN_OPTIONS:

* The logic to decide whether to program DC_DISP_DISP_WIN_OPTIONS was
  duplicated: once near the top of the function and once near the bottom
  of the function.

* The first instance of the logic to decide whether to program
  DC_DISP_DISP_WIN_OPTIONS used the 'enable' variable without initializing
  it.

* The second instance of the logic to decide whether to program
  DC_DISP_DISP_WIN_OPTIONS initialized the 'enable' variable
  using a bitwise AND with TEGRA_DC_EXT_CURSOR_FLAGS_VISIBLE, and
  then compared 'enable' with a boolean expression.  Fortunately,
  TEGRA_DC_EXT_CURSOR_FLAGS_VISIBLE is defined as (1 << 0), so the
  values worked out.  However, it is still clearer to convert the
  result of the bitwise operation to a boolean with '!!', as is done
  in tegra_dc_ext_set_cursor().

Change-Id: Ie84572bc68f31ae94baaaddc6147c496636b2769
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251263
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: collapse CURSOR_POSITION() and CURSOR_POSITION_124()
Andy Ritger [Fri, 19 Jul 2013 06:47:07 +0000]
video: tegra: dc: collapse CURSOR_POSITION() and CURSOR_POSITION_124()

The CURSOR_POSITION() macro was defined to limit its x and y arguments
to 16-bits each.

The CURSOR_POSITION_124() macro was later defined to limit its x and y
arguments to 14-bits each.

DC_DISP_CURSOR_POSITION only has 14-bits per component on all Tegra chips,
so there is no need for a separate T124 macro.

Change-Id: Icd74f7b8c47523089d34f153d1c6c0e3fe59ae65
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251262
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: don't map (and leak?) the cursor buffer every cursor change
Andy Ritger [Fri, 19 Jul 2013 06:38:31 +0000]
video: tegra: dc: don't map (and leak?) the cursor buffer every cursor change

tegra_dc_ext_set_cursor_low_latency() called

    win_ptr = nvmap_mmap(handle);

every time it executed.  It never used win_ptr, or called nvmap_munmap()
on the pointer.

Also, remove now unnecessary inclusion of nvmap_priv.h

Change-Id: I1703bfc0d46622161ca559f650788ff72d0021fb
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251261
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: use tegra_dc_{get,put}() in tegra_dc_ext_set_cursor*_low_latency
Andy Ritger [Fri, 19 Jul 2013 06:31:53 +0000]
video: tegra: dc: use tegra_dc_{get,put}() in tegra_dc_ext_set_cursor*_low_latency

Commit 4847075e replaced
    tegra_dc_io_start(dc);
    tegra_dc_hold_dc_out(dc);
with
    tegra_dc_get(dc);

and

    tegra_dc_release_dc_out(dc);
    tegra_dc_io_end(dc);
with
    tegra_dc_put(dc);

throughout dc.  But the tegra_dc_ext_set_cursor*_low_latency functions
added some of these back.

Change-Id: I6c8eabbd31ee27895633f9f08be27ca24e892a32
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251260
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: return number of modes in modedb when modedb_len==0
Andy Ritger [Fri, 19 Jul 2013 04:20:32 +0000]
video: tegra: dc: return number of modes in modedb when modedb_len==0

When servicing the FBIO_TEGRA_GET_MODEDB ioctl, always walk through the
modelist to count the number of modes.  If modedb_len==0, return the
total mode count.  Otherwise, return the number of modes written
into the modedb array.

Bug 1324827

Change-Id: I4ad8f3c3ca3cb0ba7a4ad36c508a75abca964a25
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-on: http://git-master/r/251141
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: host: add dbg_mask debugfs node
Ken Adams [Mon, 15 Jul 2013 21:22:16 +0000]
video: tegra: host: add dbg_mask debugfs node

When debugfs is available enable NVHOST_DEBUG and set
the mask to zero.  This allows user mode code to manipulate
it as needed.

Change-Id: I2c39a66d8c030a646b6c0ad7289c3862dba122b1
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/249399
(cherry picked from commit dcec3400a6a02e64ba2ed22eda23fbf6ced77b9f)
Reviewed-on: http://git-master/r/250845
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

5 years agoarm:tegra14: fix LP1BB entry in presence of baseband
Greg Heinrich [Mon, 8 Jul 2013 16:30:25 +0000]
arm:tegra14: fix LP1BB entry in presence of baseband

bug 1317757

Fix PMC_IPC_MEM_CLR/_SET Programming model

Do not cut PLLC on LP1BB if it is used as EMC clock source

Change-Id: I36f8a2a442dabee4e8429d0b61c13ee16f552764
Signed-off-by: Greg Heinrich <gheinrich@nvidia.com>
Reviewed-on: http://git-master/r/246156
(cherry picked from commit 1de25e7c232a61156a55140c6bbd6c8ddf275f83)
Reviewed-on: http://git-master/r/250673
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agopower: max17048: export OCV to sysfs
Sivaram Nair [Tue, 2 Jul 2013 09:50:53 +0000]
power: max17048: export OCV to sysfs

For allowing userspace to read out the OCV value.

Change-Id: I09a82ec24505905e3294d87c05886be49ea66342
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/244282
(cherry picked from commit 52257cf628b8865257a2aa5e4fc9c790fb4503c7)
Reviewed-on: http://git-master/r/246100
(cherry picked from commit 65558bfe736fb9ae057471a48adc1fbd5b8c3aae)
Reviewed-on: http://git-master/r/250636
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoEDP: fix deadlock
Sivaram Nair [Fri, 5 Jul 2013 10:40:41 +0000]
EDP: fix deadlock

cancel_work_sync is called with mutex held. This can cause deadlock if
there is a pending work while switching governors or while unregistering
managers (because the worker function tries to take the same lock).

Fix this by:

- getting rid of cancel_work_sync during governor switching (if there is
  no governor, the scheduled work will do nothing)
- call cancel_work_sync after the manager unregistration is complete and
  outside the locked code.

Bug 1313928

Change-Id: I64b270898bffc9b961cb70ca9c181c1c6e6c0118
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/247648
(cherry picked from commit 981bf6768f2ed99127550ba5554e433716586eaa)
Reviewed-on: http://git-master/r/250634
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoEDP: fix run time warnings
Sivaram Nair [Thu, 4 Jul 2013 07:31:11 +0000]
EDP: fix run time warnings

Fixing warnings issued by EDP governors due to incorrect power budget
math.

Bug 1313928

Change-Id: If1c9cf5c6df66ed4f2cc8a1b9399d4c57b2c7a64
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/245106
(cherry picked from commit 6870474b775573f8a060afff99fca3bb171ec12c)
Reviewed-on: http://git-master/r/250633
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoInput: touch: synaptics: remove open print
Sivaram Nair [Thu, 4 Jul 2013 07:27:37 +0000]
Input: touch: synaptics: remove open print

Moving the open print to use dev_dbg/pr_debug

Change-Id: I38fee1ae986ee1e90fc75c412fd306a2f5342f31
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/245105
(cherry picked from commit 3ff4c8964eae13d7e9578d6ed8d0f305d0930f72)
Reviewed-on: http://git-master/r/250632
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: nvmap: fix compilation error with SMP config disable
Krishna Reddy [Mon, 22 Jul 2013 18:24:54 +0000]
video: tegra: nvmap: fix compilation error with SMP config disable

typecast is causing the compilation error during SMP config disable.
remove the typecast, which is no longer necessary.

Change-Id: I5a52dc359cc24a33fb94d6a6902c951ccfd430dc
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/252030
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Matt Craighead <mcraighead@nvidia.com>

5 years agomisc: nct: remove delay in resume
Bitan Biswas [Thu, 11 Jul 2013 11:58:37 +0000]
misc: nct: remove delay in resume

bug 1317941

Change-Id: I947d43fb8ac574787bba4c9109e0a22f52b2dc97
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/247838
(cherry picked from commit 210050261eb4e8c58e1ce0de8665833abf84a296)
Reviewed-on: http://git-master/r/251338
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: ardbeg: fix AUO 14'' eDP panel timing issue
Kerwin Wan [Wed, 17 Jul 2013 01:20:12 +0000]
arm: tegra: ardbeg: fix AUO 14'' eDP panel timing issue

Bug 1327199

Change-Id: I702fbf52d9c19dc604cee1c0708df31f1efcbec9
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/249996
(cherry picked from commit 8af03db4d1e046c5d33371d81354a3e73f556c0e)
Reviewed-on: http://git-master/r/252086
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarch: config: tegra: disable CPUQUIET support in mods config
Vivek Aseeja [Mon, 22 Jul 2013 17:14:33 +0000]
arch: config: tegra: disable CPUQUIET support in mods config

disable CPUQUIET, CPU_FREQ and CPU_IDLE support in mods defconfig

Change-Id: I4b9d11c12e45c219c5259f5629da181127eedbe1
Signed-off-by: Vivek Aseeja <vaseeja@nvidia.com>
Reviewed-on: http://git-master/r/252008
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Kasamsetty <kkasamsetty@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agousb: xhci: tegra: fix coverity issues
Ajay Gupta [Mon, 22 Jul 2013 16:14:33 +0000]
usb: xhci: tegra: fix coverity issues

Bug 1329327

Change-Id: Ic4e99f32972e4cb33730f8f898d6af5d07442e8a
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/251999
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: dvfs: Expand CL-DVFS PWM output control
Alex Frid [Sat, 20 Jul 2013 04:20:58 +0000]
ARM: tegra: dvfs: Expand CL-DVFS PWM output control

Added tristate option to CL-DVFS PWM output control. Summary of
supported options:

a) native CL-DVFS output configuration PWM_ENABLE control
b) gpio control of external buffer (used if out_gpio in platform data
is populated)
c) tristate PWM pingroup control (used if pwm_pingroup in platform data
is populated)

In cases (b) and (c) CL-DVFS native control is always enabled.

Change-Id: Ic484934ad8408314b540c58173e6022fd3120da8
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/251606
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Modify cl-dvfs monitor control
Alex Frid [Wed, 10 Jul 2013 01:53:06 +0000]
ARM: tegra: dvfs: Modify cl-dvfs monitor control

- Dropped concept of "default monitor selection" (was - frequency).
Explicitly select monitor mux each time data is read.

- Restricted monitor debugfs node to frequency only (removed the
option to read other possible outputs - this is still available via
debugfs access to CL-DVFS registers)

- Added output_mv debugfs node to read last output value

Change-Id: Idca7500279d8c035e1f38ff99dd486ca79a3419d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/251605
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoconfig: tegra11: enable bluedroid_pm
Mursalin Akon [Fri, 19 Jul 2013 21:48:37 +0000]
config: tegra11: enable bluedroid_pm

Enable bluedroid pm

Bug 1319882
Bug 1229035

Change-Id: I29f10d5e9976a4e1a669078effbd959097adf463
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/251507
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra12: Fix presilicon support for gk20a
Alex Van Brunt [Fri, 19 Jul 2013 19:44:40 +0000]
arm: tegra12: Fix presilicon support for gk20a

Pre-silicon platforms have no way to powergate. So, abort powergate
on pre-silicon platforms.

Change-Id: Ib392ec52a8abf93d9cf4c0213ddad6560261def6
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/251461
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: dc: Do not use plld2 only for eDP
Chao Xu [Thu, 18 Jul 2013 23:47:36 +0000]
video: tegra: dc: Do not use plld2 only for eDP

Current it is hardcoded for eDP/LVDS to use PLLD2 only, which caused conflicts when
HDMI is enabled.

Bug 1328901.

Change-Id: I3bda82c3310e4e8e357b8482a643e42e7bffa532
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/251432
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: Disable SOR from dc to flush the pipe
Chao Xu [Wed, 17 Jul 2013 01:13:46 +0000]
video: tegra: dc: Disable SOR from dc to flush the pipe

Bug 1324474 -- this is needed is SOR will be re-enabled. Otherwise
data is corrupted.

Change-Id: Idc9c8031c27e40f06773ca19c8a38e1e1e32f6c8
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/251431
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: camera: Remove camera from DISP power partition
Chao Xu [Thu, 18 Jul 2013 18:39:22 +0000]
video: tegra: camera: Remove camera from DISP power partition

Camera is not part of DISP power partition anymore since t124

Change-Id: I0c02e5572c0254a92e1847bcc48d269425efc0f7
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/251430
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar S <nkumars@nvidia.com>
Tested-by: Naveen Kumar S <nkumars@nvidia.com>

5 years agomedia: tegra: Remove VE from DISP powergate partition
Chao Xu [Thu, 18 Jul 2013 18:37:09 +0000]
media: tegra: Remove VE from DISP powergate partition

VE is not part of DISP power partition anymore.

Change-Id: I35824aac86bb12bb1ca9ab0b2d0e01a9d8d5d5ee
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/251429
Reviewed-by: Bryan Wu <pengw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: powergate: Add t124 display powergate support
Chao Xu [Thu, 18 Jul 2013 18:21:18 +0000]
ARM: tegra: powergate: Add t124 display powergate support

T124 display powergating was changed in the following way:

1. New SOR partition including all SOR units (hdmi, dsi, edp lvds etc).
   So this partition needs to be powered whenever one of DC enabled.
2. DISPA partition cannot be power down if DISPB is being used.

bug 1324532.

Change-Id: Ibcef6822cf75aface1f04377247d3d3d2d16c389
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/251428

5 years agokernel: drivers: media: Modify debug statement
Arun Mohare [Mon, 15 Jul 2013 19:55:53 +0000]
kernel: drivers: media: Modify debug statement

Change the kernel debug statement for as364x
driver. Term "invalid" for a notice/warning
is misleading.

bug 1320211
bug 1320210

Change-Id: I4377cd20fd70392af1db4517c0d3a708845e5e5a
Signed-off-by: Arun Mohare <arg@nvidia.com>
Reviewed-on: http://git-master/r/249309
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agovideo: tegra: nvmap: remove unused nvmap api
Krishna Reddy [Wed, 3 Jul 2013 00:01:58 +0000]
video: tegra: nvmap: remove unused nvmap api

Change-Id: I687f2472c228112b6aa15b32173bdfe77061a04e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/244561
(cherry picked from commit 04e88cd090b19f9047c813a12a86d800ba531ab4)
Reviewed-on: http://git-master/r/251669
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agousb: gadget: tegra: fix schedule work for non-std charger
Rohith Seelaboyina [Fri, 19 Jul 2013 10:43:29 +0000]
usb: gadget: tegra: fix schedule work for non-std charger

Work is scheduled to detect non-standard charger
whenever can_pullup is successful.

Bug 1316950

Change-Id: I8c8b7eb381d311273a77f039964601d5b2535bb2
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/251599
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: host: Fix gk20a syncpt base
Lauri Peltonen [Tue, 16 Jul 2013 22:03:46 +0000]
video: tegra: host: Fix gk20a syncpt base

Make gk20a actually use the syncpoints starting from 64. Syncpts
starting from 32 are used by ISP and VI. Fix the syncpt names for
gk20a, too.

Bug 1327013

Change-Id: Icaedac8cb930dec0fd0b5d07dedac5d6ed2fa940
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/251589
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agonet: wireless: Update SD8797/SD8897 WLAN/BT driver to 413
Marc Yang [Wed, 10 Jul 2013 19:02:37 +0000]
net: wireless: Update SD8797/SD8897 WLAN/BT driver to 413

Signed-off-by: Marc Yang <yangyang@marvell.com>

Bug 1318052
Change-Id: Ie6fbc284bf30ca9ae5f6930a270a1f82ed37b409
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/251131
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra12: allow 1-to-many irq to wake mapping
Peng Du [Thu, 18 Jul 2013 23:55:22 +0000]
ARM: tegra12: allow 1-to-many irq to wake mapping

Applying the below change for tegra12x:

  ARM: tegra: allow 1-to-many irq to wake mapping
  commit: cb65afb270232448b9a00c547ce67f06aa7a1e54

Signed-off-by: Peng Du <pdu@nvidia.com>
Change-Id: Id0ea2cc1d351f954fd62de570c425d405f92ce3c
Reviewed-on: http://git-master/r/251040
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoasoc: aic326x codec: Fix compilation warnigs
Vijay Mali [Sat, 8 Jun 2013 07:43:13 +0000]
asoc: aic326x codec: Fix compilation warnigs

Add typecast in switch statement

Bug 1274537

Change-Id: I03fbce68d449500a3f1de60798e875d5905176eb
Reviewed-on: http://git-master/r/237042
(cherry picked from commit 3a4195207f762d3ae7720d71a6e8d1f1fc9fe165)
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/250768
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>

5 years agoasoc: rt5640 codec: Fix compilation warnigs
Vijay Mali [Fri, 21 Jun 2013 05:24:13 +0000]
asoc: rt5640 codec: Fix compilation warnigs

Remove unused variable

Bug 1274537

Change-Id: If63318ab760b97cdb67f28a636d8aad1225c794e
Reviewed-on: http://git-master/r/240869
(cherry picked from commit 220c874c9ee9182856f683107f9e8ae1ef1f5e76)

Signed-off-by: Vijay Mali <vmali@nvidia.com>
Change-Id: Ic73e8fb8d962b03d68cf26bc17f7953465a76891
Reviewed-on: http://git-master/r/250766
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra: bbc: reorder EDP client registration
Sivaram Nair [Thu, 4 Jul 2013 11:22:21 +0000]
ARM: tegra: bbc: reorder EDP client registration

bbc_boot client registration is moved before bbc client registration.
Sys EDP manager does not have enough budget to support both at the same
time, which means that the bbc client registation will fail (E0 sum >=
battery cap).

Bug 1269041

Change-Id: I7b0a9b90bcd155fd8e0e601421ec804ea2c44f0a
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/245109
(cherry picked from commit 06f8722ba9a8288c446f01709b7693140d01eb8e)
Reviewed-on: http://git-master/r/250630
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoEDP: fix bad client name
Sivaram Nair [Thu, 4 Jul 2013 10:51:54 +0000]
EDP: fix bad client name

The dummy client created to reduce the EDP cap is named '.'. This
results in a runtime warning because the sysfs entries can not be
created with this name. Fixing this by changing the name to '.debug'

Change-Id: I90ac60503053ce5de8d3ea1b2d1a7627d1ea33ea
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/245108
(cherry picked from commit f4e922af79136d23991d86c17c34101a261912db)
Reviewed-on: http://git-master/r/250629
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoEDP: tegra: add core status debugfs attr
Sivaram Nair [Wed, 12 Jun 2013 12:12:04 +0000]
EDP: tegra: add core status debugfs attr

Add a new debugfs node for printing out the current AP+DRAM EDP
capping decisions.

Bug 1257143

Change-Id: Ie42c78233e3462ea786456ffb9e321895a437c9f
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/238035
(cherry picked from commit 7741dd6b9dd6aaeb89f5a0268fb343bcca500228)
Reviewed-on: http://git-master/r/250625
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: config: enable CIFS
Naveen Kumar S [Thu, 18 Jul 2013 07:11:21 +0000]
arm: tegra: config: enable CIFS

Enabling CONFIG_CIFS as a module in tegra3, tegra11,
tegra12 and tegra14 defconfigs for L4T.

Bug 1321003

Change-Id: I601ef6b275dae82ba164cd6b09d1f0ebe7c6171e
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/250615
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: roth: move battery model data to common INI file
Venkat Reddy Talla [Thu, 18 Jul 2013 04:07:45 +0000]
ARM: tegra: roth: move battery model data to common INI file

move roth battery model data to common INI file
add gpio irq to bq2419x to trigger interrupts

Bug 1307664

Change-Id: I2c16bdf4646cfc5348ad67b89f0a972845a37b0b
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/250515
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra12: set correct invert for mdm rail
Vinayak Pane [Tue, 9 Jul 2013 03:16:51 +0000]
ARM: tegra12: set correct invert for mdm rail

AMS regulator uses invert functions for GPIO1 regulator.
Correct this invert to retain regulator_enable()/disable()
driver functionality as expected.

Bug 1318940

Change-Id: Id50fc6cd3754d41fc31126e9ed364bdab083e947
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/250492
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agovideo: tegra: gk20a: disable ELCG
Kevin Huang [Fri, 19 Jul 2013 20:22:00 +0000]
video: tegra: gk20a: disable ELCG

Change-Id: I19984eff26f6325eefc6bb0c8f11cd484f3eb8de
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/251753
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: config: enable PALMAS_GPADC for palmas-gpadc
Laxman Dewangan [Sun, 21 Jul 2013 08:16:41 +0000]
ARM: config: enable PALMAS_GPADC for palmas-gpadc

Enable ADC driver of Palmas.

Change-Id: If9126fe3e2b57f5282753e37b20dee69c2cada43
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/251677
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoiio: staging: adc: max77660: add wakeup support from ADC
Laxman Dewangan [Mon, 1 Jul 2013 10:55:07 +0000]
iio: staging: adc: max77660: add wakeup support from ADC

During suspend, ADC is put in continuous conversion with proper lower/
higher threshold and when the channel ADC conversion value cross these
threshold, it generates interrupt which cause the system to be wakeup.

This configuration is platform configuration and only be enabled when
proper data is passed from platform.

bug 1301017

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/243861
(cherry picked from commit 38c03f0e8520e86bb3e2f34540624a9f7cd41164)

Change-Id: Ief7d994bf79beb34efa687866ce9ba210fddd03d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/251676
Reviewed-by: Automatic_Commit_Validation_User