8 years agoMerge branch 'drm-radeon-next' of /ssd/git/drm-radeon-next into drm-core-next
Dave Airlie [Mon, 23 May 2011 23:08:28 +0000]
Merge branch 'drm-radeon-next' of /ssd/git/drm-radeon-next into drm-core-next

* 'drm-radeon-next' of /ssd/git/drm-radeon-next: (32 commits)
  drivers/gpu/drm/radeon/atom.c: fix warning
  drm/radeon/kms: bump kms version number
  drm/radeon/kms: properly set num banks for fusion asics
  drm/radeon/kms/atom: move dig phy init out of modesetting
  drm/radeon/kms/cayman: fix typo in register mask
  drm/radeon/kms: fix typo in spread spectrum code
  drm/radeon/kms: fix tile_config value reported to userspace on cayman.
  drm/radeon/kms: fix incorrect comparison in cayman setup code.
  drm/radeon/kms: add wait idle ioctl for eg->cayman
  drm/radeon/cayman: setup hdp to invalidate and flush when asked
  drm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when asked
  agp/uninorth: Fix lockups with radeon KMS and >1x.
  drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only
  drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices
  drm/radeon/kms: fixup eDP connector handling
  drm/radeon/kms: bail early for eDP in hotplug callback
  drm/radeon/kms: simplify hotplug handler logic
  drm/radeon/kms: rewrite DP handling
  drm/radeon/kms/atom: add support for setting DP panel mode
  drm/radeon/kms: atombios.h updates for DP panel mode
  ...

8 years agodrivers/gpu/drm/radeon/atom.c: fix warning
Andrew Morton [Mon, 23 May 2011 21:48:32 +0000]
drivers/gpu/drm/radeon/atom.c: fix warning

udelay() doesn't like 8-bit arguments:

drivers/gpu/drm/radeon/atom.c: In function 'atom_op_delay':
drivers/gpu/drm/radeon/atom.c:653: warning: comparison is always false due to limited range of data type

while we're there, use msleep() rather than open-coding it.

Cc: David Airlie <airlied@linux.ie>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: bump kms version number
Alex Deucher [Fri, 20 May 2011 16:35:23 +0000]
drm/radeon/kms: bump kms version number

- proper bank size for fusion for 2D tiling.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: properly set num banks for fusion asics
Alex Deucher [Fri, 20 May 2011 16:35:22 +0000]
drm/radeon/kms: properly set num banks for fusion asics

Needed by userspace for 2D tiled buffer alignment

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms/atom: move dig phy init out of modesetting
Alex Deucher [Sun, 22 May 2011 17:20:36 +0000]
drm/radeon/kms/atom: move dig phy init out of modesetting

It only needs to be called once at startup, not for every
modeset.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms/cayman: fix typo in register mask
Alex Deucher [Mon, 23 May 2011 18:22:26 +0000]
drm/radeon/kms/cayman: fix typo in register mask

Noticed by Droste on IRC.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: fix typo in spread spectrum code
Alex Deucher [Mon, 23 May 2011 18:06:20 +0000]
drm/radeon/kms: fix typo in spread spectrum code

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: fix tile_config value reported to userspace on cayman.
Dave Airlie [Thu, 19 May 2011 04:14:41 +0000]
drm/radeon/kms: fix tile_config value reported to userspace on cayman.

cayman is reporting the wrong tile config value to userspace, this
causes piglit mipmap generation tests to fail.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: fix incorrect comparison in cayman setup code.
Dave Airlie [Thu, 19 May 2011 04:14:40 +0000]
drm/radeon/kms: fix incorrect comparison in cayman setup code.

This was leading to a bogus value being programmed to the backend
routing register.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: add wait idle ioctl for eg->cayman
Dave Airlie [Thu, 19 May 2011 04:14:43 +0000]
drm/radeon/kms: add wait idle ioctl for eg->cayman

None of the latest GPUs had this hooked up, this is necessary for
correct operation in a lot of cases, however we should test this on a few
GPUs in these families as we've had problems in this area before.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/cayman: setup hdp to invalidate and flush when asked
Dave Airlie [Thu, 19 May 2011 04:14:42 +0000]
drm/radeon/cayman: setup hdp to invalidate and flush when asked

On cayman we need to set the bit to cause HDP flushes to invalidate the
HDP cache also.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when asked
Alex Deucher [Thu, 19 May 2011 15:07:57 +0000]
drm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when asked

This needs to be explicitly set on btc.  It's set by default
on evergreen/fusion, so it fine to just unconditionally enable it for
all chips.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@gmail.com>

8 years agoagp/uninorth: Fix lockups with radeon KMS and >1x.
Michel Dänzer [Thu, 19 May 2011 14:08:39 +0000]
agp/uninorth: Fix lockups with radeon KMS and >1x.

This was based on a description by Ben Herrenschmidt:

> I've removed that SBA reset from the normal TLB invalidation path and
> left it only once after turning AGP on.

About six months ago, he said:

> I did it a bit differently, but yeah, you get the idea. I'm doing a
> patch series so don't bother pushing things too hard yet.

But I haven't seen anything from him about this since then, and people are
regularly hitting these lockups, so here we are...

Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@gmail.com>

8 years agodrm/radeon/kms: the SS_Id field in the LCD table if for LVDS only
Alex Deucher [Fri, 20 May 2011 16:36:11 +0000]
drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only

For DP/eDP, always use the standard DP SS indices.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>

8 years agodrm/radeon/kms: properly set the CLK_REF bit for DCE3 devices
Alex Deucher [Fri, 20 May 2011 16:36:12 +0000]
drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices

If the ss clock is external, the CLK_REF bit needs to be set
in the SetPixelClock parameters.  This should fix DP failures
in the channel equalization loop.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>

8 years agodrm/radeon/kms: fixup eDP connector handling
Alex Deucher [Fri, 20 May 2011 08:34:31 +0000]
drm/radeon/kms: fixup eDP connector handling

It's more like LVDS then DP in some ways.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: bail early for eDP in hotplug callback
Alex Deucher [Fri, 20 May 2011 08:34:30 +0000]
drm/radeon/kms: bail early for eDP in hotplug callback

Don't try and en/disable the port as it may be a hpd event from
powering up/down the panel during a modeset or dpms.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: simplify hotplug handler logic
Alex Deucher [Fri, 20 May 2011 08:34:29 +0000]
drm/radeon/kms: simplify hotplug handler logic

In the hotplug handler, just use the drm dpms functions.
If the monitor is plugged in, turn it on, if it's not,
turn it off.  This also reduces power usage by turning
off the encoder and crtc when the monitor is unplugged.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: rewrite DP handling
Alex Deucher [Fri, 20 May 2011 08:34:28 +0000]
drm/radeon/kms: rewrite DP handling

- reorganize the functions based on use
- clean up function naming
- rework link training to better match what we use internally
- add initial support for DP 1.2 (no MST yet)

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms/atom: add support for setting DP panel mode
Alex Deucher [Fri, 20 May 2011 08:34:27 +0000]
drm/radeon/kms/atom: add support for setting DP panel mode

Required for proper operation with DP bridges.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: atombios.h updates for DP panel mode
Alex Deucher [Fri, 20 May 2011 08:34:26 +0000]
drm/radeon/kms: atombios.h updates for DP panel mode

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/dp: add some new DP regs for DP 1.2
Alex Deucher [Fri, 20 May 2011 08:34:25 +0000]
drm/dp: add some new DP regs for DP 1.2

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: handle DP bridges
Alex Deucher [Fri, 20 May 2011 08:34:22 +0000]
drm/radeon/kms: handle DP bridges

Fusion hardware often has DP to VGA/LVDS/TMDS bridges to
handle non-DP encoders.  Internally we treat them mostly
like DP.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: improve aux error handling
Alex Deucher [Fri, 20 May 2011 08:34:24 +0000]
drm/radeon/kms: improve aux error handling

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: improve DP detect logic
Alex Deucher [Fri, 20 May 2011 08:34:23 +0000]
drm/radeon/kms: improve DP detect logic

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: add some dp encoder/connector helper funcs
Alex Deucher [Fri, 20 May 2011 08:34:21 +0000]
drm/radeon/kms: add some dp encoder/connector helper funcs

Used for dp1.2 support and for dp bridges.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: make sure eDP panel is on for modesetting
Alex Deucher [Fri, 20 May 2011 08:34:20 +0000]
drm/radeon/kms: make sure eDP panel is on for modesetting

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: fix eDP panel power function
Alex Deucher [Fri, 20 May 2011 08:34:19 +0000]
drm/radeon/kms: fix eDP panel power function

need to wait for the panel to power up.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: adjust eDP handling (v2)
Alex Deucher [Fri, 20 May 2011 08:34:18 +0000]
drm/radeon/kms: adjust eDP handling (v2)

eDP is usually used as an LVDS replacement, so treat
it more like LVDS from the user perspective.

v2: encoder mode is always DP for eDP.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: fix up DP clock programming on DCE4/5
Alex Deucher [Fri, 20 May 2011 08:34:17 +0000]
drm/radeon/kms: fix up DP clock programming on DCE4/5

In DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
depending on the asic.  The crtc virtual pixel clock is derived from
the DP ref clock.

- DCE4: PPLL or ext clock
- DCE5: DCPLL or ext clock

Setting ATOM_PPLL_INVALID will cause SetPixelClock to skip
PPLL/DCPLL programming and only program the DP DTO for the
crtc virtual pixel clock.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: spread spectrum fixes
Alex Deucher [Fri, 20 May 2011 08:34:16 +0000]
drm/radeon/kms: spread spectrum fixes

- properly mask the ss type
- don't enable ss if type is external or percentage is 0
- if ss enabled and type is external, set ref_div_src to ext clock
- prefer ASIC_INTERNAL_SS_ON_DP to LCD_Info SS_Id for eDP
- fix ss amount calculation

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: properly handle bpc >8 in atom command tables
Alex Deucher [Fri, 20 May 2011 08:34:15 +0000]
drm/radeon/kms: properly handle bpc >8 in atom command tables

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agodrm/radeon/kms: DCE4.1 DIG encoders are fully routeable just like DCE3.2
Alex Deucher [Fri, 20 May 2011 08:34:14 +0000]
drm/radeon/kms: DCE4.1 DIG encoders are fully routeable just like DCE3.2

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agoMerge remote branch 'keithp/drm-intel-next' of ../drm-next into drm-core-next
Dave Airlie [Fri, 20 May 2011 01:30:02 +0000]
Merge remote branch 'keithp/drm-intel-next' of ../drm-next into drm-core-next

* 'keithp/drm-intel-next' of ../drm-next:
  drm/i915: initialize gen6 rps work queue on Sandy Bridge and Ivy Bridge
  drm/i915/sdvo: Reorder i2c initialisation before ddc proxy
  drm/i915: FDI link training broken on Ironlake by Ivybridge integration
  drm/i915: enable rc6 by default
  drm/i915: add fbc enable flag, but disable by default
  drm/i915: clean up unused ring_get_irq/ring_put_irq functions
  drm/i915: fix user irq miss in BSD ring on g4x

8 years agodrm/i915: initialize gen6 rps work queue on Sandy Bridge and Ivy Bridge
Jesse Barnes [Wed, 18 May 2011 20:51:43 +0000]
drm/i915: initialize gen6 rps work queue on Sandy Bridge and Ivy Bridge

It's not used on Ironlake, but is used on later generations, so make
sure it exists before we try to use it in the interrupt handlers.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>

8 years agodrm/i915/sdvo: Reorder i2c initialisation before ddc proxy
Chris Wilson [Tue, 17 May 2011 13:03:50 +0000]
drm/i915/sdvo: Reorder i2c initialisation before ddc proxy

The ddc proxy depends upon the underlying i2c bus being selected. Under
certain configurations, the i2c-adapter functionality is queried during
initialisation and so may trigger an OOPS during boot. Hence, we need to
reorder the initialisation of the ddc proxy until after we hook up the i2c
adapter for the SDVO device.

The condition under which it fails is when the i2c_add_adapter calls
into i2c_detect which will attempt to probe all valid addresses on the
adapter iff there is a pre-existing i2c_driver with the same class as
the freshly added i2c_adapter.

So it appears to depend upon having compiled in (or loaded such a
module before i915.ko) an i2c-driver that likes to futz over the
i2c_adapters claiming DDC support.

Reported-by: Mihai Moldovan <ionic@ionic.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>

8 years agodrm/i915: FDI link training broken on Ironlake by Ivybridge integration
Keith Packard [Tue, 17 May 2011 23:13:52 +0000]
drm/i915: FDI link training broken on Ironlake by Ivybridge integration

Commit 357555c00f8414057f0c12ee3f479f197264123d split out IVB-specific
register definitions for FDI link training, but a piece of that commit
stopped executing some critical code on Ironlake systems while leaving
it running on Sandybridge.

Turn that code back on both Ironlake and Sandybridge

Signed-off-by: Keith Packard <keithp@keithp.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>

8 years agodrm/i915: enable rc6 by default
Jesse Barnes [Thu, 5 May 2011 21:42:26 +0000]
drm/i915: enable rc6 by default

With FBC disabled by default, it should be safe to enable RC6.  So let's
give it a try.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>

8 years agodrm/i915: add fbc enable flag, but disable by default
Jesse Barnes [Thu, 5 May 2011 22:24:21 +0000]
drm/i915: add fbc enable flag, but disable by default

FBC has too many corner cases that we don't currently deal with, so
disable it by default so we can enable more important features like RC6,
which conflicts in some configurations.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31742
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>

8 years agodrm/i915: clean up unused ring_get_irq/ring_put_irq functions
Feng, Boqun [Thu, 28 Apr 2011 09:15:33 +0000]
drm/i915: clean up unused ring_get_irq/ring_put_irq functions

This patch depends on patch "drm/i915: fix user irq miss in BSD ring on
g4x".
Once the previous patch apply, ring_get_irq/ring_put_irq become unused.
So simply remove them.

Signed-off-by: Feng, Boqun <boqun.feng@intel.com>
Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>

8 years agodrm/i915: fix user irq miss in BSD ring on g4x
Feng, Boqun [Mon, 16 May 2011 08:02:39 +0000]
drm/i915: fix user irq miss in BSD ring on g4x

On g4x, user interrupt in BSD ring is missed.
This is because though g4x and ironlake share the same bsd_ring,
their interrupt control interfaces have _two_ differences.

1.different irq enable/disable functions:
On g4x are i915_enable_irq and i915_disable_irq.
On ironlake are ironlake_enable_irq and ironlake_disable_irq.
2.different irq flag:
On g4x user interrupt flag in BSD ring on is I915_BSD_USER_INTERRUPT.
On ironlake is GT_BSD_USER_INTERRUPT

Old bsd_ring_get/put_irq call ring_get_irq and ring_get_irq.
ring_get_irq and ring_put_irq only call ironlake_enable/disable_irq.
So comes the irq miss on g4x.

To fix this, as other rings' code do, conditionally call different
functions(i915_enable/disable_irq and ironlake_enable/disable_irq)
and use different interrupt flags in bsd_ring_get/put_irq.

Signed-off-by: Feng, Boqun <boqun.feng@intel.com>
Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
Cc: stable@kernel.org
Signed-off-by: Keith Packard <keithp@keithp.com>

8 years agodrm: fix nouveau_acpi build
Randy Dunlap [Wed, 11 May 2011 22:04:34 +0000]
drm: fix nouveau_acpi build

Fix build errors when CONFIG_ACPI is enabled but MXM_WMI is not enabled
by selecting both MXM_WMI and ACPI_WMI (the latter just for kconfig
dependencies):

nouveau_acpi.c:(.text+0x2400c8): undefined reference to `mxm_wmi_call_mxmx'
nouveau_acpi.c:(.text+0x2400cf): undefined reference to `mxm_wmi_call_mxds'
nouveau_acpi.c:(.text+0x2400fe): undefined reference to `mxm_wmi_call_mxmx'
nouveau_acpi.c:(.text+0x2402ba): undefined reference to `mxm_wmi_supported

Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

8 years agoMerge remote branch 'nouveau/drm-nouveau-next' of /ssd/git/drm-nouveau-next into...
Dave Airlie [Mon, 16 May 2011 01:53:27 +0000]
Merge remote branch 'nouveau/drm-nouveau-next' of /ssd/git/drm-nouveau-next into drm-core-next

* 'nouveau/drm-nouveau-next' of /ssd/git/drm-nouveau-next: (55 commits)
  drm/nouveau: make cursor_set implementation consistent with other drivers
  drm/nva3/clk: better pll calculation when no fractional fb div available
  drm/nouveau/pm: translate ramcfg strap through ram restrict table
  drm/nva3/pm: allow use of divisor 16
  drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table
  drm/nvc0/pm: correct core/mem/shader perflvl parsing
  drm/nouveau/pm: remove memtiming support check when assigning to perflvl
  drm/nva3: support for memory timing map table
  drm/nouveau: Associate memtimings with performance levels on cards <= nv98
  drm/nva3/pm: initial pass at set_clock() hook
  drm/nvc0/gr: calculate some more of our magic numbers
  drm/nv50: respect LVDS link count from EDID on SPWG panels
  drm/nouveau: recognise DCB connector type 0x41 as LVDS
  drm/nouveau: fix uninitialised variable warning
  drm/nouveau: Fix a crash at card takedown for NV40 and older cards
  drm/nouveau: Free nv04 instmem ramin heap at card takedown
  drm/nva3: somewhat improve clock reporting
  drm/nouveau: pull refclk from vbios on limits 0x40 boards
  drm/nv40/gr: oops, fix random bits getting set in engine obj
  drm/nv50: improve nv50_pm_get_clock()
  ...

8 years agodrm/nouveau: make cursor_set implementation consistent with other drivers
Marcin Slusarz [Sun, 1 May 2011 21:49:04 +0000]
drm/nouveau: make cursor_set implementation consistent with other drivers

When xorg state tracker wants to hide the cursor it calls set_cursor
with NULL buffer_handle and size=0x0, but nouveau refuses to hide it
because size is not 64x64... which is a bit odd. Both radeon and intel
check buffer_handle before validating size of cursor, so make nouveau
implementation consistent with them.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nva3/clk: better pll calculation when no fractional fb div available
Ben Skeggs [Wed, 27 Apr 2011 16:34:21 +0000]
drm/nva3/clk: better pll calculation when no fractional fb div available

The core/mem/shader clocks don't support the fractional feedback divider,
causing our calculated clocks to be off by quite a lot in some cases.  To
solve this we will switch to a search-based algorithm when fN is NULL.

For my NVA8 at PL3, this actually generates identical cooefficients to
the binary driver.  Hopefully that's a good sign, and that does not
break VPLL calculation for someone..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau/pm: translate ramcfg strap through ram restrict table
Ben Skeggs [Wed, 20 Apr 2011 04:36:13 +0000]
drm/nouveau/pm: translate ramcfg strap through ram restrict table

Hopefully this is how we're supposed to correctly handle when the RAMCFG
strap is above the number of entries in timing-related tables.

It's rather difficult to confirm without finding a configuration where
the ram restrict table doesn't map 8-15 back onto 0-7 anyway.  There's
not a single vbios in the repo which is configured differently..

In any case, this is probably still better than potentially reading
outside of the bounds of various tables..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nva3/pm: allow use of divisor 16
Ben Skeggs [Wed, 20 Apr 2011 04:15:49 +0000]
drm/nva3/pm: allow use of divisor 16

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table
Ben Skeggs [Wed, 20 Apr 2011 03:21:40 +0000]
drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/pm: correct core/mem/shader perflvl parsing
Ben Skeggs [Wed, 20 Apr 2011 03:15:02 +0000]
drm/nvc0/pm: correct core/mem/shader perflvl parsing

We need to parse some of these other entries still, but I've yet to
determine exactly which PLLs the rest map to.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau/pm: remove memtiming support check when assigning to perflvl
Ben Skeggs [Wed, 20 Apr 2011 01:34:39 +0000]
drm/nouveau/pm: remove memtiming support check when assigning to perflvl

Really not necessary here, we want to be able to see if/how we managed to
match a timingset to a performance level, even if we can't currently
program it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nva3: support for memory timing map table
Ben Skeggs [Wed, 20 Apr 2011 01:31:04 +0000]
drm/nva3: support for memory timing map table

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: Associate memtimings with performance levels on cards <= nv98
Martin Peres [Wed, 13 Apr 2011 22:46:19 +0000]
drm/nouveau: Associate memtimings with performance levels on cards <= nv98

v2 (Ben Skeggs): fix ramcfg strap, and remove bogus handling of perf 0x40

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nva3/pm: initial pass at set_clock() hook
Ben Skeggs [Fri, 15 Apr 2011 01:16:55 +0000]
drm/nva3/pm: initial pass at set_clock() hook

I still discourage anyone from actually doing this yet.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/gr: calculate some more of our magic numbers
Ben Skeggs [Mon, 18 Apr 2011 02:52:47 +0000]
drm/nvc0/gr: calculate some more of our magic numbers

Again, doesn't quite match NVIDIA's, but not sure it really matters.  This
will however, match the same rules we use to calculate the other related
grctx magics.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv50: respect LVDS link count from EDID on SPWG panels
Ben Skeggs [Mon, 18 Apr 2011 00:49:03 +0000]
drm/nv50: respect LVDS link count from EDID on SPWG panels

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: recognise DCB connector type 0x41 as LVDS
Ben Skeggs [Sun, 17 Apr 2011 23:57:48 +0000]
drm/nouveau: recognise DCB connector type 0x41 as LVDS

After looking at a number of different logs, it appears 0x41 likely
indicates the presense of an LVDS panel following the SPWG spec
(http://www.spwg.org/)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: fix uninitialised variable warning
Ben Skeggs [Sun, 17 Apr 2011 22:57:51 +0000]
drm/nouveau: fix uninitialised variable warning

Looks like a false positive to me, but, anyways!

Reported-by: Jimmy Rentz <jb17bsome@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: Fix a crash at card takedown for NV40 and older cards
Jimmy Rentz [Sun, 17 Apr 2011 20:15:09 +0000]
drm/nouveau: Fix a crash at card takedown for NV40 and older cards

NV40 and older cards (pre NV50) reserve a vram bo for the vga memory at
card init. This bo is then freed at card shutdown.  The problem is that
the ttm bo vram manager was already freed. So a crash occurs when the
vga bo is freed. The fix is to free the vga bo prior to freeing the ttm
bo vram manager. There might be other solutions but this seemed the
simplest to me.

Signed-off-by: Jimmy Rentz <jb17bsome@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: Free nv04 instmem ramin heap at card takedown
Jimmy Rentz [Sun, 17 Apr 2011 20:15:03 +0000]
drm/nouveau: Free nv04 instmem ramin heap at card takedown

Add a missing nv04 instmem ramin heap shutdown call.

Signed-off-by: Jimmy Rentz <jb17bsome@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nva3: somewhat improve clock reporting
Ben Skeggs [Thu, 14 Apr 2011 05:02:03 +0000]
drm/nva3: somewhat improve clock reporting

Definitely not 100% correct, but, for the configurations I've seen used
it'll read back the correct clocks now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: pull refclk from vbios on limits 0x40 boards
Ben Skeggs [Thu, 14 Apr 2011 01:25:26 +0000]
drm/nouveau: pull refclk from vbios on limits 0x40 boards

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv40/gr: oops, fix random bits getting set in engine obj
Ben Skeggs [Wed, 13 Apr 2011 08:33:15 +0000]
drm/nv40/gr: oops, fix random bits getting set in engine obj

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv50: improve nv50_pm_get_clock()
Emil Velikov [Mon, 11 Apr 2011 19:43:23 +0000]
drm/nv50: improve nv50_pm_get_clock()

Many of the nv50 cards have their shader and/or memory pll
disabled at some stage.
This patch addresses those cases, so that the function
returns the correct frequency.

When the shader pll is disabled, the blob reports 2*core clock
Whereas for memory, the data stored in the vbios. This action
is incorrect as some vbioses store a clock value that is less
than the refference clock of the pll.

Thus we are reporting the reff_clk as it is the frequency the
pll actually operates

v2 - Convert NV_INFO() messages to NV_DEBUG()
Provide more information in the actuall message

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau/pm: fix compilation failure when CONFIG_POWER_SUPPLY is not set
Martin Peres [Mon, 11 Apr 2011 22:55:44 +0000]
drm/nouveau/pm: fix compilation failure when CONFIG_POWER_SUPPLY is not set

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Reported-by: Stratos Psomadakis <psomas@ece.ntua.gr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/fifo: stick user area into a gpuobj rather than a bo
Ben Skeggs [Wed, 13 Apr 2011 03:55:17 +0000]
drm/nvc0/fifo: stick user area into a gpuobj rather than a bo

Contents will now be preserved across a suspend, unlike a pinned bo

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/gr: no need to store context in graph_fini()
Ben Skeggs [Wed, 13 Apr 2011 02:55:36 +0000]
drm/nvc0/gr: no need to store context in graph_fini()

PFIFO kickoff should have handled this for us.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/fifo: restore context table on resume
Ben Skeggs [Tue, 12 Apr 2011 09:38:06 +0000]
drm/nvc0/fifo: restore context table on resume

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/fifo: kick channels off during suspend
Ben Skeggs [Tue, 12 Apr 2011 08:51:39 +0000]
drm/nvc0/fifo: kick channels off during suspend

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/gr: better handling of fuc firmware
Ben Skeggs [Tue, 12 Apr 2011 08:50:36 +0000]
drm/nvc0/gr: better handling of fuc firmware

Allows per-chipset firmware to be installed, and keeps a copy in memory
for suspend/resume purposes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv50: support PMPEG on original nv50
Ben Skeggs [Tue, 12 Apr 2011 05:20:22 +0000]
drm/nv50: support PMPEG on original nv50

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv50: rename nv84_mpeg to nv50_mpeg
Ben Skeggs [Tue, 12 Apr 2011 05:19:54 +0000]
drm/nv50: rename nv84_mpeg to nv50_mpeg

In preparation for adding 0x50 support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv84: add support for PMPEG
Ben Skeggs [Mon, 4 Apr 2011 06:10:00 +0000]
drm/nv84: add support for PMPEG

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv40/vpe: add support for PMPEG
Ben Skeggs [Mon, 4 Apr 2011 06:08:24 +0000]
drm/nv40/vpe: add support for PMPEG

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0: implement support for copy engines
Ben Skeggs [Fri, 1 Apr 2011 06:10:08 +0000]
drm/nvc0: implement support for copy engines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nva3: implement support for copy engine
Ben Skeggs [Fri, 18 Mar 2011 00:25:59 +0000]
drm/nva3: implement support for copy engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: remove remnants of nouveau_pgraph_engine
Ben Skeggs [Fri, 1 Apr 2011 03:56:05 +0000]
drm/nouveau: remove remnants of nouveau_pgraph_engine

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: fix suspend failure path to reinitialise all engines
Ben Skeggs [Fri, 1 Apr 2011 03:26:35 +0000]
drm/nouveau: fix suspend failure path to reinitialise all engines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: remove remnants of nouveau_pgraph_engine from nouveau_channel
Ben Skeggs [Fri, 1 Apr 2011 03:17:25 +0000]
drm/nouveau: remove remnants of nouveau_pgraph_engine from nouveau_channel

The nouveau_wait_for_idle() call should hopefully not have been actually
necessary, we *do* wait for the channel to go idle already.  If it's
an issue somehow, the chipset-specific hooks can wait for idle themselves
before taking the lock.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: move set_tile_region to nouveau_exec_engine
Ben Skeggs [Fri, 1 Apr 2011 03:10:45 +0000]
drm/nouveau: move set_tile_region to nouveau_exec_engine

In the very least VPE (PMPEG and friends) also has this style of tile
region regs, lets make them just work if/when they get added.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv04/gr: move to exec engine interfaces
Ben Skeggs [Fri, 1 Apr 2011 03:03:56 +0000]
drm/nv04/gr: move to exec engine interfaces

Like nv10-nv50, needs cleanup.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv10/gr: move to exec engine interfaces
Ben Skeggs [Fri, 1 Apr 2011 02:50:55 +0000]
drm/nv10/gr: move to exec engine interfaces

Like nv20-nv50, needs cleanup.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv20-nv30/gr: move to exec engine interface
Ben Skeggs [Fri, 1 Apr 2011 02:32:03 +0000]
drm/nv20-nv30/gr: move to exec engine interface

A bit of cleanup done along the way, but, like nv40/nv50, needs more.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv40/gr: move to exec engine interfaces
Ben Skeggs [Fri, 1 Apr 2011 01:33:21 +0000]
drm/nv40/gr: move to exec engine interfaces

Like nv50, this needs a good cleanup.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0/gr: move to exec engine interfaces
Ben Skeggs [Fri, 1 Apr 2011 00:59:53 +0000]
drm/nvc0/gr: move to exec engine interfaces

Much nicer to do that nv50, the code was pretty much written to expect
such a change in the future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nv50/gr: move to exec engine interfaces
Ben Skeggs [Thu, 31 Mar 2011 23:50:18 +0000]
drm/nv50/gr: move to exec engine interfaces

This needs a massive cleanup, but to catch bugs from the interface changes
vs the engine code cleanup, this will be done later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: working towards a common way to represent engines
Ben Skeggs [Thu, 31 Mar 2011 05:40:43 +0000]
drm/nouveau: working towards a common way to represent engines

There's lots of more-or-less independant engines present on NVIDIA GPUs
these days, and we generally want to perform the same operations on them.
Implementing new ones requires hooking into lots of different places,
the aim of this work is to make this simpler and cleaner.

NV84:NV98 PCRYPT moved over as a test.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: remove some unused members from dev_priv
Ben Skeggs [Thu, 31 Mar 2011 03:55:49 +0000]
drm/nouveau: remove some unused members from dev_priv

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: move engine object creation into per-engine hooks
Ben Skeggs [Thu, 31 Mar 2011 03:44:16 +0000]
drm/nouveau: move engine object creation into per-engine hooks

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: use static vidshift of 2 on volt 0x30 tables
Ben Skeggs [Thu, 31 Mar 2011 00:39:44 +0000]
drm/nouveau: use static vidshift of 2 on volt 0x30 tables

Explanation is in the commit.  If anyone has an example of where this is
*not* the case, please report it!

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: improve memtiming table parsing
Roy Spliet [Sun, 27 Mar 2011 16:13:11 +0000]
drm/nouveau: improve memtiming table parsing

Improves the parsing of the memory timing table on NV50-NV98revA1 chipsets.

Added stepping to drm_nouveau_private to make sure newer NV98 (105M) is
zero rather than incorrect.

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0: decode gpc/hubclient on vm fault
Ben Skeggs [Mon, 28 Mar 2011 23:28:24 +0000]
drm/nvc0: decode gpc/hubclient on vm fault

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0: more vm fault reasons
Ben Skeggs [Mon, 28 Mar 2011 22:57:34 +0000]
drm/nvc0: more vm fault reasons

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nvc0: more vm fault engines
Ben Skeggs [Mon, 28 Mar 2011 14:52:59 +0000]
drm/nvc0: more vm fault engines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agodrm/nouveau: Fix missing whitespace checkpatch.pl errors.
Emil Velikov [Sat, 19 Mar 2011 23:31:54 +0000]
drm/nouveau: Fix missing whitespace checkpatch.pl errors.

This patch fixes messages such as
ERROR: space required after that ','
ERROR: spaces required around that '='

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>

8 years agodrm/nouveau: Fix brace placement checkpatch.pl errors.
Emil Velikov [Sat, 19 Mar 2011 23:31:53 +0000]
drm/nouveau: Fix brace placement checkpatch.pl errors.

Fix 'ERROR: that open brace { should be on the previous line'
Fix 'ERROR: else should follow close brace }'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>

8 years agodrm/nouveau: Clean up trailing whitespace and C99-style comments.
Emil Velikov [Sat, 19 Mar 2011 23:31:52 +0000]
drm/nouveau: Clean up trailing whitespace and C99-style comments.

Fix 'ERROR: trailing whitespace',
Fix 'ERROR: do not use C99 // comments'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>

8 years agodrm/nouveau: Fix indentation-related checkpatch.pl error messages.
Emil Velikov [Sat, 19 Mar 2011 23:31:51 +0000]
drm/nouveau: Fix indentation-related checkpatch.pl error messages.

Fix 'ERROR: code indent should use tabs where possible'
Fix 'ERROR: space required before the open parenthesis ('

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>

8 years agodrm/nouveau: name the boot perflvl "boot"
Martin Peres [Sat, 19 Mar 2011 21:44:35 +0000]
drm/nouveau: name the boot perflvl "boot"

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 years agoMerge remote branch 'keithp/drm-intel-next' of /ssd/git/drm-next into drm-core-next
Dave Airlie [Mon, 16 May 2011 00:45:40 +0000]
Merge remote branch 'keithp/drm-intel-next' of /ssd/git/drm-next into drm-core-next

* 'keithp/drm-intel-next' of /ssd/git/drm-next: (301 commits)
  drm/i915: split PCH clock gating init
  drm/i915: add Ivybridge clock gating init function
  drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB.
  drm/i915: Add support for fence registers on Ivybridge.
  drm/i915: Use existing function instead of open-coding fence reg clear.
  drm/i915: split clock gating init into per-chipset functions
  drm/i915: set IBX pch type explicitly
  drm/i915: add Ivy Bridge PCI IDs and driver feature structs
  drm/i915: add PantherPoint PCH ID
  agp/intel: add Ivy Bridge support
  drm/i915: ring support for Ivy Bridge
  drm/i915: page flip support for Ivy Bridge
  drm/i915: interrupt & vblank support for Ivy Bridge
  drm/i915: treat Ivy Bridge watermarks like Sandy Bridge
  drm/i915: manual FDI training for Ivy Bridge
  drm/i915: add swizzle/tiling support for Ivy Bridge
  drm/i915: Ivy Bridge has split display and pipe control
  drm/i915: add IS_IVYBRIDGE macro for checks
  drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later
  drm/i915: split enable/disable vblank code into chipset specific functions
  ...

8 years agodrm/i915: split PCH clock gating init
Jesse Barnes [Wed, 11 May 2011 16:49:31 +0000]
drm/i915: split PCH clock gating init

Ibex Peak and CougarPoint already require a different setting (added
here), and future chips will likely follow that precedent.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>