5 years agoARM: config: t12x: Enable ALC5639 codec
Preetham Chandru R [Thu, 19 Sep 2013 14:25:23 +0000]
ARM: config: t12x: Enable ALC5639 codec

Bug 1371618

Change-Id: I6eba8f5751607ad28c4e63a886d85c9ad6cba787
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/276727
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoregulator: Palmas: remove map voltage
Ajay Nandakumar [Tue, 17 Sep 2013 15:37:21 +0000]
regulator: Palmas: remove map voltage

Change-Id: I9fabf5e6de50a7bd2723789bfd7d0d84dc1e5f41
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/275824
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Tested-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoMerge 3.8 changes up to main-promo-2013.09.16-B1
Dan Willemsen [Thu, 19 Sep 2013 04:02:51 +0000]
Merge 3.8 changes up to main-promo-2013.09.16-B1

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoRevert "mmc: host: tegra: fixup NVQUIRKS ordering."
Bharat Nihalani [Wed, 18 Sep 2013 04:20:27 +0000]
Revert "mmc: host: tegra: fixup NVQUIRKS ordering."

This reverts commit cae15f158420e1b58f6477db93799a81e88148c1.

This is temporarily reverted to bring in the latest changes from main-3.8 as part of http://git-master/r/#/c/275425/1

Change-Id: Ibd3f87ded263485fb50d1e2390205e31dee2c2ce
Reviewed-on: http://git-master/r/276124
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: t124: Add late init to MACHINE_START
Shridhar Rasal [Tue, 17 Sep 2013 07:53:36 +0000]
ARM: tegra: t124: Add late init to MACHINE_START

With this Debug Sys file entries pertaining to clock is created
through late initcall.

Bug 1368791

Change-Id: Iba78701b88acd7ffdb83d76586823ef832d4ea5f
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/275632
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: ardbeg: Mask UHS modes
Shridhar Rasal [Tue, 17 Sep 2013 07:19:54 +0000]
arm: tegra: ardbeg: Mask UHS modes

UHS cards are failing to enumerate and also resulting into
device hanging. Disable UHS mode.

bug 1355600

Change-Id: I2b3c2a58475834de525caa54abcde656655c22e4
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/275631
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agommc: host: tegra: fixup NVQUIRKS ordering.
Shridhar Rasal [Mon, 16 Sep 2013 10:16:39 +0000]
mmc: host: tegra: fixup NVQUIRKS ordering.

Change-Id: I6879367274784ad973d29d4efcf3ca74857e9736
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/275630
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Eric Miao <emiao@nvidia.com>
Tested-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: dvfs: Account for GPU rail suspend time
Alex Frid [Wed, 11 Sep 2013 01:32:23 +0000]
ARM: tegra: dvfs: Account for GPU rail suspend time

Change-Id: Icefd90ebe4ae5bcad89e3a61b1c2fc69cded90b5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/272874
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: nvmap: attach->priv should be set during cache hit
Krishna Reddy [Fri, 13 Sep 2013 21:48:10 +0000]
video: tegra: nvmap: attach->priv should be set during cache hit

during cache hit, attach->priv is not set and causing
NULL pointer accesses.
optimize away on atomic call in unmap.

Change-Id: Ibb6ba979ecdb8fd27fd6023ce8ed3076176b86ff
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/274519
Reviewed-by: Alex Waterman <alexw@nvidia.com>

5 years agovideo: tegra: nvmap: skip dma_map for carveout
Krishna Reddy [Fri, 13 Sep 2013 17:26:18 +0000]
video: tegra: nvmap: skip dma_map for carveout

carveout has IOVA linear mapping setup. skip dma_map_sg_attr and
dma_unmap_sg_attr for carveout.

Change-Id: I0b32a28201dd272d1d114d961a27cc7fcb4fb9aa
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/274442
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>

5 years agotegra12: config: enable selinux to permissive mode
James Zhao [Thu, 12 Sep 2013 18:33:36 +0000]
tegra12: config: enable selinux to permissive mode

- Enable SELinux for JB MR2
- Set config option AUDIT, SECURITY, SECURITY_NETWORK,
  SECURITY_SELINUX, EXT4_FS_SECURITY
- All other defconfig changes are side effect of using
  menuconfig

Change-Id: I8fbe397a985956ebd70dc50b2ea3785aeef089f8
Signed-off-by: James Zhao <jamesz@nvidia.com>
Reviewed-on: http://git-master/r/270400
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Tested-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agostaging: iio: adc: palmas: Support extended delay mode
Jinyoung Park [Thu, 12 Sep 2013 10:14:27 +0000]
staging: iio: adc: palmas: Support extended delay mode

The extended delay mode is added 400us delay to help system settles
to loaded situation.

Bug 1287901
Bug 1356128

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/241371
(cherry picked from commit dbf82e2c05fbf7d9318e334240435043cd3f1e08)

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252881
(cherry picked from commit 2a8705828e3033490d73b4c9bbc1f8c4e7e755de)

Change-Id: I7965c89be6f5249110eae4c646c84f44e36257c8
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/273702
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agostaging: iio: adc: palmas: Force enable GPADC before start conversion
Jinyoung Park [Thu, 12 Sep 2013 10:21:34 +0000]
staging: iio: adc: palmas: Force enable GPADC before start conversion

To minimize conversion latency, force enable GPADC before start conversion.
If GPADC is not enabled, GPADC will be enabled by conversion request and
required about 800us delay time to turn-on GPADC.

Bug 1287901
Bug 1356128

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/241370
(cherry picked from commit a367bf0f8a17709cfe0bb5450715977831ce5c2e)

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/252878
(cherry picked from commit fc666db7a75bee13c2c9afc29c8bf7ca80835caf)

Change-Id: I467af0e26ae10e31e8f8a8c50ff3d30edacba9dc
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/273701
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agostaging: iio: adc: palmas: Support ADC reading with dual current for CH3
Jinyoung Park [Thu, 12 Sep 2013 09:00:00 +0000]
staging: iio: adc: palmas: Support ADC reading with dual current for CH3

Support ADC reading with dual current for GPADC channel3 .
This ADC reading with dual current for GPADC channel3 is required to do
the series resistance cancellation for thermal diode sensing.

Bug 1287901
Bug 1356128

Change-Id: Ib3be778a3ba8cbb3e938fc8be6e1140d17286969
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/273638
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agothermal: generic-adc-thermal: Support channel reading with dual mode
Jinyoung Park [Thu, 12 Sep 2013 07:15:46 +0000]
thermal: generic-adc-thermal: Support channel reading with dual mode

Support channel reading with dual mode.
This channel reading with dual mode is required to do the series
resistance cancellation for thermal diode sensing.

Bug 1287901
Bug 1356128

Change-Id: Id50ffa81a38f087b2abc0a23a9db5dd829b4198f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/273637
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoiio: inkern: Add functions to read channel with dual mode
Jinyoung Park [Thu, 12 Sep 2013 06:45:34 +0000]
iio: inkern: Add functions to read channel with dual mode

Added functions to read channel with dual mode.
The functions check a channel info attribute and the channel supports
dual mode then read channel.
If the channel doesn't support dual mode, return error value.

Bug 1287901
Bug 1356128

Change-Id: Ia2ffdf8eb6d05f95f763939dc413be5b06b7c605
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/273636
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: tn8 : register thermal throtte table
Diwakar Tundlam [Thu, 12 Sep 2013 23:00:52 +0000]
arm: tegra: tn8 : register thermal throtte table

Bug 1365843

Change-Id: Ief6c3798ef1b9f08c5c4958bc9da84b9c549bea7
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/273990
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agovideo: tegra: fb: preserve x/yoffset in check_var
Alexandre Courbot [Mon, 9 Sep 2013 08:39:51 +0000]
video: tegra: fb: preserve x/yoffset in check_var

tegra_fb_check_var() has an optional filter hook that is used for HDMI
displays. This hook works with an instance of struct fb_videomode and a
conversion from fb_var_screeninfo to fb_videomode is thus performed
prior to calling it (and back again since the hook might modify the
mode).

The issue is that fb_videomode has no equivalent of the xoffset
and yoffset member variables of fb_var_screeninfo, and that they are set
to 0 by fb_videomode_to_var(). This prevents double-buffering to work
when HDMI is the primary display: calls to the FBIOPUT_VSCREENINFO ioctl
always end up displaying the first page, since yoffset is invariably
reset.

This patch fixes this problem by preserving xoffset and yoffset in local
variables prior to calling the filter hook, and restoring them after
converting the mode back to fb_var_screeninfo.

Change-Id: Ie029ddc5549476113929bd7b483c2908a1d30192
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/273469
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: loki: jdi panel
Spencer Sutterlin [Thu, 12 Sep 2013 21:04:59 +0000]
ARM: tegra: loki: jdi panel

Bug 1321181
Bug 1323602

Change-Id: I789096e8de19bdd2c45d523f654bab9569bbdafe
Signed-off-by: Spencer Sutterlin <ssutterlin@nvidia.com>
Reviewed-on: http://git-master/r/273959
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: loki: separate loki panel logic
Spencer Sutterlin [Thu, 12 Sep 2013 20:54:21 +0000]
ARM: tegra: loki: separate loki panel logic

board-loki-panel.c was non-modular.  Previous commit removed
duplicate code between board-loki-panel.c and panel-l-720p-5.c,
but panel-l-720p-5.c and the loki/old thor panel are not
compatible.  Therefore, creating panel-l-720p-5-loki.c file.

Note board-roth-panel.c should stay untouched.

Bug 1321181
Bug 1323602

Change-Id: I89807db48290f7a89246b2cd1ab71735cab1f53f
Signed-off-by: Spencer Sutterlin <ssutterlin@nvidia.com>
Reviewed-on: http://git-master/r/273958
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: loki: nff/thor panel reorg
Spencer Sutterlin [Thu, 12 Sep 2013 20:37:55 +0000]
ARM: tegra: loki: nff/thor panel reorg

Removed lots of duplicate code between board-loki-panel.c
and panel-l-720p-5.c

Bug 1321181
Bug 1323602

Change-Id: I2cc9da9c0d879fbcc2dfd4e8b01b4d9616ba5cdd
Signed-off-by: Spencer Sutterlin <ssutterlin@nvidia.com>
Reviewed-on: http://git-master/r/273957
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: ardbeg: modify gpu regulator flags
Prashant Malani [Tue, 10 Sep 2013 20:10:37 +0000]
ARM: tegra: ardbeg: modify gpu regulator flags

Disable the always_on flag for arbeg
regulators. This is needed for both LP0 and idle
gk20a rail gating.

Bug 1364240
Bug 1318046

Change-Id: I8363fa1abc3746b89e6a153e501585a4e9822c06
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/272705
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: power: Re-direct GPU rail gating control
Alex Frid [Tue, 10 Sep 2013 04:29:47 +0000]
ARM: tegra12: power: Re-direct GPU rail gating control

Replaced direct access to regulator APIs during GPU rail-gating with
dvfs in-band rail control to avoid usage conflict between dvfs and
power gating code.

Bug 1364240
Bug 1318046

Change-Id: Icf5f92bc358f1e701b176054427ffeb308bcabe7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/272357
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Add in-band dvfs rail state control
Alex Frid [Tue, 10 Sep 2013 03:22:00 +0000]
ARM: tegra: dvfs: Add in-band dvfs rail state control

Unlike CPU and core rails, GPU rail can be turned on/off via regulator
interface by the code running on CPU (CPU and core rails can be only
controlled by side-band h/w interfaces). This commit added in-band
dvfs s/w interfaces for GPU rail state control.

Bug 1364240
Bug 1318046

Change-Id: I864e0d503387dc70e534e02c379a5e30816aedaa
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/272356
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agodevfreq: Round frequencies in transition stats
Arto Merilainen [Thu, 12 Sep 2013 08:02:04 +0000]
devfreq: Round frequencies in transition stats

Transition statistics required that the new frequency was *exactly*
as it was in the table. However, we may unexpectedly select a
frequency that is not in the table (i.e. thermal limit forces us to
select a bit lower frequency, the original DVFS table does not hold
for the current PLL for some reason, etc.)

This patch modifies transition table to select the best candidate
from the frequency table.

Bug 1366760

Change-Id: I4329f77e733f5f1d39b9d9c3aebe3681a0760d90
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/273596
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoASoC: Tegra: Set DAP pins to normal in voice call
Ravindra Lokhande [Tue, 11 Jun 2013 14:40:12 +0000]
ASoC: Tegra: Set DAP pins to normal in voice call

Dap pins needs to be normal during voice call connection and tristated
when disconnected.

Bug 1306086

Change-Id: I6889e43336fc3db595918340fb8e2ee76ee3c3a8
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/237660
(cherry picked from commit c1e82329e11da5e47b030c1a2abc68614274c9b6)
Reviewed-on: http://git-master/r/238843
(cherry picked from commit 907daab7821a4a48fd0eca5c6937b06d1de612f5)
Reviewed-on: http://git-master/r/271504
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agolib/decompressors: fix "no limit" output buffer length
Alexandre Courbot [Wed, 11 Sep 2013 21:23:53 +0000]
lib/decompressors: fix "no limit" output buffer length

When decompressing into memory, the output buffer length is set to some
arbitrarily high value (0x7fffffff) to indicate the output is, virtually,
unlimited in size.

The problem with this is that some platforms have their physical memory at
high physical addresses (0x80000000 or more), and that the output buffer
address and its "unlimited" length cannot be added without overflowing.
An example of this can be found in inflate_fast():

/* next_out is the output buffer address */
out = strm->next_out - OFF;
/* avail_out is the output buffer size. end will overflow if the output
 * address is >= 0x80000104 */
end = out + (strm->avail_out - 257);

This has huge consequences on the performance of kernel decompression,
since the following exit condition of inflate_fast() will be always true:

} while (in < last && out < end);

Indeed, "end" has overflowed and is now always lower than "out".  As a
result, inflate_fast() will return after processing one single byte of
input data, and will thus need to be called an unreasonably high number of
times.  This probably went unnoticed because kernel decompression is fast
enough even with this issue.

Nonetheless, adjusting the output buffer length in such a way that the
above pointer arithmetic never overflows results in a kernel decompression
that is about 3 times faster on affected machines.

Change-Id: I7bae4c30195d587d0ae892baf7bd5fe0e0c73a4b
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Jon Medhurst <tixy@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Reviewed-on: http://git-master/r/274082
Reviewed-by: David Schalig <dschalig@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agousb: ehci: Tegra: Disable parameters for PM QoS
Antti P Miettinen [Tue, 21 Aug 2012 07:56:38 +0000]
usb: ehci: Tegra: Disable parameters for PM QoS

For testing purposes it is useful to be able to disable
CPU frequency boost.

Bug 1359445

Change-Id: I33a0369205a1df5cfe97915442e33511941686a8
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/273042
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agousb: gadget: Tegra: Disable parameters for PM QoS
Antti P Miettinen [Tue, 21 Aug 2012 07:56:38 +0000]
usb: gadget: Tegra: Disable parameters for PM QoS

For testing purposes it is useful to be able to disable
CPU frequency boost.

Bug 1359445

Change-Id: Iab4363b23372055819adaf66265762fb9d1a0a3a
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/273043
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoextcon: palmas: confirm cable state with line state
Laxman Dewangan [Thu, 12 Sep 2013 17:51:11 +0000]
extcon: palmas: confirm cable state with line state

It is observed that USB sub module of the Palmas device does not
show the correct cable state of USB-ID and but line state of
the ID line shows correct state.

Hence before updating the cable state, reconfirm it based on line
state register.

bug 1367328
bug 1367205

Change-Id: I16975eaf76038c3a2b9f378b0e1e1081f01eb229
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/273836
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: pmc: T12x wake status clear fix
Bitan Biswas [Thu, 12 Sep 2013 10:17:51 +0000]
ARM: tegra: pmc: T12x wake status clear fix

Problem:
 T12x PMC Wake status gets cleared during
 LP0 resume

Cause:
 During LP0 resume, T12x APBDEV_PMC_DPD_ENABLE_0
 register's TSC_MULT_EN bit needs to be
 programmed after DPD_ENABLE is cleared.

Fix:
 Cleared the DPD_ENABLE bit along with
 TSC_MULT_EN bit clear during LP0 resume
 for T12x

bug 1367291

Change-Id: Ifcc25709ffb012b4e6d4d0bb325f12d1ede94413
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/273646
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agostaging: nvshm: dump iobuf on check error
Martin Chabot [Tue, 6 Aug 2013 13:30:31 +0000]
staging: nvshm: dump iobuf on check error

Bug 1328322

Change-Id: Ie9eb5981bdbf8b156631e6f3ed7892692e0cdad8
Signed-off-by: Martin Chabot <mchabot@nvidia.com>
Reviewed-on: http://git-master/r/258729
(cherry picked from commit 098bf6caf68027d990589fcf6885a51b3d6c462f)
Reviewed-on: http://git-master/r/271981
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Herve Fache <hfache@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoarm: tegra: dalmore: enable 3.3V Bruce power rail
Julien Vuillaumier [Mon, 9 Sep 2013 14:28:52 +0000]
arm: tegra: dalmore: enable 3.3V Bruce power rail

Bruce modem module has PCIE M.2 connectivity that uses 3.3 power
supply. Thus enable TPS65090 FET3 power rail when platform
configuration indicates modem module support.

bug 1364648

Change-Id: Icbd71cb52ceed85c6c857272e99bec707d21a5ea
Signed-off-by: Julien Vuillaumier <jvuillaumier@nvidia.com>
Reviewed-on: http://git-master/r/272070
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: dp: Disable aux pad when unused
Animesh Kishore [Fri, 6 Sep 2013 13:44:36 +0000]
video: tegra: dp: Disable aux pad when unused

Bug 1322685

Change-Id: Iff12b3e8c881b9465ad6f9817ab15b17db8df5e8
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/271521
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoUSB: tegra: Set RTUNEP
Suresh Mangipudi [Thu, 12 Sep 2013 09:09:16 +0000]
USB: tegra: Set RTUNEP

H/W team suggests that the value of RTUNE_P should be programmed to 0xA

Bug 1367110

Change-Id: Ib23cea4b297a986c15fd0f6efdca90246eff1cff
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/273614
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarch: arm: tegra: remove IMX135 reset from ardbeg
Pablo Ceballos [Tue, 10 Sep 2013 00:02:53 +0000]
arch: arm: tegra: remove IMX135 reset from ardbeg

The reset signal isn't actually wired to the IMX135 sensor on ardbeg
and toggling it resets the AR0261 sensor as well. So I'm removing it
from the IMX135 power_on/power_off functions so it doesn't interfere
with AR0261.

Bug 1346577
Bug 1349267

Change-Id: I9487ca4d9efcb85a998c9127261b2c749acfdcea
Signed-off-by: Pablo Ceballos <pceballos@nvidia.com>
Reviewed-on: http://git-master/r/272215
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: Ardbeg: update XUSB HSIC PROD setting
JC Kuo [Thu, 12 Sep 2013 10:45:04 +0000]
ARM: tegra: Ardbeg: update XUSB HSIC PROD setting

T124 HSIC TX_RTUNEP value is changed to 4'b1010 from 4'b1100 in order
to meet spec.

bug 1367110

Change-Id: I6dce94fff195eabb0f8a417fac114df006c034b0
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/273681
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: WK Tsai <wtsai@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Joy Wang <joyw@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agovideo: tegra: nvmap: Enable dmabuf stashing
Alex Waterman [Fri, 13 Sep 2013 00:03:04 +0000]
video: tegra: nvmap: Enable dmabuf stashing

Enable nvmap to stash IOVA mappings instead of immediately freeing
them. This reduces some map over head at the cost of using more
IOVA space. Since there is more IOVA space than physical memory for
most systems this is a good trade off.

Change-Id: I5ff7e6f6c3967ccd67acb9cb47569a516568acd0
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/274016
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: nvmap: Replace nvmap's pin code
Alex Waterman [Thu, 5 Sep 2013 21:33:11 +0000]
video: tegra: nvmap: Replace nvmap's pin code

Replace nvmap's pin/unpin code with calls to the DMA API. All the
currently supported operations are still supported and have
identical functionality.

Bug 1356091

Change-Id: Ibd04c27e4c46702ca90ab7ff7387420f3127fdb5
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/266236
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoboard-loki: set pinmux and clock to enable HDMI
Shaoming Feng [Tue, 13 Aug 2013 23:14:59 +0000]
board-loki: set pinmux and clock to enable HDMI

Change-Id: Ie16fad993a82aea6277b63f8a9c73f04534cd321
Signed-off-by: Shaoming Feng <shaomingf@nvidia.com>
Reviewed-on: http://git-master/r/261210
(cherry picked from commit f07233f707a5bbe9a60211c46eea48d5b64552e1)
Reviewed-on: http://git-master/r/273411
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agodrivers: misc: tfa9887.c Fix compiler warnings
Philip Rakity [Tue, 9 Jul 2013 08:42:51 +0000]
drivers: misc:  tfa9887.c Fix compiler warnings

Change-Id: I534763919f7282826e1c333ae6dc6b77cc552a00
Signed-off-by: Philip Rakity <prakity@nvidia.com>
(cherry picked from commit 365ca84afaa814717e5e088fd04a20a917966e6b)
Reviewed-on: http://git-master/r/271456
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarch: config: ov5693 ov7695 ad5823 bring up on TN8
David Wang [Thu, 5 Sep 2013 01:07:53 +0000]
arch: config: ov5693 ov7695 ad5823 bring up on TN8

Added sensor and focuser to config files for
ov5693, ov7695 and ad5823 on t124 for TN8/WeaponX.

Bug 1349826
Bug 1349914

Change-Id: I5130071bd33b8718e0708a11a5d18be827d362cc
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/270940
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM:tegra:ardbeg: various senor bringup on TN8
David Wang [Thu, 5 Sep 2013 01:09:07 +0000]
ARM:tegra:ardbeg: various senor bringup on TN8

Modified ardbeg board file to support ov5693,
ov7695 sensors and ad5823 focuser to work on TN8.
Also added matching reguatlor names for
ov5693 and ov7695 in tn8 board power file.

Bug 1349826
Bug 1349914

Change-Id: I8a4268a23d0fe46a290719261fdfbd4f235443e3
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/270941
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: powergate: Removing the warning message
Chao Xu [Mon, 9 Sep 2013 22:25:23 +0000]
ARM: tegra: powergate: Removing the warning message

for dispB refcount underflow. This is an expected behavior for the
boards with some specific PMUs.

Bug 1357978
Bug 1364243

Change-Id: Ie1ce7c2b770463078655f7b1a94f046fa67cb2ea
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/272165

5 years agovideo: tegra: fb: Set FB smem_start value regardless LPAE setting
Chao Xu [Mon, 9 Sep 2013 22:11:41 +0000]
video: tegra: fb: Set FB smem_start value regardless LPAE setting

This workaround allows FB driver works if FB buffer address is no
more than 32bits, even if LPAE is enabled.

A complete fix is tracked by bug 1356233.

Change-Id: I733c73b4cade88f0dd9399906473bea7b62fff01
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/273313
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Xue Dong <xdong@nvidia.com>

5 years agoARM: tegra12: dvfs: Move GPU Vmin thermal profile
Alex Frid [Thu, 12 Sep 2013 03:47:40 +0000]
ARM: tegra12: dvfs: Move GPU Vmin thermal profile

Moved definition of GPU Vmin thermal profile to GPU cvb dvfs table, so
that different profiles can be defined for different SKUs.

Bug 1273253

Change-Id: Ibb304c5cbbf09f1083bccfd3efc975f78a733aa4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/273479
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Enable CPU Vmin thermal profile
Alex Frid [Thu, 12 Sep 2013 03:31:49 +0000]
ARM: tegra12: dvfs: Enable CPU Vmin thermal profile

Change-Id: Ibcc153b28cd9f9d3bebbbd923fce1fa9345cae11
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/273478
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dvfs: Rename cvb dvfs thermal trips field
Alex Frid [Thu, 12 Sep 2013 00:21:58 +0000]
ARM: tegra: dvfs: Rename cvb dvfs thermal trips field

Renamed cvb dvfs data field therm_trips_table to vmin_trips_table, so
that field designation is clear.

Change-Id: I6a8295b1bebca248960829ed67c32addf1679cca
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/273477
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoiommu/tegra: smmu: Optimize alloc_ptbl
Hiroshi Doyu [Wed, 11 Sep 2013 11:56:28 +0000]
iommu/tegra: smmu: Optimize alloc_ptbl

Without TEGRA_IOMMU_SMMU_LINEAR, zero initialized page table is
enough. Optimize the way to zero initialize.

Bug 1290869

Change-Id: Iaf71157c999663bc6216a9d086d2ccb093add1e6
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/273152
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Remove page validataion
Hiroshi Doyu [Wed, 11 Sep 2013 11:43:59 +0000]
iommu/tegra: smmu: Remove page validataion

This page is returned from alloc_ptbl() and it's ensured that page is
valid at this point. This code is inside of loop for map_sg/map_pages
so that this affects the perf.

Bug 1290869

Change-Id: I2b2165851a320496d650d6335127168f02882bed
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/273151
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoiommu/tegra: smmu: Optimize smmu_iommu_map_sg()
Hiroshi Doyu [Wed, 11 Sep 2013 11:39:42 +0000]
iommu/tegra: smmu: Optimize smmu_iommu_map_sg()

Avoid nested loop in it for the better perf.

Bug 1290869

Change-Id: Id87a7233f1118dfc76c130bc7f3c7ccaad5ec507
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/273150
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra: power: Disable CPU sensors for cluster switch
Alex Frid [Wed, 11 Sep 2013 05:12:27 +0000]
ARM: tegra: power: Disable CPU sensors for cluster switch

Disabled soctherm CPU sensors before switch to LP cluster, if CRAIL
is controlled by s/w. Re-enabled sensors respectively after switch
back to G cluster. This is done to avoid bogus temperature reading
during cluster switch when s/w is turning CPU rail on/off.

Bug 1351735

Change-Id: Ia4864cdbfa622ca42533fe717a358a89dd262bc0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/272916
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: power: Fix suspend initialization
Alex Frid [Wed, 4 Sep 2013 19:43:29 +0000]
ARM: tegra: power: Fix suspend initialization

Added initialization for crail suspend platform data entries missed
by commit 14ddff697632b88f1f89aa2c62f5a053e37c7e27.

Moved CL-DVFS initialization to regulator init call (from fixed
regulator init) to setup dfll bypass call-backs before suspend
initialization.

Bug 1351735

Change-Id: Ia4bbf260873630db40e7fdf0966cd319fe265a4f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/270294
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoiommu/tegra: smmu: Rename "nents" to "npages"
Hiroshi Doyu [Wed, 11 Sep 2013 11:02:24 +0000]
iommu/tegra: smmu: Rename "nents" to "npages"

The parameter "nents" is confusing. Actually this is number of pages,
"npages". Rename this for the following changes in map_sg().

Bug 1290869

Change-Id: If9ff6740e4f3954f9742d9fe4c4039ca601970e1
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/273149
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agomedia:video:tegra: Add Fuse ID read for IMX132.
Amey Asgaonkar [Fri, 26 Jul 2013 23:08:14 +0000]
media:video:tegra: Add Fuse ID read for IMX132.

Adds support for reading fuse ids for IMX132 sensor.

Bug 1307361

Change-Id: I7b750a91d3ead5fac383e85df013b78d7fe4c6a2
Signed-off-by: Amey Asgaonkar <aasgaonkar@nvidia.com>
Reviewed-on: http://git-master/r/254573
(cherry picked from commit 77b2dc05d8d051659140343531d9ce34e01efeea)
Reviewed-on: http://git-master/r/272670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agonet: mhi mhi_dgram Fix warning messages
Philip Rakity [Tue, 9 Jul 2013 09:33:39 +0000]
net: mhi  mhi_dgram  Fix warning messages

printk arguments not in correct order
___func__ is the char *

Change-Id: I7c39e64dcb20026ac015942380dbd523f198cd5e
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/246607
(cherry picked from commit d2ba6bacbacfcd94b54785c9a8afb4136003805d)
(cherry picked from commit 7bb3b61ce23ca715e3847101c7defba6278b17c8)
(cherry picked from commit f9f6b595db1fd0e33347a447e717a9d7aae82570)
Reviewed-on: http://git-master/r/269574
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoinput: misc: Fix unused compiler warning
Philip Rakity [Fri, 5 Jul 2013 12:09:41 +0000]
input: misc:  Fix unused compiler warning

use direct functions rather than read / write wrappers
removes compiler warning about unused code.

Change-Id: I95682dcd24ed2e27eed6022352d6829cd29e2317
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/245374
(cherry picked from commit 86d030622f296bf5667dd3967ebc7cf6c2351d01)
(cherry picked from commit 8f9e2896a2bc4f04b44f954ce1da235611f20deb)
Reviewed-on: http://git-master/r/271478
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoxhci-tegra fix warnings on unused function
Philip Rakity [Mon, 9 Sep 2013 16:29:45 +0000]
xhci-tegra fix warnings on unused function

remove unused function warning for save_ctle_context()
the function IS used for T12x but not T11x

/nvidia/DEV_KERNEL/kernel/drivers/usb/host/xhci-tegra.c:1768:13:
warning: 'save_ctle_context' defined but not used [-Wunused-function]

Change-Id: I22aa17fcb4afca9db1356f3017b86d09c28c1814
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/272034
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agohwmon: ina230: fix negative power readings
Deepak Nibade [Mon, 26 Aug 2013 13:47:33 +0000]
hwmon: ina230: fix negative power readings

- show_power2 api calculates power using shunt voltage
- if shunt voltage is negative, power and current readings
  are also calculated negative
- fix this by taking absolute value of shunt voltage

Bug 1353426

Change-Id: I10deb33a0297af52da88385b105edd9bc2649d94
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/266129
(cherry picked from commit bdfa16243edcac9b07bbbe7133374494f4ef3b6f)
Reviewed-on: http://git-master/r/273608
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm: tegra12: spi: Set RX_TAP_DELAY depending on speed
Shardar Shariff Md [Wed, 11 Sep 2013 13:04:27 +0000]
arm: tegra12: spi: Set RX_TAP_DELAY depending on speed

Set rx_tap_delay to 10 when speed > 35MHz and board
specific rx_clk_tap_delay data is zero.

Bug 1245131

Change-Id: Ie38469dac8d80737da5e45b9022ef1276b7fc883
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/273189
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: pmc: ensure pmc base is not null
Krishna Yarlagadda [Wed, 11 Sep 2013 12:48:08 +0000]
usb: pmc: ensure pmc base is not null

If tracking data is called before pmc init is set, it
would result in kernel panic. Fill pmc base before accessing
pmc registers.

Bug 1334159

Change-Id: I0bd80cef9cdd873792a3d6ece49a56d4b11de608
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/273183
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: pinmux-t124: Change drive for UART2/3
Pradeep Goudagunta [Tue, 10 Sep 2013 09:47:44 +0000]
ARM: tegra: pinmux-t124: Change drive for UART2/3

Change default drive for UART2 and UART3 CTRL pads as per
HW suggestion.

Bug 1346563

Change-Id: I2f5d376e17955d91407fe7f9d8e67e88adbc6641
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/272483
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: dma-mapping: Fix build warning
Hiroshi Doyu [Thu, 12 Sep 2013 06:36:11 +0000]
ARM: dma-mapping: Fix build warning

Inconsistent type for set_dma_ops()

Change-Id: I78ebecaa335cafe627dc673cf54590d3354a7dc8
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/273536
Reviewed-by: Vandana Salve <vsalve@nvidia.com>

5 years agoARM: tegra12: clock: set/clear XUSB pll pad iddq
Leo He [Wed, 28 Aug 2013 13:17:51 +0000]
ARM: tegra12: clock: set/clear XUSB pll pad iddq

Set XUSB pll pad override and iddq when disable pll clock.
Clear XUSB pll pad override and iddq when enable pll clock.

Bug 1350181

Change-Id: Iefe1dba52d861ad1d2892e6cdfa89b5b53825cb8
Signed-off-by: Leo He <leoh@nvidia.com>
Reviewed-on: http://git-master/r/267371
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoregulator: palmas: fix voltage configuration with LDO8
Laxman Dewangan [Wed, 11 Sep 2013 11:04:03 +0000]
regulator: palmas: fix voltage configuration with LDO8

When LDO8 is in tracking mode, the voltage output is
Vout = 450000 + selector * 25000

and when it is non-tracking mode then the voltage output is
Vout = 900000 + selector * 50000

Based on the tracking mode of the LDO8, setting register for voltage.

bug 1366215

Change-Id: I44080a5fdd3b0bb2828f550477592cdd6d556c9f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/273055
GVS: Gerrit_Virtual_Submit
Tested-by: Terry Wang <terwang@nvidia.com>

5 years agoarm: tegra: tn8: Add regulator client for as364x
Hayden Du [Thu, 12 Sep 2013 06:02:10 +0000]
arm: tegra: tn8: Add regulator client for as364x

bug 1361907

Change-Id: I8977349516040e02f652a51babd0d435a15044c9
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/273522
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agomedia: platform: tegra: IMX135: 1920x1080 settings
Kushal Shah [Wed, 11 Sep 2013 20:17:20 +0000]
media: platform: tegra: IMX135: 1920x1080 settings

Set correct clock, size, timing and gain settings value
in various registers for 1920x1080 mode.

Bug 1364810

Change-Id: I17b2187dc06902fb9774666b63784c713ba38f2a
Signed-off-by: Kushal Shah <kshah@nvidia.com>
Reviewed-on: http://git-master/r/273325
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: tn8: set vdd_rtc voltage to 0.9v
Hunk Lin [Wed, 11 Sep 2013 03:32:34 +0000]
arm: tegra: tn8: set vdd_rtc voltage to 0.9v

LDO8 tracking is disabled in TN8, so set it to always 0.9v per HW.

Bug 1292907

Change-Id: I5bb4eccf93bab2f175b9a911df014316ad501aac
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/272879
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoxhci: tegra: support hsic pretend connect
JC Kuo [Mon, 12 Aug 2013 07:54:35 +0000]
xhci: tegra: support hsic pretend connect

When HSIC port is being used to connect some HSIC device which gets
powered-on before Tegra XUSB does, the HSIC CONNECT signal sent by
device is likely missed. In addition, HSIC device isn't likely to resend
CONNECT.
Tegra XUSB supports "hsic pretend connect" which means firmware can
manually direct HSIC ports from "RxDetect" to "Polling". We added one
firmware mailbox message for this purpose. That allows driver to makeup
for the missed CONNECT.

bug 1341852

Change-Id: Ibf87b4790ce587f37f4f46cb660c25782562cccb
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/267195
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: ardbeg: Pass vcore limits in plat data
Naveen Kumar Arepalli [Wed, 11 Sep 2013 13:25:10 +0000]
ARM: tegra: ardbeg: Pass vcore limits in plat data

Pass boot core voltage, nominal core voltage, min vcore override
voltage limits through platform data for sdmmc1/3/4.

Bug 1344651
Bug 1344649
Bug 1340258

Change-Id: Ibb234f03f0c750c3ba645280ca2d72485959a74e
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/273195
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoRM: tegra: Enable TEGRA_VDD_CORE_OVERRIDE
Naveen Kumar Arepalli [Wed, 11 Sep 2013 13:09:42 +0000]
RM: tegra: Enable TEGRA_VDD_CORE_OVERRIDE

Select TEGRA_VDD_CORE_OVERRIDE if TEGRA_EMC_SCALING_ENABLE
is enabled.

SDMMC Driver uses dvfs API's to set override voltages.
Hence TEGRA_VDD_CORE_OVERRIDE should be enabled.

Bug 1344651
Bug 1344649
Bug 1340258

Change-Id: Ibe4d3d1eb0a92abde98590436bc87f4a7bb2ed76
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/273194
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agodma: tegra: De-init channel isr_handler when releasing
Chaitanya Bandi [Wed, 11 Sep 2013 08:16:18 +0000]
dma: tegra: De-init channel isr_handler when releasing

Set the isr_handler to NULL while releasing a channel

Bug 1354798

Change-Id: Idad5b3f257d1613b7a5de1e47e684ed0457fa093
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/272992
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agomedia:platform:tegra:fuse id for ar0261
Amey Asgaonkar [Fri, 30 Aug 2013 02:20:44 +0000]
media:platform:tegra:fuse id for ar0261

adds code for reading fuse id for ar0261.

Bug 1330898

Change-Id: Iad27adafe34e1d0ed6165b1f8ae9c7d257beef11
Signed-off-by: Amey Asgaonkar <aasgaonkar@nvidia.com>
Reviewed-on: http://git-master/r/268282
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: clock: Add PERIPH_ON_APB to MIPI-CAL
Kaz Fukuoka [Wed, 11 Sep 2013 18:06:42 +0000]
ARM: tegra: clock: Add PERIPH_ON_APB to MIPI-CAL

bug 1363948

Change-Id: I8df09b8d121358a56255e32147cbc6345f69151b
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/273275
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: clock: Add PERIPH_ON_APB to SATA
Kaz Fukuoka [Wed, 11 Sep 2013 17:41:50 +0000]
ARM: tegra12: clock: Add PERIPH_ON_APB to SATA

Ported from Tegar30 Change-Id: I12be16dbc2614224ba852216a645d0f84c795334

bug 1363948

Change-Id: If9e59db37969431f5c1f0a51da4c8fe82a22eb9c
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/273269
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: dc: Fix CRC read on one shot mode
Michael Frydrych [Tue, 10 Sep 2013 12:44:33 +0000]
video: tegra: dc: Fix CRC read on one shot mode

Wait for frame_end interrupt at most once per flip
in one shot mode, even if CRC is read multiple times
after the flip.

bug 1366106

Change-Id: Ie872e81e85bda500caab48728b7cd4c3b7db535f
Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-on: http://git-master/r/272580
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoarm: tegra12: Add CPU EDP support for SKU 1
Diwakar Tundlam [Tue, 10 Sep 2013 22:00:35 +0000]
arm: tegra12: Add CPU EDP support for SKU 1

Bug 1342499

Change-Id: I4913e9981df6c3222af94d3e415910bb82434ece
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/272740
Reviewed-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoALSA: HDA: wait for IRQ handlers
Sang-Hun Lee [Wed, 28 Aug 2013 21:11:10 +0000]
ALSA: HDA: wait for IRQ handlers

Problem description:
 - Even after disabling interrupts on the module, interrupt handlers
   could be running on other CPUs.

Fix description:
 - When disabling interrupts, also wait for any interrupt handler
   to finish as well

Bug 1353286

Change-Id: I59bde67c51341cf52ca5f7f7a31a45d9f9887666
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/267543
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agomedia:video:tegra:as364x deafult max torch current
David Wang [Fri, 16 Aug 2013 01:31:49 +0000]
media:video:tegra:as364x deafult max torch current

Added deafult max torch current to the as364x config
and limit calculation based on max total current for
2 leds.

bug 1346615

Change-Id: I006f041728b74cc2171bebb34532af4d40d94f87
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/270955
Reviewed-by: Michael Stewart <mstewart@nvidia.com>
Reviewed-by: Pablo Ceballos <pceballos@nvidia.com>
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoarm:mach-tegra:ardbeg max torch current for as364x
David Wang [Fri, 16 Aug 2013 01:39:12 +0000]
arm:mach-tegra:ardbeg max torch current for as364x

Added max torch current for as364x pdata in the
ardbeg sensor board file.

bug 1346615

Change-Id: If412fbecf61ba0f719ad7db94693042a7ee60d95
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/270954
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoregulator: palmas: pass regulator voltage through descriptor
Laxman Dewangan [Wed, 11 Sep 2013 09:22:59 +0000]
regulator: palmas: pass regulator voltage through descriptor

In place of adding callback to get the rail voltage of fixed rail like
extreg, chargepmup, pass the regulator voltage through descriptor.

Change-Id: I028344f363584a66c8bb46dadacb53f35b51a210
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/273023
GVS: Gerrit_Virtual_Submit

5 years agoregulator: core: provide fixed voltage in desc for single voltage rail
Laxman Dewangan [Wed, 11 Sep 2013 09:18:41 +0000]
regulator: core: provide fixed voltage in desc for single voltage rail

If given rail has the single voltage (n_voltages = 1) then provide the
rail voltage through regulator descriptor so that core can use this
value for finding voltage.

This will avoid the implementation of the callback for get_voltage() or
list_voltage() callback on regulator driver.

Change-Id: Ia148194cde37df2e5b1447e8c550072d8738af71
signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/273021
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: host: Use new MC flush API
Terje Bergstrom [Mon, 9 Sep 2013 10:52:25 +0000]
video: tegra: host: Use new MC flush API

Use new tegra_mc_flush() and tegra_mc_flush_done() to have a better
control on which MC clients are reset.

Bug 1355069

Change-Id: I759cdecbdf9e76254bcc4cd6441bbb464d0ea45b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/272009
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: New tegra_mc_flush() API
Terje Bergstrom [Mon, 9 Sep 2013 10:51:01 +0000]
ARM: tegra: New tegra_mc_flush() API

Introduce new tegra_mc_flush() and tegra_mc_flush_done() calls. They
give better granilarity on which client is flushed than
tegra_powergate_mc_flush() and tegra_powergate_mc_flush_done().

Bug 1355069

Change-Id: I1723238f0b25809cabef10a3fa6a063736d92a2c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/272008
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Add ISPB hotreset on powergate
Terje Bergstrom [Mon, 9 Sep 2013 08:37:13 +0000]
video: tegra: host: Add ISPB hotreset on powergate

ISPB was not set to hotreset when power gating.

Bug 1355069

Change-Id: Ibdc53f4e9dea399e29660d75d361ab09359d96cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/272006
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Add VI reset sequence
Terje Bergstrom [Mon, 9 Sep 2013 07:18:07 +0000]
video: tegra: host: Add VI reset sequence

We do not reset VI from CAR, but instead only reset its MCCIF.

Bug 1355069

Change-Id: I152fdb62d3b0b82731634ed3f891ee4a7f085e0f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/271961
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Alloc iomem before module init
Terje Bergstrom [Mon, 9 Sep 2013 07:46:28 +0000]
video: tegra: host: Alloc iomem before module init

Allocate and request IOMEM resources for all clients before calling
nvhost_module_init(). Also moves setting of callbacks to the SoC
specific file.

Bug 1355069

Change-Id: Ic7483dba969be8e5e985d5abbba11393afdc2a2d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/271960
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Add reset override
Terje Bergstrom [Mon, 9 Sep 2013 06:51:36 +0000]
video: tegra: host: Add reset override

Add a reset callback that drivers can use for overriding the default
reset sequence.

Bug 1355069

Change-Id: I789f28978d60e20e2244251e395d665da098c769
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/271959
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Add register access to vi.1
Terje Bergstrom [Fri, 6 Sep 2013 10:16:18 +0000]
video: tegra: host: Add register access to vi.1

Tegra124 has one VI, but we have two channels for it, vi and vi.1. We
do that by creating a platform device vi.1. The aperture of VI needs
to be accessible from both channels.

Bug 1346075
Bug 1355069

Change-Id: I555244f14488551770f037277f4a8c267fb9aa69
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/271510
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Make second ISP a real device
Terje Bergstrom [Thu, 5 Sep 2013 13:15:36 +0000]
video: tegra: host: Make second ISP a real device

Second ISP is actually a separate ISP unit, not a part of first ISP.
Reflect that in device setup.

Bug 1346075
Bug 1355069

Change-Id: I5ef6c1c50b6114b97942a85ab438e49da19fce47
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/271509
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoregulator: max77660: fix compile warnings
Philip Rakity [Mon, 22 Jul 2013 10:11:20 +0000]
regulator: max77660: fix compile warnings

Change-Id: Ifd2202d642c8d8c7e29c9f8cdbd1a3ace03d54ac
Signed-off-by: Philip Rakity <prakity@nvidia.com>
(cherry picked from commit fde0f5498800b09a13b3f50d92a025a24459a991)
Reviewed-on: http://git-master/r/271470
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agonet: mhi: Fix compiler warnings
Philip Rakity [Fri, 5 Jul 2013 10:08:51 +0000]
net: mhi:  Fix compiler warnings

Change-Id: Ib862e0c63309b5fb57636a413747e414bca4cda4
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/245336
(cherry picked from commit 3bcc5973b22bcba4a14c1ba4f75f60969c867af4)
(cherry picked from commit 12ca14abb53cb653583149add13681b0133c3e90)
(cherry picked from commit 063da7274c54ccf9418eddceff4cb88c8bb6368c)
Reviewed-on: http://git-master/r/269575
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: hub: enable autosuspend for all devices
Krishna Yarlagadda [Fri, 6 Sep 2013 13:47:18 +0000]
usb: hub: enable autosuspend for all devices

enable autosuspend for all the devices enumerated to
save power. If device is wakeup capable and inactive it
will suspend and no need to manually set it.

Bug 1324116

Change-Id: Ic53e4d49ededa68626e16c73d2e4babb2c84e5b4
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/271522
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarm: tegra: spi: fix rx_tap_delay
Shardar Shariff Md [Fri, 6 Sep 2013 11:11:15 +0000]
arm: tegra: spi: fix rx_tap_delay

Instead on using rx_tap_delay value, tx_tap_delay value
is passed to SPI_RX_TAP_DELAY macro resulting in
undesired value in command2 reg.

Change-Id: I4592e98b240a7d23a81507bddf80e81008f73a7d
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/271475
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: spi: Make rx_tap_delay = tx_tap_delay
Shardar Shariff Md [Tue, 10 Sep 2013 06:06:31 +0000]
arm: tegra: spi: Make rx_tap_delay = tx_tap_delay

rx_tap_delay is not being used in spi tegra driver
instead tx_tap_delay been used in place of rx_tap_delay
Making rx_tap_delay equal to tx_tap_delay to avoid any
issues when fixing rx_tap_delay issue

Change-Id: I8a06766fc217a8a2bd46ab676d579ec56ff3e22d
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/272341
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: xhci: set tracking data using pmc api
Krishna Yarlagadda [Thu, 5 Sep 2013 17:28:19 +0000]
usb: xhci: set tracking data using pmc api

set tracking data using pmc api for snps when there is
atleast one snps port in use.

Bug 1334159

Change-Id: Id15f31ba487d8ad07485509002392821b99bf8f8
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/270910
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: snps: move tracking data to pmc
Krishna Yarlagadda [Thu, 5 Sep 2013 17:25:34 +0000]
usb: snps: move tracking data to pmc

move tracking data api to pmc code and update
using thsi api

Bug 1334159

Change-Id: Iaf9172545749c558716e94c49fb1e57587a0d25b
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/270909
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tn8: SMPS10-OUT1 source the sw regulator for HDMI
Laxman Dewangan [Wed, 11 Sep 2013 07:45:40 +0000]
ARM: tn8: SMPS10-OUT1 source the sw regulator for HDMI

HDMI switch regulator is sourced by SMPS-OUT1. Registering
SMPS10-OUT1 and correcting supply of HDMI switch regulator.

bug 1364346

Change-Id: I62703d60d0e4f544dbc3c7c55ea6f3ea8652c459
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/272967
Tested-by: Hayden Du <haydend@nvidia.com>

5 years agoARM: tegra: Ardbeg: Changing LDO8 LP0 voltage
Terry Wang [Wed, 4 Sep 2013 11:53:42 +0000]
ARM: tegra: Ardbeg: Changing LDO8 LP0 voltage

Changing ldo8 LP0 voltage from 1V to 0.9V for
Ardbeg with TI PMIC module E1735.

Bug 1317293

Change-Id: I3766ee888156591bca5bb6816409a43f91b4ec52
Signed-off-by: Terry Wang <terwang@nvidia.com>
Reviewed-on: http://git-master/r/264216
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tn8: register all fixed regulator as part of arch init
Laxman Dewangan [Tue, 10 Sep 2013 13:26:53 +0000]
ARM: tn8: register all fixed regulator as part of arch init

In place of doing all fixed regulator registration on sys_initcall_sync(),
registering it during the tn8 drivers initialisation.

Change-Id: I1d3cd353430b893687157d414f9c8cd5e584e69c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/272608