5 years agoARM: tegra: PMC DT support
Bitan Biswas [Fri, 19 Jul 2013 20:59:06 +0000]
ARM: tegra: PMC DT support

PMC DT support changes are as follows:
 - Downstream code needs local changes in addition
   to upstream PMC DT support change to compile fine.
   Common clock framework (CCF) is not enabled downstream
   today as a result we cannot switch to upstream version
   of the function set_power_timers today.
 - All PMC platform data from board files is not available
   in DT bindings upstream. Using the board passed
   values in such cases to ensure that functionality
   is intact.
 - Further, if DT attribute values do not match
   board platform data settings the board setting
   is used for the time being.

bug 1173104

Change-Id: Ife63ab84178c5aa4371bfee188ce919a99f651fc
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/263727

5 years agousb: otg: tegra: detect device cable through pmu
Rohith Seelaboyina [Wed, 21 Aug 2013 04:38:05 +0000]
usb: otg: tegra: detect device cable through pmu

Device cable and OTG cable should be detected through pmu
as extcon framework notifies when change is detected
in either vbus or id, registering for notifications to only
one of them will lead to handling notifications for
unwanted events.

Bug 1345401

Change-Id: I0da42fbf715bbcf32bf3741ab045997c43cebf77
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/263872
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: dts: tegra: add the PM configurations of PMC
Joseph Lo [Wed, 3 Apr 2013 11:31:52 +0000]
ARM: dts: tegra: add the PM configurations of PMC

Adding the PM configuration of PMC when the platform support suspend
function.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit a44a019d45820eaeeb449450caa9e43f1f00a09b)

bug 1173104

Change-Id: Ifb6a03ae1c4e73eda6dde4e7d792613497ccde2c
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/263726

5 years agoARM: dt: tegra: add bindings of power management configurations for PMC
Joseph Lo [Wed, 3 Apr 2013 11:31:46 +0000]
ARM: dt: tegra: add bindings of power management configurations for PMC

The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different
configurations. The power management configurations of PMC is
represented as some properties. The system needs to define the
properties when the system supports deep sleep mode (i.e. suspend).

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 4b51ccbc469facb7b589a71c2a4ae47d3e425d02)

bug 1173104

Change-Id: Ib9c6430ffd39a4794898c3790bac176878a0474f
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/263723

5 years agoARM: tegra: moving the CPU power timer function to PMC driver
Joseph Lo [Wed, 3 Apr 2013 11:31:28 +0000]
ARM: tegra: moving the CPU power timer function to PMC driver

The CPU power timer set up function was related to PMC register. Now moving
it to PMC driver. And it also help to clean up the PM related code later.

The timer was calculated based on the input clock of PMC. In this patch, we
also get the clock from DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 0337c3e0c3cbbb3a4f411c292f52fcc314abae67)

bug 1173104

Change-Id: I03a80b2c0cfcb5223b1b113f395ef3899eafd06e
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/263722

5 years agoARM: tegra: add clock source of PMC to device trees
Joseph Lo [Wed, 3 Apr 2013 11:31:27 +0000]
ARM: tegra: add clock source of PMC to device trees

Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 7021d1220584ab1e6efd3d59da47b65674d9896a)

bug 1173104

Change-Id: I29af11f2bfd60d6e16a67bf27112d35d2cca8125
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/263721

5 years agoARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114
Joseph Lo [Tue, 26 Feb 2013 16:27:42 +0000]
ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114

The PMC HW is not 100% compatible across all Tegra series. We need to
specify each of them in the DT match table.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 88c4aba92bc57334119bcff58ac87152c3f2981e)

bug 1173104

Change-Id: If9c0324b37f48406104969e70a7dc360980794aa
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/263719

5 years agoARM: tegra12: clock: Disable VDE clock during init on Si
Somasundaram S [Mon, 19 Aug 2013 15:21:32 +0000]
ARM: tegra12: clock: Disable VDE clock during init on Si

Change-Id: I811d13e4a5ac4fa852e69d4391234f2fc5584f49
Signed-off-by: Somasundaram S <somasundaram@nvidia.com>
Reviewed-on: http://git-master/r/263386
Tested-by: Somu Sundaram <somasundarams@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: laguna: add delay for fixed regulator
Bibek Basu [Tue, 13 Aug 2013 09:32:46 +0000]
ARM: tegra: laguna: add delay for fixed regulator

add delay after fixed regulator initialization.
This prevents the race in accessing hdmi & audio
i2c before enabling the fixed regulator.

Bug 1342355

Change-Id: I4bcad3b8b63f06f6c0c79c37f7cb53c753565c4a
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/263258
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agotty: serial: full GCOV_PROFILE
Konsta Holtta [Tue, 20 Aug 2013 05:56:31 +0000]
tty: serial: full GCOV_PROFILE

Enable GCOV profiling in serial when enabled in defconfig.

Bug 1227962

Change-Id: I13a2ad9dfa3a8e5a58059bd7f5a207036f3d3d8e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/264343
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: pcie: Fix LP0 functionality
Jay Agarwal [Thu, 8 Aug 2013 12:31:41 +0000]
ARM: tegra: pcie: Fix LP0 functionality

Remove unnecessary Flag to allow complete
PADS initialization in resume

Bug 1344668

Change-Id: I7bb56c51bb15338a3c8cb32aa534c7085388b242
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/263691
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>

5 years agoARM: tegra12: clock: Add "PERIPH_ON_APB" flag
Alex Frid [Wed, 21 Aug 2013 19:30:49 +0000]
ARM: tegra12: clock: Add "PERIPH_ON_APB" flag

Added "PERIPH_ON_APB" flag to SDMMC clocks.

Bug 1348234

Change-Id: Ibfa0197ace50985e2fb2d71f7b6253df8354850c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/264529
GVS: Gerrit_Virtual_Submit
Tested-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: ardbeg: Update SDMMC1,3 pad settings
Pavan Kunapuli [Wed, 14 Aug 2013 07:28:29 +0000]
ARM: tegra: ardbeg: Update SDMMC1,3 pad settings

Updating SDMMC1 and SDMMC3 pad settings based on the characterization
results.

Bug 1347531

Change-Id: Ib612a5866e158dd9df524b5bacb43a9cd4b1a4b3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/264391
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: select PINCTRL_TEGRA114 for Tegra11 Soc
Laxman Dewangan [Wed, 21 Aug 2013 13:40:05 +0000]
ARM: tegra: select PINCTRL_TEGRA114 for Tegra11 Soc

Change-Id: I13810ba2461af82c4db161aeba50077c1d53c9de
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/264386

5 years agoserial: tegra: move header to linux/platform_data
Laxman Dewangan [Wed, 21 Aug 2013 14:00:37 +0000]
serial: tegra: move header to linux/platform_data

Move serial-tegra header file to platform_data and renamed
as serial-tegra from serial_tegra.

Change-Id: I5c7b761192e40591453f626c3b6376742f9e5b70
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/264389

5 years agoarm: t124: Populate tegra-gpio from device tree.
Hayden Du [Wed, 21 Aug 2013 07:58:31 +0000]
arm: t124: Populate tegra-gpio from device tree.

Bug 1352814

Change-Id: I840dbe7b2163ab413de0e02fbd23c8611d43cfa7
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/264257
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra12: config: enable AS3722_ADC_EXTCON config
Rakesh Bodla [Fri, 16 Aug 2013 03:56:26 +0000]
ARM: tegra12: config: enable AS3722_ADC_EXTCON config

Enable AS3722_ADC_EXTCON config to enable continuous scanning in
AMS3722 ADC channel.

Bug 1325641

Change-Id: Id3868fc1bff3d1fa9596a31f1d24fb220f09f2fe
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/264171
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: ardbeg: USB ID detection using AMS PMU
Rakesh Bodla [Tue, 13 Aug 2013 08:42:26 +0000]
ARM: tegra: ardbeg: USB ID detection using AMS PMU

Enable USB ID detection using AMS PMU

Bug 1325641
Bug 1294722

Change-Id: If42683b5bc012c4598b8004c8b2d4f506a4864ad
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/264172
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agodrivers: media: video: detect platform at runtime
Chetan Kumar N G [Mon, 1 Jul 2013 21:43:11 +0000]
drivers: media: video: detect platform at runtime

This change is a part of the effort to enable runtime
platform detection and reduce compile-time conditionals.

Bug 1333554

Change-Id: Ia56fd49a0e4900f059e5f442a43734c21259a125
Signed-off-by: Chetan Kumar N G <chetankumarn@nvidia.com>
Reviewed-on: http://git-master/r/264033
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoarm: tegra: Register throttling once per platform
Diwakar Tundlam [Tue, 20 Aug 2013 20:07:58 +0000]
arm: tegra: Register throttling once per platform

Also removed tegra-hard from loki until really needed

Bug 1345131
Bug 1315460

Change-Id: I253e25ee698ce06f905c70a3b249eaa7779d5e97
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/264020
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>

5 years agoARM: tegra12: dvfs: enable GPU dvfs config
Prashant Malani [Fri, 19 Jul 2013 01:36:28 +0000]
ARM: tegra12: dvfs: enable GPU dvfs config

Change-Id: I7a2ff7cf4a3d3312cb25b7d975c8c630809058de
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/263494
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: ardbeg: decrease Vmin for vdd_gpu
Prashant Malani [Tue, 30 Jul 2013 01:27:48 +0000]
ARM: tegra: ardbeg: decrease Vmin for vdd_gpu

Decrease minimum possible voltage for gpu rail
for TI regulator devices to allow gpu DVFS Vmin
to be reached.

Bug 1329868

Change-Id: I2b27195a8bfab9d40054ec2f6e490a5cd60f25b9
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/263493
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: Disable temporal dithering for some board/panels
Chao Xu [Mon, 12 Aug 2013 21:40:16 +0000]
ARM: tegra: Disable temporal dithering for some board/panels

Temporal dithering causes DC to generate inconsistent CRC values,
which is inconvenient for the display tests.

Bug 1343680.

Change-Id: I5adbc35c20e92b7174278caffa71b75e952fa0ce
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/263435
Reviewed-by: Xue Dong <xdong@nvidia.com>

5 years agoARM: tegra12: dvfs: fix gpu dvfs settings
Prashant Malani [Tue, 20 Aug 2013 23:34:19 +0000]
ARM: tegra12: dvfs: fix gpu dvfs settings

Update vdd_gpu rail settings so that we can reach the lowest voltage
setting of 810 mV.

Also change the 700 MHz entry to 702 MHz, since GPU clock can not reach
700, Without this, setting 700 would result in voltage being set to the
next higher range.

Bug 1352610

Change-Id: I19b1f759a0b88acc4d52e2bf87966ef8407ded82
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/264115
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: gk20a: increase the timeout for clock registers.
Kevin Huang [Thu, 1 Aug 2013 16:12:45 +0000]
video: tegra: gk20a: increase the timeout for clock registers.

Bug 1340570

Change-Id: I2be4f43c242f6d3ecbc6466d4ebf2f38522433bd
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/263520
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agoARM: tegra: powergate: Support unbalanced powergate/ungate
Chao Xu [Tue, 20 Aug 2013 20:11:18 +0000]
ARM: tegra: powergate: Support unbalanced powergate/ungate

In Ardbeg AMS system DC could generate unbalanced powergate/ungate
requests, depending on HDMI HPD state during dc probing phase. In
stead of fixing the requests from dc side, this change allows the
driver to tolerate this unbalanced requests.

Bug 1332587.

Change-Id: I7839894c2a3ff6ab7c223b639e5e300589293c85
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/264024

5 years agoarch: config: tegra update mods defconfig
Vivek Aseeja [Wed, 21 Aug 2013 00:34:51 +0000]
arch: config: tegra update mods defconfig

Enable SQUASHFS, RAISERFS, FSCACHE, TMPFS etc
Disable PPP support

Change-Id: I16eda205066ad64bac84a54edb4fdd88eb732c51
Signed-off-by: Vivek Aseeja <vaseeja@nvidia.com>
Reviewed-on: http://git-master/r/264118
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Lael Jones <lajones@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: gk20a: increase GVA space to 32GB.
Kevin Huang [Thu, 8 Aug 2013 18:44:34 +0000]
video: tegra: gk20a: increase GVA space to 32GB.

Bug 1240060

Change-Id: I8402a81d5faea4186e850a681d085cfbccb71bee
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/263530
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agoarm: t124: Add "tegra-gpio" entry for Device Tree.
Hayden Du [Wed, 21 Aug 2013 07:00:33 +0000]
arm: t124: Add "tegra-gpio" entry for Device Tree.

Bug 1352814

Change-Id: I44752c2f453e9accb594a8c0c250cbd48165c703
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/264238
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: Assert reset when power ungating
Terje Bergstrom [Wed, 7 Aug 2013 10:06:26 +0000]
ARM: tegra: Assert reset when power ungating

On Tegra14, Ensure unit is in reset when powering it back on.

Bug 1329416
Bug 1331777
Bug 1322046

Change-Id: I91817d5f4f6f04e34e22f4c204fb88dec2dd180b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/259539
(cherry picked from commit 3cffcb33f0039a34ba70f582e42b4b011b6786e8)
Reviewed-on: http://git-master/r/264236
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: Assert reset when power ungating
Terje Bergstrom [Wed, 31 Jul 2013 05:34:10 +0000]
ARM: tegra: Assert reset when power ungating

Ensure unit is in reset when powering it back on.

Bug 1329416
Bug 1331777
Bug 1322046

Change-Id: I8ef6646a8fe2ae85fdb836f3222678e5f77a784c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/256139
(cherry picked from commit 814f276c512cd49abbf15c64e14f8a9bbeb22d39)
Reviewed-on: http://git-master/r/264235
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: make DTV config independent of TEGRA_SYSTEM_DMA
Laxman Dewangan [Wed, 21 Aug 2013 07:34:27 +0000]
video: tegra: make DTV config independent of TEGRA_SYSTEM_DMA

Config TEGRA_SYSTEM_DMA is going to be remove and hence removing
its reference.

Change-Id: Ida4a6c9ea809842cc12b1fdd4f0ee7540b08dacf
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/264242

5 years agochromeos: config: remove TEGRA_SYSTEM_DMA
Laxman Dewangan [Wed, 21 Aug 2013 07:32:48 +0000]
chromeos: config: remove TEGRA_SYSTEM_DMA

This config is no more used and hence removing this.

Change-Id: Ib34e072ce5eeb178dce7e9e58e755e39c03b263a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/264241

5 years agoiommu/tegra: smmu: Use dma_map_linear to reserve
Hiroshi Doyu [Wed, 21 Aug 2013 04:58:26 +0000]
iommu/tegra: smmu: Use dma_map_linear to reserve

Use dma_map_linear instead of iommu_map to reserve this area against
being overwritten by other clients.

Bug 1297607

Change-Id: Iaef0a9d819dc64623a19d3124466fc90842563af
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/264254
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: dma-mapping: Set iommu_ops before attach
Hiroshi Doyu [Wed, 21 Aug 2013 04:59:44 +0000]
ARM: dma-mapping: Set iommu_ops before attach

Make iommu_ops available before iommu_attach_devce()

Bug 1297607

Change-Id: I41f6f8c71e7056f67f8245bbcddd1cd6f3ecf5bf
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/264253
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: Enable VI by default
Terje Bergstrom [Tue, 20 Aug 2013 08:15:03 +0000]
video: tegra: Enable VI by default

Enable building VI by default if nvhost is built in.

Change-Id: Ie8f03a2ccbe88a20e7e0151827bb32425e6f2a4a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/263765

5 years agoARM: config: tegra12: enable SUSPEND_TIME
Hunk Lin [Wed, 21 Aug 2013 07:16:00 +0000]
ARM: config: tegra12: enable SUSPEND_TIME

Enable suspend_time so we can see how much time spent in suspend.

Change-Id: I0db4e97647b3a0c62c5e80d84a1c5defa99d9d83
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/264237
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: Allow query of default ASID
Terje Bergstrom [Tue, 20 Aug 2013 07:53:46 +0000]
ARM: tegra: Allow query of default ASID

We need to use tegra_smmu_get_asid() for reading the ASID
SYSTEM_DEFAULT by passing NULL device. Fix tegra_smmu_fixup_swgids()
so that it does not crash when a NULL device is passed to it.

Bug 1351530

Change-Id: I0d4512d12904f215276134a57f3b7a8084ba5e0f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/263757
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agodrivers: tegra: gk20a: Fix free() failure.
Kevin Huang [Thu, 25 Jul 2013 01:15:20 +0000]
drivers: tegra: gk20a: Fix free() failure.

Fix free() failure due to pgsz mismatch between alloc() and map().
If FIX_OFFSET is set, map() choose the pgsz according to its VA
range.

Bug 1240060

Change-Id: Icff0a32c57368118d59d628609d3900a8b76a83d
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/263529
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: pcie: Add stub runtime PM support
Jay Agarwal [Mon, 19 Aug 2013 09:35:43 +0000]
ARM: tegra: pcie: Add stub runtime PM support

1. Enable Runtime PM in probe after whole pcie
   enumeration is done.
2. Notify the events to MC clock domain whenever
   pcie partition is power off/on.
3. Add pcie entry to MC clock domain.

Bug 1293809

Change-Id: Id83fcbd8f2342cb14d24e7c34e175d4268819240
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/263279
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoserial: remove legacy tegra_hsuart driver
Laxman Dewangan [Tue, 20 Aug 2013 14:13:25 +0000]
serial: remove legacy tegra_hsuart driver

There is  new high speed serial driver as serial-tegra and
legacy driver tegra_hsuart is no more used. Hence removing this
driver.

bug 1349711

Change-Id: I414a0cb24026e2bb9df46843739e449f45c437cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/263930
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: config: remove CONFIG_SERIAL_TEGRA_HS
Laxman Dewangan [Tue, 20 Aug 2013 14:11:27 +0000]
ARM: tegra: config: remove CONFIG_SERIAL_TEGRA_HS

The config variable CONFIG_SERIAL_TEGRA_HS is no more used
and hence removing it.

bug 1349711

Change-Id: I0aa2bc60e8e4afca31350cc1b1797912a449526e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/263929
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: remove tegra_hsuart reference
Laxman Dewangan [Tue, 20 Aug 2013 14:08:43 +0000]
ARM: tegra: remove tegra_hsuart reference

Legacy tegra hsuart driver is no more supported and hence remove its
reference.

bug 1349711

Change-Id: I0fcc3d73083a3479ae806f8e5b953caa986ca11a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/263928

5 years agovideo: tegra: nvmap: Fix usermode access
Tuomas Tynkkynen [Tue, 20 Aug 2013 14:39:29 +0000]
video: tegra: nvmap: Fix usermode access

An access_ok() check does not allow dereferencing usermode pointers
directly, __get_user must be used.

Bug 1352454

Change-Id: I762b1976d35361cb4fba58d762073594e2187493
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/264006
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra: ardbeg: Enable E1735 CPU rail early startup
Alex Frid [Fri, 16 Aug 2013 05:48:09 +0000]
ARM: tegra: ardbeg: Enable E1735 CPU rail early startup

For ardbeg E1735 PMIC module:
- enabled CPU rail early startup
- reduced CPU rail power good time from 2.5ms to 2.0ms

Bug 1351735

Change-Id: I7a37bb886a56609dadb6ed55dfee14bb5681b31e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/262866
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: tegra: power: Support CPU rail early startup
Alex Frid [Fri, 16 Aug 2013 02:03:07 +0000]
ARM: tegra: power: Support CPU rail early startup

Added an option for cluster switch procedure to turn CPU rail ON
via direct access to PMC registers before disabling interrupts,
and then continue scheduler execution while the rail is ramping up.

RAM repair is executed in s/w as well after rail ramp is done. Only
non-CPU partition is power-gated/un-gated by flow controller in the
atomic section. However, rail ramp in this case is serialized with
CPU save context. Hence the trade-off: early startup option reduces
interrupt disabled time during cluster switch, but increases overall
cluster switch time.

Bug 1351735

Change-Id: I5ff9afb2aa6b27b9aa4b2318ee2740dee4908e2f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/262864
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoarm: tegra: enable emc dvfs
Xue Dong [Sun, 18 Aug 2013 02:14:13 +0000]
arm: tegra: enable emc dvfs

bug 1343186

Change-Id: Ib90a83ca8e506680cc26c40b1db7b8aca857cf20
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/263589
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agovideo: tegra: nvmap: add config option to specify init fillup size
Krishna Reddy [Fri, 16 Aug 2013 18:40:41 +0000]
video: tegra: nvmap: add config option to specify init fillup size

add config option to specify init fillup size of page pools
this allows to balance the boot time and allocation time

Change-Id: Id79f86a7e06e9da5f69f40009fa371816bb595c9
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/264022
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: mm: cpa: correct the print message
Krishna Reddy [Thu, 15 Aug 2013 16:57:04 +0000]
arm: mm: cpa: correct the print message

Change-Id: Ic613343ba5ce7c4ec25182c8e7151454b6990e5b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/263971
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra12: dvfs: Add GPU cvb dvfs
Alex Frid [Tue, 20 Aug 2013 03:06:15 +0000]
ARM: tegra12: dvfs: Add GPU cvb dvfs

Added continues virtual binning (cvb) for Tegra12 GPU. The cvb dvfs
table specifies a predetermined set of frequencies, and polynomial
coefficients to calculate minimum core voltage required for GPU to
run at the respective frequency on the part with particular speedo
value.

During dvfs initialization the cvb dvfs table is converted to legacy
dvfs format (that specifies maximum frequencies for a predetermined
set of voltages). Hence, no changes in run-time dvfs operations are
needed.

Actual cvb coefficient for Tegra12 are not available, yet. So, in this
commit cvb tables are artificially constructed to match existing legacy
dvfs limits for GPU.

Change-Id: Ied687f32cbd372b10f04486ad122ca62ba0f6b3a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/263701
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Tested-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Combine dvfs matching functions.
Alex Frid [Tue, 20 Aug 2013 03:35:11 +0000]
ARM: tegra12: dvfs: Combine dvfs matching functions.

Combined core dvfs and cpu cvb dvfs matching functions.

Change-Id: Ied5e8496138391cc2aa9b4d6b9ec017272eaa2fa
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/263700
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Tested-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: power: Add CPU rail s/w control
Alex Frid [Sat, 17 Aug 2013 03:37:20 +0000]
ARM: tegra12: power: Add CPU rail s/w control

Added CPU rail to the list of Tegra12 power partitions. This would
allow powering CRAIL up/down via direct s/w access to PMC registers
(as an alternative to flow controller procedures).

Bug 1351735

Change-Id: Ib02aa9041148807f83668dc63c8bb1ea1ccca8ea
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/262861
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agovideo: tegra: host: fix gk20a suspend/resume code
Prashant Malani [Wed, 14 Aug 2013 22:29:18 +0000]
video: tegra: host: fix gk20a suspend/resume code

When nvhost powergating is disabled, gk20a does
not get taken down correctly during system
suspend. Also, it does not get re-initialized
during system resume. We therefore fix the
suspend and resume calls to do the gk20a
tear down and re-init correctly.

Bug 1346337

Change-Id: I4340dd89e229eb58d2e7b53a7dda3b65f9bdd4f3
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/263505
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agovideo: tegra: gk20a: update power_on correctly
Prashant Malani [Mon, 19 Aug 2013 22:22:19 +0000]
video: tegra: gk20a: update power_on correctly

The power_on flag should be set to true at the
very end of gk20a's init sequence, and to false
at the very beginning of the tear down sequence

Bug 1348359

Change-Id: I6b75a8b4b6c0775112987913e5b63e09c1ab4bdf
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/263537
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoarm: tegra: update dvfs core voltage
Xue Dong [Sun, 18 Aug 2013 02:10:08 +0000]
arm: tegra: update dvfs core voltage

bug 1343186

Change-Id: If6a0c4018da79d22f9242a068b18f6ba8ff7a520
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/263588
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: run pll_c at 792Mhz
Xue Dong [Sun, 18 Aug 2013 02:09:13 +0000]
arm: tegra: run pll_c at 792Mhz

bug 1343186

Change-Id: I207a8e09c36f7bd405e2d6bf75a85913caa11be3
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/263587
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: add emc dvfs table for Ardbeg
Xue Dong [Sun, 18 Aug 2013 02:01:21 +0000]
arm: tegra: add emc dvfs table for Ardbeg

bug 1343186

Change-Id: I57bc2460b67cc6bc128cdc22144ee12aed840a79
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/263586
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: emc dvfs clk change sequence
Xue Dong [Sun, 18 Aug 2013 01:52:22 +0000]
arm: tegra: emc dvfs clk change sequence

bug 1343186

Change-Id: Ia94f35d8a8f117862b8ea44c2e77d25940ece3ca
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/263585
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: Tegra12: Clocks: Set default cpu speedo value for unfused boards
Krishna Sitaraman [Mon, 19 Aug 2013 18:32:17 +0000]
ARM: Tegra12: Clocks: Set default cpu speedo value for unfused boards

For boards that do not have fused speedo values, set a default low
value and print warning message.

Change-Id: Ia72c5810c2a28b57cc117f40536517f3c2c28deb
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/263553
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: board file change for enabling soc therm on ardbeg
Xue Dong [Thu, 1 Aug 2013 23:18:23 +0000]
arm: tegra: board file change for enabling soc therm on ardbeg

bug 1342361

Change-Id: I663a40a75a1b8257d39622483b2b5a6c9b9cf064
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/263598
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: ardbeg: Specify dfll bypass set voltage time
Alex Frid [Mon, 19 Aug 2013 22:26:52 +0000]
ARM: tegra: ardbeg: Specify dfll bypass set voltage time

Change-Id: I0fbdc0447b474aa7e0f8f1e1fcf07c24b84f285b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/263535
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: power: Add dfll bypass set voltage time
Alex Frid [Mon, 19 Aug 2013 22:08:23 +0000]
ARM: tegra: power: Add dfll bypass set voltage time

Added set voltage time operation for dfll bypass regulator.

Change-Id: I6d27f8c794632ea3f9e9b2c815973fa97c473582
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/263534
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: gk20a: correct pwr clock rate
Prashant Malani [Mon, 19 Aug 2013 23:40:36 +0000]
video: tegra: gk20a: correct pwr clock rate

Setting pwr clock too high causes PMU failures
at low frequencies. Therefore this change changes
pwr clock to the POR value.

Bug 1347357

Change-Id: Ib42ddd824527e730335967bb08a93ac8a5b8d955
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/263561
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agomedia: video: fix deadlock in edp client driver
David Pu [Wed, 17 Jul 2013 02:03:07 +0000]
media: video: fix deadlock in edp client driver

don't call edp api in throttle callback or deadlock will happen since
the edp lock is held from caller.

Bug 1327193

Change-Id: I6b90630d0a37d53521c1db4e95f5945f184a70f5
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/247173
(cherry picked from commit 48dbf16c280f7846c3360c50a4f4cfc824d0f5fc)
Reviewed-on: http://git-master/r/263684
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agodrivers: misc: therm_est: Correct shutdown path
Sri Krishna chowdary [Fri, 2 Aug 2013 13:08:34 +0000]
drivers: misc: therm_est: Correct shutdown path

1. Do not wait for work completion

therm_est_work_func calls orderly_poweroff which waits for
therm_est_shutdown to return. But since it waits for
work function's completion, a dead lock occurs during shutdown.
Avoiding the same by not waiting for the work function's
return.

2. Also, free memory in therm_est_work_func

If we were to check est for shutdown completion, since
it is freed already in shutdown callback,
it may cause memory violation and hence result in crash.

Bug 1332127

Change-Id: I2807178f6b447d07d6ef1a1a9dcd8e4a543eab62
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/257561
Reviewed-on: http://git-master/r/263833
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: power: Add cluster switch time stats
Alex Frid [Thu, 15 Aug 2013 03:47:30 +0000]
ARM: tegra: power: Add cluster switch time stats

Expanded cluster switch instrumentation with simple timing statistic:
running window average, exponential average, maximum switch time -
aggregated separately for LP/G and G/LP cluster switch. Added
the respective debugfs node. Moved cluster switch start/end timing
samples to exactly match interrupt-disabled section of the switch.
Replaced cluster instrumentation error message with debug print.

The INSTRUMENT_CLUSTER_SWITCH compile option is still disabled, so by
default all changes in this commit are not compiled in.

Change-Id: If7b9c7b1469f6839e20b7c8db3aa9cf2c0592f2d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/262859
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agovideo: tegra: gk20a: enable blcg except WWDX
Kevin Huang [Sat, 10 Aug 2013 00:15:44 +0000]
video: tegra: gk20a: enable blcg except WWDX

Bug 1329868

Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Change-Id: Ia4cebda6680197404b2c9e7438d7ef32a60cb81d
Reviewed-on: http://git-master/r/263524
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agovideo: tegra: gk20a: enable slcg except WWDX
Kevin Huang [Sat, 10 Aug 2013 00:01:04 +0000]
video: tegra: gk20a: enable slcg except WWDX

Bug 1329868

Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Change-Id: Ibc9579d3ea4261782ac34fc690517a6f3991f8c8
Reviewed-on: http://git-master/r/263523
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoinput:misc: Add unified sysfs location for management
Xiaohui Tao [Fri, 16 Aug 2013 22:10:17 +0000]
input:misc: Add unified sysfs location for management

Provide a unified sysfs location so that init.xxx.rc
can change the permission without frequent update.

Change-Id: Ic35a122d96de60896f386a042d336ef5dd0a9765
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/263540
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agohwmon: ina230: Add control option to set Alert Latch Enable bit
Timo Alho [Mon, 19 Aug 2013 15:31:56 +0000]
hwmon: ina230: Add control option to set Alert Latch Enable bit

Alert Latch Enable (LEN) bit controls the behaviour of Alert
signal. When bit is set, the Alert pin will remain active following a
fault until the Mask/Enable register has been read. This patch adds a
platfrom control option to set/clear this bit.

Change-Id: I9dec186ec98bda3907303e261bb0098787c1e5b8
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/263393
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: pcie: fix up __init* references
Peter Daifuku [Tue, 6 Aug 2013 18:53:54 +0000]
ARM: tegra: pcie: fix up __init* references

Remove __init* references from code/data that can be referenced after init

Bug 1344055

Change-Id: Ie71258be2b3583929a96fd7096be528a0b7be1f0
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/263690
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
Tested-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agohwmon: ina230: enable current monitoring without resistor value
Timo Alho [Thu, 27 Jun 2013 15:44:28 +0000]
hwmon: ina230: enable current monitoring without resistor value

This patch adds support to current monitoring alert when resistor
value is not defined in the platform configuration (which is the
nominal case for most of the platforms).

Change-Id: I504a0d601713470f74853bada45c42806dd0febd
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/262563
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Add new DC sync points
Terje Bergstrom [Fri, 16 Aug 2013 05:00:48 +0000]
video: tegra: host: Add new DC sync points

DC has added new sync points for D/H windows. Mark their sync points
as client managed on Tegra12. Assign names to the new sync points.

Change-Id: Iae05fd90cff78b61d87f9b4a7fec97ceb41d0600
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/263267
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Fix build warnings
Terje Bergstrom [Fri, 9 Aug 2013 08:12:18 +0000]
video: tegra: host: Fix build warnings

Add -Wno-multichar to the directories where we use multichar constants
in a legitimite way.

Increase cyclestat_buffer_size parameter to u64.

Remove some unused variables and commented code.

Fix function signatures for gk20a clock code.

Convert Makefiles to use ccflags-y instead of EXTRA_CFLAGS.

Change-Id: Ic00e9bda03f9e251e5af2619c2b8e69f6b9b8890
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/263240
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: laguna: ldo1_en reg for FFD
Bibek Basu [Mon, 19 Aug 2013 11:09:35 +0000]
ARM: tegra: laguna: ldo1_en reg for FFD

In Laguna FFD (PM363), expander is not present.
And audio ldo1_en is done using TEGRA_GPIO_PR2
as done in Ardbeg

Bug 1350982

Change-Id: I1d4af6e064a80436951444fab9714b8dbb58792f
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/263285
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agovideo: tegra: host: fix gk20a truncation issue
Kevin Huang [Thu, 15 Aug 2013 21:13:55 +0000]
video: tegra: host: fix gk20a truncation issue

Bug 1341658

Change-Id: Icf6683958f8a81cdf4e9afbd6068d02ae4feb092
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/263518
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: tegra: soctherm: return early if therm-trip info is null
Diwakar Tundlam [Mon, 19 Aug 2013 22:27:24 +0000]
arm: tegra: soctherm: return early if therm-trip info is null

Fixes hang-on-boot on ERS-S boards due to soc_them init

bug 1309557

Change-Id: Ie2c5ec1eb95d3b4f0f1065ca4075ab8e7ef588ce
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/263532
Reviewed-by: Xue Dong <xdong@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: tn8: TN8 using PMU for VBUS detection.
Hayden Du [Mon, 19 Aug 2013 03:13:45 +0000]
arm: tegra: tn8: TN8 using PMU for VBUS detection.

bug 1345336

Change-Id: I030b93be396a61c685d526feff10bf76f4e0da74
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/262999
Reviewed-by: Yunfan Zhang <yunfanz@nvidia.com>
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra12: power: Enable DFLL bypass support
Alex Frid [Thu, 1 Aug 2013 05:57:29 +0000]
ARM: tegra12: power: Enable DFLL bypass support

Bug 1310396

Change-Id: I9359d32d666aa0866108536642a8b8746d55384a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/263488
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: Honor udelay convention for timer-based delay
Alex Frid [Sun, 18 Aug 2013 03:56:33 +0000]
ARM: Honor udelay convention for timer-based delay

Replaced strict "below" comparison in timer delay function with "below
or equal". The former may result in actual delay time below requested
(if the delay happens to start just before cycle counter advance). The
latter guarantees actual delay at/above requested.

Change-Id: I8cf87836e37647997ca6480c2476255369e8953d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/262858
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agoARM: configs: tegra12: disable unapplicable errata
Alex Van Brunt [Thu, 15 Aug 2013 20:15:26 +0000]
ARM: configs: tegra12: disable unapplicable errata

742230 and 742220 only apply to A9.

Bug 1349683

Change-Id: Id810559a91c6ba0e6c350373a325f54996dea28f
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/263415
GVS: Gerrit_Virtual_Submit

5 years agoarch: config: tegra enable support to debug clocks
Vivek Aseeja [Fri, 16 Aug 2013 20:58:48 +0000]
arch: config: tegra enable support to debug clocks

Enable renamed config variable TEGRA_CLOCK_DEBUG_FUNC

Change-Id: I357e97965e7f4f15b1b773ed887e7aa0e0c13606
Signed-off-by: Vivek Aseeja <vaseeja@nvidia.com>
Reviewed-on: http://git-master/r/262597
Reviewed-by: Lael Jones <lajones@nvidia.com>
Tested-by: Lael Jones <lajones@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: dalmore: Enable DT for OV9772
Sudhir Vyas [Mon, 19 Aug 2013 06:48:36 +0000]
ARM: tegra: dalmore: Enable DT for OV9772

To make OV9772 DT compliant, disable its
registration and power functions from
board file.

Bug 1242883

Change-Id: I4bf80329fa54650d6e426275963f9abebef6c778
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/263071
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm: dts: dalmore: Add OV9972 DT node
Sudhir Vyas [Mon, 19 Aug 2013 06:41:39 +0000]
arm: dts: dalmore: Add OV9972 DT node

Add DT node support for OV9772.

Bug 1242883

Change-Id: I4af60fe624f76b2b044bdf2437259818661304c7
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/263067
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomedia: video: tegra: Add OV9772 DT support
Sudhir Vyas [Mon, 19 Aug 2013 06:31:00 +0000]
media: video: tegra: Add OV9772 DT support

Add DT support for OV9772 sensor.

Bug 1242883

Change-Id: Ic22b85c79d186c520e216717e6f1e1322e7f0a16
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/263058
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agocpuidle: Check cpuidle driver before add refcount
Daniel Fu [Fri, 16 Aug 2013 02:28:03 +0000]
cpuidle: Check cpuidle driver before add refcount

If the current CPU has no cpuidle driver, drv will be NULL.
Check if we get drv successfully before add refount
to prevent Kernel panic.

Change-Id: I67d3e0b01ac7b177e8e281cdddf397a55e527b12
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/263252
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agostaging: android: lowmemorykiller: Add config option to support oom_adj values
Arve Hjønnevåg [Tue, 13 Aug 2013 14:24:20 +0000]
staging: android: lowmemorykiller: Add config option to support oom_adj values

The conversion to use oom_score_adj instead of the deprecated oom_adj
values breaks existing user-space code. Add a config option to convert
oom_adj values written to oom_score_adj values if they appear to be
valid oom_adj values.

Change-Id: I0dd02127c420bd43aaab6971dfe88c78cbd1e782
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
Reviewed-on: http://git-master/r/261069
(cherry picked from commit c1ce23506b504b10212dd08587f0db1a05d8d370)
Reviewed-on: http://git-master/r/262786
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: Remove dma_map_linear() for FB
Hiroshi Doyu [Tue, 6 Aug 2013 12:29:08 +0000]
ARM: tegra: Remove dma_map_linear() for FB

Not necessary anymore since fixup table takes care of additional
linear mapping when a device is registered.

Bug 1297607

Change-Id: Ib5ffd28d1d498c8a22873745621decf3d6b9e490
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/263065

5 years agoARM: tegra: Pass FB areas to IOMMU
Hiroshi Doyu [Tue, 6 Aug 2013 08:27:45 +0000]
ARM: tegra: Pass FB areas to IOMMU

Pass FB areas to IOMMU to set up linear mappings. DC is acccessing to
FB over DC being configured IOMMU'able. So older linear mapping needs
to be supported too.

Bug 1297607

Change-Id: I94e8946bf3a29137825dfffb4e6a0fe19dab78b7
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/263064

5 years agoiommu/tegra: smmu: Fix unsigned long for ARM32/64
Hiroshi Doyu [Mon, 12 Aug 2013 08:47:19 +0000]
iommu/tegra: smmu: Fix unsigned long for ARM32/64

Explicitly use u32 for 32 bit length, and use int for index in
PDE/PTE.

Bug 1275557

Change-Id: I176e6b3f02df912b0b956cd4c2af17945c6009ca
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/263062

5 years agohwmon: ina230: fix overflow in current limit
Xin Xie [Wed, 7 Aug 2013 17:57:22 +0000]
hwmon: ina230: fix overflow in current limit

bug 258076

Change-Id: I321677861aeddd3f14c46ae99b922a3f407ed6d1
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/259281
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: bb: code cleanup for _get_drvdata()
Vinayak Pane [Fri, 19 Jul 2013 19:37:25 +0000]
arm: tegra: bb: code cleanup for _get_drvdata()

Code cleanup for tegra_bb driver:
 - use _set_drvdata() and _get_drvdata() functions to avoid
 playing with pointers directly.
 - shorting hw register definitions to improve readability of
 driver

Bug 1341563

Change-Id: I5c827f27f809d48f65651de6224d080e01488f7e
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/251494
(cherry picked from commit 9d7df9f6fd96f2e4737baab9f0b9e32664620120)
Reviewed-on: http://git-master/r/262048
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agovideo: tegra: host: Disable mem_*() debugging
Terje Bergstrom [Wed, 14 Aug 2013 07:24:44 +0000]
video: tegra: host: Disable mem_*() debugging

Disable mem_rd*() and mem_wr*() debugging in non-simulation platforms.

Bug 1328042

Change-Id: I04cd1f6f6c151639b4c48a0e9560a26f6103ca02
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/261387
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Enable T124 actmons
Terje Bergstrom [Fri, 26 Jul 2013 06:49:05 +0000]
video: tegra: host: Enable T124 actmons

This patch enables VIC and MSENC actmons for T124. Scaling
is kept disabled until it can be verified to be working.

Bug 1328068

Change-Id: I167440b0fb5d054263902748687a445d5043a11c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/254076
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: host: Add actmon clock to Tegra12
Terje Bergstrom [Fri, 26 Jul 2013 07:59:53 +0000]
video: tegra: host: Add actmon clock to Tegra12

Add actmon clock to Tegra12 host1x.

Bug 1328068

Change-Id: If03d8754cbb19dab249c65cff4207186d8997b3e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/254075
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agodm crypt: Make crypto work queue single-threaded
Shravani Dingari [Tue, 13 Aug 2013 10:04:21 +0000]
dm crypt: Make crypto work queue single-threaded

This reverts (not a clean revert) commit
c029772125594e31eb1a5ad9e0913724ed9891f2, as SE
is not yet designed to support multi-threaded
work queues

Bug 1285960

Change-Id: I9280c0d86fc77ad545fb20276205069b3ccdf6f7
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/259050
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: config: ardbeg: Enable perfmon for gk20a.
Prashant Malani [Fri, 9 Aug 2013 01:44:52 +0000]
ARM: config: ardbeg: Enable perfmon for gk20a.

Bug 1343306

Change-Id: I7807ae0c035bd88a6fbf03ab733b4e17da3f3e6d
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/259879
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: gk20a: update perfmon parameters
Prashant Malani [Fri, 9 Aug 2013 01:38:58 +0000]
video: tegra: gk20a: update perfmon parameters

Change perfmon parameters to be more acceptable
for silicon platforms.

Also changing the perfmon driver algorithm to
be more in line with what is being done in
RM implementations.

Bug 1343306

Change-Id: Iebcedc760ade692f614dbc761fab8f448a6b9915
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/259878
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoasoc: tegra: Fix spk and dmic regulator issue
Manoj Gangwal [Wed, 14 Aug 2013 12:58:46 +0000]
asoc: tegra: Fix spk and dmic regulator issue

Fix the issue for disabling the spk and dmic regulators
without enabling them.

Bug 1348316

Change-Id: If1789b8d14d2e72268faea66536d59e8dc2c2915
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/261553
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra: laguna: USB ID detection using AMS PMU
Aaron Huang [Wed, 14 Aug 2013 05:54:08 +0000]
ARM: tegra: laguna: USB ID detection using AMS PMU

Change USB ID detection method by using AS3722 for laguna to save power

Bug 1347819

Change-Id: I8e6bf028ca3377b51ed1f1bff240d29ec2a7a198
Signed-off-by: Aaron Huang <aaronh@nvidia.com>
Reviewed-on: http://git-master/r/261356
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>