5 years agomisc: tegra: Disable short delay if wake gpio not defined.
glei [Wed, 9 Oct 2013 06:03:07 +0000]
misc: tegra: Disable short delay if wake gpio not defined.

Disable short_autosuspend_delay for Modem device, when wake gpio
is not used.

Bug 1362837

Change-Id: Iadcd28ba432846aeed636d453208d3f954aaf065
Signed-off-by: glei <glei@nvidia.com>
Reviewed-on: http://git-master/r/283833
(cherry picked from commit dc8d4213de17f27a8440dc87ce8bec0623048147)
Reviewed-on: http://git-master/r/302954
Reviewed-by: Neil Patel <neilp@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Neil Patel <neilp@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agoarm: tegra: la: add t12x camera la support
Adeel Raza [Fri, 4 Oct 2013 23:22:37 +0000]
arm: tegra: la: add t12x camera la support

Bug 1381431

Change-Id: I12129c6d8b3e786c637351e4890af659e2654297
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/289995
Reviewed-by: Bruce Holmer <bholmer@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: ardbeg: enable emc dvfs for E1782
Seema Khowala [Wed, 23 Oct 2013 23:24:20 +0000]
arm: tegra: ardbeg: enable emc dvfs for E1782

Bug 1361265

Change-Id: I12b0ee2af4b4a86885cc67b5e6f805c097121659
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/289967
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agonet: wireless: bcmdhd: add dummy wowlan packet filter
Om Prakash Singh [Mon, 21 Oct 2013 15:56:04 +0000]
net: wireless: bcmdhd: add dummy wowlan packet filter

wowlan packet filter is mandated to avoid the disconnection of
connected network before suspend. So a dummy wowlan filter is
configured for kernels linux-3.8 and above

Bug 1389293

Change-Id: I8de153a28d4c7d3c0884ae09ccbdf106729b9b99
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: http://git-master/r/301838
GVS: Gerrit_Virtual_Submit
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: tegra12: clock: Fix system bus clock rounding
Kaz Fukuoka [Wed, 25 Sep 2013 23:42:51 +0000]
ARM: tegra12: clock: Fix system bus clock rounding

Made sure system bus clock (SCLK) round rate operation follows the
same policy on fractional divisors as set rate operation - either both
operations allow fractions, or both does not support them (otherwise,
clock rate stats are confused).

Ported from Tegra11 Change-Id: I3814d66905c01f2ff84b0402be9b9a3d0b113fd6

Change-Id: If4b0eed9be2ce8967c5597ac7471325d0043a38f
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/298504
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Tested-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: gpu: Add powergate ioctl.
vinodg [Fri, 18 Oct 2013 00:39:00 +0000]
video: tegra: gpu: Add powergate ioctl.

Moved the powergate/unpowergate code to a separate function.

bug 1390624

Change-Id: I6f097afd9deaed61b02eb9226c428829e659c21d
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: http://git-master/r/300939
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: host: gk20a: fix non PMU gr init
Prashant Malani [Tue, 22 Oct 2013 21:09:43 +0000]
video: tegra: host: gk20a: fix non PMU gr init

Fix the gr ucode load sequence to revert to the legacy
method of loading ucode, if gPMU support is not available.

This is because the quicker bootstrap routine requires a gPMU
VM instance to load the gr ucode into memory.

Bug 1392583

Change-Id: I9c2b2d0611e11d133f01f7466507f68cae2d4ca1
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/302471
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matt Craighead <mcraighead@nvidia.com>
Tested-by: Matt Craighead <mcraighead@nvidia.com>

5 years agoARM: Tegra12: Ardbeg: NCT: Load EMC tables
Jay Bhukhanwala [Wed, 21 Aug 2013 19:52:28 +0000]
ARM: Tegra12: Ardbeg: NCT: Load EMC tables

Adds functionality to load the EMC table from the NCT
partition. If no memory table is in NCT or the NCT
partition doesn't exist, fall back to the built-in table.

Bug 1300925

Change-Id: I09c13443600c987884f67520ca72a7702e052837
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/289290
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: vcm3.0: t124: Add PCA953X init
Songhee Baek [Sun, 22 Sep 2013 17:38:21 +0000]
ARM: tegra: vcm3.0: t124: Add PCA953X init

PCA953X is for misc io gpio, it needs to be
initialized to release abb_reset, bluetooth wake-up,
user_led1/2 pins.

Bug 1373091

Change-Id: Ie7eec2885d385b1a7ee06eaf28439c1579fcb4f0
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/289355
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoASoC: ad193x: Add support various sampling rate
Songhee Baek [Sun, 25 Aug 2013 14:41:45 +0000]
ASoC: ad193x: Add support various sampling rate

Current ad193x codec driver supports only 48kHz even though
ad193x can support various sampling rate.
This patch is to various MCLK frequency like 44.1kHz and 32kHz.

Change-Id: I81e80ebd83e7cd9b255e01460eb3047f4296ad36
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/289568
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Nitin Nagaraja <nitinn@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoASoC: dapm: Workaround for double addition prefix
Songhee Baek [Fri, 23 Aug 2013 17:59:30 +0000]
ASoC: dapm: Workaround for double addition prefix

When we use identical codec for dual codec use case,
we need to use prefix for codec driver, but dapm making double
addition prefix for codec DAI widget in snd_soc_dapm_add_route.
So, this change is for avoiding double addition prefix for codec
DAI widget.

This change is needed by dual codec use case.

Bug 1354235
Bug 1373091

Change-Id: I3e9214ca87ccd14c9729b4accb40ec3cf4f65ed0
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/289442
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra12:clock: Add tegra-alt driver clocks
Songhee Baek [Sun, 25 Aug 2013 16:18:03 +0000]
ARM: tegra12:clock: Add tegra-alt driver clocks

These clocks are for tegra-alt ASoC driver.

Bug 1354235
Bug 1373091

Change-Id: I5970ec1722edb81e53a0afc836c24e004161584c
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/289352
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoRevert "video: tegra: gk20a: add PBUS interrupt"
Terje Bergstrom [Wed, 23 Oct 2013 11:36:59 +0000]
Revert "video: tegra: gk20a: add PBUS interrupt"

This reverts commit 845ccb7dc90c3e0f1194bec1ee2bfd62d13e06ce.

Change-Id: Ifcdf147901aa11c88d87cfdacf80cc41bf2ccc40
Reviewed-on: http://git-master/r/302819
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: Handle dropped MMU faults
Arto Merilainen [Wed, 23 Oct 2013 08:07:19 +0000]
video: tegra: host: Handle dropped MMU faults

The code currently does not handle dropped MMU faults that occur if
we get an MMU fault while we are handling the previous MMU fault.
This patch adds a stub handler for handling these faults.

Bug 1343634

Change-Id: Ia081c53c70cdc8d5c0e8fd6b4b2c94b7b35d2ed6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/302710
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: Long dependent submit timeout
Arto Merilainen [Tue, 22 Oct 2013 10:28:35 +0000]
video: tegra: host: Long dependent submit timeout

Submits may have dependencies to submits on other channels. If
these submits are blocked by i.e. faulty submits, we may trigger
a false timeout for the waiting submit.

This patch modifies timeout handler to check if the channel is
currently waiting for a syncpoint that is not owned by the present
submit. If yes, we postpone the timeout.

Bug 1343634

Change-Id: I7cb2f9ccf9a5414d808e4376adbd8605cc1b76bd
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/302709
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: gk20a: add PBUS interrupt
Kevin Huang [Wed, 25 Sep 2013 23:49:52 +0000]
video: tegra: gk20a: add PBUS interrupt

Change-Id: I14e4012dfd407ba106a6f6d582c9e570ed920cf2
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/300262
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: gk20a: fix host crash during init
Kevin Huang [Thu, 26 Sep 2013 23:56:31 +0000]
video: tegra: gk20a: fix host crash during init

Don't access to gr register when gr is not on.

Change-Id: I5d240cf437c252466e3cea5e6741cbd802c79665
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/300162
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agopower: bq2419x-charger: short vbus enable time
Martin Chi [Wed, 14 Aug 2013 07:15:53 +0000]
power: bq2419x-charger: short vbus enable time

Per the scope of vbus regulator when plug-in otg
device cable, the vbus ring time is only about 2ms,
so short enable time from 500ms to 8ms

Bug 1344478

Change-Id: Ief7573281d427940af2af3b0365bac1389ae7862
Signed-off-by: Martin Chi <mchi@nvidia.com>
Reviewed-on: http://git-master/r/261358
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-on: http://git-master/r/302589
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agostaging: iio: adc: palmas: add DT support
Laxman Dewangan [Tue, 22 Oct 2013 12:40:27 +0000]
staging: iio: adc: palmas: add DT support

Add DT support for the Palmas ADC driver.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(Cherrypicked commit b11a33b8a6d95d0e5e5f27d0854fc053c2fbeb6f)

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I6a80a31987450017b0f65d6f91942b51b7b2c278
Reviewed-on: http://git-master/r/302671
Reviewed-by: Automatic_Commit_Validation_User

5 years agoiommu/tegra: smmu: Print phys_addr_t/dma_addr_t using %pa
Hiroshi Doyu [Mon, 21 Oct 2013 09:08:12 +0000]
iommu/tegra: smmu: Print phys_addr_t/dma_addr_t using %pa

phys_addr_t/dma_addr_t becomes 64 bits wide and printing a variable of
that type using a simple %x format specifier causes the compiler to
complain. Change the format specifier to %pa, which is used
specifically for variables of type phys_addr_t/dma_addr_t.

Change-Id: I73c0e00f03e0f27e55210a9a37c3b3c54878b3d6
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/301717

5 years agoiommu/tegra: Print phys_addr_t using %pa
Thierry Reding [Tue, 17 Sep 2013 08:19:31 +0000]
iommu/tegra: Print phys_addr_t using %pa

When enabling LPAE on ARM, phys_addr_t becomes 64 bits wide and printing
a variable of that type using a simple %x format specifier causes the
compiler to complain. Change the format specifier to %pa, which is used
specifically for variables of type phys_addr_t.

Change-Id: I3c11b6c6e062dd7a7724143aef9df3dd29849429
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agoarm: tegra: save and restore actmon context
Prashant Gaikwad [Mon, 21 Oct 2013 04:59:13 +0000]
arm: tegra: save and restore actmon context

Save actmon context before entering LP0 from cpuidle
and restore after exit.

Bug 1254633

Change-Id: I4e96cd1465aa57a032d4f782f00deb0af620f660
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/299472
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: add slave_initialized flag
Bryan Wu [Mon, 7 Oct 2013 22:17:33 +0000]
video: tegra: host: add slave_initialized flag

A slave platform_device will be registered when we initialize the
master device. But if modprobe to init master device again, it will
try to initialize slave platform device again then oops happens.

And if we registered a platform_device in kernel, we normally don't
release it. So introduce a flag of nvhost_device_data to indicate
the status of slave and skip the slave init.

Bug 1377330

Change-Id: Ia4dfe6f8046952e2642343d23e39a14b6eb021b4
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/289326
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: add user_deinit
Bryan Wu [Mon, 7 Oct 2013 18:54:05 +0000]
video: tegra: host: add user_deinit

nvhost_client_device_release() should remove those char devices for
user space, otherwise Oops will happen when call
nvhost_client_user_init() again like modprobing.

Bug 1377330

Change-Id: I98bdb347f99aa049173387dee47d90faa795e7fa
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/289325
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: export symbols for VI driver
Bryan Wu [Wed, 25 Sep 2013 23:59:58 +0000]
video: tegra: host: export symbols for VI driver

VI driver can be a module so need those APIs to be exported.

Bug 1377330

Change-Id: I5e7d0cfaea984a5c87a3b6e82f34f0b716bab6e6
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/289324
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: tegra: add emc dvfs table for E1792
Xue Dong [Wed, 23 Oct 2013 00:07:34 +0000]
arm: tegra: add emc dvfs table for E1792

Change-Id: Idf5cb03a52261e7f433de24add8bc0edf5ed918f
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/302549
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agonet: wireless: Update SD8797/SD8897 WLAN/BT driver to 434
Marc Yang [Mon, 7 Oct 2013 23:59:42 +0000]
net: wireless: Update SD8797/SD8897 WLAN/BT driver to 434

Signed-off-by: Marc Yang <yangyang@marvell.com>

Bug 1318052
Bug 1375751

Change-Id: I967b26a35a5e8711f068f4e0762701f75c4a4c42
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/282710
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoRevert "net: wireless: Update SD8797 driver for 3.10"
Nagarjuna Kristam [Tue, 8 Oct 2013 11:11:45 +0000]
Revert "net: wireless: Update SD8797 driver for 3.10"

This reverts commit f5bb3cb28aa8ed6a671248fc7f29dba2f49b5b12.

Latest Marvell drivers fixes 3.10 specific build issues.

Bug 1375751

Change-Id: Id2874d46fff6aaa4762bac857f423680724151a1
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/282709
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra12: config: Enable Marvell Wireless drivers
Nagarjuna Kristam [Tue, 8 Oct 2013 11:09:00 +0000]
arm: tegra12: config: Enable Marvell Wireless drivers

Bug 1377247
Bug 1375751

Change-Id: I005bdae67c5afcbb408b5ad531e7ce2c8356b2ed
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/282705
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agoARM: pinctrl: add gpio default through DT
Ashwini Ghuge [Tue, 22 Oct 2013 13:50:26 +0000]
ARM: pinctrl: add gpio default through DT

Bug 1373364

Change-Id: I13c9918678e89e39233a5b26c815f773e467ac53
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/300449
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoiommu/tegra: smmu: print error before mapping release
Bo Yan [Tue, 22 Oct 2013 16:26:48 +0000]
iommu/tegra: smmu: print error before mapping release

in case of a crash inside arm_iommu_release_mapping, the dev_err
statement following that will have no chance to run. so move
dev_err ahead, this will help debugging.

Change-Id: I80aa6f262ce65fa362283460137fe4974281b686
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/302405
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agostaging:iio:ls:cm3217:correct regulator init logic
Sri Krishna chowdary [Fri, 18 Oct 2013 11:28:11 +0000]
staging:iio:ls:cm3217:correct regulator init logic

During regulator init, cm3217_vregs is accessed out of range.
This causes kernel panic during shutdown.
Hence, fix the init code.

Bug 1373590

Change-Id: If969b51d0303aaaaea61153e53cc3055fe063486
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/301208
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: update dvfs table for E1780
Xue Dong [Tue, 22 Oct 2013 21:24:37 +0000]
arm: tegra: update dvfs table for E1780

Change-Id: I212b481d59913f07902935ffe320d112227112a7
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/302475
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: hard code pllc to 600Mhz
Xue Dong [Fri, 27 Sep 2013 01:05:52 +0000]
arm: tegra: hard code pllc to 600Mhz

Change-Id: If15da4065e9851e9489c87fad50d82f13f7c0215
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/299044
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: update emc dvfs sequence to v1247
Xue Dong [Fri, 27 Sep 2013 00:50:44 +0000]
arm: tegra: update emc dvfs sequence to v1247

bug 1348140

Change-Id: I121d002b947f2ac2d7a15624b499173b17e9e893
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/299043
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agotegra: dc: Disconnect display if there is no output driver
Raghavendra VK [Fri, 18 Oct 2013 10:58:49 +0000]
tegra: dc: Disconnect display if there is no output driver

bug 1373849

Change-Id: I403b3f6cb8a8c2b31d5b5555721df57531ea7997
Signed-off-by: Raghavendra VK <rvk@nvidia.com>
Reviewed-on: http://git-master/r/301193
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Tested-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: dvfs: Install thermal DVFS peak voltages
Alex Frid [Sat, 12 Oct 2013 02:35:38 +0000]
ARM: tegra: dvfs: Install thermal DVFS peak voltages

Initialized peak voltages array in DVFS structure for clocks that have
thermal DVFS. Updated Tegra12 GPU DVFS initialization respectively. As
a result peak voltage prediction interface now actually returns maximum
voltage across thermal DVFS ranges at requested frequency.

Re-used peak voltage array as safe DVFS table if registration of the
scaling cooling device failed.

Added peak voltages to debugfs.

Bug 1307919

Change-Id: I7f004bc2cc4707cc4b50afacbca4e085e4c28c77
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/298528
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra: ardbeg: add default hdmi panel mode
Jong Kim [Mon, 21 Oct 2013 19:02:09 +0000]
arm: tegra: ardbeg: add default hdmi panel mode

Add default 640x480 hdmi panel mode. This HDMI mode is just a dummy
for device probe to pass and finish dc/fb/fbcon registration. The
actual mode will be detected by detect worker and programmed to the
hw a little later during boot process.

bug 1264520
bug 1320357
bug 1324935

Change-Id: Ibd1cbe98b2f21e1c0bed8226b4876c473279c239
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/301956
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: dvfs: Add predict peak voltage interface
Alex Frid [Tue, 8 Oct 2013 00:17:47 +0000]
ARM: tegra: dvfs: Add predict peak voltage interface

With introduction of thermal dvfs, frequency-to-voltage mapping may
be changed at run time with temperature. Therefore, s/w layers that
rely on inverse voltage-to-frequency tables to determine frequency
caps, should use peak voltages across all thermal dvfs ranges. Hence,
this commit:
- added the respective peak_millivolts entry in dvfs structure
- added tetra_dvfs_predict_peak_millivolts() interface
- modified EDP table calculation to use peak voltage prediction
- modified core cap table construction to use peak voltage prediction,
changed warning reported when voltage for minimum frequency is above
core Vmin to info - this maybe true in some thermal dvfs range
- modified override range calculation to use peak voltage prediction,
added dvfs safe-guard in rail override mode to make sure that override
limit is not violated in any thermal range

For now, dvfs peak millivolts entries are not populated at all, and
predicted peak voltage are based on dvfs table active at the moment in
current thermal range (the same as standard predict voltage interface).

Bug 1307919

Change-Id: Ia8d962c66efbcb98d227dab55b36bbba8d93ef5f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/289480
Reviewed-on: http://git-master/r/298527
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: clock: Fix pll_c_out1 flags
Kaz Fukuoka [Tue, 1 Oct 2013 00:51:39 +0000]
ARM: tegra12: clock: Fix pll_c_out1 flags

Ported from Tegra11 change I899cf5b6d04cc27f63de7f01fb7aa78636e61ea6

Change-Id: I9a8808bc1cf09846b928abf74aa743352fb23bf9
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/299004
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Tested-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: clock: Use AVP clock integer divisor
Kaz Fukuoka [Wed, 25 Sep 2013 23:32:47 +0000]
ARM: tegra12: clock: Use AVP clock integer divisor

Only integer divisors are allowed from now on for AVP/SCLK clock
sources.

Ported from Tegra11 Change-Id: I5d846e8c304c18cff2e2da5a8ff2d2ed821ea727

Change-Id: I1b2f1d39e0a0800bbf96ecbe163b56a6cc674ad9
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/299003
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Tested-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: clock: add utmip-pad clock entry for xusb
Kaz Fukuoka [Thu, 26 Sep 2013 23:54:59 +0000]
ARM: tegra12: clock: add utmip-pad clock entry for xusb

utmip-pad entry was missing for xusb and so devm_clk_get is
failing. Adding the same for xusb interface.

Ported from Tegra11 Change-Id: I257fccf974bc5bededbe0a5c3e96d171ad4f5077

Change-Id: I0fbe00be4d181ff8dfd7a1a9125c42d7c0463a8d
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/298507
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Tested-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: Modify temperature margins for T12x
Diwakar Tundlam [Thu, 17 Oct 2013 22:25:07 +0000]
ARM: tegra: Modify temperature margins for T12x

Temperature threshold Values taken from new tegra12x margining
spreadsheet.

Updated Shield-ERS and Loki board-files with thresholds for T580 SKU
and Laguna board-file with thresholds for T570 SKU.

Bug 1393423

Change-Id: I3044fc6e571f81d0ddc09a5ff14469c411e8dd1a
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/299048

5 years agoRevert "staging: iio: adc: palmas: add DT support"
Sridhar Lavu [Tue, 22 Oct 2013 16:34:56 +0000]
Revert "staging: iio: adc: palmas: add DT support"

This reverts commit a90856a6626d502d42c6e7abccbdf9d730b36270
since it introduces automated sanity regression

Bug 1393292 : sanity regression

Change-Id: I6e2990d69a6f3566e1dd96f893fedcae49947133
Signed-off-by: Sridhar Lavu <slavu@nvidia.com>
Reverts-what-was-Reviewed-on: http://git-master/r/302361
Reviewed-on: http://git-master/r/302416
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: edid: Verify checksum of edid
Mike J. Chen [Tue, 1 Oct 2013 01:36:19 +0000]
video: tegra: edid: Verify checksum of edid

We've seen invalid edid reads and should retry instead
of using it.

Change-Id: I7d74a41f702be02464c7f43904805142153d4da0
Signed-off-by: Mike J. Chen <mjchen@google.com>
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/301312
Reviewed-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra12: clock: Keep PLL_REFE enabled during init
Kaz Fukuoka [Tue, 1 Oct 2013 00:26:59 +0000]
ARM: tegra12: clock: Keep PLL_REFE enabled during init

Enabled PLL_REFE in early kernel initialization, to provide clock for
h/w sequencers initialization. PLL is disabled in late init.

Ported from Tegra11 change Ie79a3f0989fb3a40714659c7ed082dce2d004d5c

Change-Id: I056f40e1410668fd494e474e1ba56af9a43545ef
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/298502
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Tested-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agostaging: iio: adc: palmas: add DT support
Laxman Dewangan [Tue, 22 Oct 2013 12:40:27 +0000]
staging: iio: adc: palmas: add DT support

Add DT support for the Palmas ADC driver.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(Cherrypicked commit b11a33b8a6d95d0e5e5f27d0854fc053c2fbeb6f)

Change-Id: I4e5a3df1e72f388cf56dbd97f2485af105202659
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/302361
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: add port FF to GPIO ID's for T124
Ashwini Ghuge [Tue, 22 Oct 2013 08:40:17 +0000]
ARM: tegra: add port FF to GPIO ID's for T124

Change-Id: I6aa539b0073731bf047b4b611ab3bb3345952535
Reviewed-on: http://git-master/r/302217
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: ardbeg: Add versioned dts file
Nitin Kumbhar [Fri, 6 Sep 2013 06:47:46 +0000]
ARM: tegra: ardbeg: Add versioned dts file

Add a new dts file for latest ardbeg fab version.

Bug 1056577

Change-Id: I24f00ef024179f806fcbc93867c1640ffb8776fd
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/288884
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: pcie: Apply CLKREQ# WAR for PM358/9
Jay Agarwal [Tue, 22 Oct 2013 07:27:12 +0000]
ARM: tegra: pcie: Apply CLKREQ# WAR for PM358/9

CLKREQ# WAR is not supported on PM358/9 platforms
Apply WAR to always enable refclk for these only.

Bug 1356695

Change-Id: Iaa97c4964f0f3ac0295a8a1172c037e713f332c0
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/302175
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: add regulator supply properties for gyro and compass on DT
Laxman Dewangan [Tue, 22 Oct 2013 10:03:24 +0000]
ARM: tegra: add regulator supply properties for gyro and compass on DT

Gyro and compass drivers are registerd from DT and so adding the
power supply properties of these devices in dt node.

Removing the non-required entry in regulator consumer as client driver
moved to DT.

Change-Id: Iecf14ee819a8c1dcd42d041472f734189492350d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/289157

5 years agovideo: tegra: host: Enable ISP & VI power gating
Terje Bergstrom [Thu, 26 Sep 2013 11:29:02 +0000]
video: tegra: host: Enable ISP & VI power gating

Change-Id: I03e86e1ccbf7d4ac81596a6babb1066e7bae4c65
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/288830

5 years agovideo: tegra: host: Fix race in gr3d scaling
Arto Merilainen [Tue, 1 Oct 2013 12:33:24 +0000]
video: tegra: host: Fix race in gr3d scaling

The scaling code used cancel_work_sync() while holding a mutex. As the work
itself uses the same mutex, we risk causing a deadlock.

This patch refactors the code so that the mutex is not hold while calling
cancel_work_sync().

Bug 1371500

Change-Id: I3aa0de168cebcc1d8d1843813caee5e82fe3df06
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/280730
(cherry picked from commit 763125fba1c9a8a67a9968c8502c17465665eb35)
Reviewed-on: http://git-master/r/289051
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agostaging: iio: light: stm8t143: hide prints
Sri Krishna chowdary [Mon, 21 Oct 2013 12:35:02 +0000]
staging: iio: light: stm8t143: hide prints

proximity values were printed to check the
frequency of updates during sensor bringup.
Not required now, hence change pr_info to pr_debug.

Bug 1362876

Change-Id: I4435c5be9e6c287782ff871ea3d80da86677f78e
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/301790
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agocpufreq: don't leave stale policy pointer in cdbs->cur_policy
Jacob Shin [Thu, 27 Jun 2013 20:02:12 +0000]
cpufreq: don't leave stale policy pointer in cdbs->cur_policy

Clear ->cur_policy when stopping a governor, or the ->cur_policy
pointer may be stale on systems with have_governor_per_policy when a
new policy is allocated due to CPU hotplug offline/online.

[rjw: Changelog]
Suggested-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

(cherry picked from commit 419e172145cf6c51d436a8bf4afcd17511f0ff79)
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Change-Id: Iada00880f8c98ed1beb372bf4b84ff9a7d43e3ea
Reviewed-on: http://git-master/r/300402
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoasoc: rt5639: Update drivers
Scott Peterson [Thu, 10 Oct 2013 22:56:08 +0000]
asoc: rt5639: Update drivers

Update the Realtek rt5639 drivers to
improve the headphone performance.

Change-Id: I32ab81b07c952f8887c629e68e8fdaf52ec6a143
Signed-off-by: Scott Peterson <speterson@nvidia.com>
Reviewed-on: http://git-master/r/299697
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Tested-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: create a DT header defining GPIO IDs
Stephen Warren [Wed, 13 Feb 2013 00:24:04 +0000]
ARM: tegra: create a DT header defining GPIO IDs

All Tegra GPIOs are named after the GPIO bank and GPIO number within
the bank. Define a macro to calculate the GPIO ID based on those
parameters. Make the macro available via all Tegra .dtsip files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
(cherry picked from commit 9798e47ff232c48b3c25b9a6b9395b505e389475)
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>

Change-Id: I7bf7e20b44492da0cb5acba963905027e980b29f
Reviewed-on: http://git-master/r/302216
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: loki: Fix modem pinmux
Raj Jayaraman [Mon, 21 Oct 2013 23:26:03 +0000]
arm: tegra: loki: Fix modem pinmux

Bug 1390847

Change-Id: I4ed1bfa1a5bd86592edd71d51141b2db8b464ee4
Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com>
Reviewed-on: http://git-master/r/302000
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra12: Update audio pinmux settings
Scott Peterson [Tue, 15 Oct 2013 19:27:49 +0000]
ARM: tegra12: Update audio pinmux settings

Update the audio pinmux settings for Loki

Bug 1382160

Change-Id: I6003da94b4bf1e2989f0ac22d131e27e7036fee1
Signed-off-by: Scott Peterson <speterson@nvidia.com>
Reviewed-on: http://git-master/r/299588
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: Remove incorrect RTC node
Ajay Nandakumar [Mon, 21 Oct 2013 09:32:40 +0000]
ARM: tegra: Remove incorrect RTC node

Removing incorrect RTC node as it might cause crashes/hang
if the RTC driver registers with this incorrect node.

Change-Id: Ic8829b3e0341487fee0a481b6e5e9d72618ba2a1
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/301726
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: Thor 1.95: Change orientation vector
Xiaohui Tao [Thu, 17 Oct 2013 21:02:06 +0000]
ARM: tegra: Thor 1.95: Change orientation vector

Fake the sensor as if it is on the display. It is the same thing
we did for shield 1.

Bug 1385809

Change-Id: I4f03e8145c26438160a23b56acd30b5b4f872cfd
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/300687
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: tn8: Add a new dts for sensor moudle
Daniel Fu [Wed, 16 Oct 2013 12:51:04 +0000]
ARM: tegra: tn8: Add a new dts for sensor moudle

First version of TN8 using E1794 sensor moudle, but the new TN8
using E1845 sensor moudle. Handle this change with following updates.
- Move E1794 sensors DT entry from common dtsi to tegra124-tn8.dts
- Add new tegra124-tn8-a03-00.dts with E1845 sensors(mpu6515 & ak8963)
- Add nvidia-boardids property to both TN8 dts

Bug 1364407
Bug 1389167

Change-Id: I2975444e7b1fc1c3d407efe27c8eb0b4a170e7f6
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/300019
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

5 years agoARM: Tegra: Cautious debugging in early resume
Antti P Miettinen [Wed, 16 Oct 2013 12:21:30 +0000]
ARM: Tegra: Cautious debugging in early resume

Doing prints early in resume can be costly. Let's use
pr_debug instead of pr_info.

Bug 1381343

Change-Id: I5fdc61e7cc95d0864e2e81e36c8b6b2a425fb356
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/299970
(cherry picked from commit cf28de40659781154ebdfed922900b160912a3ca)
Reviewed-on: http://git-master/r/301523
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: pcie: Fix LP0 Power management WARs
Jay Agarwal [Thu, 3 Oct 2013 13:34:58 +0000]
ARM: tegra: pcie: Fix LP0 Power management WARs

1. Remove the WAR of removing pcie devices in
suspend and creating them from scratch in resume
2. Remove bypassing pcie config space access in
pcie bus noirq suspend/resume calls
3. Convert tegra pcie suspend/resume to noirq calls
except enable_features in resume
4. Make pcie sd4 regulator always ON with external
control
5. Avoid adding pcie host device for runtime power
management as it conflicts with noirq calls

Change-Id: Ia6236f15e124a63a08a36b167a346c8282f5271a
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/300465
Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: gk20a: optimize gr ucode load
Prashant Malani [Mon, 30 Sep 2013 23:10:51 +0000]
video: tegra: host: gk20a: optimize gr ucode load

Use a quicker method to start up the fecs and gpccs
falcons. Load a quicker bootstrap routine into the
falcons, and then have the ucode DMAed in by them.

Change-Id: Ibf0c5a851f73a084a2b8af2d2a7f1e3185967922
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/290033

5 years agovideo: tegra: host: gk20a: Improve PMU error stats
Neil Gabriel [Mon, 21 Oct 2013 16:01:00 +0000]
video: tegra: host: gk20a: Improve PMU error stats

To debug FECS-related PMU EXTERR failures, it is necessary to
know the internal FECS error code. This value is stored in
PWR_PMU_BAR0_ERROR upon failure. This change reads that register
and reports its value in PMU error stat messages.

Change-Id: Idefb5312568dfcead478ca237197c801e37fe966
Signed-off-by: Neil Gabriel <ngabriel@nvidia.com>
Reviewed-on: http://git-master/r/301840
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: gk20a: Fix pmu init sequence
Prashant Malani [Mon, 21 Oct 2013 21:18:41 +0000]
video: tegra: host: gk20a: Fix pmu init sequence

The second part of pmu initialization, like the first,
should only be executed if there is PMU support, otherwise
it should return immediately.

Bug 1392583

Change-Id: Ic04994f0a460ea84e08002efa7703f5c0a534f11
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/301960
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: dsi: Enable waiting on sync points
Vineel Kumar Reddy Kovvuri [Thu, 17 Oct 2013 09:05:14 +0000]
video: tegra: dsi: Enable waiting on sync points

Fixes busy wait and enables waiting on sync points

Bug 1367115

Change-Id: I107500fca8e8703a8c5db954c4a74227bd25d475
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/300489
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: ardbeg: make global variables static
Colin Cross [Tue, 15 Oct 2013 22:46:43 +0000]
ARM: tegra: ardbeg: make global variables static

Make global variables static so that board-ardbeg.c can be copied
without causing build failures.

Change-Id: Ic6427991e83b49f55c6fed68f363f6dace95b362
Signed-off-by: Colin Cross <ccross@android.com>
(cherry picked from commit AOSP kernel/tegra e3042a7cde16f2ae2eff1f513f16fda5f9648c52)
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/300905

5 years agoARM: tegra: ardbeg: use fiq debugger
Colin Cross [Fri, 11 Oct 2013 23:35:05 +0000]
ARM: tegra: ardbeg: use fiq debugger

Use the fiq debugger instead of the debug serial driver on uartd
when CONFIG_TEGRA_FIQ_DEBUGGER is set.

Change-Id: I4a2d64603fb4734c4103c3f169fd2de01fac2fbb
Signed-off-by: Colin Cross <ccross@android.com>
(cherry picked from commit AOSP kernel/tegra 80c73cb8ba3f2368a1746f8e572d8ef4efb8473c)
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/300904

5 years agoARM: tegra: fiq_debugger: add support for irq mode
Colin Cross [Fri, 11 Oct 2013 23:33:59 +0000]
ARM: tegra: fiq_debugger: add support for irq mode

Modern Tegra chips with TrustZone don't currently support fiqs.
Add a function to initialize the fiq debugger in irq mode.

Change-Id: Ia7be1032bbf27110a2f3f434c78351b3186af6f7
Signed-off-by: Colin Cross <ccross@android.com>
(cherry picked from commit AOSP kernel/tegra 71377e5e4a9f03080e13a21398082fbd85e6b127)
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-on: http://git-master/r/300903
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Courbot <acourbot@nvidia.com>

5 years agoarm: tegra: update cpu edp calculation parameters
Xue Dong [Fri, 18 Oct 2013 22:11:51 +0000]
arm: tegra: update cpu edp calculation parameters

bug 1330937

Change-Id: I34d0fc5ff4a15538417eb216dedd8b93414eba07
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/301412
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoarch: config: tegra update mods defconfig
Tope Yang [Thu, 17 Oct 2013 02:32:11 +0000]
arch: config: tegra update mods defconfig

add loki support and CONFIG_NFS_V4
remove TEGRA_GPU_DVFS and CONFIG_ANDROID_PARANOID_NETWORK

Bug 1355741

Change-Id: Ic216227ff2aa55c82e37c465f934fd11812ce8c1
Signed-off-by: Tope Yang <topey@nvidia.com>
Reviewed-on: http://git-master/r/300293
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vivek Aseeja <vaseeja@nvidia.com>
Reviewed-by: Lael Jones <lajones@nvidia.com>
Tested-by: Lael Jones <lajones@nvidia.com>
Reviewed-by: Anders Ma <andersm@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: host: gk20a: Handle EXTERR intr
Neil Gabriel [Tue, 15 Oct 2013 19:43:23 +0000]
video: tegra: host: gk20a: Handle EXTERR intr

Continue to dump the falcon stats if the interrupt fires as it
is never expected to, but clear the interrupt to avoid an
interrupt storm.

Change-Id: I39f50eff500aec1842bac6f37ec720288decb785
Signed-off-by: Neil Gabriel <ngabriel@nvidia.com>
Reviewed-on: http://git-master/r/299586
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: tegra: clock: Lock DFLL 1st during cluster switch
Alex Frid [Tue, 15 Oct 2013 03:09:39 +0000]
ARM: tegra: clock: Lock DFLL 1st during cluster switch

During LP=>G CPU cluster switch lock DFLL in closed loop mode first,
and then disable LP CPU clock. This order change allowed to reduce
delay for G CPU to reach its target frequency.

Change-Id: If47779e2172cec8ccf9d66d74bbc2b219f7ddda2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/299683
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Support variable GPU Vmin
Alex Frid [Sat, 5 Oct 2013 06:13:58 +0000]
ARM: tegra12: dvfs: Support variable GPU Vmin

Replaced constant GPU minimum voltage limit with variable Vmin
adjusted based on particular chip speedo value and temperature range.
CVB polynomial equation used for Vmin calculation is the same as for
each GPU DVFS frequency, just coefficients are different. Still apply
absolute Vmin at cold (below 15C) to GPU rail for the entire Tegra12
family.

Bug 1273253

Change-Id: I61925886131647f42ba1a6db233044dc1f3351ed
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/289548
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm:tegra: set cma data for nvmap platform data
Vandana Salve [Thu, 19 Sep 2013 13:24:04 +0000]
arm:tegra: set cma data for nvmap platform data

Pass the cma dev pointers, resize flag and
CMA chunk size in nvmap platform data
for the reserved contiguous memory using CMA

Bug 1279160

Change-Id: I5420bcdf859c463fed6e7c8715b82da71922c2ed
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/289421
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agoARM: tegra12: clock: Allow EMC backup if scaling disabled
Kaz Fukuoka [Thu, 26 Sep 2013 18:06:47 +0000]
ARM: tegra12: clock: Allow EMC backup if scaling disabled

Re-arranged EMC backup procedure so that backup is allowed even if
EMC scaling is disabled. This is necessary to re-lock main EMC pll
at maximum rate. Without backup, EMC may stuck at rates lower than
maximum while scaling is disabled.

Ported from Tegra11 Change-Id: Ie7f7b481d077c1f696d3cd42f3786300fd96fc80

Change-Id: If6212c1ebb18f151739fd637fb20a50448129282
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/298513
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: clock: Skip lowering voltage on EMC backup
Kaz Fukuoka [Wed, 25 Sep 2013 23:38:08 +0000]
ARM: tegra12: clock: Skip lowering voltage on EMC backup

If EMC backup rate is below current rate, skip lowering voltage when
switching to backup clock source, Final voltage will be set correctly
after main clock source is re-locked, and EMC clock is switched to
main source.

Bug 1188643

Ported from Tegra11 Change-Id: I82a4a85449dbd589c7692f6640e1bd5e08e0bc9b

Change-Id: Ida94aa31c9b67fab7aaa8c4df4ea66996b7c8443
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/298512
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agopower: Prefer min over max for online cpus
Sai Gurrappadi [Mon, 21 Oct 2013 17:44:23 +0000]
power: Prefer min over max for online cpus

We prefered min_online_cpus over max_online_cpus if min > max.
min_wins is now true for online cpu PmQoS requests.

Bug 1270839

Change-Id: I2888538dd1a4616babb7cd1532264272de5cfe64
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/301871
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoRevert "video: tegra: host: add power domain for host1x"
Sridhar Lavu [Mon, 21 Oct 2013 17:01:50 +0000]
Revert "video: tegra: host: add power domain for host1x"

This reverts commit 674927b93952b919195a691c4226391007cfd026
since it is causing sanity failure for suspend sanity.

Bug 1384396 : original change
Bug 1392433 : sanity regression

Change-Id: I3647050c51ccc8c24eead2a234fae64a15d07599
Signed-off-by: Sridhar Lavu <slavu@nvidia.com>
Reverts-what-was-Reviewed-on: http://git-master/r/299959
Reviewed-on: http://git-master/r/301857
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra: remove unnecessary fuse header files
Shardar Shariff Md [Wed, 16 Oct 2013 06:36:20 +0000]
arm: tegra: remove unnecessary fuse header files

Removing unwanted fuse.h header inclusion

Bug 1380004

Change-Id: I6cd7ceac380a6e418705965823f7127ad39dd548
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/299810
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: fuse: replace globals with functions
Shardar Shariff Md [Thu, 17 Oct 2013 06:48:18 +0000]
arm: tegra: fuse: replace globals with functions

Replace globals tegra_sku_id, tegra_chip_id &
tegra_bct_strapping with below functions
u32 tegra_get_sku_id(void);
u32 tegra_get_chip_id(void);
u32 tegra_get_bct_strapping(void);

Bug 1380004

Change-Id: I43eb2523e4af5d06bc1aa1f03c02c5168577878c
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/300401
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: t124: spi: Fix in setting RX_TAP_DELAY
Shardar Shariff Md [Mon, 21 Oct 2013 10:46:10 +0000]
arm: t124: spi: Fix in setting RX_TAP_DELAY

RX_TAP_DELAY should be set even if controller data(cdata)
as tap delay should be set depending on speed

Change-Id: Ia584be5c6bfd1e71166b4241ff127c22e1a7aeaf
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/301756
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: Fix compile warnings
Terje Bergstrom [Mon, 21 Oct 2013 10:12:34 +0000]
video: tegra: host: Fix compile warnings

Some "unsigned long"s were converted to u32. for_each_set_bit()
requires unsigned long, so convert some instanced back.

Fix how include files are included.

Forward declare nvhost_set_error_notifier.

Fix parameter to nvhost_memmgr_put() to be handle and not id.

Fix tracing to use %llx and casting to u64 to print dma_addr_t.

Change-Id: I8ab3c3f2012c2efdb519b17027dbaf20715e81f2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/301743
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

5 years agoarm: t124: spi: set rx tap delay
Shardar Shariff Md [Mon, 21 Oct 2013 10:33:56 +0000]
arm: t124: spi: set rx tap delay

Set rx tap delay as per characterisation data

Bug 1381154

Change-Id: Ic6faf9dea58e77e9624fdff2d4273e5bc806d898
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/301752
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: t124: spi: Improve slew rate of SPI signals
Shardar Shariff Md [Mon, 21 Oct 2013 09:14:21 +0000]
arm: t124: spi: Improve slew rate of SPI signals

As per characterisation data set pad groups
AT2, UAD, UAA with below settings
0x70000874 = 0x03f37000
0x70000924 = 0xf1717000
0x700008B8 = 0xf1717000

Bug 1381154

Change-Id: Ic2580a51c40f68e7875b6158668c7c10faad66d4
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/301723
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: add power domain for host1x
Prashant Gaikwad [Mon, 7 Oct 2013 10:29:07 +0000]
video: tegra: host: add power domain for host1x

If we enter LP0 from cpuidle all the context of host1x will
be reset as VDD_CORE is turned off in LP0.

Use generic power domain to save and restore the context of
host1x. If host1x is runtime suspended for 2s then it will
get suspended and context is saved. If some request or remote
weakeup is received for it then it is restored.

Bug 1384396

Change-Id: I6313ee49287379820b4f936c0d7cb8433934ce2c
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/299959
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoregulator: fixed: enable regulator if it is always on
Laxman Dewangan [Tue, 8 Oct 2013 12:55:48 +0000]
regulator: fixed: enable regulator if it is always on

If regulator is always ON then make sure it is enabled
at the time of registration.

Change-Id: Idec9756c144ca9ae560b51662ef81dc37f56a213
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/289156
Reviewed-by: Automatic_Commit_Validation_User

5 years agoRevert "arm: tegra: update iso efficiency calculation"
Terje Bergstrom [Mon, 21 Oct 2013 06:55:49 +0000]
Revert "arm: tegra: update iso efficiency calculation"

Bug 1392092

This reverts commit 8d82e31458712d16b5a8ad4cd31072d4e1daa288.

Change-Id: Id6036b116620314d6fccbe309f2f293c6806caa3
Reviewed-on: http://git-master/r/301669
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra12x: iomap: Fix NOR size
Ashwin Joshi [Fri, 11 Oct 2013 10:11:25 +0000]
arm: tegra12x: iomap: Fix NOR size

Make Tegra NOR size configurable since different Automotive boards have
different NOR sizes and that needs to be mapped by the kernel.

Bug 1386803
Bug 1373849

Change-Id: Ib2dca855a5eb23c484c054772227cb2a3d562a49
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/301681
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agopower: bq2419x: Export sysfs node to set output current
Darbha Sriharsha [Tue, 15 Oct 2013 14:22:21 +0000]
power: bq2419x: Export sysfs node to set output current

Export sysfs node to set the output charging current
value.

Bug 1385836

Change-Id: Id9ea71e7c012754d4318e5d607e02263aaafe145
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/300425
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopower: bq2419x: Restart charging after charge complete
Darbha Sriharsha [Fri, 4 Oct 2013 13:42:21 +0000]
power: bq2419x: Restart charging after charge complete

Add support for restart of charging a certain time interval
after the charging complete interrupt is generated.

Bug 1354923

Change-Id: I3685bc6f52ea3fd114c69e115f28a69731c0f71e
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/300424
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopower: bq2419x: Provided low batt voltage notification
Darbha Sriharsha [Fri, 4 Oct 2013 12:06:17 +0000]
power: bq2419x: Provided low batt voltage notification

Print the low battery voltage notification in the interrupt
service bq2419x interrupt service routine.

Bug 1354813

Change-Id: I1cff88161f3ccfbf79615baf52c4c94bf914e5fe
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/300423
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: Pass irq number to bq2419x charger
Darbha Sriharsha [Fri, 4 Oct 2013 11:36:58 +0000]
arm: tegra: Pass irq number to bq2419x charger

Pass interrupt number through device tree file
to bq2419x charger driver on TN8 platform.

Bug 1354813

Change-Id: I89cb4e6c83c0e64329980413231d61def8af5e46
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/300422
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: Transfer bq2419x platform data to DT
Darbha Sriharsha [Mon, 30 Sep 2013 06:14:27 +0000]
arm: tegra: Transfer bq2419x platform data to DT

Remove bq2419x platform data from the board file
and add it to the devicr tree files for tn8.

Bug 1375730
Bug 1367264

Change-Id: Iecd2aede72ea76477c4917487f793b1d7b1a5aa7
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/300421
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopower: bq2419x: Add device tree support
Darbha Sriharsha [Wed, 25 Sep 2013 07:18:37 +0000]
power: bq2419x: Add device tree support

Add device tree parsing support in bq2419x battery charger driver

Bug 1367264

Change-Id: I54ae21c98304553b8f1ba65a6618bc2dc6aade99
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Reviewed-on: http://git-master/r/300420
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: gk20a: split pmu init
Prashant Malani [Sat, 28 Sep 2013 22:34:57 +0000]
video: tegra: host: gk20a: split pmu init

Split pmu init into two parts. One before, and one
after graphics init. This way, we don't have to waste
time waiting on the first wait queue, which consumes
a lot of time.

Change-Id: Ia82a5720d0f28e710c1fbdd939c6875eb9578689
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/289275
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: Register gk20a for touch boost
Terje Bergstrom [Wed, 9 Oct 2013 12:22:53 +0000]
video: tegra: host: Register gk20a for touch boost

Register gk20a device to be notifier on touch event.

Bug 1364240

Change-Id: I044fd919132fb5c825462029db1f1f8c0ba6d901
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/288812

5 years agoPM / Domains: Check if device wants to wake up
Terje Bergstrom [Wed, 9 Oct 2013 12:22:02 +0000]
PM / Domains: Check if device wants to wake up

If a a define is marked as "NO_POWER_OFF", and it's suspended, wake
it up.

Bug 1364240

Change-Id: Ic51e69db01a88e2deefa4c3c0884d14ccc29272b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/288811