5 years agoARM: tegra: EDP: adjust cpu power limit table
Sivaram Nair [Mon, 27 May 2013 14:16:51 +0000]
ARM: tegra: EDP: adjust cpu power limit table

The power cap levels are adjusted so that they are uniformly
spaced. This will make it easier to calcualte the ceiling values.

This patch effectively reverts 7ccb28ec4d5080f62c88c0ef1828a6ad5b4fefc7.

Bug 1293353
Bug 1279622

Change-Id: Ia8b6411d4d6a2379114272564bda925948b73851
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/233595
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoEDP: tegra: use core_gain from board data
Sivaram Nair [Wed, 22 May 2013 12:57:22 +0000]
EDP: tegra: use core_gain from board data

core_gain is made board specific. This patch makes the needed changes in
the tegra core sys EDP client code.

Bug 1266730

Change-Id: Icc3f77d245579e8927260cb3ec0475d8b765ba62
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/233591
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: add core_gain to pluto and macallan
Sivaram Nair [Wed, 22 May 2013 12:53:50 +0000]
ARM: tegra: add core_gain to pluto and macallan

Adding board specific core_gain values.

1266730

Change-Id: I2badce930c1927372302b7afbbfdbb379db3fb6f
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/233590
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM:tegra: Add P2560 board id
Xiaohui Tao [Thu, 23 May 2013 22:47:25 +0000]
ARM:tegra: Add P2560 board id

Change-Id: If8d86fc7f347d87d98aa9253908070cc5e46426b
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/232324
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: emc: Fix DSR override
Alex Waterman [Wed, 29 May 2013 17:42:24 +0000]
ARM: tegra: emc: Fix DSR override

A kernel panic was triggerable if the EMC tables were not loaded and
a device requested DSR to be reset to normal. In the case that the
tables do not exist - maybe got rejected onload - we can't reset to
"normal" because there is no normal.

Bug 1294214

Change-Id: I3e02de38e67d4979f462c759ffd070297b5aa239
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/233797
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: ahb: enable WR_WAIT_COMMIT_ON_1K bit
Ashwini Ghuge [Tue, 28 May 2013 09:48:00 +0000]
ARM: tegra: ahb: enable WR_WAIT_COMMIT_ON_1K bit

Enable WR_WAIT_COMMIT_ON_1K bit in AHB_GIZMO_AHB_MEM
for T114 A02 chip on Dalmore

Bug 1286714

Change-Id: I264818f7183e5dce7d6d2c3e6a4ccdc31281582b
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/233258
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarm: tegra: macallan: update board file
Diwakar Tundlam [Thu, 23 May 2013 21:55:09 +0000]
arm: tegra: macallan: update board file

Update initial soctherm config for Macallan.

Bug 1216782

Change-Id: Id53d353ae0913ee6c361c538db6362f442ef9099
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/232317
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: soctherm: fix heavy throttling on GPU zone
Diwakar Tundlam [Thu, 23 May 2013 21:21:51 +0000]
arm: tegra: soctherm: fix heavy throttling on GPU zone

Fixed initialization of GPU throttling in level2 thermal control regs.

Bug 1169070

Change-Id: I121449b20fb987f61c6142e3783cd924f19a5bd6
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/232300
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: dc: unset initialized flag
Rakesh Iyer [Fri, 22 Feb 2013 03:45:00 +0000]
video: tegra: dc: unset initialized flag

Unset initialized flag once initialization is done.

Bug 1238868

Change-Id: I5f38b1883b6212f6ec1d9d767ec026dce52c7170
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/203157
(cherry picked from commit 0ed2cea2af44be08dac592fe9b9b2176b136a3f0)
Reviewed-on: http://git-master/r/231227
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agovideo: tegra: hdmi: set underscan if supported
Rakesh Iyer [Thu, 28 Mar 2013 23:39:56 +0000]
video: tegra: hdmi: set underscan if supported

Set underscan on TV if it supports it.

Bug 1234468.

Change-Id: I507e927bcf4ef51847f8671a7152da1a22259338
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/214248
(cherry picked from commit 99cf6a0f42a0a0f2a793bf6ccf57ae6a79d3cdc1)
Reviewed-on: http://git-master/r/229753
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: nvmap: Add tegra_iovmm_vm_insert_pages()
Hiroshi Doyu [Wed, 3 Apr 2013 11:30:36 +0000]
video: tegra: nvmap: Add tegra_iovmm_vm_insert_pages()

Use ops->map_pages() for nvmap.

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: Ibaaf27a3c5cb4086561f1b4bcd40ebb5a40cd12c
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/226141
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoiommu/tegra: smmu: Add ->map_pages() for perf
Hiroshi Doyu [Wed, 3 Apr 2013 12:50:17 +0000]
iommu/tegra: smmu: Add ->map_pages() for perf

Implement iommu_ops->map_pages() for tegra-smmu.

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: I0d50d2e73cd9d4c17416e67f100de7194078808f
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/226140
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoiommu/tegra: smmu: iterate {SECTION,GROUP} instead of TLB_FLUSH_ALL
Hiroshi Doyu [Mon, 22 Apr 2013 10:10:00 +0000]
iommu/tegra: smmu: iterate {SECTION,GROUP} instead of TLB_FLUSH_ALL

TLB_FLUSH_{ALL,ASID} has SMMU H/W bug at HUM OoO. To work around
this H/W bug, iterate TLB_FLUSH_{SECTION,GROUP} for all PDIR index
instead of TLB_FLUSH_ALL although a big perf penalty is expected.

Enable flush_{ptc,tlb}_all when unmap entry is larger than some
specific value.

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: I3e8f1eb0316a6829a14661b8e1d4cfcd7e2ec85b
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/226139
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoiommu/tegra: smmu: Add smmu_flush_{ptc,tlb}_range()
Hiroshi Doyu [Thu, 2 May 2013 08:45:14 +0000]
iommu/tegra: smmu: Add smmu_flush_{ptc,tlb}_range()

Add smmu_flush_{ptc,tlb}_range(), a little bit more efficient because
it skips unnecessary flushing by unit.

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: I879d39d6e514662c1ce70fa4e3bc62a3eeb5b31a
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/226138
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: SMMU IOVA allocation to be aligned 16KB
Hiroshi Doyu [Fri, 19 Apr 2013 07:28:29 +0000]
ARM: tegra: SMMU IOVA allocation to be aligned 16KB

Align a SMMU IOVA allocation to 16KB to work around SMMU HUM
reordering issue for T{30,114,148}. TLB can accomodate IOVA 16KB range
at once so that 16KB aligned IOVA allocation makes TLB operation
atomic for a buffer. This is necessary for some of Tegra SoCs, not for
all.

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: I2e7d87e1e7e7089743a5116b5950381decc07d2a
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/226137
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoasoc: tegra: disable bias off for AIC3033
Chandrakanth Gorantla [Mon, 27 May 2013 11:41:47 +0000]
asoc: tegra: disable bias off for AIC3033

disable bias off for AIC3033 as headset detection is not working
bug 1281731

Change-Id: Icaa4d55a99a809449eabc36bec6a50c648174d11
Signed-off-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Reviewed-on: http://git-master/r/232969
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomedia: tegra: ad5823: add missed reglator_disable
Jake Park [Wed, 22 May 2013 10:30:44 +0000]
media: tegra: ad5823: add missed reglator_disable

Adding missed regulator_disable() into probe().
While probing ad5823 focuser, regulator vdd should be turned on
before i2c operations and should be turned off after i2c oeprations.

Bug 1293915

Change-Id: Ie9936e699ad3e3b08eb1dad55182e33dc89244a3
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/231547
(cherry picked from commit d48c71109f44a2982032dcf2206c3b8ac080f9e4)
Reviewed-on: http://git-master/r/232851
Reviewed-by: Karl Kim <kkim@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agomedia: video: tegra: apply ov7695 quality tune
Jake Park [Mon, 20 May 2013 07:01:18 +0000]
media: video: tegra: apply ov7695 quality tune

Bug 1278482

Change-Id: Ib74a3a8d018a5082f3098fa058609d634bfb2010
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/230186
(cherry picked from commit 819ac5b3ac5613f82b8e05e04fd8d45d95ec18bc)
Reviewed-on: http://git-master/r/232850
Reviewed-by: Karl Kim <kkim@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomedia: video: tegra: change IMX132 readout orientation
Frank Chen [Wed, 13 Feb 2013 23:50:15 +0000]
media: video: tegra: change IMX132 readout orientation

Rotate IMX132 frame 180 degree to match sensor
orientation.

Bug 1294324

Change-Id: I25a80cafaa21452212f48bcf1760d4e184943e4f
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/232748
GVS: Gerrit_Virtual_Submit
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: Enable host1x for context save
Terje Bergstrom [Thu, 23 May 2013 05:50:14 +0000]
video: tegra: host: Enable host1x for context save

Enable host1x when doing 3D context save. As host1x has ignore_children
enabled, host1x is not enabled by runtime PM automatically when 3D is
enabled.

nvhost always enables explicitly both client and host1x. Context save is
an exception: for it PM runtime enables power itself, and because of
ignore_children, host1x power is not enabled at the same time.

Bug 1272223

Change-Id: Ie52d15de7ac4689f7955e79a225ddd7f14947dbb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/231993
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agomedia: video: tegra: imx135 flash support
Charlie Huang [Thu, 9 May 2013 00:13:24 +0000]
media: video: tegra: imx135 flash support

enable imx135 on-sensor flash strobe.

bug 1277452

Change-Id: I9fb1bc50567d2f2c2e911420104b8350711022d4
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/226857
(cherry picked from commit 5cf9a90fa937e1ee5e0ca27d110ffae30c35e12d)
Reviewed-on: http://git-master/r/231793
Tested-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agotegra: media: video: fix imx135 mode switch issue
Frank Chen [Thu, 4 Apr 2013 00:08:27 +0000]
tegra: media: video: fix imx135 mode switch issue

Add missing gain setting for HDR short expsoure.

Bug 1250073

Change-Id: Ifb6f470461b01da3a9185eb3e07d47b569a0af49
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/216350
(cherry picked from commit eb6c0403dffd6795b6476aca0ac590f90a79b70f)
Reviewed-on: http://git-master/r/231790
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: fuse: set fuse programming pulse to 12us
Ken Chang [Fri, 3 May 2013 06:32:26 +0000]
arm: tegra: fuse: set fuse programming pulse to 12us

The fuse programming pulse needs to be 12us for T114/T148.
A cycle of fuse bit time is a period of OSC clock time,
thus FUSE_FUSETIME_PGM2_0 can be calculated based on the
OSC frequency of the specific board and how many cycles
needed with the specific OSC frequency.

The formula is FUSE_FUSETIME_PGM2_0 = CEIL(N * OSC in MHz)
where N = 12 for T114/T148.

Bug 1273404

Change-Id: I8b4814fa16c500d6d371afac7738a8e9305c3843
Reviewed-on: http://git-master/r/225140
(cherry picked from commit 13d6881424f35bb033736968df09f00059a22a89)
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/229669
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: fuse: correct the register offset
Ken Chang [Fri, 3 May 2013 05:18:27 +0000]
arm: tegra: fuse: correct the register offset

For T114/T30:
OSC_FREQ = CLK_RST_CONTROLLER_OSC_CTRL_0[31:28]
OSC_OVERRIDE_ENABLE = APBDEV_PMC_PLLP_WB0_OVERRIDE_0[8]

Bug 1273404

Change-Id: I3dbc93a825aef95040580f309a9cbc796afe6e1a
Reviewed-on: http://git-master/r/225135
(cherry picked from commit 1a86aaa5bca41f7d6e16703a766fa205c2dfe791)
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/229665
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: dma-mapping: Round-up IOVA map base
Hiroshi Doyu [Wed, 15 May 2013 07:38:18 +0000]
ARM: dma-mapping: Round-up IOVA map base

This is necessary for iova_alloc_at(). On high order allocation, the
lower bit of base was ignored, and it returns incorrect IOVA address.

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: I0be96b97c8036f8a5bc1c35a1c85e04593021a2b
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/228729
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: nvmap: Add explicit cache flush
Terje Bergstrom [Wed, 8 May 2013 05:50:44 +0000]
video: tegra: nvmap: Add explicit cache flush

Add a function to explicitly complete all deferred cache flush
operations.

Bug 1259839

Change-Id: Ifa625b26be3d30e7f58f71a51c91c849bc944b0a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/226545
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoiommu/tegra: smmu: Add Tegra errata 1053704 for some of Tegra SoC
Hiroshi Doyu [Fri, 3 May 2013 03:18:02 +0000]
iommu/tegra: smmu: Add Tegra errata 1053704 for some of Tegra SoC

Add workaround of TEGRA_ERRATA_1053704 for some of Tegra SoC

bug 1274699
bug 1254010
bug 1226176
bug 999937

Change-Id: I7d1a75b198051bc49eb7e14e4e7892eab9818f29
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/226136
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agosound: soc: tegra: Fix noise during ad1937 arecord on E1861
Nitin Nagaraja [Fri, 8 Mar 2013 11:55:57 +0000]
sound: soc: tegra: Fix noise during ad1937 arecord on E1861

Set codec mode to TDM single-line and ASDATA delay to 0
to eliminate noise during ad1937 record on E1861.

Bug 1224769

Change-Id: Ia6d04c1f641ffb4f35930dfdd505b85ce5c43824
Signed-off-by: Nitin Nagaraja <nitinn@nvidia.com>
Reviewed-on: http://git-master/r/207581
(cherry picked from commit 4cc5e040c74800a31bcf5342ae6a57b63d97cd68)
Reviewed-on: http://git-master/r/223788
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>

5 years agoARM: tegra: Add trace for MC clock stop state
Prashant Gaikwad [Fri, 26 Apr 2013 10:50:40 +0000]
ARM: tegra: Add trace for MC clock stop state

Add trace for MC clock stop state entry and exit.

Bug 1010971

Change-Id: I1c10a1918224598293c84e827faf6179c30ee634
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/223328
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: add trace events for soc idle state
Prashant Gaikwad [Thu, 18 Apr 2013 16:51:59 +0000]
arm: tegra: add trace events for soc idle state

Add new trace events to measure latencies for MC clock stop
idle state.

Bug 1010971

Change-Id: I401d39a776e4695c88d79d039a5c8eaefe6c4914
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/221010
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: nvmap: Add nvhost private data
Terje Bergstrom [Thu, 4 Apr 2013 12:31:40 +0000]
video: tegra: nvmap: Add nvhost private data

Add nvhost private data field and setter and getter for for it.

Bug 1259839

Change-Id: I618046e3205bc1db548fb8f4fefb4be1571ceeb4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/216493
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agosoc: codecs: max97236: fix no audio after resume
Dara Ramesh [Wed, 29 May 2013 13:55:40 +0000]
soc: codecs: max97236: fix no audio after resume

restore headphone amplifier volume after coming out of
resume.

bug 1296634

Change-Id: If731f1355fa7d90e189d0d8594bdf0a571f1f8ad
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/233749
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: config: enable POWER_SUPPLY_EXTCON
Laxman Dewangan [Wed, 29 May 2013 10:08:53 +0000]
ARM: tegra: config: enable POWER_SUPPLY_EXTCON

Enable power supply detection through extcon notification.

Change-Id: Id01f835bf8b0ac7f9dea9ffb030e7ddf47ba6f9d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/233294
(Cherrypicked from 12b2e9a5a39f8834c39e8572b04f95dd22110721)
Reviewed-on: http://git-master/r/233647
Reviewed-by: Automatic_Commit_Validation_User

5 years agopower: extcon: detection of power supply through extcon
Laxman Dewangan [Tue, 28 May 2013 10:47:04 +0000]
power: extcon: detection of power supply through extcon

The power supply is detected through the extcon notification
from the driver which identify the supply cable type.

Add power supply driver to generate power supply type based
on identified cable through extcon.

Change-Id: Iccf27a3896daf46de6371a136d4f336b2f172aec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/232987
(Cherrypicked commit 17c4ad22e26fb2c9d0bbe230be2fc77b2f64de95)
Reviewed-on: http://git-master/r/233646
Reviewed-by: Automatic_Commit_Validation_User

5 years agoalsa:hda: add alsa control for eac3 cap. of a dev.
Sayak Ghosh Choudhury [Tue, 28 May 2013 14:37:07 +0000]
alsa:hda: add alsa control for eac3 cap. of a dev.

The EAC3 capability of the device is collected from the eld buffer
and it is tranfered to the framework layer through hda capability
control.

Bug 1295255

Change-Id: Ib0f0aa04aab4515a58ac0761c69f080961013159
Signed-off-by: Sayak Ghosh Choudhury <sayakc@nvidia.com>
Reviewed-on: http://git-master/r/233367
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Isaac Richards <irichards@nvidia.com>
Reviewed-by: David Clark <dclark@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoARM: tegra14: clock: fix tegra spi clock naming
Amit Kamath [Tue, 28 May 2013 04:55:38 +0000]
ARM: tegra14: clock: fix tegra spi clock naming

tegra11 spi driver is common across all platforms higher than t30
hence correcting naming from t14 to t11

bug 1294669

Change-Id: I1cc03e5151e2c170683441902489186a750e118b
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/233137
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: usb: disable pmc after disabling vbus
Rohith Seelaboyina [Tue, 28 May 2013 09:21:06 +0000]
ARM: tegra: usb: disable pmc after disabling vbus

disable pmc after disabling vbus

Bug 1279228
Bug 1279501

Change-Id: Ie4f2de07f235c22c0bd60bc4c7e039b09a53ca93
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/228906
(cherry picked from commit 8a09d0e4839953fb6b263086f1b3f5047f46008f)
Reviewed-on: http://git-master/r/233126
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: host: tegra: disable pmc before going to LP0
Rohith Seelaboyina [Thu, 16 May 2013 06:43:49 +0000]
usb: host: tegra: disable pmc before going to LP0

disable pmc before going to LP0

Bug 1279228
Bug 1279501

Change-Id: Ib59cff3f164262a80aa35a6ab58af792783cc5fb
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/228905
(cherry picked from commit 51b894f7889e24772eec4b51189635953b3349eb)
Reviewed-on: http://git-master/r/232941
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agopower: max17048: Correcting the rcompseg value
Chaitanya Bandi [Mon, 25 Mar 2013 18:27:31 +0000]
power: max17048: Correcting the rcompseg value

Corrected the order of rcompseg value as it
was found that the bytes are swapped.

Bug 1247334

Change-Id: I34b95e2e57f9915556f3d96641a1b553a2c0e363
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/212719
(cherry picked from commit 6039c5a98fde36976b5e06071fb90999391fb19a)
Reviewed-on: http://git-master/r/232932
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomedia: video: tegra: update focuser working range
Sudhir Vyas [Thu, 16 May 2013 08:58:09 +0000]
media: video: tegra: update focuser working range

Update ad5816 focuser calibrated working range.
Current settings do not give better results for
macro mode specifically.

Bug 1238213

Change-Id: Ic8b60081bda75ecf3158d98796c979528767dfcd
Reviewed-on: http://git-master/r/229267
(cherry picked from commit 789a14c9053b0a4cdfbf879b4b83efa4a746c589)

Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Signed-off-by: Rakesh Sharma <rasharma@nvidia.com>
Change-Id: Idfbb5d093661d3cf21f5b27bd5dcee54340a37e5
Reviewed-on: http://git-master/r/232857
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prayas Mohanty <pmohanty@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agomisc: nct1008: talk to nct1008 only when powered
Sang-Hun Lee [Mon, 13 May 2013 17:06:00 +0000]
misc: nct1008: talk to nct1008 only when powered

Problem description:
 - nct1008_suspend powers off nct1008
 - nct1008_suspend does stop the workqueue and irq, but
   if there is a kernel thread which would trigger
   nct1008_read_reg or nct1008_write_reg, nct1008 would
   still be accessed after it is powered off

Fix description:
 - Rename the existing flag shutdown_complete to nct_disabled
 - Update the value of nct_disabled when powering nct1008 on and off

Bug 1288427

Change-Id: Id885794eb39a71025ad9f5c3615156c19039d13f
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/228011
(cherry picked from commit 08eed1ddbacece2f1c8b4fba633c01c0f87ba2cd)
Reviewed-on: http://git-master/r/231294
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agomisc: nct1008: prevent irq revival
Sang-Hun Lee [Mon, 29 Apr 2013 16:07:03 +0000]
misc: nct1008: prevent irq revival

Problem description:
 - nct1008_shutdown and nct1008_suspend disable nct1008_irq
 - If nct1008_irq triggers during shutdown or suspend, the irq handler will
   schedule nct1008_work_func, which will re-enable nct1008_irq
 - This work could trigger after disabling the power rail as well, causing
   an access of nct1008 after disabling its power rail

Fix description:
 - Add a new flag stop_workqueue
 - While the flag is set, nct1008_work_func will return without doing anything
 - After setting the flag to effectively disable nct1008_work_func, wait for
   running nct1008_work_func to complete then disable nct1008_irq

Bug 1280843

Change-Id: I69176ad466f4c49e62932425fdf7a8583b2cf8bf
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/223906
(cherry picked from commit e20a0759c2094941186aa79cd2ea61fc5f254b75)
Reviewed-on: http://git-master/r/231293
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agohwmon: ina3221: Add suspend and resume
Anshul Jain [Thu, 4 Apr 2013 00:15:57 +0000]
hwmon: ina3221: Add suspend and resume

Change-Id: I882038b2dee419daf7c402a9c03aad06a0a25807
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
(cherry picked from commit 7b92fbfe4366076ee9d344df5526dea5a24f9e16)
Reviewed-on: http://git-master/r/230956
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jun Yan <juyan@nvidia.com>
Tested-by: Jun Yan <juyan@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agohwmon: ina3221: optimize ina3221
Jun Yan [Mon, 18 Mar 2013 19:06:49 +0000]
hwmon: ina3221: optimize ina3221

turn off ina3221 when online_cores < 2 and freq < 1GHz
turn on ina3221 when online_cores >=2 or freq >= 1GHz

Bug 1241820

Change-Id: Ie2d6d703711a33b14c73f765421e9565ecda64f6
Signed-off-by: Jun Yan <juyan@nvidia.com>
(cherry picked from commit fdcbbf2249bae6138c0e786b9c387afd9c032151)
Reviewed-on: http://git-master/r/229467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra: pluto: Update full cap to 2114.5mA
Chaitanya Bandi [Tue, 7 May 2013 05:02:51 +0000]
ARM: tegra: pluto: Update full cap to 2114.5mA

Bug 1281739

Change-Id: I69277c2e7885f3f588cf4ef75280c4276b736ea3
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/226007
(cherry picked from commit 01112c31f686cc3de67fee2e44c1da80892f554c)
Reviewed-on: http://git-master/r/228813
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: macallan: correct the roof_floor for some rails
Kerwin Wan [Tue, 23 Apr 2013 12:37:52 +0000]
arm: tegra: macallan: correct the roof_floor for some rails

Set roof_floor of ldo4, ldo5 and ldo7 to be 0.
External control(roof_floor) should be only used for the
power rails which require to be on during system idle/active
and do not require to be on when it is in sleep/lp0.

Bug 1241085

Change-Id: I80fbba27040e45a05e771bcf734184941cb451c9
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/222094
(Cherrypick commit b0bb38cb5089dc7d9c216f9c678e4e88c14ac2f8)
Reviewed-on: http://git-master/r/226292
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: pluto: remove external control from LDO9
Laxman Dewangan [Thu, 25 Apr 2013 07:15:50 +0000]
ARM: tegra: pluto: remove external control from LDO9

The Palmas-LDO9 is used for supplyign the voltage to sdmmc3-ap rail
and sdmmc driver already take care of rail to be enable/disable and
hence it is not require to configure it as external control.

bug 1278358

Change-Id: Ie825d79d516ec9d9e1f1336822f67845aaf1269e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/222840
(Cherrypicked commit 12166842b063084ca383daf840e5f67b9e1e0a0d)
Reviewed-on: http://git-master/r/226291
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agopalmas: regulator: move roof_floor init after regulator init
Laxman Dewangan [Fri, 24 May 2013 12:37:17 +0000]
palmas: regulator: move roof_floor init after regulator init

The roof_floor information of the regulator is stored in the
pmic context data to use for enabling/disabling the rails.

This info should be stored after all initialization is complete
for a given rails.

Change-Id: Ib4894420794154653611481b43f592337d8f4752
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/232595

5 years agoregulator: palmas: CHARGEPMUP reg does not have valid reginit data
Laxman Dewangan [Fri, 24 May 2013 12:29:21 +0000]
regulator: palmas: CHARGEPMUP reg does not have valid reginit data

Palams regulator supports the CHARGEPUMP regulator but this does not
support any regulator configuration like sleep. step etc. as there
is no register set for this.

Removing the call for initialization of CHRGEPUMP regulator.

Change-Id: I23581afa67801a0e461a04e55570fda15a81fcfd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/232594

5 years agoARM: tegra114: set always-on and boot-on if externally controlled
Laxman Dewangan [Fri, 24 May 2013 19:37:51 +0000]
ARM: tegra114: set always-on and boot-on if externally controlled

Set the power rails to be always ON if it is externally controlled
for boards Pluto, Dalmore and Macallan.

bug 1267800
bug 1267804

Change-Id: Iec57cd013f6811f8a008b475c6dd9eba1cebe4e9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/218871
(cherry picked from commit 00f4c4904ca89bebe9d36f4208a8eeb59c15c03f)
Reviewed-on: http://git-master/r/224416
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoregulator: palmas: set roof floor after registering regulator
Laxman Dewangan [Mon, 15 Apr 2013 11:55:30 +0000]
regulator: palmas: set roof floor after registering regulator

Initailize the roof floor of rails after registering regulators
to make sure the rails are configured properly as per regulator
init data.

bug 1267800
bug 1267804

Change-Id: Ia623030083cf1dda823873fe6ec7458899f2ff86
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/218881
(cherry picked from commit 56594b0a78cb22bae1590b5589139f879c5c0506)
Reviewed-on: http://git-master/r/224415

5 years agoregulator: palmas: add support for ext power req
Gaurav Batra [Tue, 2 Apr 2013 18:56:42 +0000]
regulator: palmas: add support for ext power req

Bug 1242520

Change-Id: I0911977291a8fa0eccff3cba0d7fdedafbc91a36
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/215721
(cherry picked from commit 5b3025e83b0854f455f619a8efa20137ed68940d)
Reviewed-on: http://git-master/r/222677
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: pluto: power: hdmi support for 4K
Gaurav Batra [Tue, 26 Feb 2013 18:47:21 +0000]
arm: tegra: pluto: power: hdmi support for 4K

Changed the supply from ldo1 to ldo4 for hdmi_pll.
Also added the enable / disable functions for hdmi.

Bug 1242520

Change-Id: I599f24a58a12bd7d1c39912622cf60f89f124403
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/206846
(cherry picked from commit dbf37102f4204d23e796f53331e2236af410ca6a)
Reviewed-on: http://git-master/r/222673
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: host: break out when we find the right pdev in nvhost list
Bryan Wu [Fri, 8 Mar 2013 04:10:35 +0000]
video: tegra: host: break out when we find the right pdev in nvhost list

Without this break, it will keep searching and cause kernel oops
because it's deleting a list item and not using a safe iterator.

Bug 1249358

Change-Id: I4e5d7af2be8d422a5888ced04b9ee89310a57f0e
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226475
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agovideo: tegra: host: remove sysfs interface when we deinit a module
Bryan Wu [Tue, 23 Apr 2013 23:18:19 +0000]
video: tegra: host: remove sysfs interface when we deinit a module

We need to remove those power related sysfs interface when deinit a
module otherwise reinit the module will fail due to existing sysfs
interface.

Bug 1249358

Change-Id: Ic218244534db0f969ddebe92dff2e069a70468cd
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226474
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agovideo: tegra: host: add an API function to release nvhost resources
Bryan Wu [Fri, 8 Mar 2013 03:59:36 +0000]
video: tegra: host: add an API function to release nvhost resources

We need an API function to release nvhost resources, then that allows
us to reuse the nvhost resources later.

Bug 1249358

Change-Id: Ie0c93b877692b4934b8bffa732d1e7dc97ae758f
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226473
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agovideo: tegra: host: export some API symbols for V4L2 camera driver
Bryan Wu [Mon, 25 Feb 2013 19:48:09 +0000]
video: tegra: host: export some API symbols for V4L2 camera driver

Bug 1240806

Change-Id: I15afb23df856ad1534682cbc6502a8b2d325c11d
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226472
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agovideo: nvmap: export some API symbols for V4L2 videobuf2 nvmap driver
Bryan Wu [Mon, 25 Feb 2013 19:46:28 +0000]
video: nvmap: export some API symbols for V4L2 videobuf2 nvmap driver

Bug 1240806

Change-Id: Ib77f4057b645cec4191a1e38b8063afe3410861b
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226471
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agomedia: videobuf2: fix buffer management issues
Bryan Wu [Thu, 18 Apr 2013 23:46:06 +0000]
media: videobuf2: fix buffer management issues

Use right buffer flag NVMAP_HANDLE_UNCACHEABLE to allocate buffer,
which can be shared by VI/CSI and CPU. Don't use NVMAP_HEAP_SYSMEM.
It is validated to old T20 silicon and can't support big buffers. By
default, our nvmap_alloc() will use IOVMM to allocate buffers.

nvmap_pin() gives us IOVA for hardware engines like VI/CSI module
with IOMMU enabled in kernel. nvmap_mmap() gives us VA for CPU
read/write operations. So we need to convert VA address to physical
address of the buffer and map that buffer to user space processor's
memory space "page by page".

Use pr_err() replace printk(KERN_ERR, ...)

Change-Id: Ice439cee59292a19868cec638d81ba2c8b01c616
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226470
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agomedia: tegra: fix V4L2 camera driver for main
Bryan Wu [Fri, 19 Apr 2013 01:00:16 +0000]
media: tegra: fix V4L2 camera driver for main

 - add basic device tree support
 - move to use BGGR RAW data format
 - fix wrong register base by using aperture[0]
 - add 2 more clock operation
 - add error recovery functions
 - add powergate control
 - change some error messages as warning

Change-Id: I9ac52e35a32d8915a2158e87ddbe2c3e2a846816
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226469
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agomedia: tegra: make V4L2 camera can be a module
Bryan Wu [Thu, 28 Feb 2013 02:06:54 +0000]
media: tegra: make V4L2 camera can be a module

"vi" will be binded with host1x client VI driver, while
"tegra-camera" is for our V4L2 driver.

Use nvhost_client_device_release() to release resources

Bug 1240806

Change-Id: Ieccc5010ab72d2aa92384c88be484eb4ade72212
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226468
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agomedia: tegra: add regulator control in V4L2 driver instead of board file
Bryan Wu [Wed, 20 Mar 2013 23:42:03 +0000]
media: tegra: add regulator control in V4L2 driver instead of board file

Change-Id: Id983aa121be984143679a198496245a22cc81d61
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226467
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agomedia: tegra: replace nvhost_device to platform_device
Bryan Wu [Fri, 22 Feb 2013 00:29:00 +0000]
media: tegra: replace nvhost_device to platform_device

According to nvhost API changes, this patch convert nvhost_device
interface to platform device interface.

Since nvhost_device_data is in the platform_data for
tegra_vi01_device, our specific tegra_platform_data has to be passed
as a private_data of nvhost_device_data from a board file.

Bug 1240806

Change-Id: I09b5bef54778c017f1298cc87416461752462374
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226466
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agomedia: tegra: add supporting for RAW8/RAW10 input and output
Bryan Wu [Tue, 12 Feb 2013 18:49:23 +0000]
media: tegra: add supporting for RAW8/RAW10 input and output

CSI host controller of Tegra can support Bayer Raw8 and Raw 10 data
input, it also output data as extended 16-bit data format in memory
directly.

Raw data output should be handled by the second output channel.

This patch add supporting for Raw data input/output and the second
output channel.

All were tested on Cardhu board.

Bug 1240806

Change-Id: I39fdc3dc76c5174cf2fe22b590a1d29aec1af4f6
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226465
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agomedia: OV5650: add OV5650 SoC camera I2C device driver
Bryan Wu [Thu, 17 Jan 2013 01:27:29 +0000]
media: OV5650: add OV5650 SoC camera I2C device driver

OV5650 is a RAW sensor outputing Bayer RAW 8 or RAW 10 data.
This driver uses SoC camera interface and supports several
different resolution.

Bug 1240806

Change-Id: Ia0b663f4ada21550e45f0e93f125127692dff213
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226463
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agoARM: tegra: Adjust temperature margin for CPU EDP
Diwakar Tundlam [Fri, 24 May 2013 22:13:24 +0000]
ARM: tegra: Adjust temperature margin for CPU EDP

From updated tegra11x margining spreadsheet.

Bug 1293224
Bug 1233302

Change-Id: I424bb5f82df1affe0fc1105de96517f5be3a31a3
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/232715
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

5 years agoARM: tegra: fix warning related to soc timer irq affinity
Seshendra Gadagottu [Thu, 23 May 2013 02:52:32 +0000]
ARM: tegra: fix warning related to soc timer irq affinity

During hot-plug of secondary cpu, soc timer irq associated
with that cpu needs to migrated to primary cpu0. Even though
this soc timer irq is disabled and removed in very next step,
during the irq migration affinity of soc timer irq is with
hot-pluged cpu. To avoid this issue, change the affinity of
soc timer irq to cpu0.

Bug 1243194

Change-Id: Ic3103dc1989823397aa8143d599fd6f308541ce0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/231911
Tested-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agosound: soc: tegra: Add RX and TX channel reset
Nitin Nagaraja [Fri, 26 Apr 2013 11:19:55 +0000]
sound: soc: tegra: Add RX and TX channel reset

When the same APBIF channel is used for repeated recording and
switching between I2S and TDM mode, there is corruption and hang.
Adding soft reset to that channel during allocation of the FIFOs
fixes the issue.

Bug 1224769

Change-Id: I7b7483ffeca347a021892d9bc47a3f9005602500
Signed-off-by: Nitin Nagaraja <nitinn@nvidia.com>
Reviewed-on: http://git-master/r/223344
(cherry picked from commit 532d07c2fbc7fa07e7649cd587332439cc3ac6d8)
Reviewed-on: http://git-master/r/227397
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>

5 years agomedia: OV5640: add OV5640 SoC camera I2C device driver
Andrew Chew [Wed, 8 Aug 2012 20:35:33 +0000]
media: OV5640: add OV5640 SoC camera I2C device driver

OV5650 is a RAW sensor outputing YUV data. This driver uses SoC
camera interface and supports several different resolution.

Based on ov5642 driver. There seem to be some register differences,
so forking the driver to make those changes.

Change-Id: I5d889ca2ccf22a7c3be8cb26c1420b0fde0f1acf
Signed-off-by: Andrew Chew <achew@nvidia.com>
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/226464
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

5 years agoarm: tegra: macallan: Runtime panel detection for
Vick Yu [Tue, 26 Feb 2013 08:41:00 +0000]
arm: tegra: macallan: Runtime panel detection for
 sharp 25x16.

Bug 1241867

Change-Id: I34e2a258fe12960e07d43ded3bdedbd0046b6037
Signed-off-by: Vick Yu <vyu@nvidia.com>
Reviewed-on: http://git-master/r/221529
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agopower: max17048: add TECHNOLOGY property
Syed Rafiuddin [Thu, 7 Feb 2013 09:12:53 +0000]
power: max17048: add TECHNOLOGY property

Additon of POWER_SUPPLY_PROP_TECHNOLOGY property
to display technology of the battery

Bug 1232370

Change-Id: If4cd2e1f56fe05168713e4b395e8ddfb337db547
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/198323
(Cherrypicked from 188e7195ddcf3ff11a18b1c2e75dd92b9935858a)
Reviewed-on: http://git-master/r/233358
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra11: clock: add sdmmc3 to sclk and emc
Naveen Kumar Arepalli [Thu, 23 May 2013 10:31:13 +0000]
ARM: tegra11: clock: add sdmmc3 to sclk and emc

Add sdmmc3 to sclk, emc as a client.
Increasing sclk freq helps sdmmc3 KPI.

Bug 1294076

Reviewed-on: http://git-master/r/232081
(cherry picked from commit 042d74136265b5036b39912d5103058735774739)
Change-Id: Ia42d66d36b6d738b7e0415b40b3b675265c4fac3
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/232794
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agousb: gadget: tegra_udc: Reorder device registrations
Darbha Sriharsha [Mon, 20 May 2013 13:28:15 +0000]
usb: gadget: tegra_udc: Reorder device registrations

Reordering tegra gadget device and extcon device
registrations so that cable type detection and
extcon cable state updation happen properly.

Bug 1277651

Change-Id: If696c32757067cd86852c6e9b2f2069598b2f9c4
Signed-off-by: Darbha Sriharsha <dsriharsha@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/231045
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: roth: Set board revision in system_rev
Anshul Jain [Mon, 20 May 2013 22:21:38 +0000]
arm: tegra: roth: Set board revision in system_rev

This change sets the board revision of roth in system_rev.
This board revision set the system prop "ro.revision".

Bug 1236715

Change-Id: I15fb3c8c61667e6197177e08abd540c14422f347
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
(cherry picked from commit 1aadaf43c2585876c2c7fa89e565561809d4a69a)
Reviewed-on: http://git-master/r/229758
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: hdmi: set ONESHOT for threaded irq
Ajay Nandakumar [Wed, 20 Mar 2013 09:27:45 +0000]
video: tegra: hdmi: set ONESHOT for threaded irq

when threaded irq is requested with NULL handler, default
handler is used, so IRQF_ONESHOT flag must be set.

Bug 1207114

Change-Id: Ifa345e6acf0b19e9fd3eb6ef89cc38088f4539ed
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/211135

5 years agoHACK: gpio: tegra: Don't require pinctrl
Dan Willemsen [Tue, 18 Jun 2013 05:20:59 +0000]
HACK: gpio: tegra: Don't require pinctrl

We're not using pinctrl yet, so don't make gpio-tegra require it.
Without this change, gpio_request will always return -EPROBE_DEFER.

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoDT: tegra: mmc: unifies bus-width property
Shridhar Rasal [Wed, 20 Mar 2013 08:37:32 +0000]
DT: tegra: mmc: unifies bus-width property

Reference commit 7f21779 "mmc: dt: Consolidate DT bindings"

Change-Id: I60cd2a0b57084990e8d9034622377516477655c6
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/211119
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
(cherry picked from commit 0ae5dd5cdf3da95a1809f43aa576d8c0acd5f0b5)

5 years agoFix build issues from linux-3.7-rc1 merge.
Nitin Kumbhar [Thu, 22 Nov 2012 09:29:31 +0000]
Fix build issues from linux-3.7-rc1 merge.

Change-Id: Iad130dc9ea776302376319e0cfdcfe72057b8354

5 years agoARM: tegra: iovmm: Make IOMMU/IOVMM selectable in Kconfig
Hiroshi DOYU [Wed, 11 Jul 2012 13:51:24 +0000]
ARM: tegra: iovmm: Make IOMMU/IOVMM selectable in Kconfig

This patch enables to replace iovmm*.ko family with
tegra-{smmu,gart}.ko if needed in kernel config. To use IOMMU as
backend engine, Enable TEGRA_IOMMU_{GART,SMMU} under IOMMU in config,
and automatically disable IOVMM.

IOVMM is equivalent to IOMMU_API. TEGRA_IOVMM_GART is equivalent to
TEGRA_IOMMU_GART. TEGRA_IOVMM_SMMU is equivalent to TEGRA_IOMMU_SMMU.

Change-Id: I73408e927eb3f21e1db4e73700aaf415f4949166
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/115011
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: Ra4e94d8d1a41f12b5f5afe207fc33f1ba8bc917e

5 years ago__dev*
Dan Willemsen [Mon, 17 Jun 2013 06:31:19 +0000]
__dev*

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years ago__dev*
Dan Willemsen [Mon, 17 Jun 2013 06:30:26 +0000]
__dev*

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years ago__dev*
Dan Willemsen [Mon, 17 Jun 2013 06:26:44 +0000]
__dev*

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years ago__dev*
Dan Willemsen [Mon, 17 Jun 2013 06:17:02 +0000]
__dev*

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoARM: tegra: gpio: Remove old suspend/resume path
Dan Willemsen [Mon, 17 Jun 2013 04:48:55 +0000]
ARM: tegra: gpio: Remove old suspend/resume path

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agov3.8: nvhost: Updates for devfreq API change
Dan Willemsen [Mon, 17 Jun 2013 04:27:36 +0000]
v3.8: nvhost: Updates for devfreq API change

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup! rtc: tps80031: Adding driver for TI PMU RTC 80031
Dan Willemsen [Mon, 17 Jun 2013 04:02:14 +0000]
fixup! rtc: tps80031: Adding driver for TI PMU RTC 80031

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup tps80031 SLAVE_ID renaming
Dan Willemsen [Mon, 17 Jun 2013 03:53:34 +0000]
fixup tps80031 SLAVE_ID renaming

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoRevert "USB: EHCI: fix timer bug affecting port resume"
Dan Willemsen [Mon, 17 Jun 2013 03:33:53 +0000]
Revert "USB: EHCI: fix timer bug affecting port resume"

This reverts commit ee74290b7853db9d5fd64db70e5c175241c59fba.

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agov3.8: fixup roth tps51632 api usage
Dan Willemsen [Mon, 17 Jun 2013 02:32:52 +0000]
v3.8: fixup roth tps51632 api usage

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup: remove __dev*
Dan Willemsen [Mon, 17 Jun 2013 02:31:14 +0000]
fixup: remove __dev*

5 years agov3.8: fixup dalmore tps51632 api
Dan Willemsen [Mon, 17 Jun 2013 02:30:17 +0000]
v3.8: fixup dalmore tps51632 api

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agov3.8: fixup dalmore tps65090 api usage
Dan Willemsen [Mon, 17 Jun 2013 02:29:26 +0000]
v3.8: fixup dalmore tps65090 api usage

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup palmas gpadc
Dan Willemsen [Thu, 6 Jun 2013 07:12:05 +0000]
fixup palmas gpadc

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agospi: tegra114: Use is_clkon_always
Dan Willemsen [Thu, 6 Jun 2013 07:03:46 +0000]
spi: tegra114: Use is_clkon_always

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoSPI: tegra114: rename clock_always_on
Dan Willemsen [Thu, 6 Jun 2013 06:59:30 +0000]
SPI: tegra114: rename clock_always_on

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agommc: sdhci-tegra: Add T148
Dan Willemsen [Thu, 6 Jun 2013 06:56:01 +0000]
mmc: sdhci-tegra: Add T148

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoInput: rmi4 - Fix 3.7 API changes
Dan Willemsen [Thu, 6 Jun 2013 05:51:33 +0000]
Input: rmi4 - Fix 3.7 API changes

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoHACK: add mach/iomap.h for xhci-tegra
Dan Willemsen [Tue, 4 Jun 2013 20:46:59 +0000]
HACK: add mach/iomap.h for xhci-tegra

Because it uses IO_ADDRESS. This needs to switch to ioremap, etc.

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoasoc: codecs: Fix TI aic326x build on 3.5
Dan Willemsen [Fri, 31 May 2013 05:11:45 +0000]
asoc: codecs: Fix TI aic326x build on 3.5

See upstream commit 1d99f2436d0d1c7741d6dfd9d27b5376cdbbca40

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agovide: tegra: dsi: Add pm_runtime reference count
Animesh Kishore [Thu, 16 May 2013 11:19:19 +0000]
vide: tegra: dsi: Add pm_runtime reference count

Hook display runtime power management to standard linux
pm_runtime framework.

Bug 1268656

Change-Id: I4ab6ed993a6288a766cc24c894a5b86bbc357a4c
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/229329
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>