5 years agovidoe: tegra: dsi: fix warnings for dsi regulator
Jon Mayo [Fri, 8 Nov 2013 20:31:22 +0000]
vidoe: tegra: dsi: fix warnings for dsi regulator

Fix warnings for regulator_enable() and avdd_dsi_csi.

Change-Id: I0ff0af7ef05fb09836394c50b699caedeef26d00
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/328428
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>

5 years agoRevert "Revert "arm: mm: cpa: remove APIs no longer used""
Alex Waterman [Mon, 11 Nov 2013 18:30:30 +0000]
Revert "Revert "arm: mm: cpa: remove APIs no longer used""

This reverts commit e7f14c6091b152d0f4da8d5470ca987f5deecce6.

Change-Id: I76d651932f7e57b92b24e380dbbd5cca00268ba3
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/329040
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: nvmap: Fix cache flush for page pools
Alex Waterman [Mon, 11 Nov 2013 18:18:55 +0000]
video: nvmap: Fix cache flush for page pools

Do not skip the nvmap CPA wrappers if CPA is disabled.
We still need the cache flushing to occur even if CPA
is disabled.

Change-Id: Ie070e39151edf89853592c94b35544a3d1973284
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/329041
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoRevert "Revert "video: nvmap: Only use CPA if enabled in nvmap""
Alex Waterman [Mon, 11 Nov 2013 18:30:24 +0000]
Revert "Revert "video: nvmap: Only use CPA if enabled in nvmap""

This reverts commit 2bb4316f73d285f23ff74f0dcbfa397248915d1d.

Change-Id: I2aa826738c331fa2cdf5ed0b1cadafb53b63f3dc
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/329039
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agostaging: ozwpan: Update to latest drop from ATMEL.
Todd Poynter [Mon, 28 Oct 2013 18:40:01 +0000]
staging: ozwpan: Update to latest drop from ATMEL.

Update the ozwpan driver to the latest drop from ATMEL.

Bug 1394137.

Change-Id: I9069c974cb665a8be68d43536f57c3b717b570a6
Signed-off-by: Todd Poynter <tpoynter@nvidia.com>
Reviewed-on: http://git-master/r/328583
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agokeyboard: gpio: handle Tegra PM notifier events
Prashant Gaikwad [Mon, 11 Nov 2013 07:28:32 +0000]
keyboard: gpio: handle Tegra PM notifier events

Bug 1254633

Change-Id: I4a1857dcf984ff6ba742382eb9ae632e01ca9667
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/309619
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoregulator: core: return error in regulator_get() after checking for dummy regulator
Laxman Dewangan [Sat, 9 Nov 2013 11:28:49 +0000]
regulator: core: return error in regulator_get() after checking for dummy regulator

If dummy regulator is enabled in a given platform and regulaotr lookup
fails then check for the dummy regulator and then only return proper
regulator or error.

Change-Id: I480b778c89c15d968ce24876a6412babcdafb846
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328628
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Raghavendra V K <rvk@nvidia.com>
Reviewed-by: Bhavesh Parekh <bparekh@nvidia.com>

5 years agoPM/domain: Change print type for "latency exceeded" print
Bharat Nihalani [Mon, 11 Nov 2013 06:30:06 +0000]
PM/domain: Change print type for "latency exceeded" print

The print "Power-off latency exceeded" keeps coming in on a regular
interval for various modules; don't see this to be valuable.

Hence change the print type from pr_warning to pr_debug.

Commit fd5dbe49ebb4ad600f22bfeb5b3bb0a33a651fed did the same for
"Power-on latency exceeded". Missed to make the change for "Power-off
latency exceeded" at that point; hence doing that now.

Change-Id: I1bbbae00465855c6a20bdb9bb6c1a1a4346e1484
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/328785

5 years agoARM: tegra: loki: enable SDR104 mode for SD
R Raj Kumar [Tue, 5 Nov 2013 09:04:09 +0000]
ARM: tegra: loki: enable SDR104 mode for SD

Enabled SDR104 mode with por freq for SD device.
Unmasked SDR12 and SDR25 modes for SD device.

Bug 1344633

Change-Id: I473ec78842151474cdb14e7daf267e30e970a396
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/326674
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agovideo: tegra: host: Sleeping semaphore wait
Terje Bergstrom [Wed, 6 Nov 2013 13:50:14 +0000]
video: tegra: host: Sleeping semaphore wait

Implement a semaphore wait that allows sleeping.

Bug 1400979

Change-Id: I1b8b096225dca8d1d3472ca60b688616f50b12c1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/327111
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoarm: tegra: fuse: move common APIs to common.c
Shardar Shariff Md [Thu, 7 Nov 2013 09:55:14 +0000]
arm: tegra: fuse: move common APIs to common.c

Move fuse APIs tegra_fuse_readl, tegra_fuse_init,..and
non related functions from tegra_fuse.c to common.c

Bug 1380004

Change-Id: I51a687a53636dd30cde0ededc1b77915844b4b05
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/327646
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agovideo: tegra: host: fix compile warnings
Jon Mayo [Fri, 8 Nov 2013 20:33:33 +0000]
video: tegra: host: fix compile warnings

The definition for function pointer nvhost_channel_ops.set_priority() changed
to match the usage by other function definitions.

Change-Id: I4e45fd7871c2c54bebffdfd7200e595d45152a56
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/328430
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: gk20a: remove unused variable
Jon Mayo [Fri, 8 Nov 2013 20:32:28 +0000]
video: tegra: host: gk20a: remove unused variable

Fix build warning from an unused variable.

Change-Id: Ia47ff20292d610963266b1113490c89ffdfe494d
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/328429
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agomedia: video: tegra: enable dtv
Mallikarjun Kasoju [Thu, 31 Oct 2013 12:06:38 +0000]
media: video: tegra: enable dtv

Bug 1393024

Change-Id: Ic55040b4471aa31584df7d1512d061c8d559d0cd
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/310069
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: Add DTV platform data
Mallikarjun Kasoju [Fri, 8 Nov 2013 11:25:26 +0000]
ARM: tegra: Add DTV platform data

Bug 1393024

Change-Id: Id0632e73e216465c269194af3975f9fcec0dead1
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/328254
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: dtv: don't unmap dma buffers
Mallikarjun Kasoju [Thu, 31 Oct 2013 12:05:02 +0000]
video: tegra: dtv: don't unmap dma buffers

don't unmap dma buffers in remove.

Bug 1393024

Change-Id: I146818ae52223abed152c11f8fba22c5c48803fc
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/310068
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: loki: Enable HS200 mode for eMMC
Naveen Kumar Arepalli [Thu, 3 Oct 2013 10:13:58 +0000]
ARM: tegra: loki: Enable HS200 mode for eMMC

-Enable HS200 mode for eMMC
-Enable POR frequency for eMMC on LOKI.

Bug 1344640

Change-Id: I49478308f0c552c218737da881dfdfd2da9ceff8
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/300483
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoUSB: debugfs: USB test mode support by usb debugfs
Neil Chen [Wed, 17 Jul 2013 05:34:21 +0000]
USB: debugfs: USB test mode support by usb debugfs

To generate USB testmode pattern by accessing usb debugfs. It
need to be enabled with enable "CONFIG_USB_DEBUG" in def_config.
And disable autosuspend by sysfs before test as below:
echo on > /sys/bus/usb/devices/.../power/control

Bug 1323709

Change-Id: I2c9d4cb304435e9d36f11a97a8db2d2ffd582ecf
Signed-off-by: Neil Chen <neilc@nvidia.com>
Reviewed-on: http://git-master/r/303705
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoarm: tegra12: set MC byte width to 8
Wen Yi [Fri, 8 Nov 2013 01:30:52 +0000]
arm: tegra12: set MC byte width to 8

The MC byte width should be 8 since Tegra12 has a
single 64-bit memory channel.

Bug 1397606

Change-Id: Ia430bbdcc06bff2252ce2c53a6dc55e108265896
Signed-off-by: Wen Yi <wyi@nvidia.com>
Reviewed-on: http://git-master/r/327960
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agopinctrl: tegra: correct mux status check
Ashwini Ghuge [Fri, 8 Nov 2013 15:29:31 +0000]
pinctrl: tegra: correct mux status check

Return error only on mux less than zero

Change-Id: I3a6a36c20e64a302a51f8b79476b05dbe3a5142a
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>

ldewangan: remove un-necessarily change.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I8662164ab168a11e4b557334aa7bdcd5ceb88ae5
Reviewed-on: http://git-master/r/328684
Reviewed-by: Automatic_Commit_Validation_User

5 years agothermal: pwm_fan: toggle gpio in suspend/resume
Anshul Jain [Tue, 22 Oct 2013 18:59:23 +0000]
thermal: pwm_fan: toggle gpio in suspend/resume

On suspend, this change sets the gpio high.

On suspend:
free pwm
request gpio
set gpio high
On resume:
free gpio
request pwm
set pwm

Bug 1388303
Bug 1399542

Change-Id: I6905e4217dd170801d84ec98713067e5c2a53abf
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Reviewed-on: http://git-master/r/302591
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/325897
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agofury: sync DT for TN8 plus E1769 PMU board.
Hayden Du [Mon, 4 Nov 2013 23:27:01 +0000]
fury: sync DT for TN8 plus E1769 PMU board.

Change-Id: Id8e7a30a8bccb92e7fb25010cf7516bface9535a
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/328146
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agortc: as3722: align driver with mainline
Laxman Dewangan [Fri, 8 Nov 2013 10:07:55 +0000]
rtc: as3722: align driver with mainline

Align the RTC driver of ams AS3722 based on mainline:

/**
commit a1e01867211112691e80701a01ed9900655f7fe5

drivers/rtc/rtc-as3722: add RTC driver

Add a driver to support accessing the RTC found on the ams AS3722
PMIC using RTC framework.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Florian Lobmaier <florian.lobmaier@ams.com>

**/

(Cherrypicked commit from a1e01867211112691e80701a01ed9900655f7fe5)

Fixed compilation issue happened during integration.

Integration done by: bbasu and ldewangan

Change-Id: I68812519d7ff2263193d2b4c91da71037cfd43fb
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328289
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: remove unused rtc platform data
Laxman Dewangan [Fri, 8 Nov 2013 09:58:07 +0000]
mfd: as3722: remove unused rtc platform data

Change-Id: Id70ec3c0e18f4b32311dbebfbebb7138f5efd01e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328288
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: remove as3722 rtc platform data usage
Laxman Dewangan [Fri, 8 Nov 2013 09:56:57 +0000]
ARM: tegra: remove as3722 rtc platform data usage

Remove AS3722 platform data usage from board file as it is not
used by driver.

Change-Id: Ic6c879afffb742d92b1f9796200a4605ee7ad4d1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328287

5 years agortc: as3722: remove rtc platform data for enabling clk32kout
Laxman Dewangan [Fri, 8 Nov 2013 09:53:50 +0000]
rtc: as3722: remove rtc platform data for enabling clk32kout

The enable/disable clock control of ams AS3722 CLK32K output is moved
to clock driver and so it is not require from RTC driver.

Removing this duplicate of code from driver.

Change-Id: I1454a93e13b4d7d2db8e38236064948ed4d4ec3c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328286
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: add clock driver as mfd-sub device
Laxman Dewangan [Fri, 8 Nov 2013 09:41:44 +0000]
mfd: as3722: add clock driver as mfd-sub device

Device ams AS3722 supports the one 32KHz clock output. The clock
control support is provided through clock driver.

Add clock driver as mfd sub device to probe the clock driver.

Change-Id: Iff0a67b36ccd4ced86187e31b92c58c9f90bdf96
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328285
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: enable clk32k out from AS3722
Laxman Dewangan [Fri, 8 Nov 2013 09:38:14 +0000]
ARM: tegra: enable clk32k out from AS3722

Enable CLK32K out from AS3722 for Laguna and Ardbeg platform using
ams AS3722 PMIC.

Change-Id: I3e6334ba3088d9f44f7d3b9eaa05b956c55e200e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328284

5 years agoARM: config: tegra: enable clock config CONFIG_CLK_AS3722 for as3722
Laxman Dewangan [Fri, 8 Nov 2013 09:35:06 +0000]
ARM: config: tegra: enable clock config CONFIG_CLK_AS3722 for as3722

Enable clock driver for AS3722 to get support for the
CLK32K out from device.

Change-Id: I89943f819eadd1c39616b777825d34dc819cfa34
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328283
GVS: Gerrit_Virtual_Submit

5 years agoclk: as3722: modify clock driver to non-common clock framework
Laxman Dewangan [Fri, 8 Nov 2013 09:31:10 +0000]
clk: as3722: modify clock driver to non-common clock framework

Modify AS3722 clock driver to work with non-common clock framework
and add following support:
- enable/disable on boot.
- Selection of enable or disable clock through platform data and DT.

Change-Id: I3629396d51b389ea8d425bf4a2ae7af915ec950a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328282
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: add clock driver as mfd-sub device
Laxman Dewangan [Fri, 8 Nov 2013 09:11:12 +0000]
mfd: as3722: add clock driver as mfd-sub device

Device ams AS3722 supports the one 32KHz clock output. The clock
control support is provided through clock driver.

Add clock driver as mfd sub device to probe the clock driver.

Change-Id: I5e3b34de4db9f0bdf4a0a2b6b1f5d4a66c309bb2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328281
GVS: Gerrit_Virtual_Submit

5 years agothermal: pwm_fan: Node to change state-pwm mapping
Anshul Jain [Wed, 6 Nov 2013 05:56:34 +0000]
thermal: pwm_fan: Node to change state-pwm mapping

This change creates
/sys/devices/platform/pwm-fan/pwm_state_map node,
pwm values can be changed using these nodes at various
trip points.

echo "<state> <pwm>" > /sys/devices/platform/pwm-fan/pwm_state_map

Bug 1364451

Change-Id: Ib8487b948a84867a0084d9ab49e815e23b14419a
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/304038
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm: tegra: loki: Add pwm gpio
Anshul Jain [Sat, 2 Nov 2013 03:38:51 +0000]
arm: tegra: loki: Add pwm gpio

Add pwm gpio in fan data, so it can be accessed by pwm_fan driver.

Bug 1388303
Bug 1399542

Change-Id: I300723451556af611252fead806bef894d8b9355
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/325898
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Tao Xie <txie@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm: tegra12: clocks: fix pll_dp clock
Kerwin Wan [Fri, 8 Nov 2013 02:11:32 +0000]
arm: tegra12: clocks: fix pll_dp clock

pll_dp is used for dp and the expected rate
is only 270MHz.

Change-Id: I99a98ac29a430f9820b4be9088b143e9ff693388
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/327995
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: dc: fix kernel crush when fast link training.
Kerwin Wan [Thu, 7 Nov 2013 13:01:17 +0000]
video: tegra: dc: fix kernel crush when fast link training.

The value of *size which is the parameters of tegra_dc_dpaux_read_chunk
should be the N - 1, where N is the number of bytes we want to read.
If this is not taken care, stack may be destroyed and kernel crush.

Change-Id: Ic5cb807fbd41b918ee5ec709831bf8a4e8275659
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/327736
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: power: Reduce GPU regulator minimum
Alex Frid [Wed, 30 Oct 2013 04:56:20 +0000]
ARM: tegra12: power: Reduce GPU regulator minimum

Reduced GPU regulators minimum constraints to 650mV on Tegra12
platforms: ardbeg, loki, and laguna.

Change-Id: I8772b86c1fef8b8a55c0c7a1c4b7d85012c6542b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/309414
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: tn8: Reduce GPU regulator minimum to 650mV
Alex Frid [Fri, 8 Nov 2013 20:42:41 +0000]
ARM: tegra: tn8: Reduce GPU regulator minimum to 650mV

Signed-off-by: Alex Frid <afrid@nvidia.com>

Change-Id: Idfc42af1b54ea2c196fabf3e94e1b1e06250b753
Reviewed-on: http://git-master/r/328436
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: dc: fix dp link configuration
Kerwin Wan [Fri, 8 Nov 2013 02:07:56 +0000]
video: tegra: dc: fix dp link configuration

1. Correct the bandwidth setting.
2. Fix some registers settings.

Change-Id: I1baf59e3582b4b13049a8f6224ed0aa6450ac470
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/325908
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: ardbeg: add Sharp 15.6" WQXGA+ panel support
Kerwin Wan [Wed, 16 Oct 2013 12:35:12 +0000]
arm: tegra: ardbeg: add Sharp 15.6" WQXGA+ panel support

Bug 1387348

Change-Id: I411a6f78e5e2db464136608b2c3d019db637ce25
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/299986
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: Tegra12: Clocks: Update FCPU dvfs table with 204Mhz
Krishna Sitaraman [Tue, 5 Nov 2013 17:29:00 +0000]
ARM: Tegra12: Clocks: Update FCPU dvfs table with 204Mhz

Bug 1342499

Change-Id: Ia1b4012e4b8ee9b511179ca71d4fba06ed13c586
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/326749
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: dvfs: Re-name core cap interface/data
Alex Frid [Wed, 6 Nov 2013 21:46:14 +0000]
ARM: tegra: dvfs: Re-name core cap interface/data

Re-named interface and data object used to apply core rail override
cap to include "override" feature designation in the name.

Change-Id: Iedd5cd7ee28134db38c571feeb6b7703e75c8d28
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/328100
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: dvfs: Update GPU Vmin
Alex Frid [Wed, 30 Oct 2013 04:44:16 +0000]
ARM: tegra12: dvfs: Update GPU Vmin

Updated GPU Vmin CVB coefficients and changed VDD_GPU rail minimum
voltage accordingly.

Bug 1342499

Change-Id: Iae6a4e79b76ae7e6dac36875c9b8920762f37a09
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/309413
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agomisc: tegra-baseband: short autosuspend for native remote wake
Neil Patel [Fri, 25 Oct 2013 14:29:39 +0000]
misc: tegra-baseband: short autosuspend for native remote wake

Add support for short autosuspend when native remote wakeup is used.

Bug 1362837

Change-Id: I13cab913645d00a1d37caabf0d274bb2e557e0c3
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/324075
Reviewed-by: Gray Lei <glei@nvidia.com>
Reviewed-by: Steve Lin <stlin@nvidia.com>

5 years agovideo: tegra: host: gk20a: PMU survives recovery
Arto Merilainen [Wed, 6 Nov 2013 14:54:30 +0000]
video: tegra: host: gk20a: PMU survives recovery

Engine recovery used to tear down PMU and then restore its state.
This was required as PMU initialisation had steps that affected GR
and FECS. Currently, that part of initialisation is separated from
the bootup part and hence we can also simplify engine recovery.

This patch modifies the recovery routine so that we
1) disable only ELPG
2) recover engines
3) do second stage init for PMU (this includes GR and FECS parts)
4) Re-enable ELPG

Change-Id: I5e3409a7cecbc38b2e43cb11410592ddc9dbc501
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/327163

5 years agovideo: tegra: host: Wait ZBC save completion
Arto Merilainen [Thu, 7 Nov 2013 09:59:58 +0000]
video: tegra: host: Wait ZBC save completion

This far we have performed ZBC save without waiting it to complete
(properly). We have simply called pmu_idle() after save which does
not guarantee save operation to be completed.

This patch adds necessary code to check that the save is completed
before proceeding.

Change-Id: Ia25bbcc58b21c2c76cc130884ef66022498f9aae
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/327647
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Neil Gabriel <ngabriel@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoEDP: tn8: add consumer data for 8" display
Timo Alho [Wed, 6 Nov 2013 13:44:23 +0000]
EDP: tn8: add consumer data for 8" display

Add support for 8" display. Detect the used panel and apply correct
consumer data accordingly.

Change-Id: I0d2fc0b7eb371c9a89892b85fdb8b694af64d039
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/327109
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agomfd: as3722: use power off driver for system power off
Laxman Dewangan [Fri, 8 Nov 2013 08:46:41 +0000]
mfd: as3722: use power off driver for system power off

Use as3722-poweroff driver for the system power off and reset and
remove the supported code from the core driver.

Change-Id: I082ee4c83560ea5c53a13beb06cc92541036b1b6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328150

5 years agoARM: config: tegra: enable POWER_RESET_AS3722
Laxman Dewangan [Fri, 8 Nov 2013 08:45:53 +0000]
ARM: config: tegra: enable POWER_RESET_AS3722

Enable config CONFIG_POWER_RESET_AS3722 to support the power off and
reset through AS3722.

Change-Id: I2646faae24411ba50b0a8517485fae5282e0217b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328149
Reviewed-by: Automatic_Commit_Validation_User

5 years agopower: reset: as3722: system power off and reset through system-pmic
Laxman Dewangan [Fri, 8 Nov 2013 08:44:28 +0000]
power: reset: as3722: system power off and reset through system-pmic

Implement the system pmic power off and reset driver for ams AS3722 PMIC
device.

Change-Id: I04a4b48e016342fafdf6aba8b84daddd87176a83
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328148

5 years agopower: reset: as3722: add power-off driver
Laxman Dewangan [Fri, 8 Nov 2013 07:15:44 +0000]
power: reset: as3722: add power-off driver

ams AS3722 supports the power off functionality to turn off
system.

Add power off driver for ams AS3722.

Change-Id: I7a76d5d93cb4ccb4a244bb148bbb37f48e056574
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/328147

5 years agoarm: tegra: cleanup fuse.h inclusions
Shardar Shariff Md [Thu, 7 Nov 2013 11:31:09 +0000]
arm: tegra: cleanup fuse.h inclusions

cleanup fuse.h inclusion to avoid
build errors

Bug 1380004

Change-Id: I4e91fbca4ffdefe8db118c70f73f71976bb4a599
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/327681
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agopinctrl: tegra: add drive initialisation table for Tegra124
Laxman Dewangan [Fri, 8 Nov 2013 06:36:18 +0000]
pinctrl: tegra: add drive initialisation table for Tegra124

Change-Id: I02868b173040a3c93158f59c9b69842e2b56d88c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327756

5 years agopinctrl: tegra: add drive initialisation table for Tegra114
Laxman Dewangan [Thu, 7 Nov 2013 13:50:38 +0000]
pinctrl: tegra: add drive initialisation table for Tegra114

Change-Id: Ida0d652c227b18f89b9d50ed5af33cadf569ea83
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327755

5 years agopinctrl: tegra: add support for soc specific drive configuration
Laxman Dewangan [Thu, 7 Nov 2013 13:48:29 +0000]
pinctrl: tegra: add support for soc specific drive configuration

Every soc have their default driver configuration based on
characterization recommendation.

Add support to configure the drive group during pincontrol
driver initialisation.

Change-Id: I9af34c65feb77a5bb8af15a08dffe246e8c8eb9d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327754

5 years agopinctrl: as3722: fix pinconf_set warning
Bibek Basu [Thu, 7 Nov 2013 12:47:42 +0000]
pinctrl: as3722: fix pinconf_set warning

as3722 pinconf_set signature in existing kernel is not
matching with pinctrl framework

Bug 1394720

Change-Id: I60ceae624694becca956c20d69e64e6135cfaa32
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/327724
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: dc: use cancel_delayed_work_sync()
Deepak Nibade [Tue, 22 Oct 2013 13:00:27 +0000]
video: tegra: dc: use cancel_delayed_work_sync()

- nvhdcp driver uses flush_workqueue()
- instead make use of cancel_delayed_work_sync() since
  work scheduled is delayed work

Bug 1308191

Change-Id: I40f841c417cda9b6f40bb9da5c86c0b8944807e9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/302383
Reviewed-on: http://git-master/r/303810
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoPM/domain: Change print type for "latency exceeded" print
Bharat Nihalani [Thu, 7 Nov 2013 07:04:51 +0000]
PM/domain: Change print type for "latency exceeded" print

The print "Power-on latency exceeded" keeps coming in on a regular
interval for various modules; don't see this to be valuable.

Hence change the print type from pr_warning to pr_debug.

Change-Id: I544bb09993b6c13f5bd505f8580644d6e3002254
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/327487
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>

5 years agovideo: tegra: host: fix VIC clock gating writes again
Matt Craighead [Thu, 7 Nov 2013 17:14:32 +0000]
video: tegra: host: fix VIC clock gating writes again

Previous fix used the wrong register offsets -- incr4 register
offsets were being passed into a function that expected incr1
register offsets.

Bug 1403310

Change-Id: I3ba87ae72393ecebc93dcfa9e1dc2b52a22697bd
Signed-off-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-on: http://git-master/r/327809
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoRevert "video: nvmap: Only use CPA if enabled in nvmap"
Krishna Reddy [Fri, 8 Nov 2013 06:10:08 +0000]
Revert "video: nvmap: Only use CPA if enabled in nvmap"

This reverts commit 42000f34bb18fc5cc36089003fa32848b8e82ed1.

Change-Id: I3f08b7c4eceb519663d1e4ec833f586660d4e354
Reviewed-on: http://git-master/r/328096
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoRevert "arm: mm: cpa: remove APIs no longer used"
Krishna Reddy [Fri, 8 Nov 2013 06:10:21 +0000]
Revert "arm: mm: cpa: remove APIs no longer used"

This reverts commit 98ecd24717543e80280adfdbf4957e8f54e46a3a.

Change-Id: I2a8b9aeba150b3f8b7ad00258bf659421683f5b4
Reviewed-on: http://git-master/r/328095
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agopinctrl: tegra: t124: update resume sequence
Ashwini Ghuge [Thu, 7 Nov 2013 15:28:53 +0000]
pinctrl: tegra: t124: update resume sequence

Tristate pins and write IO_DPD regs before
restoring old pin state. Clear DPD_SAMPLE
after restoring old pin state

Change-Id: I546515258707c07350995a3f0fa16d50f461498e
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/301751
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra12: clock: add missing sbc clock
Shreshtha Sahu [Tue, 5 Nov 2013 05:49:36 +0000]
ARM: tegra12: clock: add missing sbc clock

This patch adds sbc4.sclk:sbc6.sclk clocks missing in
tegra_list_clks[] list.

Bug: 1353715

Change-Id: I25ae213d8b1cb7dba88296c9f6bd0e5f3a4c0894
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/326409
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomedia: platform: tegra: ar0261 register writes
David Wang [Fri, 8 Nov 2013 00:08:46 +0000]
media: platform: tegra: ar0261 register writes

Switch the register writes for coarse time, coarse time
short, and frame length to 16bit register writes. This fixes
missing byte in coarse time and frame length writes during
set modoe.

Bug 1399950

Change-Id: Ied14fc12c480f0c0ff640779848ae6f7bf993a40
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/327942
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: mm: cpa: remove APIs no longer used
Alex Waterman [Wed, 6 Nov 2013 19:43:52 +0000]
arm: mm: cpa: remove APIs no longer used

Remove the unused APIs in the CPA code.

Bug 1393434

Change-Id: I5b2fa8cbf77b79f108699fa2588754b182a24ec7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/327287
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: nvmap: Only use CPA if enabled in nvmap
Alex Waterman [Tue, 5 Nov 2013 00:14:48 +0000]
video: nvmap: Only use CPA if enabled in nvmap

This commit implements nvmap wrappers to the CPA API that will
only call CPA functions if CONFIG_NVMAP_CPA is enabled.

Bug 1393434

Change-Id: Ia3a020b9cc971accd661df2ad81fe40451c33355
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/326266
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: nvmap: Add nvmap CPA config
Alex Waterman [Tue, 5 Nov 2013 22:14:47 +0000]
video: nvmap: Add nvmap CPA config

Add a config to nvmap to decouple the CPA config from nvmap. In
most cases that the CPA API will be enabled nvmap should still not
use CPA.

Bug 1393434

Change-Id: Ieb5b935bd86a12c32bff355dbdaeafccd6e406ef
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/326845
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: gk20a: Update GPCPLL dynamic ramp steps
Alex Frid [Wed, 6 Nov 2013 07:39:22 +0000]
video: tegra: gk20a: Update GPCPLL dynamic ramp steps

Bug 1399520

Change-Id: Idb8a8a0c9b05ea0a6f8ab0b1753b0fc32145359e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/327017
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: nvmap: fix mmap issue
Krishna Reddy [Thu, 7 Nov 2013 22:00:26 +0000]
video: tegra: nvmap: fix mmap issue

ref on handle should be taken in dma_buf mmap path.
Bug 1402774

Change-Id: Id8e086bf729bda54608d51567411880208c83723
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/327896
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomedia: platform: tegra: fix imx135 ov7695 read_reg
David Wang [Thu, 7 Nov 2013 00:11:44 +0000]
media: platform: tegra: fix imx135 ov7695 read_reg

Corrects type mismatch for read_reg function and
regmap for imx135 and ov7695.

Bug 1402753

Change-Id: I7bd267be69d2ae2ebe92d9670b41161065fc8c31
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/327375
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: dvfs: Split CL-DVFS registers accessors
Alex Frid [Sun, 3 Nov 2013 01:57:38 +0000]
ARM: tegra: dvfs: Split CL-DVFS registers accessors

In some h/w configurations CL-DVFS module registers have two different
address bases: one for I2C control/status registers, and one for all
other registers. Separated registers accessors accordingly.

Change-Id: I4e72e0a643b1870a77564511763dad9d8bd52804
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/325933
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agomerge android-tegra-nv-3.10 into dev-kernel-3.10
Sridhar Lavu [Thu, 7 Nov 2013 20:10:06 +0000]
merge android-tegra-nv-3.10 into dev-kernel-3.10

* origin/android-tegra-nv-3.10:
  Revert "arm: tegra: loose cpu edp power table calculation."
  arm: tegra: loose cpu edp power table calculation.

This merges main back to dev-kernel so that dev-kernel can
once again become the "parent" commit. This was the result
of a change merged directly to main instead of dev-kernel.

Bug 1403257

Change-Id: Ie858f4652cc5caf832d0ab13ead958ef6e508548

5 years agoMerge tag 'dev-kernel-delivery/gcid/2646040-delivery' into promotion_build
Simone Willett [Thu, 7 Nov 2013 17:27:41 +0000]
Merge tag 'dev-kernel-delivery/gcid/2646040-delivery' into promotion_build

main: delivery commit from dev-kernel-delivery at gcid=2646040: manifest=delivery.xml

5 years agoarm: tegra: bypass PllP during LP1 suspend
Bo Yan [Wed, 6 Nov 2013 19:34:03 +0000]
arm: tegra: bypass PllP during LP1 suspend

RAM repair requires PllP, so it shouldn't be disabled. To save
power, instead of keeping it running at 408Mhz, enable bypass
mode, so RAM repair logic can be clocked by oscillator. This
is done when LP1 entry is from fast cluster only.

In addition, change PLLP_OUT0_RATIO to 0 so the reshift clock
is not being further divided down, change it back to default
value after PllP is enabled and bypass is disabled.

This change is copied from http://git-master/r/310133 . The
cherry-pick doesn't work since the original file was deleted.

bug 1373419

Change-Id: I77a3a62515c8513ca12854483c36da6937b1f9e3
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/327266
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

5 years agoRevert "arm: tegra: loose cpu edp power table calculation."
Sridhar Lavu [Thu, 7 Nov 2013 14:14:50 +0000]
Revert "arm: tegra: loose cpu edp power table calculation."

This reverts commit 4584d0e777b22a679144cb10ecdbb7e91ee87bb5
since it violates and blocks module branching workflow.

Bug 1310571 : original bug
Bug 1403257 : regression bug

Change-Id: I278064d863f83fabfdea5fce4c70dfc8054f6ebe
Reverts-what-was-Reviewed-on: http://git-master/r/326397
Signed-off-by: Sridhar Lavu <slavu@nvidia.com>
Reviewed-on: http://git-master/r/327763
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

5 years agoARM: tegra: ardbeg: set avg values for productized sensors
Timo Alho [Tue, 5 Nov 2013 12:51:15 +0000]
ARM: tegra: ardbeg: set avg values for productized sensors

bug 1401524

Change-Id: Ibc384ffc42e5a6ac0ec019794f53f377c5307f35
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/326697
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agopower: max17048: add interrupt handler feature
Venkat Reddy Talla [Thu, 7 Nov 2013 07:27:40 +0000]
power: max17048: add interrupt handler feature

implement interrupt handler feature to generate interrupt
to wake up device from LP0 when battery state of charge is
low.
Bug 1355408

Change-Id: Icb12c507ca8c9eb4f6e7d58b0ea0fc48d462ed52
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/327530
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: dts: TN8:add max17048 ALRT gpio irq
Venkat Reddy Talla [Thu, 7 Nov 2013 07:24:53 +0000]
ARM: dts: TN8:add max17048 ALRT gpio irq

add gpio irq to detect voltage low when
vcell is below threshold value.
Bug 1355408

Change-Id: I165a3a9f87a781e8e649e496da8410b0bb6120bc
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/327529
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopincntrl: add support for AMS AS3722 pin control driver
Bibek Basu [Fri, 25 Oct 2013 05:34:06 +0000]
pincntrl: add support for AMS AS3722 pin control driver

The AS3722 is a compact system PMU suitable for mobile phones, tablets etc.

Add a driver to support accessing the GPIO, pinmux and pin configuration
of 8 GPIO pins found on the AMS AS3722 through pin control driver and
gpiolib.
The driver will register itself as the pincontrol driver and gpio driver.

Bug 1394720

Original-author: Laxman Dewangan <ldewangan@nvidia.com>

Change-Id: I4106c6c6a267849849497cb7a3cfb58a63a83056
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Florian Lobmaier <florian.lobmaier@ams.com>
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/309460
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: assign rcv sel bit for t124 pinmux
Andy Park [Mon, 4 Nov 2013 19:56:44 +0000]
arm: tegra: assign rcv sel bit for t124 pinmux

Assign RCV SEL bit for T124 pinmux.

Change-Id: Ie069fefe05a27998137f058a03df51b06df00a45
Signed-off-by: Andy Park <andyp@nvidia.com>
Reviewed-on: http://git-master/r/326241
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopinctrl: tegra: align mux enums and table for pincontrol as per TRM
Laxman Dewangan [Wed, 6 Nov 2013 10:27:49 +0000]
pinctrl: tegra: align mux enums and table for pincontrol as per TRM

Add missing entry and remove non-documented entry for pincontrol table
for Tegra124.

Change-Id: I9622d082640b980c9cc000f1f0e8dba2bf8c1dee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327064
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: tegra: align mux enums and table for pincontrol as per TRM
Laxman Dewangan [Wed, 6 Nov 2013 10:25:37 +0000]
pinctrl: tegra: align mux enums and table for pincontrol as per TRM

Add missing entry and remove non-documented entry for pincontrol table
for Tegra114.

Change-Id: Ic7878671ddf4be969282824d5534c3ede9d12b58
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327063
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: tegra: add support for soc specific suspend/resume calls
Laxman Dewangan [Wed, 6 Nov 2013 10:24:54 +0000]
pinctrl: tegra: add support for soc specific suspend/resume calls

Change-Id: I511f1013be0b5625733a81eb1dfd2deb822909db
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327062
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>

5 years agopinctrl: tegra: add APIs to access pincontrol from non-dt driver
Laxman Dewangan [Tue, 5 Nov 2013 15:10:10 +0000]
pinctrl: tegra: add APIs to access pincontrol from non-dt driver

Add APIs to access the pincontrol configuration from non-dt
driver and initialisation.

Change-Id: I638220c1ebac40a4adb8fa7ccd05ace9b7384724
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/326725
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: tegra: add mux option for non-dt support
Laxman Dewangan [Tue, 5 Nov 2013 15:08:08 +0000]
pinctrl: tegra: add mux option for non-dt support

The non-dt mux option is defined in the mach/pinmux.h and hence
added these option in the pingroup table to look for non-dt mux option
when using the driver from board files.

Change-Id: Ic0c04513f4ebdc0ce8abab06f373518a6dc14dd5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/326724
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>

5 years agopinctrl: register pincontrol driver at early stage
Laxman Dewangan [Tue, 5 Nov 2013 14:45:00 +0000]
pinctrl: register pincontrol driver at early stage

Moving pincontrol driver registration to the postcore_init_sync
to get initialised before other driver start using it.

Change-Id: Icbd482760dbf1108449888e30ae25583bd89d7be
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/326723
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>

5 years agogpio: fix allocation in atomic context
Laxman Dewangan [Wed, 6 Nov 2013 13:28:55 +0000]
gpio: fix allocation in atomic context

For initialisation of the GPIO based on DT data, it allocates memory.
Hence calling the gpio initialisation based on dt node on non-atomic
context.

bug 1400884

Change-Id: I69b7a4be980078c1fa5e5e43f9c7bf24ecb97dd2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/327106
GVS: Gerrit_Virtual_Submit

5 years agoRevert "media: nvavp: uninit nvavp in runtime PM"
Sridhar Lavu [Wed, 6 Nov 2013 15:15:57 +0000]
Revert "media: nvavp: uninit nvavp in runtime PM"

This reverts commit 6918965ec9dbf422ddd6468c0cabd4b5e6a82a01
since seems to be causing sanity regression

Bug 1254633 : original change
Bug 1401797 : sanity regression

Change-Id: I27efd4645f6565106b05dfc2d0410c53f19db040
Signed-off-by: Sridhar Lavu <slavu@nvidia.com>
Reverts-what-was-Reviewed-on: http://git-master/r/304210
Reviewed-on: http://git-master/r/327177
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agousb: xhci: tegra: add dt support
Krishna Yarlagadda [Mon, 21 Oct 2013 12:35:03 +0000]
usb: xhci: tegra: add dt support

Add dt support for xhci driver

Bug 1357627

Change-Id: Ibdaebd8bb68e8000ab6a9e0fbe8de7fe62dc52e0
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/301796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: dt: tegra: add xhci dt support
Krishna Yarlagadda [Wed, 16 Oct 2013 10:42:38 +0000]
ARM: dt: tegra: add xhci dt support

Add dt entries for all xusb supported boards

Bug 1357627

Change-Id: Ic04dada51e5f9f0b914274156b3de8cb4f514ec0
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/301795
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: xhci: tegra: dt support for xhci
Krishna Yarlagadda [Mon, 21 Oct 2013 12:33:31 +0000]
ARM: xhci: tegra: dt support for xhci

Modify board files to support dt entries for xusb

Bug 1357627

Change-Id: I23c3cbbb3390de198ffcbf4c89c85383a2139cf8
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/302832
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: otg: tegra: Clear stray intr before enable
Krishna Yarlagadda [Tue, 8 Oct 2013 06:11:26 +0000]
usb: otg: tegra: Clear stray intr before enable

Clear status of pending interrupts before enabling interrupts
again. Doing both in a single write leaves out atleast one
instance of interrupt pending

Bug 1357627

Change-Id: I1e252e6cf2db6f9d7c1cd83e0d53c25a017cd964
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/301794
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: xhci: tegra: Fix pmc & regulator for dalmore
Krishna Yarlagadda [Thu, 26 Sep 2013 04:22:53 +0000]
usb: xhci: tegra: Fix pmc & regulator for dalmore

Regulators should be enabled only if port is enabled
PMC port and xhci port are different in case of dalmore

Bug 1357627

Change-Id: Ieb0019d9d7b86be1f4616129fd0dd5a7dcff174b
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/301793
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: xhci: multi port support for dalmore
Krishna Yarlagadda [Wed, 25 Sep 2013 11:34:08 +0000]
ARM: tegra: xhci: multi port support for dalmore

Enable mulitple ports support on dalmore. Fix regulators
to handle this and add entry for missing ports in xusb data

Bug 1357627

Change-Id: Iae395bfe62ae9ac21dc28c7ed2b351d680081337
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/301792
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Henry Lin <henryl@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: dc: ignore invalid windows
Jon Mayo [Tue, 5 Nov 2013 20:52:05 +0000]
video: tegra: dc: ignore invalid windows

Walk through valid_windows bitmask to skip over invalid windows.
Mark invalid windows with a flag for easy checking.

Change-Id: Idda005b57ca8503462b01ef1193c993a73432e18
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/326796
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: host: Disable gk20a powergating
Arto Merilainen [Mon, 4 Nov 2013 15:17:33 +0000]
video: tegra: host: Disable gk20a powergating

This patch disabled gk20a powergating in order to increase LP0
stability.

Change-Id: Ia8e18e676167e8ffc033d261a658a15d0ace4afe
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/326699
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: host: suspend call prepare_poweroff
Arto Merilainen [Mon, 4 Nov 2013 12:00:17 +0000]
video: tegra: host: suspend call prepare_poweroff

Earlier finalize_poweroff was called only as part of save_state() and
therefore it was not automatically part of suspend. In practise the
callback was called as powergating was allowed for devices that
required finalize_poweroff() callback. However, if powergating is
disabled for a device and that device requires finalize_poweroff
callback, it will fail.

This patch makes nvhost to call finalize_poweroff callback during
suspend if powergating is not allowed for the device.

Change-Id: I01dae8dbb36ddcd902bb5ccfa93b1c5adbc6c940
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/326698
Reviewed-by: Chao Xu <cxu@nvidia.com>
Tested-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra12: soctherm: enable MEM zone
Diwakar Tundlam [Thu, 17 Oct 2013 23:31:35 +0000]
arm: tegra12: soctherm: enable MEM zone

Enable MEM zone for temperature sensing.
Force HW requirement of equal shutdown temps for GPU & MEM zones.

Bug 1342361

Change-Id: I0b870ca0dadbc9fec783fa190118bc5a85f17183
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/300880

5 years agosecurity: tlk_driver: interface to program VPR base/len
James Zhao [Wed, 16 Oct 2013 22:05:53 +0000]
security: tlk_driver: interface to program VPR base/len

Add interface for the kernel to program vpr base
address through TLK.
Expect phys addr of vpr base, and vpr size.

bug 1279160

Change-Id: I0ff6ef9783ac2bb6438afa0552f57a84e84bf567
Signed-off-by: James Zhao <jamesz@nvidia.com>
Reviewed-on: http://git-master/r/302404
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoxhci: tegra: remove write INTERPKT_DELAY in driver
Joy Wang [Tue, 29 Oct 2013 08:58:52 +0000]
xhci: tegra: remove write INTERPKT_DELAY in driver

As firmware will set
XUSB_CFG_HSPX_CORE_HSICWRAP.INTERPKT_DELAY to 0x30.
Remove this register write in driver.

Bug 1342607

Change-Id: Ic6197fe738ffbef820c463032650715d225b44f2
Signed-off-by: Joy Wang <joyw@nvidia.com>
Reviewed-on: http://git-master/r/304773
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Henry Lin <henryl@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agousb: xhci: tegra: add delay for port direct to U3
joyw [Mon, 21 Oct 2013 08:31:55 +0000]
usb: xhci: tegra: add delay for port direct to U3

In xhci_bus_suspend, when driver direct port to U3,
need to wait for 10ms for port to direct to U3.

Bug 1386845

Change-Id: I3d214b3538813af5278aa1c00c73a215ad474f59
Signed-off-by: joyw <joyw@nvidia.com>
Reviewed-on: http://git-master/r/301707
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Henry Lin <henryl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>