4 years agogpu: nvgpu: send ELPG init cmd after GR is ready
Vijayakumar [Fri, 26 Sep 2014 05:24:09 +0000]
gpu: nvgpu: send ELPG init cmd after GR is ready

bug 200040021
bug 200032923

Change-Id: I5aa7f4efb1b675e9a3faaf73a80452e55cded89e
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Change-Id: Ic162902bd2f05abab9ebd37392ed56dc4c164ba8
Reviewed-on: http://git-master/r/539995
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agovideo: tegra: host: isp: Fix ISPB power domain
Arto Merilainen [Thu, 2 Oct 2014 15:27:37 +0000]
video: tegra: host: isp: Fix ISPB power domain

In T210 ISP has its own powerdomain, VE2. Fix naming to make
powerdomain framework to turn the domain correctly on.

Change-Id: I94d53f9d86da520d366ec6035b7cffe7e59eb023
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/552926

4 years agoplatform: tegra210: Fix vi-i2c name in VE config
Arto Merilainen [Thu, 2 Oct 2014 15:32:40 +0000]
platform: tegra210: Fix vi-i2c name in VE config

This patch fixes vi-i2c clock naming.

Change-Id: Ib9da9103776d611a3be11693376f39579b8142bd
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/552925

4 years agoplatform: tegra210: Fix SOR initial refcount
Arto Merilainen [Thu, 2 Oct 2014 15:09:14 +0000]
platform: tegra210: Fix SOR initial refcount

The code currently assumes reference count 1 to all partitions
powered partitions, however SOR partition reference count depends
on DISA, DISB and VE reference counts.

This patch modifies SOR initial refcount to be calculated using
other powered partitions. In addition, as SOR itself does not hold
a reference, remove .disable_after_boot setting.

Change-Id: I76ccdaa66a3d723ac22bfc2019e890eb8a8d6ff4
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/552924

4 years agoARM64: Tegra: Set the tach_gpio as a optional property
Darren Sun [Wed, 8 Oct 2014 04:15:38 +0000]
ARM64: Tegra: Set the tach_gpio as a optional property

E2220 doesn't have a tach_gpio for fan.remove this
property from dts file and modify the driver to set
tach_gpio as a optional property.

Bug 200043201
Bug 200035852

Change-Id: I9dce0af487c52600513843c4f585ae3e1c65675a
Signed-off-by: Darren Sun <darrens@nvidia.com>
Reviewed-on: http://git-master/r/554463
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Daniel Fu <danifu@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>

4 years agoiio: imu: nvi_mpu: remove srlock
Allen Yu [Sat, 11 Oct 2014 12:38:16 +0000]
iio: imu: nvi_mpu: remove srlock

The srlock is used to block IRQ thread throughout suspend. However it also
blocks system from suspending since system suspend routine will wait for all
pending IRQ handlers/threads to complete before going ahead.

Bug 200045181

Change-Id: I91cae90d2e5cbc766517e0da47ab47f7e817241d
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/555715
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agomedia: rc: add minimum delay support for IR decode
Daniel Fu [Wed, 24 Sep 2014 13:17:47 +0000]
media: rc: add minimum delay support for IR decode

-REP_DELAY may be set to 0 by userspace(eg. Android),
 Which will work fine for keyboard but not for IR.
 As IR need the delay to send raw IR event reset for decoding.
-Add minimum delay support for IR.The default value is 0.
 Driver should update the min_delay as needed.

Bug 1353511

Change-Id: If67bc056006079d75ed71d5a3bd6755c01fe8ba9
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/538434
Reviewed-by: Ankita Garg <ankitag@nvidia.com>
Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agomedia: rc: gpio-ir: add delay/protocols DT support
Daniel Fu [Wed, 24 Sep 2014 13:39:11 +0000]
media: rc: gpio-ir: add delay/protocols DT support

-IR driver to have the capability to read allowed
 IR protocols through DT.
-Add optional min-delay DT support.

Bug 1353511

Change-Id: I4209d6a9af06b37ffc9650c7096fdcf7216eb034
Signed-off-by: Jun Yan <juyan@nvidia.com>
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/538435
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agogpu: nvgpu: require mapped buffer be inside va
Konsta Holtta [Thu, 9 Oct 2014 13:37:36 +0000]
gpu: nvgpu: require mapped buffer be inside va

When validating buffers to be mapped, check that the buffer end does not
overflow over the virtual address node space.

Bug 1562361

Change-Id: I3c78ec7380584ae55f1e6bf576f524abee846ddd
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>

4 years agogpu: nvgpu: cde: CDE optimizations
Jussi Rasanen [Thu, 2 Oct 2014 16:12:51 +0000]
gpu: nvgpu: cde: CDE optimizations

-Change cde_buf to use writecombined cpu mapping.
-Since reading writecombined cpu data is still slow, avoid reads in
  gk20a_replace_data by checking whether a patch overwrites a whole
  word.
-Remove unused distinction between src and dst buffers in cde_convert.
-Remove cde debug dump code as it causes a perf hit.

Bug 1546619

Change-Id: Ibd45d9c3a3dd3936184c2a2a0ba29e919569b328
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/553233
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>

4 years agomisc: tegra_profiler: fix build warnings
Igor Nabirushkin [Tue, 7 Oct 2014 05:10:31 +0000]
misc: tegra_profiler: fix build warnings

Fix build warnings for Tegra Profiler.

Bug 1562287

Change-Id: I3bab0fdea33a217a8f13284329e6edec9fe35c50
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>

4 years agotegra: nvadsp: Resolve section mismatch issue
Amit Sharma [Wed, 8 Oct 2014 13:16:41 +0000]
tegra: nvadsp: Resolve section mismatch issue

Fixed the section mismatch issue by annotating the "nvadsp_driver" with
__refdata. Since, the variable nvadsp_driver references the function __init
nvadsp_probe() which is valid. And using __refdata is acceptable as
nvadsp_probe() is called only during early boot up time and not after that.

Bug 200027499

Change-Id: Ic2e73b1e4e9c9a4fe58831245833bdedd67ba96c
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/554620
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agousb: gadget: tegra: add tegra charger detection driver
Rakesh Babu Bodla [Mon, 15 Sep 2014 07:00:15 +0000]
usb: gadget: tegra: add tegra charger detection driver

Add tegra charger detection framework and
driver for T210

Bug 1468463

Change-Id: I4a15b249b7f7dd1b449dea99254ca46a21c6e912
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/498759
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agoplatform: adsp:replace receive thread with handler
Ajay Nandakumar [Mon, 6 Oct 2014 09:51:15 +0000]
platform: adsp:replace receive thread with handler

The app_receive_thread waits on infinitely for receiving a mailbox
event. This can be made efficient by using a mailbox handler which
is called when a mailbox event/interrupt occurs.

Bug 1561453

Change-Id: I99d50d5a0e948a24494c18a906f3db45cbeedf21
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/553755
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

4 years agoarm64: t210: loki: fix ak8963c regulator error
Louis Li [Fri, 29 Aug 2014 02:00:33 +0000]
arm64: t210: loki: fix ak8963c regulator error

Change-Id: I7cd2c75229caa9c51d6894fd8b89334900c7352c
Signed-off-by: Louis Li <louli@nvidia.com>
Reviewed-on: http://git-master/r/539898
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>

4 years agoASoC: tegra-alt: T210 power management support
Sumit Bhattacharya [Mon, 18 Aug 2014 08:08:49 +0000]
ASoC: tegra-alt: T210 power management support

Set idle_bias_off for all t210 xbar modules to ensure module runtime
suspend/resume works when module is idle.

Ensure regcache is synced back to hardware during runtime resume so
that register content does not get lost if it is written during
runtime suspend state.

Add suspend APIs for all module to mark regcache dirty while device
goes into suspend to ensure register values does not get lost across
system suspend/resume.

Change-Id: I2828beeed859df4f8084dd70bbcde5ed62f2525c
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555028
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoclock: tegra21: Don't duplicate d_audio
Sumit Bhattacharya [Thu, 9 Oct 2014 05:52:53 +0000]
clock: tegra21: Don't duplicate d_audio

Avoid duplicating d_audio clock for each ahub module. AHUB modules
should ensure parent module i.e. xbar driver is up before accessing
registers rather than enabling the duplicate d_audio clock.

Bug 200042312

Change-Id: I8bcf2250fe2a9dfc952b42af5dafc4e2c1a57256
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/554864

4 years agoASoC: tegra: Enable/Disable parent runtime pm
Sumit Bhattacharya [Thu, 9 Oct 2014 05:48:01 +0000]
ASoC: tegra: Enable/Disable parent runtime pm

Instead of using duplicate clock of "d_audio" for all AHUB modules
get/put runtime pm reference of the parent module from runtime_pm
suspend/resume routine of all AHUB modules. This will ensure AHUB
xbar is up before other drivers tries to access any register. Also
it will ensure both d_audio and APE clocks are enabled when needed.

Bug 200042312

Change-Id: I0346728f15b135bb619de40fbd3fc440a5505940
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/554863
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoRevert "video: tegra: host: tsec: Support dbg firmware"
Arto Merilainen [Wed, 8 Oct 2014 04:58:30 +0000]
Revert "video: tegra: host: tsec: Support dbg firmware"

This reverts commit 84606a014423e7a6782fd00741eef658ba1fb041. This
feature was never taken into use and it causes issues in simulator
runs.

Change-Id: I218d34b549033c4e5fd97f812488bf0954d5a05e
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/554472

4 years agovideo: tegra: host: Fix set_error_notifier use
Arto Merilainen [Sun, 12 Oct 2014 07:26:19 +0000]
video: tegra: host: Fix set_error_notifier use

Commit 3d61ff1314b05d888ce9242f974adca8153dd8de caused a regression
that caused all completed submits to be marked as erronous. This
patch fixes the issue by moving nvhost_job_error_notifier() call
to the error handler.

Change-Id: I008045dec3e56cbc9a91648bb30f9c401f6a5e15
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/555732
Reviewed-by: Automatic_Commit_Validation_User

4 years agogpu: nvgpu: Remove usage of KEPLER_C syncpt incr
Terje Bergstrom [Wed, 8 Oct 2014 05:38:59 +0000]
gpu: nvgpu: Remove usage of KEPLER_C syncpt incr

Using KEPLER_C for doing sync point increment has side effects.
It adds a SetObject method, which changes channel state that not all
user space accounts for.

Bug 1462255
Bug 1497928
Bug 1559462

Change-Id: I5c422ad8ca94fba15cad9bd232f7a10d94aa0973
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/554478
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agoarm64: dts: dc: follow fixup table
Hiroshi Doyu [Wed, 8 Oct 2014 00:15:57 +0000]
arm64: dts: dc: follow fixup table

follow the ones specified in fixup table, which has been currently
choosen eventually. This patch just fixes inconsistency. From
functionality POV, no change.

Bug 200039988

Change-Id: I1c4be9c1a4e12013ac51e206fd2c472d15d7600a
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/554416

4 years agoregmap: cache: Step by stride in default sync
Dylan Reid [Tue, 18 Mar 2014 20:45:08 +0000]
regmap: cache: Step by stride in default sync

The default sync operation was still assuming a stride of one, fix it
to respect the reg_stride set in the map.

Cherry-picked from 756173285e87c792c6fa8eaaaf1217cfcf1416dd

Change-Id: Ic1d595edd7d7dc26445226cf333916d306c7934c
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555039
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoregmap: cache: Don't attempt to sync non-writeable registers
Dylan Reid [Tue, 18 Mar 2014 20:45:09 +0000]
regmap: cache: Don't attempt to sync non-writeable registers

In the regcache_default_sync, if a register isn't writeable, then
_regmap_write will return an error and the rest of the sync will be
aborted.  Avoid this by checking if a register is writeable before
trying to sync it.

Cherry-picked from 83f8475ce99fa1c44b03059b6cc5dcaae69b4819

Change-Id: I1b2b9c1074c500edd3198fbae9a597316db0986f
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555038
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoregmap: Implemented default cache sync operation
Maarten ter Huurne [Sun, 2 Jun 2013 22:15:26 +0000]
regmap: Implemented default cache sync operation

This can be used for cache types for which syncing values one by one is
equally efficient as syncing a range, such as the flat cache.

Cherry-picked from d856fce41b74ecf2004d99f781e44abd7815d7f8

Change-Id: I71165823293bc430bb80e76eed6f3e36f3439713
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555037
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoregmap: cache: Handle stride > 1 in sync_block_raw_flush
Dylan Reid [Fri, 24 Jan 2014 23:40:39 +0000]
regmap: cache: Handle stride > 1 in sync_block_raw_flush

regcache_sync_block_raw_flush takes the address of the base register
and the address of one past the last register to write to.  "count" is
the number of registers in the range, not the number of bytes, it
should be (end addr - start addr) / stride. Without accounting for
strides greater than one, registers past the end might be synced or
the writeable_reg callback at the beginning of _regmap_raw_write will
fail and nothing will be written.

Cherry-picked from 78ba73eecd2256790926859849801c0446766c0a

Change-Id: I50cd7d92e0bac568036ef8bcf6e5518b5790141c
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/554736
Tested-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agogpu: nvgpu: vgpu: disable GK20A PMU support
Haley Teng [Mon, 6 Oct 2014 03:45:12 +0000]
gpu: nvgpu: vgpu: disable GK20A PMU support

GK20A PMU is not supported in GPU client for virtualization.  However,
to make native case and virtualization case can share same defconfig and
kernel image, we need to enable CONFIG_GK20A_PMU and
CONFIG_GK20A_DEVFREQ in defconfig.  This commit changes to detect if we
should disable GK20A PMU support in run time.

Bug 200041597

Change-Id: I292c647303ed57af6faa1c5671037ca27b48e31e
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/553653
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agoARM64: tegra: Set SDMMC legacy TM rate to 12MHz
Alex Frid [Mon, 6 Oct 2014 22:16:49 +0000]
ARM64: tegra: Set SDMMC legacy TM rate to 12MHz

Bug 1544819

Change-Id: Iecd3c1eb27995be19ff430d3aea964a8cc862316
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/553960
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoiommu/tegra: smmu: print as allocation info
Hiroshi Doyu [Wed, 8 Oct 2014 00:14:57 +0000]
iommu/tegra: smmu: print as allocation info

Useful to verify 34bit as allocations.

Bug 200039988

Change-Id: Ie781e8c6931522c5b4ec826696a9e51a11d853f2
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/554415

4 years agoMerge "Merge branch 'android-3.10' into dev-kernel-3.10" into dev-kernel-3.10
Bharat Nihalani [Sat, 11 Oct 2014 19:35:47 +0000]
Merge "Merge branch 'android-3.10' into dev-kernel-3.10" into dev-kernel-3.10

4 years agoarm64: config: tegra21: enable hda power feature
Dara Ramesh [Mon, 22 Sep 2014 05:06:49 +0000]
arm64: config: tegra21: enable hda power feature

enable hda power save feature.

bug 200039560

Change-Id: I2e10e1b6c89d083c93f2807c856514505643ec13
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/501090

4 years agoARM: tegra: remove regulator consumer list
Laxman Dewangan [Tue, 7 Oct 2014 14:40:01 +0000]
ARM: tegra: remove regulator consumer list

As all client of regulators are on DT, there is no need to provide the
regulator consumer/supply mapping for non-DT client.

Removing this mapping from the power tree.

bug 200038556

Change-Id: I7a1547b0be413cc9127a430cf5aeb4518a5d5ee6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554227

4 years agoARM: Tegra: make LDO6 of MAX77620 to FPS0 sequenced
Laxman Dewangan [Thu, 9 Oct 2014 06:26:55 +0000]
ARM: Tegra: make LDO6 of MAX77620 to FPS0 sequenced

Make voltage rail LDO6 of MAX77620 for the Loki/Foster and ERS
to the FPS0 sequenced to meet the shutdown power sequence.

bug 1550672

Change-Id: I50b01e7a7ad74252e48ed1a51cb4e191124eb7e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554872

4 years agoextcon: cable-xlate: Avoid sleeping calls on atomic context
Laxman Dewangan [Wed, 8 Oct 2014 13:22:13 +0000]
extcon: cable-xlate: Avoid sleeping calls on atomic context

Driver is calling the extcon_set_state() on atomic context and this
call is sleeping calls.

Making the lock to sleepable lock and then calling the extcon_set_state()
to update the cable state.

Change-Id: I5ece3c6ad0702bfc9bc8bee8985dd0619e32490d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554621

4 years agovideo: tegra: dc: Fix external linkage warning
Amit Sharma [Wed, 8 Oct 2014 14:26:20 +0000]
video: tegra: dc: Fix external linkage warning

The following function should not be marked as extern:
- suspend_set
- suspend_get

Bug 200032218

Change-Id: If95ff23e5a9d62722614c305a9b197a89f582a12
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/554657
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agomm: cma: fix deadlock on s_follow_page_lock
Sri Krishna chowdary [Wed, 8 Oct 2014 19:06:52 +0000]
mm: cma: fix deadlock on s_follow_page_lock

unlock s_follow_page_lock before jump to next_page label,
else any subsequent mutex_lock() on this lock will be waiting
infinitely causing deadlock.

Bug 1550455
Bug 200043261

Change-Id: I62689f808a133d3b491fc4044040f9c7275302e8
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/554720
Reviewed-by: Peter Newman <pnewman@nvidia.com>
Tested-by: Peter Newman <pnewman@nvidia.com>
Reviewed-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

4 years agoRevert "Revert "video: tegra: nvmap: remove support for Deprecated GET_ID/FROM_ID...
Krishna Reddy [Tue, 7 Oct 2014 17:45:38 +0000]
Revert "Revert "video: tegra: nvmap: remove support for Deprecated GET_ID/FROM_ID ioctl's""

This reverts commit 117e8091433e039353441af0bca34be69fcbfe60.

Change-Id: Ie118da46727af752b342e253c0917e631a682c55
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/554269
Reviewed-by: Maneet Maneet Singh <mmaneetsingh@nvidia.com>
Tested-by: Maneet Maneet Singh <mmaneetsingh@nvidia.com>

4 years agovideo: tegra: nvmap: dynamically map vpr to iova
Sri Krishna chowdary [Wed, 8 Oct 2014 11:16:36 +0000]
video: tegra: nvmap: dynamically map vpr to iova

Bypass smmu if access-vpr-phys is specified in device's DT node.
If device does not have DT entry or if it does not have access-vpr-phys
property,nvmap can continue to map the sgt in iova space and hence
can avoid fragmentation issues for devices which can access vpr through smmu.

Bug 1539558

Change-Id: I2fb006bc445f3f91b705dc3d62e9cf3943996ab2
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/554583
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

4 years agoARM: introduce access-vpr-phys property to gpu nodes
Sri Krishna chowdary [Wed, 8 Oct 2014 11:10:16 +0000]
ARM: introduce access-vpr-phys property to gpu nodes

nvmap uses this property to differentiate between devices
which cannot access vpr memory through smmu.

Bug 1539558

Change-Id: Ibf09ef01251efcee71709508769a2ff6c903ccc7
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/554582
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

4 years agoarm64: dts: t210: Move uart_over_jack node
Shardar Shariff Md [Fri, 10 Oct 2014 12:55:46 +0000]
arm64: dts: t210: Move uart_over_jack node

Move uart_over_jack node from common to loki top dts
file as its supported only on Loki.

Change-Id: I1cececeaf2536667fdd50f861eca1005d868926e
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/555474
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoarm: dts: remove battery related dts files
Shardar Shariff Md [Tue, 7 Oct 2014 08:42:04 +0000]
arm: dts: remove battery related dts files

Remove battery dts files and its dependencies

Bug 200022742

Change-Id: I7f3d90a35b71f2b92b4684259a0ca3b7e1a47bd5
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/554126
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoextcon: gpio-states: Use devm_request_any_context_irq
Shardar Shariff Md [Tue, 7 Oct 2014 14:48:28 +0000]
extcon: gpio-states: Use devm_request_any_context_irq

Use devm_request_any_context_irq to allocate the interrupt
line

Bug 1557030

Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Change-Id: I25d8880ae6d288fd0d39ca76195f783c0b38da23
Reviewed-on: http://git-master/r/554233
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoirq-devres: add devm_request_any_context_irq
Shardar Shariff Md [Tue, 7 Oct 2014 14:35:35 +0000]
irq-devres: add devm_request_any_context_irq

Add device managed version of request_any_context_irq

Bug 1557030

Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Change-Id: Idec07432dd4912e204d51cf7212c0e0f245dd242
Reviewed-on: http://git-master/r/554228
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoAR: tegra: remove unused property from dtsi file.
Laxman Dewangan [Fri, 10 Oct 2014 10:51:26 +0000]
AR: tegra: remove unused property from dtsi file.

BQ2419x driver does not support SW based thermal profiling of
battery and hence remove the properties related to this feature.

Change-Id: Ief4fc5252cae7dfbaae722faef3fbb0b344f43fe
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/555421

4 years agopowr: bq2419x: remove unused properties
Laxman Dewangan [Fri, 10 Oct 2014 10:50:43 +0000]
powr: bq2419x: remove unused properties

Remove unused properties related to the auto recharger on power off and
suspend case.

Change-Id: I4fe2ca35ba62440463697e87262f0a64ac39e8f0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/555420
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agoARM: tegra: arrange the PMIC/Charger die temp for thermal zone
Laxman Dewangan [Fri, 10 Oct 2014 10:35:54 +0000]
ARM: tegra: arrange the PMIC/Charger die temp for thermal zone

Enable the required thermal zone on different platform for charger and
PMIC die temp.

E2220: PMIC
E2190: PMIC, CPU PMIC and GPU PMIC
Loki: PMIC and Charger
Foster: PMIC

Change-Id: Ie7cbf47554fb5c61f3e952c5c478148f11b8b3ce
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/555419

4 years agopower: bq2419x: register die temp as thermal zone
Laxman Dewangan [Fri, 10 Oct 2014 10:31:54 +0000]
power: bq2419x: register die temp as thermal zone

Register charger die temp as thermal zone. Expose sysfs interface
for the temp read. If thermal regulation is normal then die temp
will be assumed as the 5deg C below the thermal regulation threshold
otherwise it will be assumed as 5 deg C above thermal regulation
threshold.

Change-Id: If9253ed16f11a655e0dc7eaa0808e6cf7aeb09d2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/555418
GVS: Gerrit_Virtual_Submit

4 years agortc: max77620: adjust the MSB of YEAR register
Laxman Dewangan [Tue, 7 Oct 2014 11:43:40 +0000]
rtc: max77620: adjust the MSB of YEAR register

MSB (bit 7) of the RTC Year register is used for alarm enable.
Hence not using this bit for year calculation.

Change-Id: I28dcf6cc24926da8b75d9782011c961a5655c8fe
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554174
GVS: Gerrit_Virtual_Submit

4 years agoARM: tegra: set GPIO1/2/3 to FPS_OUT mode and FPS source to FPS0
Laxman Dewangan [Tue, 7 Oct 2014 10:36:03 +0000]
ARM: tegra: set GPIO1/2/3 to FPS_OUT mode and FPS source to FPS0

Configure the pin GPIO1, GPIo2 and GPIO3 to flexible power sequence output
mode and FPS source to FPS0.

This is require to have correct power sequence mode on shutdown as per Tegra
need.

bug 1550672

Change-Id: Ieac6c5817591f0ee9adbe9460e6c043218e953ee
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554158
Tested-by: Ankita Garg <ankitag@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agopictrl: max77620: add support for configuring pin's FPS mode
Laxman Dewangan [Tue, 7 Oct 2014 10:32:41 +0000]
pictrl: max77620: add support for configuring pin's FPS mode

Add support for configuring GPIO1, GPIO2 and GPIO3 FPS source.

bug 1550672

Change-Id: I767097059c572288d68f6f5ef56c2d6917213349
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554157
Tested-by: Ankita Garg <ankitag@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agopinctrl: pinconf: add support for custom property for pin configuration
Laxman Dewangan [Tue, 7 Oct 2014 10:31:40 +0000]
pinctrl: pinconf: add support for custom property for pin configuration

Add support for custom property for pin configuration along with generic
pin configuration.

Change-Id: Id75d35e7be0521cd9cc22fea8d0939ed035212e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/554156
Tested-by: Ankita Garg <ankitag@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agopci: fix tegra smmu notifier
Bo Yan [Thu, 9 Oct 2014 22:53:55 +0000]
pci: fix tegra smmu notifier

register a dedicated notifier_block for pci bus.

this is to avoid chaining of notifiers between pci bus and
platform bus.

bug 1190050
bug 1561473
bug 1562036
bug 200043445

Change-Id: I1fe26414956d27579579d4fbeefa8de73fec9383
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/555191
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoiommu/tegra: smmu: use separate notifier for pci
Bo Yan [Thu, 9 Oct 2014 22:44:13 +0000]
iommu/tegra: smmu: use separate notifier for pci

this is a hack upon an existing hack.

the current problem: kernel panic:

[    8.603254] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G        W
[    8.611419] task: ffffffc0ffd57540 ti: ffffffc0ffd58000 task.ti:
[    8.618897] PC is at pci_bus_read_config_word+0x44/0x94
[    8.624118] LR is at pci_bus_read_config_word+0x40/0x94
[    8.629335] pc : [<ffffffc00038c1f0>] lr : [<ffffffc00038c1ec>]

....

[    9.117532] Call trace:
[    9.119980] [<ffffffc00038c1f0>] pci_bus_read_config_word+0x44/0x94
[    9.126240] [<ffffffc0004797b0>] vga_arbiter_add_pci_device+0xec/0x238
[    9.132757] [<ffffffc000479910>] pci_notify+0x14/0x44
[    9.137803] [<ffffffc0000d4a0c>] notifier_call_chain+0x44/0x88
[    9.143628] [<ffffffc0000d4d2c>] __blocking_notifier_call_chain+0x48/0x78
[    9.150407] [<ffffffc0000d4d6c>] blocking_notifier_call_chain+0x10/0x1c
[    9.157014] [<ffffffc0004df038>] device_add+0x190/0x30c
[    9.162234] [<ffffffc0008172a0>] of_device_add+0x58/0x64
[    9.167538] [<ffffffc000817bf8>] of_platform_device_create_pdata+0x5c/0x98
[    9.174403] [<ffffffc000817cfc>] of_platform_bus_create+0xac/0x13c
[    9.180574] [<ffffffc000817ed8>] of_platform_populate+0x68/0xac
[    9.186488] [<ffffffc00091d994>] tegra210_xbar_probe+0x324/0x3a4
[    9.192485] [<ffffffc0004e30c4>] platform_drv_probe+0x14/0x20

this is happening when audio driver is being initialized. audio
devices are platform devices, but the notifier call back for PCI is
invoked instead. this is because the same notifier_block object is
registered in both platform bus and pci bus, so the notifier call
chain is chained together.

this change is a fix on top of commit 60b0df3bd8cc. basically a
different notifier block is defined for PCI to avoid notifier
chaining between PCI bus and platform bus.

bug 1190050
bug 1561473
bug 1562036

Change-Id: Id79205204e016cd931414cfcf0488977f5d5203c
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/555190
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoasoc: rt5639: fix missing regmap_exit during remove
Shreshtha SAHU [Mon, 29 Sep 2014 11:19:21 +0000]
asoc: rt5639: fix missing regmap_exit during remove

without regmap_exit in remove, next modprobe of
modprobe used to complain of
"Failed to create debugfs directory"
due to stale debugfs directory.

Bug 200038898

Change-Id: I1579121748ebf14e216d9e29fbb607bda1de31f9
(cherry picked from commit Ie6373f40b50c1307ee7d114dc0f44164c4b426eb)
Reviewed-on: http://git-master/r/542646
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/554154
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoASoC: tegra: fix avp module remove
Shreshtha SAHU [Tue, 7 Oct 2014 10:07:45 +0000]
ASoC: tegra: fix avp module remove

- avp module remove should not try to release client
  if avp pcm open was never called and client was
  never allocated

- avp module remove should deregister offload ops

Bug 200043253

Change-Id: I11a6d65afab4d88aa5669553809e99fd69cfd000
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/554153
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
(cherry picked from commit 999d45effe06a69f28d87c8517b94a109cffbb45)
Reviewed-on: http://git-master/r/554528
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoclock: tegra21: Limit EMC scale down to LPDDR4
Alex Frid [Thu, 9 Oct 2014 00:33:37 +0000]
clock: tegra21: Limit EMC scale down to LPDDR4

Limited scaling EMC rate down to boot rate to LPDDR4 only.
Other DRAM types does not have suspend entry/exit rate range
limitation.

Change-Id: I475e02a36c26142f98645f139d9f1194d3360146
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554884
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agogpu:nvgpu:gm20b: disable irqs when hs pmu executes
Vijayakumar [Wed, 8 Oct 2014 14:37:37 +0000]
gpu:nvgpu:gm20b: disable irqs when hs pmu executes

bug 200040021

polling halt irq to check for hs bin completion
keep irqs disabled to avoid executing irq handler

Change-Id: Ic245d89580444dcbf1cf5ec34bfe0f8b0c5bbc0f
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/554659
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agoARM64: Tegra: modify the CAL data of ina226
Darren Sun [Fri, 10 Oct 2014 04:49:38 +0000]
ARM64: Tegra: modify the CAL data of ina226

Change-Id: I005d67b6bb8e46244162c10987b00bcd52e8d1c1
Signed-off-by: Darren Sun <darrens@nvidia.com>
Reviewed-on: http://git-master/r/555310
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Daniel Fu <danifu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoARM: tegra: change contents of Tskin throttling table
Hyungwoo Yang [Thu, 25 Sep 2014 01:13:24 +0000]
ARM: tegra: change contents of Tskin throttling table

The beginning of the table entries should reduce GPU frequencies drastically.

Bug 1558067

Change-Id: Iba55a0a215b8dbee7d14caa07287fb89d42d1f98
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/538662
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

4 years agoARM: Tegra: thermal: add Tskin parameters for t132
Hyungwoo Yang [Tue, 17 Jun 2014 18:22:56 +0000]
ARM: Tegra: thermal: add Tskin parameters for t132

Adds Tskin parameters for T132.

Bug 1524981

Change-Id: I1efea666610a37d90702af08f216f02916019c0b
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/554005
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

4 years agoplatform: terga: Resolve section mismatch issue
Amit Sharma [Wed, 8 Oct 2014 12:59:44 +0000]
platform: terga: Resolve section mismatch issue

The following function was wrongly annoted as __init
- soctherm_hot_cdev_register()

Bug 200027499

Change-Id: I0ef329b0e076ddb9840e29453348a4ee3a9b23a8
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/554616
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

4 years agothermal : tegra: aotag add thermtrip shutdown
navneet kumar [Thu, 25 Sep 2014 15:49:18 +0000]
thermal : tegra: aotag add thermtrip shutdown

Enable shutdown triggered by AOTAG sensor when critical temperature
is crossed. The critical temp is confgured in device tree.

Bug 1561029

Change-Id: Iaebcab4f3b86cf25c90848a5fef76597e631d661
Signed-off-by: navneet kumar <navneetk@nvidia.com>
Reviewed-on: http://git-master/r/553934
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

4 years agothermal: tegra: aotag thermal shutdown DT change
navneet kumar [Tue, 30 Sep 2014 17:04:46 +0000]
thermal: tegra: aotag thermal shutdown DT change

Bug 1561029

Change-Id: Idf280b5794450d53309fce862f9b6e5e0abfe449
Signed-off-by: navneet kumar <navneetk@nvidia.com>
Reviewed-on: http://git-master/r/553933
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

4 years agoarm64: dts: grenada: disable cec node
Hoang Pham [Fri, 10 Oct 2014 02:12:36 +0000]
arm64: dts: grenada: disable cec node

Grenada does not have CEC, so disable CEC node for asim boot
to shell prompt

Change-Id: I0ace6a4f3bb167393eafbc23c3508fea40bbc71a
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/555279
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agobase: dma-contiguous: handle highmem correct
Krishna Reddy [Tue, 7 Oct 2014 21:17:09 +0000]
base: dma-contiguous: handle highmem correct

flush cache and skip remap for highmem.
remove redundant buffer clean in dma-mapping.c

Bug 1550455

Change-Id: Ia407154e11dd861237a891d5249715770f5fbbea
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/554353
Reviewed-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>

4 years agoclock: tegra21: Set initial PLLM/PLLMB state
Alex Frid [Wed, 8 Oct 2014 23:42:08 +0000]
clock: tegra21: Set initial PLLM/PLLMB state

Tegra21 EMC parent selection algorithm always keeps PLLM and/or PLLMB
disabled while the respective PLL is not used as EMC clock source.
However, boot-loader may leave both PLLs enabled. To allow proper start
of the algorithm, make sure PLLs are disabled if not used.

Change-Id: I8e0ec76ffce23afba40175f0b013a2bb9179ac64
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoclock tegra21: Update DVFS rails minimum settings
Alex Frid [Thu, 9 Oct 2014 02:04:05 +0000]
clock tegra21: Update DVFS rails minimum settings

For CPU and GPU rails (with CVB DVFS tables) kept rail minimum same as
regulator minimum, and applied characterized domain Vmin to the DVFS
tables.

No changes for Soc core rail - rail minimum is set at characterized
core Vmin with non-reachable low voltage entries in DVFS table.

Change-Id: I78a62bb6a4c8ea0bb744b5de2e67e7c52dd160ea
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554898
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agodvfs: tegra: Update usage of DVFS rail minimum
Alex Frid [Wed, 8 Oct 2014 05:00:04 +0000]
dvfs: tegra: Update usage of DVFS rail minimum

- Retrieved regulator minimum voltage from DT, and made sure DVFS rail
  minimum level is specified at/above regulator boundary.

- Applied minimum rail voltage floor inside predict voltage interface.
  It is commonly redundant, since DVFS table itself is specified above
  rail minimum level. However, exception from that rule is possible if
  tegra DVFS table include non-reachable voltage entries below rail
  minimum.

- Added rail minimum to DVFS tree in debugfs.

Change-Id: I4240c4e09aab44e5ec3ce7eda1e39ac5b37fd8ed
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554897
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agodvfs: tegra21: Add core voltage caps to debugfs
Alex Frid [Wed, 8 Oct 2014 04:32:51 +0000]
dvfs: tegra21: Add core voltage caps to debugfs

Change-Id: I675c276fd36c4202cbdddd4fa7f47184354ccbc7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554896
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agogpu: nvgpu: Override GM20b RAM SVOP PDP fuses
Alex Frid [Tue, 16 Sep 2014 23:44:43 +0000]
gpu: nvgpu: Override GM20b RAM SVOP PDP fuses

Override GM20b RAM SVOP PDP fuses with 0x2 setting during clock
initialization.

Bug 1550997

Change-Id: I9a873b892a2db4af384a9a7af4470562cdcb1572
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/499554
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agogpu: nvgpu: Add GM20b RAM SVOP PDP fuse registers
Alex Frid [Tue, 16 Sep 2014 23:00:10 +0000]
gpu: nvgpu: Add GM20b RAM SVOP PDP fuse registers

Bug 1550997

Change-Id: I25551fdcb9f7d43dc8631305b784aa9c04040139
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/499553
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agousb: gadget: xudc: UASP handling parallel cmds
venkat Tammineedi [Tue, 7 Oct 2014 07:05:16 +0000]
usb: gadget: xudc: UASP handling parallel cmds

The current UASP driver processes the command, data, and
status stages of each command serially. Made changes to
handle multiple commands in parallel. Also made changes
for UASP to accept any valid command tag value(1457592)
The changes for both the Bugs are interdependent. So
submitting one change for both the Bugs 1457592,1414327.

Bug 1414327
Bug 1457592

Change-Id: I6b506fc1fb27bbdf67bca0f7644466e540140c4e
Signed-off-by: Venkat Tammineedi <vtammineedi@nvidia.com>
Reviewed-on: http://git-master/r/554098
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hui Fu <hfu@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agousb: gadget: xudc: Support UASP + Android
venkat Tammineedi [Tue, 7 Oct 2014 06:54:28 +0000]
usb: gadget: xudc: Support UASP + Android

Currently the USB gadget protocol UASP is part
of the composite framework and is standalone.
Making changes to include it as part of Android
framework which also controls other protocols like
MTP, ADB, BOT etc for communicating with the Host
over USB.

Bug 1525578

Change-Id: Ie91e2e2c24bea5d2b04b9614260d67ddb9693998
Signed-off-by: Venkat Tammineedi <vtammineedi@nvidia.com>
Reviewed-on: http://git-master/r/554095
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hui Fu <hfu@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: Henry Lin <henryl@nvidia.com>

4 years agousb: gadget: xudc: defconfig change to enable UASP
venkat Tammineedi [Tue, 7 Oct 2014 06:47:19 +0000]
usb: gadget: xudc: defconfig change to enable UASP

The USB's UASP gadget protocol depends on the
Linux SCSI Target-LIO module which is disabled
in the current configuration. Made changes to
enable this that allows our device to communicate
with a USB Host using the UASP protocol.

Change-Id: I8d57fb5c04ccb86178d1e9d7a8e8961d4f7e92fb
Signed-off-by: Venkat Tammineedi <vtammineedi@nvidia.com>
Reviewed-on: http://git-master/r/554092
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hui Fu <hfu@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agoMerge branch 'android-3.10' into dev-kernel-3.10
Sumit Singh [Fri, 10 Oct 2014 14:12:57 +0000]
Merge branch 'android-3.10' into dev-kernel-3.10

Bug 200041789

Change-Id: I72f5eddd6255c20f22e19a48d69ea1ccbee5554b
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>

4 years agoMerge branch 'android-3.10' into dev-kernel-3.10
Sumit Singh [Mon, 29 Sep 2014 11:02:38 +0000]
Merge branch 'android-3.10' into dev-kernel-3.10

Conflicts:
arch/arm64/Kconfig
arch/arm64/include/asm/cputype.h
arch/arm64/include/asm/debug-monitors.h
arch/arm64/include/asm/elf.h
arch/arm64/include/asm/hwcap.h
arch/arm64/kernel/Makefile
arch/arm64/kernel/debug-monitors.c
arch/arm64/kernel/entry.S
arch/arm64/kernel/hw_breakpoint.c
arch/arm64/kernel/kuser32.S
arch/arm64/kernel/ptrace.c
arch/arm64/kernel/setup.c
arch/arm64/mm/proc.S
drivers/usb/gadget/f_rndis.c
drivers/usb/gadget/u_ether.c

Bug 200041789

Change-Id: I7368875b5404fdda72510e22e562138e544a03f9
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>

4 years agoclock: tegra21: Invalidate EMC DVFS if no boot rate
Alex Frid [Wed, 8 Oct 2014 20:48:59 +0000]
clock: tegra21: Invalidate EMC DVFS if no boot rate

Invalidated EMC DVFS table if it does not include boot rate entry.

Bug 1562590

Change-Id: Idad321c3627d979cc20dffe7128a3cf25b7fce8b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554769
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoRevert "drivers: tegra: mmc: Support for setting dynamic pad strengths"
Alex Frid [Wed, 8 Oct 2014 00:09:45 +0000]
Revert "drivers: tegra: mmc: Support for setting dynamic pad strengths"

This reverts commit 0a188b23faecd0e39b17a4b6d43088390f5d65f7 since
it causes the following crash while boot-up:

[    7.332115] Unable to handle kernel NULL pointer dereference at virtual address 00000018
...
[    7.434107] PC is at pinctrl_select_state+0x50/0x1a0
[    7.439067] LR is at sdhci_tegra_init_pinctrl_info+0x1f8/0x288

Change-Id: Idfa78bd98df340a965dd913c3977ff83e4fcab10
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554474
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoconfig: delete old MODS defconfigs
Chris Dragan [Mon, 6 Oct 2014 12:38:01 +0000]
config: delete old MODS defconfigs

Bug 1561851

Change-Id: Iba90c8d1c620ec49921888ee1024cb8b8dda1e18
Signed-off-by: Chris Dragan <kdragan@nvidia.com>
Reviewed-on: http://git-master/r/553803
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-by: Tope Yang <topey@nvidia.com>
Reviewed-by: Vivek Aseeja <vaseeja@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agogpu: nvgpu: Improve error handing in fifo
Terje Bergstrom [Fri, 3 Oct 2014 11:13:25 +0000]
gpu: nvgpu: Improve error handing in fifo

When initializing fifo, we ignore several error conditions. Add
checks for them.

Change-Id: Id67f3ea51e3d4444b61a3be19553a5541b1d1e3a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/553269

4 years agoRevert "ARM64: configs: Enable GPU scaling on T210"
Mitch Luban [Tue, 7 Oct 2014 18:44:55 +0000]
Revert "ARM64: configs: Enable GPU scaling on T210"

This reverts commit 60e13a9ad1fe180849b8964fdc8fc42b25f55917.

Change-Id: I072cf3f1747c66974b59d3ff8c98f09571b49f8e
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/554298

4 years agoarm64: rename tegra210 common dtsi
Mitch Luban [Tue, 7 Oct 2014 18:58:27 +0000]
arm64: rename tegra210 common dtsi

tegra210-ers-common.dtsi was a common dtsi for t210. Renaming
to make clear that it's not just common for ERS.

Change-Id: I04bc3fd8d2b37535715c50290bee30487d290831
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/554310

4 years agoARM64: tegra21: Fix EMC DVFS voltage requirements
Alex Frid [Tue, 7 Oct 2014 21:36:52 +0000]
ARM64: tegra21: Fix EMC DVFS voltage requirements

Bug 1562590

Change-Id: I5883cc4e94212cbe3c434e42d498eebff23dba08
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/554358
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agoarm64: dts: tegra: move emc table to ers file
Ray Poudrier [Tue, 7 Oct 2014 18:09:25 +0000]
arm64: dts: tegra: move emc table to ers file

The common file is shared across more than just LP3 platforms.
Move the emc table to a board-specific file.

Change-Id: Ia5384123ff66fe678136aa18473b79be1f08fdfd
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/554276
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agoarm: dts: panel specific nvidia,edid prop
Min-wuk Lee [Thu, 18 Sep 2014 06:02:48 +0000]
arm: dts: panel specific nvidia,edid prop

Move nvidia,edid property underneath panel node

Bug 1371533
Bug 1536393

Change-Id: I292e313d6e059c7fc53631ac20c462a144b0e5cc
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/500170
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

4 years agovideo: tegra: dc: panel specific nvidia,edid prop
Min-wuk Lee [Thu, 18 Sep 2014 05:39:37 +0000]
video: tegra: dc: panel specific nvidia,edid prop

nvidia,edid property needs to be prepared underneath
target panel node since this information is panel
specific.

Bug 1371533
Bug 1536393

Change-Id: I076f6c2aa467ce11091aec7d2fe961408b041ffe
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/500131
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

4 years agoARM64: configs: Enable GPU scaling on T210
Arto Merilainen [Thu, 4 Sep 2014 05:39:28 +0000]
ARM64: configs: Enable GPU scaling on T210

This patch enables devfreq based GPU scaling on T210.

Change-Id: I9ba09f6d01f836d6d7f79fe3be4af90ededf15b6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/500616
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agodvfs: tegra21: limit gpu rail voltage to 1150mv
Seshendra Gadagottu [Tue, 30 Sep 2014 21:51:50 +0000]
dvfs: tegra21: limit gpu rail voltage to 1150mv

When gpu dvfs enabled, system is running into EDP
issues with max gpu rail voltage as 1.225V. Until SV
tables available, max gpu rail voltage is limited to 1.15V.

Bug 1552464

Change-Id: I025257929cbd9e497edd44dbaa2132cf3e833905
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/552217
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agoxhci: tegra21: WAR for incorrectly detected LFPS
JC Kuo [Thu, 2 Oct 2014 16:32:39 +0000]
xhci: tegra21: WAR for incorrectly detected LFPS

In the path of LGO_U3, there is some noise on the bus before actual
electrical idle, the idle detector circuit in the new UPHY design
seems to be sensitive to this noise and it is detected as LFPS.

Disabling LPFS detector before direct U3 as a workaround.

bug 1560603
bug 200041375
bug 200042008

Change-Id: I2b2149959cb38f29fbbb21dfb3dbdef2f8cb15f8
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/552933
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agodrivers: tegra: mmc: Support for setting dynamic pad strengths
Raveesh Kote [Mon, 22 Sep 2014 04:59:58 +0000]
drivers: tegra: mmc: Support for setting dynamic pad strengths

-Setting dynamic pad strengths depending on the
 type of sd card inserted.

- This requirement is for automotive platforms
  in which the pad strengths change depending
  on the type of sd card inserted.

Bug 1477749

Change-Id: Ied4670e591000a8a95ca0eaf746c18517c4b5d0a
Signed-off-by: Raveesh Kote <rkote@nvidia.com>
Reviewed-on: http://git-master/r/496939
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Sandeep Trasi <strasi@nvidia.com>

4 years agoplatform: tegra21: vi: emc clk_duplicate
Sudhir Vyas [Tue, 30 Sep 2014 07:12:28 +0000]
platform: tegra21: vi: emc clk_duplicate

Define emc clk_duplicate for VI_ONE_DEVICE.

Bug 1555925

Change-Id: Ia83ce15f7cbcc4ec891ae229fa29a0e709bc93b7
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/551948
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>

4 years agovideo: tegra: host: enable actmon watermark intr
Shridhar Rasal [Sat, 5 Jul 2014 14:30:44 +0000]
video: tegra: host: enable actmon watermark intr

Add support to use watermark interrupts:

- Adds nvhost interrupt callback to actmon interrupts,
  if actmon_irq is set for device.
- Adds callbacks to set high and low watermark values.
- Removes unused counter code.

Bug 1515087

Change-Id: Ibff29a534c4580225a7a7b2e18af18dfe150565b
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/497377
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agovideo: tegra: host: allow registering isrs to host
Shridhar Rasal [Sat, 5 Jul 2014 14:30:44 +0000]
video: tegra: host: allow registering isrs to host

This patch adds support to register ISRs to host interrupts.

Bug 1515087

Change-Id: If8aecb6fb9942c3bb9033aaa5dae05cda591b79f
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/553266

4 years agoPM / devfreq: add watermark events
Shridhar Rasal [Thu, 25 Sep 2014 13:15:13 +0000]
PM / devfreq: add watermark events

This patch adds support for watermark events. These events inform
the governor that the device load has gone below (low watermark) or
above (high watermark) certain load value.

Bug 200041268

Change-Id: I617369080fc42f623fe944d8ddea84543ce06bf5
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/553265
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agoPM / devfreq: add new watermark devfreq governor
Shridhar Rasal [Thu, 25 Sep 2014 13:15:13 +0000]
PM / devfreq: add new watermark devfreq governor

This patch adds new watermark devfreq governor.

Governor decides next frequency from frequency table
based on type of watermark interrupt.

Bug 200041268

Change-Id: Id6e6cd53476b7e72215ff9dc5cb6e06ae5b76575
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/538933

4 years agoRevert "iommu: of: tegra/smmu: asprops sanity check"
Arto Merilainen [Tue, 7 Oct 2014 13:02:50 +0000]
Revert "iommu: of: tegra/smmu: asprops sanity check"

This reverts commit 35a1fa354c7e8033eb36233b25176e97d2c3bd3f.
The commit causes large screen corruption on T210.

Change-Id: I598b0a0627626847708d6b7fae750495a32f20c3
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/554215
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agodrivers: media: tegra: enable camera auto detect
Charlie Huang [Sun, 11 May 2014 06:12:33 +0000]
drivers: media: tegra: enable camera auto detect

updates:
1. register chips from DT at probing.
2. move power on/off sequences and regulators from chip data
   to device data, to avoid conflicts when multiple devices
   of the same chip type but have different power sequence
   and regulators.
3. split camera.h, the internal function prototypes are moved
   to camera_common.h.
4. debugfs now supports new layout format - version 0 and 1.
5. remove depricated commands, edp and pinmux.
6. enable auto detection in a seperate worker thread.
7. other minor optimizations.

bug 1509855

Change-Id: I2f619e12744a63e0c3c9b6088a9a12b0e0f25973
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/407924
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoARM64: dts: loki: Add DeviceTree entries for Sysedp
Anand Prasad [Thu, 18 Sep 2014 20:15:23 +0000]
ARM64: dts: loki: Add DeviceTree entries for Sysedp

Change-Id: Idc52f08f4ee5eea28576e61c8608ee5047cdfc54
Signed-off-by: Anand Prasad <anprasad@nvidia.com>
Reviewed-on: http://git-master/r/500414
Reviewed-by: Timo Alho <talho@nvidia.com>

4 years agodt-bindings: memory: do not use TEGRA_SWGROUP_GPU
Sri Krishna chowdary [Tue, 7 Oct 2014 05:49:03 +0000]
dt-bindings: memory: do not use TEGRA_SWGROUP_GPU

GPU swgroup is disabled at hardware level.
Add warning to prevent its usage for programming smmu.

Change-Id: I7f3c274fcb6a96ad9f4a9af612e794798ccb8a04
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/554087
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agoiommu/tegra: smmu: Nullify stale pointer
Sri Krishna chowdary [Tue, 30 Sep 2014 15:19:26 +0000]
iommu/tegra: smmu: Nullify stale pointer

The map* in smmu_map_prop points to the dma_iommu_mapping
which was destroyed. It may be possible that a client which registers
to this swgroup will be using the stale pointer and not create one
new dma_iommu_mapping * if this pointer is not set NULL.
Fix it by setting it NULL just before domain is destroyed.

Bug 200031739

Change-Id: I05ac3456074d6bbfe11cbc766e47de257d0e0ae5
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/552080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>