5 years agoARM: dt: fix 64 bit mem size in E1791
Ishwarya Balaji Gururajan [Thu, 29 May 2014 00:39:45 +0000]
ARM: dt: fix 64 bit mem size in E1791

update address/size of memory-controller
node to 64 bit

Bug 1396089

Change-Id: I1d83959edf990a7d2a179152ac07aa9c87ff903c
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/416393
(cherry picked from commit 2bf9ad2147e328c073fad29e0f8e80d65f173fcf)
Reviewed-on: http://git-master/r/423808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoRevert "Revert "input: touch: raydium: Code drop V73.9""
Seema Khowala [Fri, 13 Jun 2014 17:18:30 +0000]
Revert "Revert "input: touch: raydium: Code drop V73.9""

This reverts commit 96ec201230966872c1c4b3b2197c6e457f0236e0.

Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Change-Id: Ie7127c66af2fa20ede0d512dc0d1d08499d2a8be
Reviewed-on: http://git-master/r/423316
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra124: PM375: update soc0 machine name
Prabhu Kuttiyam [Fri, 14 Mar 2014 00:50:56 +0000]
arm: tegra124: PM375: update soc0 machine name

This commit adds a new machine name for PM375 boards.

bug 1395699

Change-Id: Ia07b86a03e2457b192095b0bb01cc7ee900641d7
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/381774
(cherry picked from commit 03b586d56df60b73d211c4b834adffa5990fb93c)
Reviewed-on: http://git-master/r/418544
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>

5 years agostaging: iio: light: cm3217: remove pm ops
Sri Krishna chowdary [Mon, 26 May 2014 16:56:17 +0000]
staging: iio: light: cm3217: remove pm ops

Remove suspend and resume pm ops as sensorservice takes
care of activate/deactivate of sensor as required.

Also, put the device to standby mode if regulator is still enabled.

Change-Id: I5169409f679319fe42c89d7debd305c5c885fd15
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/415042
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: dtb: norrin: enable powergood_ac_ok_mask
Bibek Basu [Fri, 13 Jun 2014 04:37:52 +0000]
ARM: dtb: norrin: enable powergood_ac_ok_mask

Enable ac_ok_mask for OC_PG signal

Bug 1518725
Bug 1419425

Change-Id: Ief0ab18d80551b2f4c55090bcccf1f3c573569c8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423037
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: Documentation for oc_pg_ctrl masking
Bibek Basu [Fri, 13 Jun 2014 09:19:16 +0000]
mfd: as3722: Documentation for oc_pg_ctrl masking

Update Documentation for device tree update for
optional oc_pg_ctrl_masking feature

Bug 1518725
Bug 1419425

Change-Id: I309533849d48d61aefebd8f477e79b79ed4127fb
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423185
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: add oc_pg_ctrl enabling support
Bibek Basu [Fri, 13 Jun 2014 04:16:39 +0000]
mfd: as3722: add oc_pg_ctrl enabling support

Based on DT or pdata for the board used, add support
to mask oc_pg_ctrl  and oc_pg_ctrl2 signal

Bug 1518725
Bug 1419425

Change-Id: Ie69c1de37b9f428e23268dad009dfff36cb1463d
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423036
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoiio: meter: ina230: fix return value of ina230_set_channel
Timo Alho [Thu, 12 Jun 2014 18:29:12 +0000]
iio: meter: ina230: fix return value of ina230_set_channel

On success, ina230_set_channel needs to return the number of
characters written.

Change-Id: I4ed249c0c4c86792b3b590eb4c1a532dcfd57f3a
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/422792
(cherry picked from commit 0ad59e7418ae0809354e5178ee641b69deda3ad0)
Reviewed-on: http://git-master/r/422799
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: Dump offending push buffer fragment
Terje Bergstrom [Wed, 11 Jun 2014 11:53:38 +0000]
gpu: nvgpu: Dump offending push buffer fragment

When outputting debug dump, print the contents of current push buffer
segment.

Also changes the debug dump to use pr_cont when applicable, and dumps
state before recovering in case channel was not loaded to an engine.

Bug 1498688

Change-Id: I5ca12f64bae8f12333d82350278c700645d5007e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/422208
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agommc: tegra: add tap hole coeff for 200MHz for SDMMC3
Shreshtha Sahu [Wed, 21 May 2014 06:58:44 +0000]
mmc: tegra: add tap hole coeff for 200MHz for SDMMC3

This patch adds tap hole coeff for 200MHz for SDMMC3,
for tegra12x

Bug 1505798

Change-Id: I54de2a7529952367e361d8bd55a669335142193f
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/412543
(cherry picked from commit f2a9fc57238de62bc996f7565850b7012e1f5962)
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422035
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: sdhci: set max clk to 200MHz for SDMMC3
Shreshtha Sahu [Wed, 21 May 2014 06:39:50 +0000]
ARM: tegra: sdhci: set max clk to 200MHz for SDMMC3

This patch sets max clk limit to 200MHz for SDMMC3 for PM375.
Requesting 208MHz results in getting 204MHz from PLL_P and CRC
errors are seen.

Bug 1505798

Change-Id: I14825335fa5895ef2dde905f1e3cd568d2dafa62
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/412542
(cherry picked from commit fbcb0018d3622dedeb4c9413b9b774c4c9d49d36)
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422034
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: Turn on scaling when powered
Allen Yu [Mon, 9 Jun 2014 09:37:22 +0000]
gpu: nvgpu: Turn on scaling when powered

This patch reorders scaling resume to happen always when
we power on the GPU, so as to balance the scaling suspend
when we power off GPU.

bug 200010911

Change-Id: I9fde817fbf9fed7d90c48ea06050db4b82e670a8
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/421543
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: T132: DVFS: Increase cpu frequency granularity below vmin
Krishna Sitaraman [Fri, 30 May 2014 20:31:44 +0000]
ARM: T132: DVFS: Increase cpu frequency granularity below vmin

Granularity set at 25.5mhz upto 1020Mhz.

Bug 1509711

Change-Id: I80d4e78a2c8d1fe995a88ed220b7831b500e162f
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/417245
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoi2c: tegra: do bit-banging for i2c transfer at 50KHz.
Laxman Dewangan [Thu, 12 Jun 2014 13:28:58 +0000]
i2c: tegra: do bit-banging for i2c transfer at 50KHz.

Bit-banging is enabled dueing power off. Do the bit-banging method
of data transfer at 50KHz.

Change-Id: I641ddb8c85c34aace2c82ab666de8c7630ef0395
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/423071
GVS: Gerrit_Virtual_Submit

5 years agoi2c: algo: add more error/info prints
Laxman Dewangan [Thu, 12 Jun 2014 13:27:13 +0000]
i2c: algo: add more error/info prints

Enable more error/info prints to know the status of the
transfer if it fails.

Also when sending bytes, ignore the last byte ACK from the slave.

Change-Id: I2b655da28545362d6e7855baceedbfd8588b3e43
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/423070
GVS: Gerrit_Virtual_Submit

5 years agoarm64: enable deprecated SETEND instruction in SCTLR compat config
Rich Wiley [Wed, 4 Jun 2014 18:44:03 +0000]
arm64: enable deprecated SETEND instruction in SCTLR compat config

Bug 200004840

Change-Id: I703d4843f8aab2ec63324f04cc13aaabae88e163
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/422174
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: make SCTLR compat config depend on CONFIG_ARMV7_COMPAT
Rich Wiley [Wed, 4 Jun 2014 18:41:53 +0000]
arm64: make SCTLR compat config depend on CONFIG_ARMV7_COMPAT

Conflicts:
arch/arm64/mm/proc.S

Bug 200004840

Change-Id: I76e0067839c96e3082b42c80d3fc670cf3d371b5
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/422173
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoASoC: Tegra: Simplify eos detection logic
Ravindra Lokhande [Wed, 11 Jun 2014 11:41:51 +0000]
ASoC: Tegra: Simplify eos detection logic

Bug 200008134

Change-Id: I3f39c15a91fb76958b739636eddb6d8480898d21
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/422171
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoarm: tegra: tweak cpu-emc ratio
Donghan Ryu [Tue, 20 May 2014 00:59:24 +0000]
arm: tegra: tweak cpu-emc ratio

the old cpu-emc ratio is probably not very optimal
for newer CPUs with higher max CPU and EMC frequencies.
It would be better if have a table of these per CPU
architecture but tuning this hard-coded value for now
won't make things any worse.

Also, much lower CPU_AVG_ACT_THRESHOLD is used for
tegra12x and tegra13x

Bug 1455015
Bug 1473244
Bug 1497785
Bug 1500639
Bug 1504328
Bug 200004223

Change-Id: I96d4d4d36474c1d7f1d62762666e944fbd04b03e
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/411700
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agostaging: iio: light: iqs253: cancel workqueue
Sang-Hun Lee [Mon, 9 Jun 2014 22:45:38 +0000]
staging: iio: light: iqs253: cancel workqueue

 - Any lingering workqueue must be cancelled
   during the shutdown, to prevent them from running
   during a shutdown
 - In most cases, they are harmless, but they will
   trigger a warning if the i2c bus is shutdown during the
   shutdown as done on some platforms

Bug 1522172

Change-Id: I465e19ef793cf72f5f533b0e2c9e9f3e837c2133
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/421345
(cherry picked from commit b04ebe7fc2a77897b0020412f2a1ab0de94aa7c1)
Reviewed-on: http://git-master/r/422776
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agostaging: iio: light: add shutdown
Sang-Hun Lee [Mon, 9 Jun 2014 21:48:18 +0000]
staging: iio: light: add shutdown

 - Depending on the platform, i2c bus may be shutdown
   as we shutdown the systme
 - In such a case, any lingering workqueue would slowdown
   the system, as the access will be made to the i2c bus
   which has been shutdown
 - To mitigate the above, cancel all workqueue jobs as we shutdown

Bug 1522172

Change-Id: Idebab822c0ef8ddad7352ef25a546acb3f3e5870
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/420889
(cherry picked from commit 8b39b8db93e5b34672b7cbcf9f6c5ec40398ca83)
Reviewed-on: http://git-master/r/422775
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agogpu: nvgpu: flush write before unlocking
Sang-Hun Lee [Tue, 3 Jun 2014 20:28:45 +0000]
gpu: nvgpu: flush write before unlocking

 - gk20a_enable is reading the clock after unlocking the spinlock
   to flush any previous write
 - This could lead to a race if any write afterwards assume
   the write has been completed already
 - Read the clock before unlocking to ensure all previous writes
   have been completed before letting any other thread use gk20a

Bug 200007520

Change-Id: I737fbbe825c68b25ca256c4a8ee2b99aa8baf0f5
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/418485
(cherry picked from commit 2aed542a719caa69620766bf2dceefe50626c189)
Reviewed-on: http://git-master/r/422773
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoarm: tegra: Don't place CSIC/D IOs in DPD mode
Preetham Chandru R [Thu, 12 Jun 2014 09:07:41 +0000]
arm: tegra: Don't place CSIC/D IOs in DPD mode

According to TRM placing CSIC/D IOs in DPD mode
is no longer available

Bug 200010066

Change-Id: Ic389dba406b06a7c821fa8399ae1854f3ebcac98
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/422677
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agodriver:media:tegra: ov5693 add reg in mode table
David Wang [Sat, 31 May 2014 02:13:06 +0000]
driver:media:tegra: ov5693 add reg in mode table

Setting one of the missing registers for the 2592x1944
mode table. This register value prevents frame drops
when coarse time is updated.

bug 1516678

Change-Id: Icebbca9d7800d609146800678f22ee68de690c4c
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/422289
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agohrtimer: enhance power efficiency
Sumit Singh [Mon, 21 Apr 2014 08:29:04 +0000]
hrtimer: enhance power efficiency

Defining relaxed version of hrtimer_callback_running(),
which will be used to improve power efficiency through
the use of macro cpu_relaxed_read_long.

Bug 1440421

Change-Id: Ie42d7ae9628a817d52f4636781e11b607327c2c5
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398789
(cherry picked from commit 0d9f5fc1d39d7d1809519b5d11bf7ac72287b7c6)
Reviewed-on: http://git-master/r/422255
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agothread_info: enhance power efficiency
Sumit Singh [Wed, 12 Mar 2014 09:14:44 +0000]
thread_info: enhance power efficiency

Using cpu_relaxed_read_long and defining relaxed
version of some macros, and functions so that it
can be used to improve power efficiency.

bug 1440421

Change-Id: If857ff7110cffadc6f13289a6395d253a8e3e232
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/380859
(cherry picked from commit a66b23c6971403594cc6a82923c8df3b8472de90)
Reviewed-on: http://git-master/r/422251
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: processor.h: remove redundant macros
Sumit Singh [Wed, 23 Apr 2014 06:26:55 +0000]
arm64: processor.h: remove redundant macros

Removing cpu_relaxed_read and cpu_relaxed_read_long macros from
processor.h, as these macros are defined in asm/relaxed.h.

bug 1440421

Change-Id: Ic766ac6e34eefe93f90349c088626a0fb277670c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/400127
(cherry picked from commit 108bf0b30d72c52e33dd4fec71dd1ed5baf13ed2)
Reviewed-on: http://git-master/r/422214
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: asm: relaxed.h: defined relaxed.h
Sumit Singh [Fri, 18 Apr 2014 14:49:46 +0000]
arm64: asm: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which contains
arm64 specific macros which will be used to improve
power efficiency of arm64.

bug 1440421

Change-Id: Iee14115490cb16001d5eac9e309ee6e088b88f44
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398323
(cherry picked from commit beb69cd6d2893c36712d4f927e41da0de729d651)
Reviewed-on: http://git-master/r/422212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: asm: relaxed.h: defined relaxed.h
Sumit Singh [Mon, 21 Apr 2014 07:25:24 +0000]
arm: asm: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which uses generic
definitions of some macros used by arm64 for improving
power efficiency.

bug 1440421

Change-Id: I654dcef609812e3bb54e6c892c1554f9cbb4bd3d
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398766
(cherry picked from commit a96e59b1959f3ee216503b4f9df3cb75f7093ed6)
Reviewed-on: http://git-master/r/422211
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoasm-generic: processor.h: remove redundant macros
Sumit Singh [Wed, 23 Apr 2014 05:36:58 +0000]
asm-generic: processor.h: remove redundant macros

Removing cpu_relaxed_read and cpu_relaxed_read_long macros from
processor.h, as these macros are defined in asm-generic/relaxed.h.

Bug 1440421

Change-Id: I5d1ba25755e1c9d33b080dfe01ba838289f306af
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/400093
(cherry picked from commit 57eb21e2d4cad3ce1f85283cfffd0eff85a6d17d)
Reviewed-on: http://git-master/r/422209
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoasm-generic: relaxed.h: defined relaxed.h
Sumit Singh [Fri, 18 Apr 2014 14:30:36 +0000]
asm-generic: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which contains basic
macros which will be used for improving power efficiency for
arm64.

bug 1440421

Change-Id: I5ae7503afdfbaa951827bbf466d8ddccf444f558
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398315
(cherry picked from commit dd434aeb1afea1d9ebce1099fb6ecfa7c6c762c6)
Reviewed-on: http://git-master/r/422203
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: add wmb() before updating PUT
Deepak Nibade [Mon, 9 Jun 2014 10:17:31 +0000]
video: tegra: host: add wmb() before updating PUT

Add write memory barrier wmb() at all places where we update the
dma PUT pointer. We can add this call once we modify PUT and before
we start the cdma.

This is to take care of cache maintenace before
every time we modify PUT pointer and start the cdma.
wmb() ensures that cdma will fetch latest copy of all the buffers
from memory

Change-Id: If01deef7a1c0b4e82de416ee966d9ba51115b34f
Signed-off-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Change-Id: I03bd551220eafa7f3e02476458458de5128c7768
Reviewed-on: http://git-master/r/421524
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Soumenkumar Dey <sdey@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm64: atomic.h: defining relaxed atomic_read
Sumit Singh [Sat, 19 Apr 2014 07:42:58 +0000]
arm64: atomic.h: defining relaxed atomic_read

Defining relaxed version of atomic read as cpu_relaxed_read_atomic
which will be used for improving power efficiency for arm64.

bug 1440421

Change-Id: I5a88b8e66ec3021335905109010efc856ffa7c7e
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
(cherry picked from commit f53c05073d148adfe7abe153f1569c4bd655fb44)
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/415639
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: atomic.h: defined relaxed atomic_read
Sumit Singh [Sat, 19 Apr 2014 07:31:43 +0000]
arm: atomic.h: defined relaxed atomic_read

Defining relaxed version of atomic read as cpu_relaxed_read_atomic.

bug 1440421

Change-Id: I39303d72350985890c7eb5a1afc768c3f8064b47
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
(cherry picked from commit 6c20e8c2aed05ad1a9d1b41cfdd875dc377db44c)
Reviewed-on: http://git-master/r/415637
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoasm-generic: atomic.h: relaxed atomic_read
Sumit Singh [Wed, 2 Apr 2014 09:33:15 +0000]
asm-generic: atomic.h: relaxed atomic_read

Defining relaxed version of atomic read as cpu_relaxed_read_atomic
which will be used for improving power efficiency for arm64.

bug 1440421

Change-Id: I6ac26653ec3d62f74d8c21f250dcdaf9dfb75b9b
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
(cherry picked from commit 7360c3df73afa07361eecab730903e0697d3408f)
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/415628
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM64: tegra: config: disable IKCONFIG_PROC for security
Tom Cherry [Thu, 12 Jun 2014 21:53:12 +0000]
ARM64: tegra: config: disable IKCONFIG_PROC for security

This commit adapts ab9d93ee40c641a502e834edda6223f45d8e2083
to ARM64

Bug 200012659

Change-Id: I34877c0c4a3863dbd2f7667958ff505362950a5e
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/422842
GVS: Gerrit_Virtual_Submit

5 years agoasoc: rt5639: lower verbose level of hp_amp_power()
Shreshtha Sahu [Thu, 12 Jun 2014 05:49:55 +0000]
asoc: rt5639: lower verbose level of hp_amp_power()

hp_amp_power is called multiple times during widget
power on and power on/off info is helpful in debugging.
so moving print from info to debug.

Bug 200010480

Change-Id: Id8db60f1617cd7a5d939ffcf8192201658d6fe96
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422579
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: soctherm: fix throt level debug
Diwakar Tundlam [Wed, 11 Jun 2014 00:04:41 +0000]
arm: tegra: soctherm: fix throt level debug

This change fixes the show-regs output for OC5 throttle which
broke when "refactor throt level & vect" change was reverted.

Bug 200006274
Bug 200009441

Change-Id: I5a0843098baa7a6d041ceac86102d25d98dbae99
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/421891
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agothermal: remove all unsigned type use for temperature
Diwakar Tundlam [Mon, 9 Jun 2014 23:14:05 +0000]
thermal: remove all unsigned type use for temperature

Bug 1516918

Change-Id: I5615b0657d255d9134415d92d372771baa4271e1
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/420818
GVS: Gerrit_Virtual_Submit
Reviewed-by: Josh Kuo <joshk@nvidia.com>
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

5 years agoarm: tegra: add tegra13 support
Donghan Ryu [Tue, 20 May 2014 12:05:29 +0000]
arm: tegra: add tegra13 support

CONFIG_ARCH_TEGRA_13x_SOC check should be added
to actmon code when CONFIG_ARCH_TEGRA_12x_SOC is
checked so the kernel won't pick-up old tegra's
actmon parameters.

Bug 1455015
Bug 1473244
Bug 1497785
Bug 1500639
Bug 1504328
Bug 200004223

Change-Id: I53914949961cb2cf217e8f59be98a9549f3e86a3
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/412031
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: remove unused vpr refetch functions
Deepak Nibade [Thu, 5 Jun 2014 11:45:58 +0000]
gpu: nvgpu: remove unused vpr refetch functions

VPR resize is done by forcing GPU to idle and then updating
VPR size from TLK.
There is no need now to call vpr_resize funtion from kernel
and hence these functions can be removed.

Bug 1487804

Change-Id: I758a6e0a99a58757866f1138b0a89594e2a33908
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421703
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: remove vpr refetch call from kernel
Deepak Nibade [Thu, 5 Jun 2014 11:44:18 +0000]
ARM: tegra: remove vpr refetch call from kernel

Remove vpr refetch from kernel
Do VPR refetch in below sequence :
- first force idle the GPU
- then do SMC call to update VPR size
- unidle the GPU
- while GPU is resuming from rail gated, it will fetch latest
  VPR settings on its own
- Hence there is no need to explicitly call vpr_refetch call
  in kernel

Bug 1487804

Change-Id: I310acfa6d812e71fe3038b601763b43e8cf44d23
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421702
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: allocate secure buffer in probe
Deepak Nibade [Thu, 5 Jun 2014 11:36:17 +0000]
gpu: nvgpu: allocate secure buffer in probe

Allocate dummy secure buffer of size PAGE_SIZE during gk20a_probe().
This will also help to initiate first secure memory (VPR)
resize call while GPU is rail gated and in reset.

This dummy buffer is released after we allocate some more
secure memory buffers in alloc_global_ctx_buffers()

Bug 1487804

Change-Id: I61604d9e5ffb585801ee893435c98a0d3e69d666
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421701
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agogpu: nvgpu: add APIs to allocate/free dummy secure buffer
Deepak Nibade [Thu, 5 Jun 2014 11:30:20 +0000]
gpu: nvgpu: add APIs to allocate/free dummy secure buffer

Add APIs to allocate and free dummy secure buffer of size PAGE_SIZE.
Also, fix small errors during secure memory alloc/free.

Bug 1487804

Change-Id: If078116fb973e81bfcee054b900c09a313e389c6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421700
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: sysfs to put gpu into idle
Deepak Nibade [Tue, 27 May 2014 13:49:45 +0000]
gpu: nvgpu: sysfs to put gpu into idle

- Add a sysfs "force_idle" to forcibly idle the GPU
- read on this sysfs will return the current status

0 : not in idle (running)
1 : in forced idle state

"echo 1 > force_idle" will force the gpu into idle
"echo 0 > force_idle" will cause the gpu to resume

Bug 1376916
Bug 1487804

Change-Id: I48dfd52e0d14561220bc4baea0776d1bdfaa7ea5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
(cherry picked from commit 44d89a68bf6c9034c8bf9f5111d733290e7cb71e)
Reviewed-on: http://git-master/r/421699
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: add railgate check in do_idle()
Deepak Nibade [Tue, 27 May 2014 15:05:12 +0000]
gpu: nvgpu: add railgate check in do_idle()

In gk20a_do_idle(), check gk20a rail status before returning.
If rail is off, then only return success otherwise return
failure

Bug 1376916
Bug 1487804

Change-Id: I6280bf06c686b8baa4d6f49e90f47148411c3e02
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/415281
(cherry picked from commit e30047a60e809aad55e396bec41b8662f4795505)
Reviewed-on: http://git-master/r/421698
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: add is_railgated() callback
Deepak Nibade [Tue, 27 May 2014 14:20:09 +0000]
gpu: nvgpu: add is_railgated() callback

Add is_railgated() platform callback to check status
of gk20a power rail

Bug 1376916
Bug 1487804

Change-Id: Ia0d909210dc409ab684eb6f20528b81500aecd5c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
(cherry picked from commit 880faf88124d0f1b187e073cc627db5a6955b2ba)
Reviewed-on: http://git-master/r/421697
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: gk20a: add do_{idle()/unidle()} APIs
Deepak Nibade [Tue, 20 May 2014 09:35:28 +0000]
gpu: nvgpu: gk20a: add do_{idle()/unidle()} APIs

Add below two new APIs for gk20a :

1) gk20a_do_idle()
this API will force GPU to idle and railgate

2) gk20a_do_unidle()
this API will unblock all the tasks blocked by do_idle()

Bug 1487804

Change-Id: Ic5e7f2d19fb8d35f43666d0e309dde3022349d92
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412061
(cherry picked from commit 932879a81499b8a7bd4eac1b985141fde8b39a0b)
Reviewed-on: http://git-master/r/421696
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: gk20a: add busy lock
Deepak Nibade [Tue, 20 May 2014 09:32:54 +0000]
gpu: nvgpu: gk20a: add busy lock

- add rw_semaphore busy_lock for gpu busy() path
- take read lock on busy_lock inside gk20a_busy()
  so that all usual requests can execute simultaneously
- write lock can be taken when we need to block all
  of the gk20a_busy() calls

Bug 1487804

Change-Id: I1b162b38bce9621723d3e45280c6076816cf771a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412060
(cherry picked from commit 725f970aa378619bc9f0a928cd22fdaaf42698e5)
Reviewed-on: http://git-master/r/421695
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: gk20a: export wait_channel_idle()
Deepak Nibade [Tue, 20 May 2014 09:30:30 +0000]
gpu: nvgpu: gk20a: export wait_channel_idle()

- Export gk20a_wait_channel_idle() function from channel_gk20a.h
- also, return error -EBUSY from this function when channel is
  found to be not idle

Bug 1487804

Change-Id: Ia7425e9b1332260ee9a53dca55ab07541f2755a9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412059
(cherry picked from commit 24c474f62c44a9c0b62b66342336876536481831)
Reviewed-on: http://git-master/r/421694
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: pm: add delay between writes to IO_DPD_REQ
Jay Cheng [Fri, 16 May 2014 21:13:10 +0000]
arm: tegra: pm: add delay between writes to IO_DPD_REQ

SW should explicity add delay between writes to IO_DPD_REQ and
IO_DPD2_REQ registers. This is because we use the same state machine
for both the registers.

The time between writes should be apb clk * (SEL_DPD_TIM + 5).
The worse case of apb clk is 32Khz,
SEL_DPD_TIM is configured as 0x10.
delay = (1/32000) * (16 + 5) which approximately 700us.

Bug 200002717

Change-Id: Icf4efdbc38ccdaca30a9d86da488ac796b657b36
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-on: http://git-master/r/411065
(cherry picked from commit ebba7445ff9a32af6bb1759ac70311f66e2986cb)
Reviewed-on: http://git-master/r/412826
Reviewed-on: http://git-master/r/418379
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: tegra12: Use runnable governor as default
Sai Gurrappadi [Tue, 8 Apr 2014 02:03:33 +0000]
ARM: tegra12: Use runnable governor as default

Switch cpuquiet to use the runnable_threads governor instead of the
balanced governor as the default governor.

Bug 1493183
Bug 200010125

Change-Id: Ie7519e1744bb620e54be7a9c9010290a72b941f9
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/393174
(cherry picked from commit 7074cd0c47a4fa173513ef920f71685f5bd19f89)
Reviewed-on: http://git-master/r/404124
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
Ishwarya Balaji Gururajan [Wed, 4 Jun 2014 18:05:57 +0000]
ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87

Set CPU rate to 2.2Ghz for sku 0x87 (CD575M) similar
to its DSC and POP counterparts

Bug 1342499

Change-Id: I567a12bbd4787d59aee5dca466f1e1bdfb481bf1
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/421833
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm64: tegra132: norrin: change vret to .55V for PM374
Hridya [Mon, 9 Jun 2014 23:35:29 +0000]
arm64: tegra132: norrin: change vret to .55V for PM374

Bug 1442659

Change retention voltage to .55V for PM374

Change-Id: I35fb398f738a91b2998c546699b1227ca5b24e42
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420821
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm64: tegra132: tn8: change Vret to .55V for P1761 and P1765
Hridya [Fri, 6 Jun 2014 22:43:03 +0000]
arm64: tegra132: tn8: change Vret to .55V for P1761 and P1765

Bug 1442659

Change retention voltage to .55V for P1761/P1765

Change-Id: Ica3947771a0379ec2177dc8cf819527629f19c5c
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420227
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm64: tegra132: E1973: Change Vret to .55V for E1973
Hridya [Fri, 6 Jun 2014 22:41:21 +0000]
arm64: tegra132: E1973: Change Vret to .55V for E1973

Bug 1442659

Change retention voltage to .55V

Change-Id: I22ae547fa3adb0213069693967a6176d7a628a09
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420225
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm64: tegra132: Bowmore: Modify Vret to .55V
Hridya [Fri, 6 Jun 2014 22:36:13 +0000]
arm64: tegra132: Bowmore: Modify Vret to .55V

Bug 1442659

Change retention voltage to .55V

Change-Id: I72a363e4898bf84f43afc16c56bf764c87d7b006
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420224
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: 7840/1: LPAE: don't reject mapping /dev/mem above 4GB
Sergey Dyasly [Tue, 24 Sep 2013 15:38:00 +0000]
ARM: 7840/1: LPAE: don't reject mapping /dev/mem above 4GB

With LPAE enabled, physical address space is larger than 4GB. Allow mapping any
part of it via /dev/mem by using PHYS_MASK to determine valid range.

PHYS_MASK covers 40 bits with LPAE enabled and 32 bits otherwise.

Bug 1474982

Reported-by: Vassili Karpov <av1474@comtv.ru>
Signed-off-by: Sergey Dyasly <dserrg@gmail.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit 3159f372354e8e1f5dee714663d705dd2c7e0759)

Change-Id: I37133a68642b5856c358486bddacc7c4383ea812
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/417795
(cherry picked from commit 032975cbe364d06754c3b5e2788313ea07c38ac7)
Reviewed-on: http://git-master/r/419641
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoAsoc: Alc5639:Fix/Improve Headset detection.
Vinod Subbarayalu [Thu, 22 May 2014 03:38:35 +0000]
Asoc: Alc5639:Fix/Improve  Headset detection.

-Update from vendor to fix/improve Headset detection.

Bug 1514488
Bug 200004866

Change-Id: I7b8ca45b7f30c964013a34c8cdd5734efb544c81
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
Reviewed-on: http://git-master/r/419207
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agopower: extcon:convert extcon lock to spinlock from mutex
Venkat Reddy Talla [Wed, 11 Jun 2014 05:24:03 +0000]
power: extcon:convert extcon lock to spinlock from mutex

use spinlock instread of mutex to avoid kernel warning "sleeping
function called from invalid context" if CONFIG_DEBUG_ATOMIC_SLEEP
(sleep inside atomic section checking config) enabled and usb cable
plugged/unplugged.

Bug 1522398

Change-Id: I813f959dc5cb3ce666794a8d57152b6f562046a6
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/421988
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agomedia: vb2: use FOLL_DURABLE and __get_user_pages to avoid CMA migration issues
Vandana Salve [Tue, 10 Jun 2014 09:43:08 +0000]
media: vb2: use FOLL_DURABLE and __get_user_pages to avoid CMA migration issues

V4L2 devices usually grab additional references to user pages for a very
long period of time, what causes permanent migration failures if the given
page has been allocated from CMA pageblock. By setting FOLL_DURABLE flag,
videobuf2 will instruct __get_user_pages() to migrate user pages out of
CMA pageblocks before blocking them with an additional reference.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: Ic59e5219538388604087799dd26217d0ef27d7e4
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421679
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomm: get_user_pages: migrate out CMA pages when FOLL_DURABLE flag is set
Vandana Salve [Tue, 10 Jun 2014 09:40:04 +0000]
mm: get_user_pages: migrate out CMA pages when FOLL_DURABLE flag is set

When __get_user_pages() is called with FOLL_DURABLE flag,
ensure that no page in CMA pageblocks gets locked.
This workarounds the permanent migration failures caused
by locking the pages by get_user_pages() call for a long
period of time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: I11b7c87e78f1022d6fded85a1ed6bac73c5f0a7c
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421678
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agomm: get_user_pages: use NON-MOVABLE pages when FOLL_DURABLE flag is set
Vandana Salve [Tue, 10 Jun 2014 09:36:34 +0000]
mm: get_user_pages: use NON-MOVABLE pages when FOLL_DURABLE flag is set

Ensure that newly allocated pages, which are faulted in
in FOLL_DURABLE mode comes from non-movalbe pageblocks,
to workaround migration failures with CMA

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: I76d2185cc7e77992db585a71efaa06a5c0105a76
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421677
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agomm: get_user_pages: use static inline
Vandana Salve [Tue, 10 Jun 2014 09:32:16 +0000]
mm: get_user_pages: use static inline

__get_user_pages() is already exported function,
so get_user_pages() can be easily inlined to the
caller functions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: If700fa3c6ead133299fa99a702887584b76e5ffb
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421676
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agomm: introduce migrate_replace_page() for migrating page to the given target
Vandana Salve [Tue, 10 Jun 2014 09:25:32 +0000]
mm: introduce migrate_replace_page() for migrating page to the given target

introduce migrate_replace_page for migrating
page to the given target

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

bug 1517584

Change-Id: I5f1d3bcb19ca7d9c9cf7234e8d3472a42c4f40af
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421675
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: T132: Clocks: Update temperature dependent vmin for cpu
Bibek Basu [Fri, 25 Apr 2014 07:31:09 +0000]
ARM: T132: Clocks: Update temperature dependent vmin for cpu

Update temperature dependent vmin for A01 cpu table version p4v4

Bug 1458402

Change-Id: I4a2200eda67278b6d2e3f2696f25c4779169e162
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/401361
(cherry picked from commit a25df4eef43bb682d70b2897ce8e2a6f5bdd9b61)
Reviewed-on: http://git-master/r/421552
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM64: tegra: config: enable DETECT_HUNG_TASK
Bharat Nihalani [Tue, 10 Jun 2014 05:31:03 +0000]
ARM64: tegra: config: enable DETECT_HUNG_TASK

This should help debug bugs that show hard lock-ups.

Bug 200011588

Change-Id: Ib95b0b9be952151c7cc1889c867a4be54cda33f5
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/421448
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agocpuidle-denver: fix return value check
Bharat Nihalani [Tue, 10 Jun 2014 08:31:14 +0000]
cpuidle-denver: fix return value check

of_property_read_u32 returns 0 on SUCCESS. At one of the places,
the return value of this function was checked with non-zero value.

This is corrected with this change.

Bug 1517221

Change-Id: I909f0c86f60a287e336ee2adbd45e0cf6b338d57
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/421522
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agovideo: tegra: dsi: re-init DSI in seamless
Vineel Kumar Reddy Kovvuri [Wed, 4 Jun 2014 05:58:03 +0000]
video: tegra: dsi: re-init DSI in seamless

This patch re-initializes dsi in the kernel even
in seamless mode. This helps reduce the dependency
with bootloader set dsi configuration

Bug 200006804
Bug 1510417

Change-Id: I2f9ae5efd467b95b5d3b0f6568c2379f4f68522e
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/418332
(cherry picked from commit 4e9583d8ceeabb393d355a53641b12c03d8be0e2)
Reviewed-on: http://git-master/r/419541
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: ardbeg: Add dma mask on SDHCI devices.
Naveen Kumar Arepalli [Fri, 30 May 2014 06:53:08 +0000]
ARM: tegra: ardbeg: Add dma mask on SDHCI devices.

Added dma mask on SDHCI devices.

Bug 1486735

Change-Id: Ie6ac1214a56a75828bc04b99290b555b77579474
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/416956
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit aac19d2b0cba665e195f6bd16ffec251184bd80e)
Reviewed-on: http://git-master/r/419445

5 years agommc: sdhci: Use pre-allocated DMA buffers
Naveen Kumar Arepalli [Fri, 30 May 2014 06:47:39 +0000]
mmc: sdhci: Use pre-allocated DMA buffers

Use pre-allocated DMA buffers for ADMA descriptor and Bounce buffer
instead of dynamic DMA mapping.
This improves SDHCI driver performance by reducing dynamic DMA mapping
overhead.

Bug 1486735

Change-Id: Ic9c646437be047d33304339eccc48a825f0a8bcc
Reviewed-on: http://git-master/r/380885
Cherry-picked from commit 7ffcc4cf1a1cec42610c1b55c30b3ec28547a11e

Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Change-Id: If850a534ba9fbfd169b4fbefd35ca5922b1d1254
Reviewed-on: http://git-master/r/416955
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 9e58888afe4e66e83eece0a8332c8e7440bd1bcf)
Reviewed-on: http://git-master/r/419444

5 years agotegra: hdmi: remove powergating from state machine
Anshuman Nath Kar [Tue, 3 Jun 2014 23:20:52 +0000]
tegra: hdmi: remove powergating from state machine

Bug 200006368
Bug 200005903

hdmi state machine has an unbalanced powergating which
leads to dc being powergated during flips

Change-Id: I328630dc3b2192587f2ce874e1583a7cef104b51
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
(cherry picked from commit a1ee428ac4d0d86ccc342863080af9ddd2a1c25d)
Reviewed-on: http://git-master/r/418653
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: T132: update dvfs table for E1971
Ishwarya Balaji Gururajan [Mon, 9 Jun 2014 17:56:06 +0000]
ARM: T132: update dvfs table for E1971

update emc dvfs table for E1971 (bowmore)

Bug 1434354

Change-Id: I678805dc4e480be97ac48dadc323b4fc00ce0b4e
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/420723
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: tegra: bowmore: set constraints for sd4 regulator
Bibek Basu [Mon, 9 Jun 2014 10:16:31 +0000]
ARM: tegra: bowmore: set constraints for sd4 regulator

AS3722 sd4 regulator is not OTP programmed. So by default
voltage is 0. We need to provide initial minV and maxV so
as to initialize the regulator properly.

Bug 1454868

Change-Id: I004cee04f97e49ab22f680970bdf8c1941f5e3f1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/420636
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agodrivers: use request_firmware_nowait() instead of request_firmware()
Manikanta [Mon, 9 Jun 2014 05:51:47 +0000]
drivers: use request_firmware_nowait() instead of request_firmware()

During boot request_firmware API call waits for the system partition
to mount, whereas kernel gets stuck at request_firmware API call,
stalling kernel boot for 60 seconds [Timeout for request firmware].
Use request_firmware_nowait API to avoid deadlock.

bug 1520734
bug 200008011

Change-Id: I5a7fcb720c407236108bcac7f36c52b2cd47ee27
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/420452
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agotegra: hdmi: check dc enabled during recheck EDID
Anshuman Nath Kar [Fri, 30 May 2014 02:17:40 +0000]
tegra: hdmi: check dc enabled during recheck EDID

Bug 200002012

Change-Id: Idff34c8acf7aeb409571573838bcf41710cb8434
Signed-off-by: Anshuman Nath Kar <anshumank@nvidia.com>
(cherry picked from commit f1cf7ddc5ed94f3fd2ef34f0c22ff931c106a67c)
(cherry picked from commit f8d6f6eb49ed476ad2f9487ded4385fc1bd531f6)
Reviewed-on: http://git-master/r/418656
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agoMerge commit 'refs/changes/82/419382/1' of ssh://git-master:12001/linux-3.10 into...
Mandar padmawar [Tue, 10 Jun 2014 14:13:21 +0000]
Merge commit 'refs/changes/82/419382/1' of ssh://git-master:12001/linux-3.10 into promotion_build

Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56

5 years agoarm: tegra: tn8: Wait 50ms before panel reset
Santosh Katvate [Tue, 22 Apr 2014 15:10:20 +0000]
arm: tegra: tn8: Wait 50ms before panel reset

- RST should be low 50ms(min.) after DSI_A_D0_P disabled (after LP state)

Bug 1474583

Change-Id: I88e2f2387432d43296b6c9540719f4392ecb9b6e
Signed-off-by: Santosh Katvate <skatvate@nvidia.com>
Reviewed-on: http://git-master/r/399783
(cherry picked from commit 7e8923f44f2a702c5e432021b030077164c4067e)
Reviewed-on: http://git-master/r/418359
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm64: tegra: enable core dump
Mitch Luban [Tue, 20 May 2014 15:17:04 +0000]
arm64: tegra: enable core dump

Bug 1521482

Change-Id: I1d6756347e35030187a7f2fa61d7128c86ab94a6
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/412103
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agousb: hsic: add delay during hsic phy resume
Martin Chi [Mon, 5 May 2014 01:43:50 +0000]
usb: hsic: add delay during hsic phy resume

25ms delay is added to make sure the resume
signalling to be driven during remote wake-up
on the USB lines for a minimum period of 25ms

10ms delay is added to stabilize the HSIC bus

bug 1451863
bug 1438066

Change-Id: If514bb0b31df54f1b219f2ebfc6a3ca5ea62e6a4
Signed-off-by: Martin Chi <mchi@nvidia.com>
Reviewed-on: http://git-master/r/400932
(cherry picked from commit 0b28b90602d8cbcea8f3b3354524d443ab3d1872)
Reviewed-on: http://git-master/r/420335
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: dtb: keep pcie disable by default
Bibek Basu [Wed, 4 Jun 2014 05:27:03 +0000]
ARM: tegra: dtb: keep pcie disable by default

pcie is not available in all the platforms based
on T124 or T132. So, by default keep it disabled.
Otherwise there are probe errors seen

Bug 1518254

Change-Id: Id869a36dcbb8b46434d91c4f1c1ad4ed5a37c63b
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/418724
(cherry picked from commit d2238db744c35a539d1f219b5c57bc8949d6cd73)
Reviewed-on: http://git-master/r/420375
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agousb: phy: tegra: HSIC: Clear PD_TX during resume
BH Hsieh [Mon, 14 Apr 2014 07:25:34 +0000]
usb: phy: tegra: HSIC: Clear PD_TX during resume

During HSIC resume the PD_TX circuit is to be turned on before
clearing MASTER_ENABLE of PMC.

Bug 1496758

Change-Id: I1127dfc0fc0e3b8dfb63bafa2291483186e06093
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Reviewed-on: http://git-master/r/395683
(cherry picked from commit I1127dfc0fc0e3b8dfb63bafa2291483186e06093)
Reviewed-on: http://git-master/r/420336
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Martin Chi <mchi@nvidia.com>
Tested-by: Martin Chi <mchi@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: print intr code for class error
Deepak Nibade [Thu, 5 Jun 2014 12:37:57 +0000]
gpu: nvgpu: print intr code for class error

Print interrupt code and channel id for unhandled gr class error.

bug 200010403

Change-Id: Iedceaf4b8b6363b26f1836256875fb9b5c43eded
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/419566
(cherry picked from commit 080b9a9e7ea5365ed3ace05d4f117095a8416d19)
Reviewed-on: http://git-master/r/419992
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agogpu: nvgpu: add accessor for gr_class_error
Deepak Nibade [Thu, 5 Jun 2014 11:29:29 +0000]
gpu: nvgpu: add accessor for gr_class_error

Add accessors to read class error code from
NV_PGRAPH_CLASS_ERROR

Bug 200010403

Change-Id: Ia99f50e264f9b8aa93f99994e52424418a2e4f74
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/419565
(cherry picked from commit d9f93d0c9a2aec552cce14147f3f6feb318f330e)
Reviewed-on: http://git-master/r/419991
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: dt: tn8: a03: correct ALS sensor info
Sri Krishna chowdary [Tue, 27 May 2014 19:56:12 +0000]
ARM: tegra: dt: tn8: a03: correct ALS sensor info

Pass correct values for maximum detection range and
power consumed in milli Amps.

Bug 1503943

Change-Id: I78903fc777ceb56aeca6c1fa5b70412be4850a67
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/415397
(cherry picked from commit 3158de305a6543b2f33ecf8e125a6661df872694)
Reviewed-on: http://git-master/r/419965
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agommc: tegra: Ignore err if dvfs overrides are disabled
Pavan Kunapuli [Tue, 13 May 2014 11:22:42 +0000]
mmc: tegra: Ignore err if dvfs overrides are disabled

If dvfs overrides are disabled, continue tuning execution by
treating the dvfs override API return values as expected.

Bug 1516198

Change-Id: I8d27969029ce7b318d23c227e8dfb19793282fea
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/413118
GVS: Gerrit_Virtual_Submit
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
(cherry picked from commit 71edeee1a98a8dc7474781689b0859a32f5aca80)
Reviewed-on: http://git-master/r/419948
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: jetson-tk1: correct regulator init
Bibek Basu [Wed, 4 Jun 2014 09:19:25 +0000]
ARM: tegra: jetson-tk1: correct regulator init

For Jetson-TK1 use laguna_regulator_init

Bug 1518991

Change-Id: I8b715793ba9371d042d4f6d95469978ba1ef9b26
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/418839
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: T132: update dvfs table for PM374
Ishwarya Balaji Gururajan [Fri, 30 May 2014 19:16:16 +0000]
ARM: T132: update dvfs table for PM374

update emc dvfs table for norrin (PM374)

Bug 1427420

Change-Id: Ic389845d420c78dce4f5e2bcf5f9a34b689ceac8
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/417231
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: T132: update DVFS table for E1973
Ishwarya Balaji Gururajan [Fri, 30 May 2014 19:03:11 +0000]
ARM: T132: update DVFS table for E1973

update emc dvfs table for E1973

Bug 1434359

Change-Id: I729a4b30dc6ceaaa1883b075dd588c6ea72d464c
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/417222
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: T132: update SoC dvfs table for DSI, eDP
Ishwarya Balaji Gururajan [Tue, 27 May 2014 00:56:46 +0000]
ARM: T132: update SoC dvfs table for DSI, eDP

Update freq for DSI to 402M and sor to 162M
at 800mV. Update SoC dvfs revision to p4v1l.

Bug 1442659

Change-Id: I2f488d5d5bd2c0be577d4947f9f36d0c4a810596
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/415053
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agovideo: tegra: dc: fix nvsd smooth_k handling
Daniel Solomon [Fri, 18 Apr 2014 04:15:01 +0000]
video: tegra: dc: fix nvsd smooth_k handling

When smooth_k is enabled, the NVSD driver determines
that hardware pixel gain and brightness calculations
are complete when it sees to consecutive and equal
brightness values. However, since multiple raw K
values are mapped to a single brightness value,
this check can be misleading.

To fix this, we continue checking for new brightness
values for a few additional frames after seeing repeating
brightness results. The number of frames is calculated
from smooth_k_incr.

Bug 1502587

Change-Id: I97f2ecd77398cf441ac720b6e306e0a1c89eed5d
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/409111
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: tegra: dvfs: Increase DFLL force guard-band
Alex Frid [Fri, 30 May 2014 18:50:12 +0000]
ARM: tegra: dvfs: Increase DFLL force guard-band

Increased DFLL force voltage request guard-band below maximum voltage
from 1 LUT step to 2 LUT steps per characterization results.

Bug 1442659

Change-Id: Ie34d19174372bc85aa3c44391542406bc6a564de
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/419773
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoARM: tegra: dvfs: Update DFLL tune parameters
Alex Frid [Wed, 4 Jun 2014 06:54:39 +0000]
ARM: tegra: dvfs: Update DFLL tune parameters

- Changed Tune1 parameter according to recent characterization results
- Made Tune0 selection forward looking: applied current settings to
possible future speedo ids (if any is introduced).
- Updated CPU DVFS version to p4v12.

Bug 1442659

Change-Id: I3430fc43a3ff045fd6fbcbfddbe5feda4671a727
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/419772
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agosysedp: tn8: Enable sysedp on P1765
Timo Alho [Fri, 6 Jun 2014 20:16:45 +0000]
sysedp: tn8: Enable sysedp on P1765

Change-Id: I94e6e0bd67991c470c0567ada35efcfbbdae3fc1
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/420192
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoRevert "input: touch: raydium: Code drop V73.9"
Xiaohui Tao [Fri, 6 Jun 2014 17:18:16 +0000]
Revert "input: touch: raydium: Code drop V73.9"

This reverts commit 6c8f204fe29c074287147c7fcc3dfdbd61d038df.

Change-Id: Ic688774004109ac2a8e977eb38fe934bbfac586f
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
Reviewed-on: http://git-master/r/420121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: dc: get default mode from EDID
Jong Kim [Thu, 5 Jun 2014 17:56:58 +0000]
video: tegra: dc: get default mode from EDID

Override hard-coded default HDMI mode with the preferred mode
obtained from EDID read. Since the preferred mode is obtained
dynamically from EDID, the default hard-coded HDMI mode is set
to 640x480 @60Hz, which is universally supported.

bug 1495496
bug 200009711

Change-Id: Ib21109ebd5fcff4e0a825d8b20df9357cf08619e
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/393564
(cherry picked from commit 151ac024bc3d27bee424aa33725988e8bf18375d)
Reviewed-on: http://git-master/r/419656
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: thermal: enable pmu support for PM375
Shreshtha Sahu [Thu, 5 Jun 2014 06:47:12 +0000]
arm:  tegra: thermal: enable pmu support for PM375

This patch enables pmu support for soctherm THERMTRIP
on PM375 board.

Bug 200010370

Change-Id: Idb85537794f9036dfc1a0f90090723de24e20ac3
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/419447
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoUpdate from Realtek to resolve speaker pop noise coming back from LP0
Rene Houle [Thu, 29 May 2014 21:52:50 +0000]
Update from Realtek to resolve speaker pop noise coming back from LP0

Bug 200006476

Change-Id: I8269a39840a4e887f8c0405457f9484fd2956e9b
Signed-off-by: Rene Houle <rhoule@nvidia.com>
Reviewed-on: http://git-master/r/418512
Reviewed-by: Pierre Gervais <pgervais@nvidia.com>

5 years agoarm64: nvmap: warn on use of 'uncached' nvmap memory type on arm64
Rich Wiley [Tue, 3 Jun 2014 20:39:00 +0000]
arm64: nvmap: warn on use of 'uncached' nvmap memory type on arm64

Change-Id: I7c6cd5596e6a900996cd8f732285486c69586a6d
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/418487
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm: tegra: thermal: clean up throttle_table show
Diwakar Tundlam [Mon, 2 Jun 2014 22:10:07 +0000]
arm: tegra: thermal: clean up throttle_table show

Change-Id: I87b198a0a28aab722a5ac43b5bfcac860133cfc2
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/417935
Reviewed-by: Automatic_Commit_Validation_User