5 years agoARM: tegra: Interface to read ROSC BIN ISM freq
Sai Gurrappadi [Tue, 14 Jan 2014 21:48:59 +0000]
ARM: tegra: Interface to read ROSC BIN ISM freq

Allows for reading of the Ring oscillator frequency on the JTAG chain of
ROSCs. Performs the read via the APB2JTAG interface.

Bug 1511506

Change-Id: I6797f26c760e178f3d8dc4067b7d50bfce5086f0
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/425050
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: Add apb2jtag read/write interface
Sai Gurrappadi [Tue, 14 Jan 2014 21:47:23 +0000]
ARM: tegra: Add apb2jtag read/write interface

API to read and write from/to APB2JTAG chains.

Bug 1511506

Change-Id: Ib2b881cef9fd9a50e7fcc72c749045750f961008
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/425049
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra13: dvfs: Add GPU SiMon offsets
Alex Frid [Wed, 18 Jun 2014 22:02:24 +0000]
ARM: tegra13: dvfs: Add GPU SiMon offsets

Added GPU Vmin -20mV offset for high SiMon grade on Tegra13 platforms.
Constructed the respective GPU DVFS table with offsets applied, and
SiMon notifier to switch between tables w/wo offset. Since no SiMon
grading is available only original DVFS table with no offset is used
for now.

Bug 1511506

Change-Id: I959ed2142e478b9693a5bc425ef2165b43210bab
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/425035
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra13: dvfs: Specify DFLL tuning SiMon mask
Alex Frid [Wed, 18 Jun 2014 03:53:40 +0000]
ARM: tegra13: dvfs: Specify DFLL tuning SiMon mask

Specified DFLL tuning mask to toggle settings based on SiMon grade.
Changed defaults used before SiMon grade is determined after boot to
slower settings.

Bug 1511506

Change-Id: Ibcf25c418fe0fa10af0778599a701f11a9f90719
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/424908
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra13: dvfs: Add CPU SiMon offsets
Alex Frid [Tue, 17 Jun 2014 23:44:08 +0000]
ARM: tegra13: dvfs: Add CPU SiMon offsets

Added CPU Vmin -20mV offset for high SiMon grade on Tegra13 platforms.
Since no SiMon grading is available this offset is not actually applied.

Bug 1511506

Change-Id: Ia7fa83db6a6ee003c0e1211c8a7fb9ac89630487
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/424907
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: dvfs: Add SiMon grading to DFLL tuning
Alex Frid [Wed, 18 Jun 2014 02:57:15 +0000]
ARM: tegra: dvfs: Add SiMon grading to DFLL tuning

Added dependency of DFLL tuning settings on SiMon grading as follows:

- Selected set of tuning bits specified by platform specific SiMon
mask is toggled when SiMon grade is changing from zero to non-zero
(high) grade, or vice versa.
- The same toggle mask is applied to settings in low and high voltage
tuning ranges.
- SiMon mask can be applied only while DFLL is tuned for low voltage
range

Bug 1511506

Change-Id: I10cb69ea30c7773042c640d41e0dc0c99038ab7d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/424906
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoARM: tegra: Lower VDD_CPU minimum limit
Alex Frid [Wed, 18 Jun 2014 00:50:01 +0000]
ARM: tegra: Lower VDD_CPU minimum limit

Lowered VDD_CPU minimum limit for PMICs used on Tegra13 platforms to
650mV (from 700mV).

Bug 1511506

Change-Id: Ib8c51f75a5a1582aa8c0117ee05ed044de5894a9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/424905
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agovideo: tegra: dsi: fix regulator warning condition
Kerwin Wan [Mon, 23 Jun 2014 06:38:48 +0000]
video: tegra: dsi: fix regulator warning condition

The regulator warning message should come up only when
the regulator fails to be enabled.

Change-Id: Ia03af22281bf4d7a68a19b623d18754dc2512e6d
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/427043
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agonet: wireless: bcmdhd: correct sdio_ids
Nagarjuna Kristam [Tue, 24 Jun 2014 15:07:30 +0000]
net: wireless: bcmdhd: correct sdio_ids

Usage of SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_ANY_ID) is
causing device hang when BRCM chipsets BCM433341 are used.
This is because SDIO_DEVICE MACRO uses, SDIO_ANY_ID for class.

Use SDIO_CLASS_NONE instead resolves device hang issue.

Bug 1527370

Change-Id: I9af6e7598893663afa7629e822a5934f12c128fa
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/427780
(cherry picked from commit eab2794d3420cc31218709410afd0feab48ced6b)
Reviewed-on: http://git-master/r/427779
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: map command buffer if tracing is enabled
Deepak Nibade [Mon, 23 Jun 2014 06:18:06 +0000]
video: tegra: host: map command buffer if tracing is enabled

Map the command buffer only if tracing is enabled.
Buffer mapping is required only for command tracing
otherwise there is no need to map.

Change-Id: If433e1dec78322f415b2f5370d1a6e7b2346c4e9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/427020
(cherry picked from commit e42b2925ca54e8a27a833d1008318a095a18f1e6)
Reviewed-on: http://git-master/r/427655
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: tegra12: config: enable NFS server support
Preetham Chandru R [Mon, 23 Jun 2014 11:35:06 +0000]
ARM: tegra12: config: enable NFS server support

enable NFS server support in kernel

Bug 1517625

Change-Id: I1817432d75622b31e564bd1addccde75e73e5b60
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/427164
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: dc: accept CSC on window update
Jon Mayo [Fri, 13 Jun 2014 00:02:10 +0000]
video: tegra: dc: accept CSC on window update

This patch permits changing of the current CSC coefficients. It cannot be used
with interlaced mode.

Adds fields to skip window CSC programming if nothing has changed.

Bug 1522546

Change-Id: If8fc6a5d634e4b300ef0de6a5913188fe1f1efb0
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/422885
(cherry picked from commit 4aa22cd32362f0d91ef030bc0942c303714141cf)
Reviewed-on: http://git-master/r/425986
GVS: Gerrit_Virtual_Submit
Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com>
Tested-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agosysedp: bowmore: add sysedp_batmon to E1971
Timo Alho [Mon, 23 Jun 2014 10:08:22 +0000]
sysedp: bowmore: add sysedp_batmon to E1971

Change-Id: Ic7fa04925e34eda1cf1de28f599f85de53d14bfa
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/427122
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>

5 years agoARM64: tegra: Move LP0 error message
Sai Gurrappadi [Mon, 23 Jun 2014 18:43:15 +0000]
ARM64: tegra: Move LP0 error message

Moved the LP0 error message that complains about CPU1 not being up on
LP0 entry (cpu_up failed) to a more appropriate location.

Bug 1522953

Change-Id: I9cfa7800779a621ca4563c6aefa7a7b2054ebe4b
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/427264
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peng Du <pdu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoactive-standby: check inode's i_private
Chun Xu [Fri, 16 May 2014 11:18:28 +0000]
active-standby: check inode's i_private

Check whether inode's i_private fild has been changed
before saving current task_strucct pointer to this field.

Bug 200000044

Change-Id: I4a09caf016193801c5841b82e024f8ef41a3763f
Reviewed-on: http://git-master/r/411287
(cherry picked from commit 3fef90e08330c9ed11f84adf8f98492d3b917ddb)
Reviewed-on: http://git-master/r/414844
(cherry picked from commit 3ea271e7ca33bf281a3fba3580865f2c1d85ae0c)
Signed-off-by: Chun Xu <chunx@nvidia.com>
Reviewed-on: http://git-master/r/427088
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra dvfs: Keep DVFS rate for disabled GPU clock
Alex Frid [Sat, 21 Jun 2014 07:52:37 +0000]
ARM: tegra dvfs: Keep DVFS rate for disabled GPU clock

Preserved DVFS rate for single clock GPU rail when clock is disabled
(instead of setting zero rate). In this case GPU rail is turned off
explicitly, anyway. However with non-zero DVFS rate voltage level at
regulator is appropriately updated when temperature is changes while
rail is off.

Bug 1526819

Change-Id: I022d908a47be81efbe37d8a777e93b1fec74e7e7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/426917
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoarm: tegra: pinmux : enable e_input of sdmmc clk
Seema Khowala [Fri, 20 Jun 2014 18:36:30 +0000]
arm: tegra: pinmux : enable e_input of sdmmc clk

For all SDMMC controllers, E_INPUT of CLK pad should be
enabled since loopback CLK (Zi of CLK pad) is used to
latch RESP/DATA coming from external device.
If not enabled, you will see RESP/DATA time outs.

Bug 1521217

Change-Id: I66e9bb98d1d1740fc519001f93d45a7baaba46fa
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/426671
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agocpu: enhance power efficiency
Sumit Singh [Mon, 21 Apr 2014 09:59:54 +0000]
cpu: enhance power efficiency

Here we are trying to reduce power usage through the
use of macros cpu_relaxed_read and relaxed version of
idle_cpu().

Bug 1440421

Change-Id: I0a8c5d358c154782b41570059d03d7e0de87e82c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/426485
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agosched: defining relaxed version of idle_cpu
Sumit Singh [Mon, 21 Apr 2014 09:55:25 +0000]
sched: defining relaxed version of idle_cpu

Defining relaxed version of idle_cpu, which uses
macro cpu_relaxed_read_long, that will be used to
enhance power efficiency.

bug 1440421

Change-Id: I6ba2185632ad0fba766a2548b0ddac743defb1b9
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/426484
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agollist: defining relaxed version of llist_empty
Sumit Singh [Mon, 21 Apr 2014 09:52:15 +0000]
llist: defining relaxed version of llist_empty

Defining relaxed version of llist_empty as llist_empty_relaxed,
which will be used for power-optimization.

bug 1440421

Change-Id: I1c4c34b381e49775ed08ddd606d9744a7e7e1fba
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/426483
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agosmp: enhance power efficiency
Sumit Singh [Mon, 21 Apr 2014 05:39:58 +0000]
smp: enhance power efficiency

Here we are trying to reduce power usage through the
use of macros cpu_relaxed_read_short and cpu_relaxed_read.

Bug 1440421

Change-Id: I114d122cf58b1cf7b93b4b5f5d712360a2f1e096
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/425947
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: Tegra: thermal: add Tksin parameters for t132
Hyungwoo Yang [Tue, 17 Jun 2014 18:22:56 +0000]
ARM: Tegra: thermal: add Tksin parameters for t132

Adds Tskin parameters for T132

Bug 1524981

Change-Id: I8b9b96f1b47478b9d70a4167dcee0ca72e192a71
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Reviewed-on: http://git-master/r/424325
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoseqlock: enhance power efficiency
Sumit Singh [Mon, 21 Apr 2014 12:42:14 +0000]
seqlock: enhance power efficiency

Trying to improve the power efficiency in linux/seqlock.h,
using macros cpu_relaxed_read and cpu_read_relax.

Bug 1440421

Change-Id: I8dcc9dc9c72e5a6848c7823768c76f5d38e9f0d1
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398943
(cherry picked from commit ed77ee4d50641b1a5668545c946cda681c06fcd2)
Reviewed-on: http://git-master/r/422258
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agonvdumper: Null pointer check before reference it.
Yifei Wan [Tue, 27 May 2014 22:35:38 +0000]
nvdumper: Null pointer check before reference it.

- Fixed NULL pointer check before reference it.
- Also fixed some type cast warning message.

Bug 1517779

Change-Id: I8584017be83884f45e3f01a6fec60244440469c4
Signed-off-by: Yifei Wan <ywan@nvidia.com>
Reviewed-on: http://git-master/r/415443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Peters <mpeters@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm64: tegra: Fix cpu_to_csr_reg macro
Antti P Miettinen [Mon, 16 Dec 2013 06:56:28 +0000]
arm64: tegra: Fix cpu_to_csr_reg macro

Add the missing jump.

Change-Id: I85f7d9a89362529b6909fe56376e9ac9d8b4dfd2
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/345674
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/426713
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra: pm375: add jetson-tk1 references
Prabhu Kuttiyam [Tue, 6 May 2014 20:03:14 +0000]
ARM: tegra: pm375: add jetson-tk1 references

This commit adds jetson-tk1 compatible reference checks
to the architecture code.

bug 1509239

Change-Id: I859452a0c8705b6fda8e1739906eb78f2b0527b2
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/406016
(cherry picked from commit f2e5dba37b8a5750b3a516e6c7bcfb0b603bca53)
Reviewed-on: http://git-master/r/418545
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

5 years agosync: add API to get syncpt name
Shridhar Rasal [Wed, 4 Jun 2014 12:12:18 +0000]
sync: add API to get syncpt name

Currently, we print only syncpoint id and on sync timeout.
Also print syncpoint name in dump.

Bug 200007874

Change-Id: Ia28a5b12b037a0b718bd4e5727f20c19d8badd87
Reviewed-on: http://git-master/r/418926
(cherry picked from commit e79d93d205ca2daba2974745113088222fa90297)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/426604
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: add callback for android sync ops get_pt_name
Shridhar Rasal [Wed, 4 Jun 2014 12:07:30 +0000]
video: tegra: host: add callback for android sync ops get_pt_name

Add callback in nvhost sync for android sync ops get_pt_name

Bug 200007874

Change-Id: I39e04583bc30312d73f12dccac7706e9216e3c24
Reviewed-on: http://git-master/r/418925
(cherry picked from commit 051aa941b5fb6d95c3d07eb93495e6f1b6961faa)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/426597
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoRevert "extcon: palmas: make aca detection platform dependent"
Laxman Dewangan [Wed, 18 Jun 2014 14:36:31 +0000]
Revert "extcon: palmas: make aca detection platform dependent"

This reverts commit aa55d35202b5895068bdf8eace842102bf134dab.
Revert the change becasue it breaks the VUS and ID detection. With this change
on some platforms, the VBUS and ID both are detected even only connnect the
VBUS cable. This causes misbehaving of the drivers.

bug 200013069

Change-Id: I8b10c9a7c1b0520c83118245a5e85c61e9777c81
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/424815
(cherry picked from commit 992d7b8c03b4787c4fa37a90804008eff4ce48b4)
Reviewed-on: http://git-master/r/427032
GVS: Gerrit_Virtual_Submit

5 years agopower: extcon: fix charging icon during bootup
Rakesh Bodla [Thu, 19 Jun 2014 11:27:44 +0000]
power: extcon: fix charging icon during bootup

If device is booted with charger cable, in probe
y-cable extcon dev reports no cable is connected
and cable connection status is getting corrupted.
Fixing this by adding suitable condition.

Bug 1522950

Change-Id: I5cee5953665338c500bf484ebc38cc5ce42c9ae0
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/425967
(cherry picked from commit 1e3be7bc384c4bd834729b216f137c7962e6dc36)
Reviewed-on: http://git-master/r/426949
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: host: return syncpt name given ID
Shridhar Rasal [Wed, 4 Jun 2014 11:46:30 +0000]
video: tegra: host: return syncpt name given ID

Add API to return syncpt name for a given sync point ID.

Bug 200007874

Change-Id: I85983881f2f2f266cae1f5d682d7072edc9a8c1f
Reviewed-on: http://git-master/r/418918
(cherry picked from commit 7473a184b4e7329be80e0bd915f0710391d27a26)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/426605
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoUSB: gadget: f_audio_source: change packet size to 256
Ravindra Lokhande [Tue, 31 Dec 2013 12:45:49 +0000]
USB: gadget: f_audio_source: change packet size to 256

Bug 1327528

Change-Id: Idc243389486ab9121826787ae85475458fa18506
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/351034
(cherry picked from commit 038389830a31bb00dc4851922e08caa617af8a80)
Reviewed-on: http://git-master/r/426590
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoregulator: as3722: adjust enable_time for regulators
Bibek Basu [Wed, 11 Jun 2014 10:50:00 +0000]
regulator: as3722: adjust enable_time for regulators

According to measurement done, LDOs take a maximum of
100us to reach it max desired value.Thus this patch adjusts
the default enable time for as3722 regulators

Bug 1481647

Change-Id: Ia610e0a11f1001fdf76b2860b6e2b3d6ed0a1b1a
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/422152
(cherry picked from commit 21e2115f4021ec02a37e6ce03e14232306c633a9)
Reviewed-on: http://git-master/r/423674
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agotn8: modem: reduce timeout wakelock to 1s
Robert Shih [Thu, 5 Jun 2014 05:25:09 +0000]
tn8: modem: reduce timeout wakelock to 1s

1. The kernel resume (from LP0 to the time
when app tasks start unfreezing) is shorter than 200ms.
When app tasks start running, the RIL/framework/app
will hold their wake lock to block suspending.
Furthermore, tegra_usb_modem_post_remote_wakeup()
in tegra_usb_modem_power.c will hold another timeout
(1 second) wake lock, which should start later than
the wake lock "tegra-ehci.1".
So, 1s timeout for wake lock "tegra-ehci.1" in kernel
should be enough.

2. Per our experience, many system resume/suspend
(with screen off) caused by remote wake-up is
able to finish in 1.5 seconds, or even shorter.
So, 3 seconds timeout could cause more unnecessary
power consumption.

bug 1519797

Change-Id: If7b20ea490007e1df0639b4ece8f32fdb3fa757e
Signed-off-by: Robert Shih <rshih@nvidia.com>
Reviewed-on: http://git-master/r/419279
(cherry picked from commit 3ee5cc88a7db04b2087937e8ddb27f69ab934544)
Reviewed-on: http://git-master/r/423626
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Martin Chi <mchi@nvidia.com>
Tested-by: Martin Chi <mchi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agosync: add current value to sync dump
Shridhar Rasal [Tue, 3 Jun 2014 06:55:38 +0000]
sync: add current value to sync dump

Currently, we print only syncpoint id and thresh value on sync
timeout.

Also include current value in dump.

Bug 200007874

Change-Id: I6910e51aa10a5dc9f5d224b3251c3fb1ea6794d9
Reviewed-on: http://git-master/r/418136
(cherry picked from commit 41d63f2a1c48faeee4d9444818ada132968b7bc8)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/418739
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agopinctrl: tegra: fix tegra_pinctrl_disable
Kerwin Wan [Fri, 20 Jun 2014 05:46:41 +0000]
pinctrl: tegra: fix tegra_pinctrl_disable

The value written to mux_reg should be from 0 to 3
to select the proper function.

Change-Id: Ie056189332c839588eeca1d210f264482a73995a
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/426477
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agothermal: check tz device is registered
Jinyoung Park [Tue, 17 Jun 2014 08:03:51 +0000]
thermal: check tz device is registered

Checking thermal zone device whether it is registered or not.

Bug 200011588

Change-Id: I377583f887d3dbe8258daa46d777daa6337b192f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/424088
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agousb: free up composite gadget string ids on unbind
Rakesh Bodla [Thu, 5 Jun 2014 06:31:12 +0000]
usb: free up composite gadget string ids on unbind

There are only 254 USB composite gadget string_ids available.
When switching gadget mode such as mtp and acm repeatedly,
they will be exhausted.

This bug has been brought up since android composite driver
introduced a way to switch gadget modes while the composite
driver is still holding its bind.

Fix this by reset next_string_id and clean up gstrings when
android gadgets are disabled. Also by removing the condition
comparing gadgets' string id to 0 because gadget string id
has to be re-assigned whenever the string count is reset.

The codes removed the condition check will work as the same
as before they have changed if the gadgets are used by other
composite drivers other than android since all of them call
bind only once and never unbind it hence no side effects considered.

Ported from https://android-review.googlesource.com/#/c/95366/

Bug 200001941

Change-Id: I1e2fbe0f59fe05b89052db62e0b61b074d8f032b
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/425165
(cherry picked from commit fc71534a90787bd763b7bd0f7c698b76b66ad251)
Reviewed-on: http://git-master/r/419340
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: dc: initialize cursor registers
Jon Mayo [Fri, 9 May 2014 18:07:17 +0000]
video: tegra: dc: initialize cursor registers

Cursor registers have no default state. Initialize to useful defaults.

Bug 1486452
Bug 200006001

Change-Id: Iaf07bdd2c8d40ef1bae881da68a809d335a0377f
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/407682
(cherry picked from commit 4ded39f37b849849ebca44ab46e2762d71872102)
Reviewed-on: http://git-master/r/425997
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agofutex : Forbid uaddr == uaddr2 in futex_requeue(..., requeue_pi=1)
Thomas Gleixner [Tue, 3 Jun 2014 12:27:06 +0000]
futex : Forbid uaddr == uaddr2 in futex_requeue(..., requeue_pi=1)
Bug 200012742

futex-prevent-requeue-pi-on-same-futex.patch futex: Forbid uaddr == uaddr2 in futex_requeue(..., requeue_pi=1)

If uaddr == uaddr2, then we have broken the rule of only requeueing from
a non-pi futex to a pi futex with this call.  If we attempt this, then
dangling pointers may be left for rt_waiter resulting in an exploitable
condition.

This change brings futex_requeue() in line with futex_wait_requeue_pi()
which performs the same check as per commit 6f7b0a2a5c0f ("futex: Forbid
uaddr == uaddr2 in futex_wait_requeue_pi()")

[ tglx: Compare the resulting keys as well, as uaddrs might be
   different depending on the mapping ]

Fixes CVE-2014-3153.

Reported-by: Pinkie Pie
Signed-off-by: Will Drewry <wad@chromium.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: I98b5f95d3f5c9e4d35c3aeec22960fdb34731c18
Reviewed-on: http://git-master/r/424612
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: nvmap: track vma for all handles
Krishna Reddy [Wed, 4 Jun 2014 21:50:05 +0000]
video: tegra: nvmap: track vma for all handles

Clean up the code related to mmap and handle nvmap_map_info_caller_ptr
failures graciously.
Initilize h->vmas at right place.
Add sanity checks in nvmap_vma_open/_close.

Bug 1519700

Change-Id: Iede355b8a500a787992fcb23a72cf334a737ec49
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/419168
(cherry picked from commit c18228c5de319d74f68deff9c5d402ca17b64e95)
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/426092
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: fix strapping register offset
Shardar Shariff Md [Wed, 18 Jun 2014 08:48:36 +0000]
arm: tegra: fix strapping register offset

Fix strapping register offset and length for
T124/T132.

Bug 1515120

Change-Id: I2ac07667f58b4d99001e4d168adaec0cda9da62a
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/424631
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agonet: wireless: bcmdhd: correct sdio_ids
Nagarjuna Kristam [Thu, 19 Jun 2014 10:42:02 +0000]
net: wireless: bcmdhd: correct sdio_ids

BCMDHD driver uses SDIO_DEVICE_CLASS(SDIO_CLASS_NONE) ID during
sdio register process. This causes brcm driver execution, when other
SDIO peripherals with class 0 are used.
Replace SDIO_DEVICE_CLASS(SDIO_CLASS_NONE) usage by
SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_ANY_ID), to ensure bcmdhd
driver execution for Broadcom only hardware.

Bug 200013331

Change-Id: Ia31be2940b7e523e30c0740155a567e324da6be1
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/424260
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agodma: coherent: error handling on heap resize failure
Deepak Nibade [Tue, 10 Jun 2014 13:21:00 +0000]
dma: coherent: error handling on heap resize failure

- Update memory resize callbacks to return error codes
- error handling on heap resize update failure

Bug 1487804
Bug 1517584

Change-Id: I5ac044677e883fbecf6d04a8c1e83794325703f3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/423748
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: add return value for VPR resize function
Deepak Nibade [Tue, 10 Jun 2014 13:24:18 +0000]
ARM: tegra: add return value for VPR resize function

Bug 1487804

Change-Id: I28a44499a1a434f555f4c5206add6aeb6b92e01a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/423747
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agofs : adding null pointer check in set_worker_desc
Ishan Mittal [Wed, 11 Jun 2014 05:33:00 +0000]
fs : adding null pointer check in set_worker_desc

The Bug was due to the following control flow

remove disk
 bdi_destroy()
  bdi_unregister()
   bdi->dev = NULL (bdi_writeback_workfn)

Bug 200011038

Change-Id: I3710c5b3f2106c14807bd8a5eea8a030312c8d6c
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-on: http://git-master/r/421995
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agovideo: tegra: dp: eDP/miniDP support
Sungwook Kim [Tue, 25 Mar 2014 11:26:16 +0000]
video: tegra: dp: eDP/miniDP support

To add a support for an internal eDP panel or an external DP
monitor

- reduce the HPD waiting time to reasonable
- fix Alternate Scrambler Reset To 0xFFFE setting to support an
  external DP monitor
- fix unplugged eDP/miniDP display at boot time blocking detection
  of the HDMI display
- disable dpaux clock and pad power when no eDP panel or external
  monitor connected at boot time

Note: It works with the eDP panel or the monitor connected only at
      boot time.  No run-time hot plug support yet.
Note2: Reposting due the Gerrit bug.

bug 1409738

Change-Id: I81b8bab8881a6d849d97562deabd16fe794ff812
Signed-off-by: Sungwook Kim <sungwookk@nvidia.com>
Reviewed-on: http://git-master/r/405512
(cherry picked from commit 199b1034b39f2a133623e5645e378c5a9abd1c81)
Reviewed-on: http://git-master/r/420122
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm64: tegra132: enter C6 for hotplug
Peng Du [Wed, 11 Jun 2014 20:45:03 +0000]
arm64: tegra132: enter C6 for hotplug

Bug 1522953

Change-Id: Icb7fff057326a72a243037d3d64b88f99ac4fe68
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/422795
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agotegra: ictlr: correct the base address of init
Sang-Hun Lee [Tue, 17 Jun 2014 23:35:49 +0000]
tegra: ictlr: correct the base address of init

 - The initilization of the mselect register was being done
   against the hier_ictlr register base address, instead of
   the mselect register base address. Correct the address
   to the mselect register base

Bug 1519537

Change-Id: I2de684e26ff21b4034ed5493a5991e31d01b75c1
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/424959
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomisc: tegra-profiler: squashed update to ver. 1.75
Igor Nabirushkin [Wed, 18 Jun 2014 12:59:33 +0000]
misc: tegra-profiler: squashed update to ver. 1.75

commit f8c056c12c7b72290c47afadaf8b2f16336b3238
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 11:57:52 2014 +0400

    misc: tegra-profiler: mixed backtraces

    Unwinding: switch from code with frame pointers to code
    with unwind tables.

    Bug 1487488

    Change-Id: I254a8fd762b5312f854db1fe79635a2b419091f0
    Reviewed-on: http://git-master/r/419384

commit a1d7f98fb15d4578cd140fe03a4c748e1db86c57
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 11:08:55 2014 +0400

    misc: tegra-profiler: add sched samples

    Tegra Profiler: capture task starting being scheduled on a core.
    Add sched in/out samples.

    Bug 1520808

    Change-Id: I2c62e5c1918bdba0fc997d79d8aeb3b7b63530f0
    Reviewed-on: http://git-master/r/419352

commit 6f847fd1257af28fc11b942a2f3b3dfc7eb4579f
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 09:52:29 2014 +0400

    misc: tegra-profiler: use cntvct as time source

    Tegra Profiler: use Virtual Count register (CNTVCT) as
    time source.

    Bug 1508327

    Change-Id: If37e2dbe0a256ec28575d7c1b7d601d6bc1090f5
    Reviewed-on: http://git-master/r/419305

commit d79e4f5292dae4cccb510be2b47f4ee00baa53d7
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 09:10:47 2014 +0400

    misc: tegra-profiler: get perfmon extension

    Add version of the ARMv8 NVIDIA perfmon extension to
    device capabilities.

    Bug 1520757

    Change-Id: I18d10133272a10e3faf5022b4579c7dfea78791e
    Reviewed-on: http://git-master/r/419274

commit afedef10f26475b98b7d42ab3bab6f0c2fbb6eae
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Mon May 19 16:49:19 2014 +0400

    misc: tegra-profiler: fix hang up bug for Norrin

    Do not use probe_kernel_address.
    Actually, it is not safe on Norrin: this can lead to system crash.

    Bug 200005974
    Bug 1522252

    Change-Id: If8bae9afd7c7e1bbb5beaf430c0c61f552aeb036
    Reviewed-on: http://git-master/r/411507

commit 1b4c5247c0ab284dbed25683cbfa5a301da787ff
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 12:49:15 2014 +0400

    misc: tegra-profiler: add unwind information

    Tegra Profiler: add additional unwind information
    for each call entry.

    Bug 1514626

    Change-Id: I2873941a4c903e0e7e909897ead55eb34d80b966
    Reviewed-on: http://git-master/r/410770

commit b2f593d9bb00a380d4402f2a8cd9ed8d9646dcbd
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 12:05:36 2014 +0400

    misc: tegra-profiler: fixed recursive call chains

    In some cases, recursive call chains can be broken.
    This patch fixes this problem.

    Bug 200005395

    Change-Id: I7d31ec64b004109c3684cf0d143d9b1d6cd59f9f
    Reviewed-on: http://git-master/r/410745

commit 6c9f626340a81daf124d4bbeff2254f63cc084b7
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 11:24:50 2014 +0400

    misc: tegra-profiler: support too deep stack level

    Too deep stack level: handle it properly.
    Appropriate unwind reason code has been added.

    Unwinding based on frame pointers: add unwind reason codes.

    Bug 200005380

    Change-Id: I2199df90c746ada6a7f224a8b675638b69dc6da8
    Reviewed-on: http://git-master/r/410717

commit ddea2fc86588bdf3ae313a270364052a0beab160
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 10:44:06 2014 +0400

    misc: tegra-profiler: fix setup bug

    * Fix bug that happens when using non-standard profiling frequencies
    * Allow root user to use any frequency in range [100 Hz; 100 kHz]

    Bug 200005366

    Change-Id: I9a07e2c9c1fec6d61f34009d1975ea7f5d0e2592
    Reviewed-on: http://git-master/r/410705

commit 5c64bcefc4b3df0ba9612cd67703593d488ab38c
Author: Deepak Nibade <dnibade@nvidia.com>
Date:   Mon May 19 15:48:02 2014 +0530

    misc: tegra-profiler: fix resource leaks

    Fix Coverity issue of resource leaks
    Coverity id : 26481
    Coverity id : 26483

    Bug 1416640

    Change-Id: Ib71950f196b5421ccbc21b3ac8d620e790e83366
    Reviewed-on: http://git-master/r/411421

commit 2f5d99b96ba18129f6c708e3db9a1e32da24816f
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Tue May 6 09:47:02 2014 +0400

    tegra-profiler: add access to the exception tables

    Tegra Profiler: add access to the exception tables via mmap areas.
    Do not read directly from the user space.

    Bug 200002243

    Change-Id: I442daaecb11fd4416b3e485722efdf34234e0241
    Reviewed-on: http://git-master/r/405671

commit 218d8cc8a573da49145c7104258fb290c83205b9
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Apr 17 13:02:07 2014 +0400

    misc: tegra-profiler: unwinding: use RCU locking

    Unwinding: use RCU locking instead of spinlocks to protect
    map of regions.

    Bug 1502205

    Change-Id: If1089b74b1f317eeaae5059de40d7a3365ae4061
    Reviewed-on: http://git-master/r/397599

Change-Id: I1ac2a5a290f723cab40463932c0a814a670cf9e7
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/424787
GVS: Gerrit_Virtual_Submit
Tested-by: Daniel Horowitz <dhorowitz@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: soctherm: fix pskip bypass program
Diwakar Tundlam [Fri, 13 Jun 2014 23:13:17 +0000]
arm: tegra: soctherm: fix pskip bypass program

Fix PSKIP configuration in soctherm for T132 chipset.
Bypass ramp rate only in soctherm, but program the similar
registers in ccroc the same as before as in soctherm for
correct throttling behavior.

Also added a clear comment noting the restriction of mapping
throttling_depth string and actual throttle depth configuration
in T13x due to indirect vector-based throttle selection.

Change-Id: I86635101fc61229e54b22db67f134917e6a7e0aa
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/423359
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>

5 years agoRevert "drivers: misc: Put CPU1 online before LP0"
Sai Gurrappadi [Thu, 12 Jun 2014 20:12:18 +0000]
Revert "drivers: misc: Put CPU1 online before LP0"

This reverts commit 7e2ffe6c059b6fbae01480605e5aef8093e5fb4c.

No longer need this WAR here as it has been better implemented in pm.c
by setting the suspend_in_progress flag earlier on the suspend path.

Bug 1522953

Change-Id: Ib1dca4e1c0babca2895d9ab751a6b7df4f039011
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/422816
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peng Du <pdu@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM64: tegra: Set suspend_in_progress flag early
Sai Gurrappadi [Thu, 12 Jun 2014 20:07:08 +0000]
ARM64: tegra: Set suspend_in_progress flag early

Set the suspend_in_progress flag early in suspend_prepare and call
cpu_up on offline CPUs to get them out of C6 on suspend. This ensures
that all CPUs (CPU1) are in C7 before LP0 is requested.

Bug 1522953

Change-Id: I7f74f0afb2bfda92c03cc20262a6acaf8716d034
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/422815
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peng Du <pdu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agogpu: nvgpu: do not idle timed out channels
Deepak Nibade [Thu, 12 Jun 2014 13:58:15 +0000]
gpu: nvgpu: do not idle timed out channels

While suspending the device, do not submit WFI on
timed out channels

Submitting WFI on timed out channels will cuase submit_wfi()
to return error and as result of this, rail gating of device
will be prevented

Bug 200010416

Change-Id: Ic097bfdae59dbf9e1f2aea5d8d0431b5f1c3721b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/422743
(cherry picked from commit 9ac601c0035240f6bacc3c42c5cc9e7b85a65456)
Reviewed-on: http://git-master/r/424542
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: bail out from poweroff if channel suspend fails
Deepak Nibade [Wed, 11 Jun 2014 13:52:51 +0000]
gpu: nvgpu: bail out from poweroff if channel suspend fails

During gk20a_pm_prepare_poweroff(), if call to gk20a_channel_suspend()
fails, we proceed to disable other components and then return error.
But when genpd sees the error, it will abort the suspend sequence and
keep the device state as active.

But since we have already disabled all the components, GPU lands in
invalid state.

Hence, if channel_suspend() fails then do not proceed but return
the error immediately

Bug 200010416

Change-Id: I553a2a25832a1be4941bb6b6ce490c950cdbe7fa
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/422248
(cherry picked from commit 7352415a206b6bec41c762085e49efec5036dec9)
Reviewed-on: http://git-master/r/424541
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: host: fix setclass order in gather submit
Deepak Nibade [Mon, 16 Jun 2014 10:25:43 +0000]
video: tegra: host: fix setclass order in gather submit

We submit gathers in submit_gathers() as below :
1) set class to class id sent from user space
2) call add_sync_waits() which sets class to HOST1X
   and adds host waits
3) and then we proceed to insert gathers sent from user space
   (which now see wrong class id set i.e. HOST1X)

This results in setting wrong class ids and causes
abnormal behaviour

To fix this, rewrite this sequnce as below :
1) call add_sync_waits() which sets class to HOST1X
   and adds host waits
2) set class to class id sent from user space
3) and then we proceed to insert gathers sent from user space
   (and now we have correct class id set for this gather)

Bug 1521367

Change-Id: Ifef00ae8b4431ea440ac6f9048111a3136e3bb3e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/423707
(cherry picked from commit 83d938ee3ad390298768b2267fb157799cee610b)
Reviewed-on: http://git-master/r/424540
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agopcie: host: tegra: Update prod setting for Gen2
Jay Agarwal [Thu, 12 Jun 2014 10:28:40 +0000]
pcie: host: tegra: Update prod setting for Gen2

Update prod settings for Gen2 High Swing TX
Amplitude

Bug 1476459

Reviewed-on: http://git-master/r/422694
(cherry picked from commit 82af7145023762ee27ebc0cede3c9163ea1e6ef1)

Change-Id: Id967133f6e22ccad7ba7f46c56c57a4984e53686
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/424189
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agooom_kill: add rcu_read_lock() into find_lock_task_mm()
Oleg Nesterov [Tue, 21 Jan 2014 23:50:01 +0000]
oom_kill: add rcu_read_lock() into find_lock_task_mm()

find_lock_task_mm() expects it is called under rcu or tasklist lock, but
it seems that at least oom_unkillable_task()->task_in_mem_cgroup() and
mem_cgroup_out_of_memory()->oom_badness() can call it lockless.

Perhaps we could fix the callers, but this patch simply adds rcu lock
into find_lock_task_mm().  This also allows to simplify a bit one of its
callers, oom_kill_process().

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Cc: Sergey Dyasly <dserrg@gmail.com>
Cc: Sameer Nanda <snanda@chromium.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: "Ma, Xindong" <xindong.ma@intel.com>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: "Tu, Xiaobing" <xiaobing.tu@intel.com>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: I5f214dec13b34e05c4b5fc8bc29df3ab7400efa1
Reviewed-on: http://git-master/r/421705
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Kerwin Wan <kerwinw@nvidia.com>

5 years agooom_kill: has_intersects_mems_allowed() needs rcu_read_lock()
Oleg Nesterov [Tue, 21 Jan 2014 23:50:00 +0000]
oom_kill: has_intersects_mems_allowed() needs rcu_read_lock()

At least out_of_memory() calls has_intersects_mems_allowed() without
even rcu_read_lock(), this is obviously buggy.

Add the necessary rcu_read_lock().  This means that we can not simply
return from the loop, we need "bool ret" and "break".

While at it, swap the names of task_struct's (the argument and the
local).  This cleans up the code a little bit and avoids the unnecessary
initialization.

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: Sergey Dyasly <dserrg@gmail.com>
Tested-by: Sergey Dyasly <dserrg@gmail.com>
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: "Ma, Xindong" <xindong.ma@intel.com>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: "Tu, Xiaobing" <xiaobing.tu@intel.com>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: Iee512a4e3446b1ec8fb7fcc434f1cf18a13a5645
Reviewed-on: http://git-master/r/421704
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Kerwin Wan <kerwinw@nvidia.com>

5 years agogpu: nvgpu: Remove extraneous FB flush calls
Terje Bergstrom [Mon, 12 May 2014 12:14:05 +0000]
gpu: nvgpu: Remove extraneous FB flush calls

gk20a_mm_fb_flush() invoked G_ELPG_FLUSH and FB_FLUSH. Remove the
invokation of G_ELPG_FLUSH. Replace calls to gk20a_mm_fb_flush() with
gk20a_mm_l2_flush() when appropriate.

Bug 1421824

Change-Id: I02af4bdc3b7bd26d0f6a8d610f70349269775a36
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408210
(cherry picked from commit f02f34a8d214d883c949ab55fe872d4176a21bc5)
Reviewed-on: http://git-master/r/423230
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: When rail gating, flush only once
Terje Bergstrom [Mon, 12 May 2014 12:00:43 +0000]
gpu: nvgpu: When rail gating, flush only once

When rail gating invoke G_ELPG_FLUSH only once.

Bug 1421824

Change-Id: Ibde0e32b212e3b030e69a9cb837c87789887aabb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408209
(cherry picked from commit 7c8c12eef2e4ce132b5cec239dc59b24888f4c9c)
Reviewed-on: http://git-master/r/412482
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoPM / Runtime: Fix error path for prepare
Ulf Hansson [Wed, 13 Nov 2013 14:45:03 +0000]
PM / Runtime: Fix error path for prepare

If a device prepare callback for some reason would fail, the PM core
prevented the device from going inactive forever.

In this case, to reverse the pm_runtime_get_noresume() we invokes the
asyncronous pm_runtime_put(), thus restoring the usage count.

bug 1518244

Change-Id: Ia4984630e71abeb55ef90a19799d1fea700b2148
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit aa1b9f13b3346352455bfdc343ecff7667b84ff5)
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/423999
Reviewed-on: http://git-master/r/424177
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agospi: tegra114: Move IST work to caller thread
Shardar Shariff Md [Tue, 22 Apr 2014 10:03:00 +0000]
spi: tegra114: Move IST work to caller thread

Remove IST(interrupt service thread) and move
that functionality to caller thread

Bug 1501764

Change-Id: Id310c75939be62a5121f2b2f68f14a146256b4aa
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/399627
(cherry picked from commit f6366d4f846425bbfa0d8e919a974eff7429862f)
Reviewed-on: http://git-master/r/424075
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: tegra132: tn8: Set vdd_rtc to static 0.95V
Hunk Lin [Fri, 6 Jun 2014 03:25:58 +0000]
arm64: tegra132: tn8: Set vdd_rtc to static 0.95V

It is from characterization team's request since there is no rtc tracking
in TN8.

Bug 1519080

Change-Id: Ic773aac0bcd443723dba498488a8b5864db1b36b
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/419840
(cherry picked from commit dff02e75865cd08e8bbdd69574b3610bfbc49259)
Reviewed-on: http://git-master/r/421372
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/424037
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: gadget: tegra: reset extcon state in cable disconnect
Rakesh Bodla [Thu, 12 Jun 2014 11:44:29 +0000]
usb: gadget: tegra: reset extcon state in cable disconnect

For QC2.0 charger we set two cable types. Resetting the
extcon state during cable disconnect so that all the
cables types are cleared.

Bug 200011709

Change-Id: I3e5bf896869045f5eefb68723411abbc864ae76d
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/422715
(cherry picked from commit b546521e81a106c1aea35d3198fc135b67e64913)
Reviewed-on: http://git-master/r/423473
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: ardbeg: support 4K HDMI monitor
Jong Kim [Fri, 13 Jun 2014 23:15:18 +0000]
ARM: tegra: ardbeg: support 4K HDMI monitor

Change tegra_fb2_size for 4K HDMI monitor support.

bug 200001130

Change-Id: I9e89dac7f602f74d1cdd761f05d1af2439c47add
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/423425
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: Prune redundant cache maintenance
Terje Bergstrom [Thu, 8 May 2014 12:13:32 +0000]
gpu: nvgpu: Prune redundant cache maintenance

Remove redundant cache maintenance operations. Instance blocks and
graphics context buffers are uncached, so they do not need any cache
maintenance.

Bug 1421824

Change-Id: Ie0be67bf0be493d9ec9e6f8226f2f9359cba9f54
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406948
(cherry picked from commit 179d6ff3b2845e99d1719a9ba10862f2d3b22080)
Reviewed-on: http://git-master/r/423229
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoarm64: tegra: hotplug support for Denver hardwoord
Peng Du [Fri, 2 May 2014 19:00:04 +0000]
arm64: tegra: hotplug support for Denver hardwoord

Change-Id: Ifb524fe0a7061371136c380218fca8bc762b38ea
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/407169
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoARM: dt: fix 64 bit mem size in E1791
Ishwarya Balaji Gururajan [Thu, 29 May 2014 00:39:45 +0000]
ARM: dt: fix 64 bit mem size in E1791

update address/size of memory-controller
node to 64 bit

Bug 1396089

Change-Id: I1d83959edf990a7d2a179152ac07aa9c87ff903c
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/416393
(cherry picked from commit 2bf9ad2147e328c073fad29e0f8e80d65f173fcf)
Reviewed-on: http://git-master/r/423808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoRevert "Revert "input: touch: raydium: Code drop V73.9""
Seema Khowala [Fri, 13 Jun 2014 17:18:30 +0000]
Revert "Revert "input: touch: raydium: Code drop V73.9""

This reverts commit 96ec201230966872c1c4b3b2197c6e457f0236e0.

Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Change-Id: Ie7127c66af2fa20ede0d512dc0d1d08499d2a8be
Reviewed-on: http://git-master/r/423316
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra124: PM375: update soc0 machine name
Prabhu Kuttiyam [Fri, 14 Mar 2014 00:50:56 +0000]
arm: tegra124: PM375: update soc0 machine name

This commit adds a new machine name for PM375 boards.

bug 1395699

Change-Id: Ia07b86a03e2457b192095b0bb01cc7ee900641d7
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/381774
(cherry picked from commit 03b586d56df60b73d211c4b834adffa5990fb93c)
Reviewed-on: http://git-master/r/418544
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>

5 years agostaging: iio: light: cm3217: remove pm ops
Sri Krishna chowdary [Mon, 26 May 2014 16:56:17 +0000]
staging: iio: light: cm3217: remove pm ops

Remove suspend and resume pm ops as sensorservice takes
care of activate/deactivate of sensor as required.

Also, put the device to standby mode if regulator is still enabled.

Change-Id: I5169409f679319fe42c89d7debd305c5c885fd15
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/415042
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: dtb: norrin: enable powergood_ac_ok_mask
Bibek Basu [Fri, 13 Jun 2014 04:37:52 +0000]
ARM: dtb: norrin: enable powergood_ac_ok_mask

Enable ac_ok_mask for OC_PG signal

Bug 1518725
Bug 1419425

Change-Id: Ief0ab18d80551b2f4c55090bcccf1f3c573569c8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423037
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: Documentation for oc_pg_ctrl masking
Bibek Basu [Fri, 13 Jun 2014 09:19:16 +0000]
mfd: as3722: Documentation for oc_pg_ctrl masking

Update Documentation for device tree update for
optional oc_pg_ctrl_masking feature

Bug 1518725
Bug 1419425

Change-Id: I309533849d48d61aefebd8f477e79b79ed4127fb
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423185
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agomfd: as3722: add oc_pg_ctrl enabling support
Bibek Basu [Fri, 13 Jun 2014 04:16:39 +0000]
mfd: as3722: add oc_pg_ctrl enabling support

Based on DT or pdata for the board used, add support
to mask oc_pg_ctrl  and oc_pg_ctrl2 signal

Bug 1518725
Bug 1419425

Change-Id: Ie69c1de37b9f428e23268dad009dfff36cb1463d
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423036
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoiio: meter: ina230: fix return value of ina230_set_channel
Timo Alho [Thu, 12 Jun 2014 18:29:12 +0000]
iio: meter: ina230: fix return value of ina230_set_channel

On success, ina230_set_channel needs to return the number of
characters written.

Change-Id: I4ed249c0c4c86792b3b590eb4c1a532dcfd57f3a
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/422792
(cherry picked from commit 0ad59e7418ae0809354e5178ee641b69deda3ad0)
Reviewed-on: http://git-master/r/422799
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agogpu: nvgpu: Dump offending push buffer fragment
Terje Bergstrom [Wed, 11 Jun 2014 11:53:38 +0000]
gpu: nvgpu: Dump offending push buffer fragment

When outputting debug dump, print the contents of current push buffer
segment.

Also changes the debug dump to use pr_cont when applicable, and dumps
state before recovering in case channel was not loaded to an engine.

Bug 1498688

Change-Id: I5ca12f64bae8f12333d82350278c700645d5007e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/422208
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agommc: tegra: add tap hole coeff for 200MHz for SDMMC3
Shreshtha Sahu [Wed, 21 May 2014 06:58:44 +0000]
mmc: tegra: add tap hole coeff for 200MHz for SDMMC3

This patch adds tap hole coeff for 200MHz for SDMMC3,
for tegra12x

Bug 1505798

Change-Id: I54de2a7529952367e361d8bd55a669335142193f
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/412543
(cherry picked from commit f2a9fc57238de62bc996f7565850b7012e1f5962)
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422035
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: sdhci: set max clk to 200MHz for SDMMC3
Shreshtha Sahu [Wed, 21 May 2014 06:39:50 +0000]
ARM: tegra: sdhci: set max clk to 200MHz for SDMMC3

This patch sets max clk limit to 200MHz for SDMMC3 for PM375.
Requesting 208MHz results in getting 204MHz from PLL_P and CRC
errors are seen.

Bug 1505798

Change-Id: I14825335fa5895ef2dde905f1e3cd568d2dafa62
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/412542
(cherry picked from commit fbcb0018d3622dedeb4c9413b9b774c4c9d49d36)
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422034
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agogpu: nvgpu: Turn on scaling when powered
Allen Yu [Mon, 9 Jun 2014 09:37:22 +0000]
gpu: nvgpu: Turn on scaling when powered

This patch reorders scaling resume to happen always when
we power on the GPU, so as to balance the scaling suspend
when we power off GPU.

bug 200010911

Change-Id: I9fde817fbf9fed7d90c48ea06050db4b82e670a8
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/421543
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoARM: T132: DVFS: Increase cpu frequency granularity below vmin
Krishna Sitaraman [Fri, 30 May 2014 20:31:44 +0000]
ARM: T132: DVFS: Increase cpu frequency granularity below vmin

Granularity set at 25.5mhz upto 1020Mhz.

Bug 1509711

Change-Id: I80d4e78a2c8d1fe995a88ed220b7831b500e162f
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/417245
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

5 years agoi2c: tegra: do bit-banging for i2c transfer at 50KHz.
Laxman Dewangan [Thu, 12 Jun 2014 13:28:58 +0000]
i2c: tegra: do bit-banging for i2c transfer at 50KHz.

Bit-banging is enabled dueing power off. Do the bit-banging method
of data transfer at 50KHz.

Change-Id: I641ddb8c85c34aace2c82ab666de8c7630ef0395
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/423071
GVS: Gerrit_Virtual_Submit

5 years agoi2c: algo: add more error/info prints
Laxman Dewangan [Thu, 12 Jun 2014 13:27:13 +0000]
i2c: algo: add more error/info prints

Enable more error/info prints to know the status of the
transfer if it fails.

Also when sending bytes, ignore the last byte ACK from the slave.

Change-Id: I2b655da28545362d6e7855baceedbfd8588b3e43
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/423070
GVS: Gerrit_Virtual_Submit

5 years agoarm64: enable deprecated SETEND instruction in SCTLR compat config
Rich Wiley [Wed, 4 Jun 2014 18:44:03 +0000]
arm64: enable deprecated SETEND instruction in SCTLR compat config

Bug 200004840

Change-Id: I703d4843f8aab2ec63324f04cc13aaabae88e163
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/422174
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: make SCTLR compat config depend on CONFIG_ARMV7_COMPAT
Rich Wiley [Wed, 4 Jun 2014 18:41:53 +0000]
arm64: make SCTLR compat config depend on CONFIG_ARMV7_COMPAT

Conflicts:
arch/arm64/mm/proc.S

Bug 200004840

Change-Id: I76e0067839c96e3082b42c80d3fc670cf3d371b5
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/422173
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoASoC: Tegra: Simplify eos detection logic
Ravindra Lokhande [Wed, 11 Jun 2014 11:41:51 +0000]
ASoC: Tegra: Simplify eos detection logic

Bug 200008134

Change-Id: I3f39c15a91fb76958b739636eddb6d8480898d21
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/422171
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoarm: tegra: tweak cpu-emc ratio
Donghan Ryu [Tue, 20 May 2014 00:59:24 +0000]
arm: tegra: tweak cpu-emc ratio

the old cpu-emc ratio is probably not very optimal
for newer CPUs with higher max CPU and EMC frequencies.
It would be better if have a table of these per CPU
architecture but tuning this hard-coded value for now
won't make things any worse.

Also, much lower CPU_AVG_ACT_THRESHOLD is used for
tegra12x and tegra13x

Bug 1455015
Bug 1473244
Bug 1497785
Bug 1500639
Bug 1504328
Bug 200004223

Change-Id: I96d4d4d36474c1d7f1d62762666e944fbd04b03e
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/411700
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agostaging: iio: light: iqs253: cancel workqueue
Sang-Hun Lee [Mon, 9 Jun 2014 22:45:38 +0000]
staging: iio: light: iqs253: cancel workqueue

 - Any lingering workqueue must be cancelled
   during the shutdown, to prevent them from running
   during a shutdown
 - In most cases, they are harmless, but they will
   trigger a warning if the i2c bus is shutdown during the
   shutdown as done on some platforms

Bug 1522172

Change-Id: I465e19ef793cf72f5f533b0e2c9e9f3e837c2133
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/421345
(cherry picked from commit b04ebe7fc2a77897b0020412f2a1ab0de94aa7c1)
Reviewed-on: http://git-master/r/422776
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agostaging: iio: light: add shutdown
Sang-Hun Lee [Mon, 9 Jun 2014 21:48:18 +0000]
staging: iio: light: add shutdown

 - Depending on the platform, i2c bus may be shutdown
   as we shutdown the systme
 - In such a case, any lingering workqueue would slowdown
   the system, as the access will be made to the i2c bus
   which has been shutdown
 - To mitigate the above, cancel all workqueue jobs as we shutdown

Bug 1522172

Change-Id: Idebab822c0ef8ddad7352ef25a546acb3f3e5870
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/420889
(cherry picked from commit 8b39b8db93e5b34672b7cbcf9f6c5ec40398ca83)
Reviewed-on: http://git-master/r/422775
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agogpu: nvgpu: flush write before unlocking
Sang-Hun Lee [Tue, 3 Jun 2014 20:28:45 +0000]
gpu: nvgpu: flush write before unlocking

 - gk20a_enable is reading the clock after unlocking the spinlock
   to flush any previous write
 - This could lead to a race if any write afterwards assume
   the write has been completed already
 - Read the clock before unlocking to ensure all previous writes
   have been completed before letting any other thread use gk20a

Bug 200007520

Change-Id: I737fbbe825c68b25ca256c4a8ee2b99aa8baf0f5
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/418485
(cherry picked from commit 2aed542a719caa69620766bf2dceefe50626c189)
Reviewed-on: http://git-master/r/422773
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

5 years agoarm: tegra: Don't place CSIC/D IOs in DPD mode
Preetham Chandru R [Thu, 12 Jun 2014 09:07:41 +0000]
arm: tegra: Don't place CSIC/D IOs in DPD mode

According to TRM placing CSIC/D IOs in DPD mode
is no longer available

Bug 200010066

Change-Id: Ic389dba406b06a7c821fa8399ae1854f3ebcac98
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/422677
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agodriver:media:tegra: ov5693 add reg in mode table
David Wang [Sat, 31 May 2014 02:13:06 +0000]
driver:media:tegra: ov5693 add reg in mode table

Setting one of the missing registers for the 2592x1944
mode table. This register value prevents frame drops
when coarse time is updated.

bug 1516678

Change-Id: Icebbca9d7800d609146800678f22ee68de690c4c
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/422289
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agohrtimer: enhance power efficiency
Sumit Singh [Mon, 21 Apr 2014 08:29:04 +0000]
hrtimer: enhance power efficiency

Defining relaxed version of hrtimer_callback_running(),
which will be used to improve power efficiency through
the use of macro cpu_relaxed_read_long.

Bug 1440421

Change-Id: Ie42d7ae9628a817d52f4636781e11b607327c2c5
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398789
(cherry picked from commit 0d9f5fc1d39d7d1809519b5d11bf7ac72287b7c6)
Reviewed-on: http://git-master/r/422255
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agothread_info: enhance power efficiency
Sumit Singh [Wed, 12 Mar 2014 09:14:44 +0000]
thread_info: enhance power efficiency

Using cpu_relaxed_read_long and defining relaxed
version of some macros, and functions so that it
can be used to improve power efficiency.

bug 1440421

Change-Id: If857ff7110cffadc6f13289a6395d253a8e3e232
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/380859
(cherry picked from commit a66b23c6971403594cc6a82923c8df3b8472de90)
Reviewed-on: http://git-master/r/422251
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: processor.h: remove redundant macros
Sumit Singh [Wed, 23 Apr 2014 06:26:55 +0000]
arm64: processor.h: remove redundant macros

Removing cpu_relaxed_read and cpu_relaxed_read_long macros from
processor.h, as these macros are defined in asm/relaxed.h.

bug 1440421

Change-Id: Ic766ac6e34eefe93f90349c088626a0fb277670c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/400127
(cherry picked from commit 108bf0b30d72c52e33dd4fec71dd1ed5baf13ed2)
Reviewed-on: http://git-master/r/422214
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: asm: relaxed.h: defined relaxed.h
Sumit Singh [Fri, 18 Apr 2014 14:49:46 +0000]
arm64: asm: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which contains
arm64 specific macros which will be used to improve
power efficiency of arm64.

bug 1440421

Change-Id: Iee14115490cb16001d5eac9e309ee6e088b88f44
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398323
(cherry picked from commit beb69cd6d2893c36712d4f927e41da0de729d651)
Reviewed-on: http://git-master/r/422212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: asm: relaxed.h: defined relaxed.h
Sumit Singh [Mon, 21 Apr 2014 07:25:24 +0000]
arm: asm: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which uses generic
definitions of some macros used by arm64 for improving
power efficiency.

bug 1440421

Change-Id: I654dcef609812e3bb54e6c892c1554f9cbb4bd3d
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398766
(cherry picked from commit a96e59b1959f3ee216503b4f9df3cb75f7093ed6)
Reviewed-on: http://git-master/r/422211
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoasm-generic: processor.h: remove redundant macros
Sumit Singh [Wed, 23 Apr 2014 05:36:58 +0000]
asm-generic: processor.h: remove redundant macros

Removing cpu_relaxed_read and cpu_relaxed_read_long macros from
processor.h, as these macros are defined in asm-generic/relaxed.h.

Bug 1440421

Change-Id: I5d1ba25755e1c9d33b080dfe01ba838289f306af
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/400093
(cherry picked from commit 57eb21e2d4cad3ce1f85283cfffd0eff85a6d17d)
Reviewed-on: http://git-master/r/422209
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoasm-generic: relaxed.h: defined relaxed.h
Sumit Singh [Fri, 18 Apr 2014 14:30:36 +0000]
asm-generic: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which contains basic
macros which will be used for improving power efficiency for
arm64.

bug 1440421

Change-Id: I5ae7503afdfbaa951827bbf466d8ddccf444f558
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398315
(cherry picked from commit dd434aeb1afea1d9ebce1099fb6ecfa7c6c762c6)
Reviewed-on: http://git-master/r/422203
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: add wmb() before updating PUT
Deepak Nibade [Mon, 9 Jun 2014 10:17:31 +0000]
video: tegra: host: add wmb() before updating PUT

Add write memory barrier wmb() at all places where we update the
dma PUT pointer. We can add this call once we modify PUT and before
we start the cdma.

This is to take care of cache maintenace before
every time we modify PUT pointer and start the cdma.
wmb() ensures that cdma will fetch latest copy of all the buffers
from memory

Change-Id: If01deef7a1c0b4e82de416ee966d9ba51115b34f
Signed-off-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Change-Id: I03bd551220eafa7f3e02476458458de5128c7768
Reviewed-on: http://git-master/r/421524
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Soumenkumar Dey <sdey@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit