5 years agoARM: tegra: add apb dma device for t124 SOC
Kunal Agrawal [Wed, 3 Apr 2013 11:11:24 +0000]
ARM: tegra: add apb dma device for t124 SOC

Change-Id: I7b4d2132d51bfb7224f4b2e6d08f413cf74d4537
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/217354
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: clock: change the device name for apb dma clock
Kunal Agrawal [Mon, 8 Apr 2013 12:07:11 +0000]
arm: tegra: clock: change the device name for apb dma clock

Change-Id: I85cbe5f750ddab59df3d14f12cf2a7f8befb831e
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/217345
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Manoj Gangwal <mgangwal@nvidia.com>

5 years agovideo: tegra: gk20a: Avoid crash on teardown
Robert Morell [Tue, 9 Apr 2013 20:15:18 +0000]
video: tegra: gk20a: Avoid crash on teardown

If PMU failed to initialize for any reason, we still try to call its
"remove_support" function pointer, which is NULL.

Bug 1268414

Change-Id: I90b96104a44e441ae07625066f9c1d698556e695
Signed-off-by: Robert Morell <rmorell@nvidia.com>
Reviewed-on: http://git-master/r/217935
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agovideo: tegra: nvmap: fix iovmm null ptr exception
Adeel Raza [Tue, 9 Apr 2013 08:50:30 +0000]
video: tegra: nvmap: fix iovmm null ptr exception

This is a temporary hack to fix an iovmm null pointer exception. This
hack should eventually be removed.

Change-Id: If15a0c4fc6f8df64740f8b7124c4a6bb1978ee4e
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/217766
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoarm: tegra: fix powergate null ptr exception
Adeel Raza [Tue, 9 Apr 2013 08:47:57 +0000]
arm: tegra: fix powergate null ptr exception

Change-Id: Ic86d3fa60ed47732671531321d3f7b9367673719
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/217765
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoarm: tegra: iovmm: add stub iovmm functions
Adeel Raza [Tue, 9 Apr 2013 00:37:00 +0000]
arm: tegra: iovmm: add stub iovmm functions

Change-Id: I062465dcdf28e10e557e88cf5bc0ae4ce9da8eed
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/217764
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra12: host: add stat_r sync func
Adeel Raza [Tue, 9 Apr 2013 00:28:27 +0000]
video: tegra12: host: add stat_r sync func

Add host1x_sync_cmdproc_stat_r(void).

Change-Id: I28bdd5c71c13926ab4a00e8c3b3edd8fb806d7b0
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/217763
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra: host: fix merge build break
Adeel Raza [Tue, 9 Apr 2013 00:17:09 +0000]
video: tegra: host: fix merge build break

Change-Id: I8e4884ab4bbc8ecb58493db6b81773869aad190f
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/217762
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoarm: tegra12: enable PM_GENERIC_DOMAINS
Adeel Raza [Tue, 9 Apr 2013 00:04:34 +0000]
arm: tegra12: enable PM_GENERIC_DOMAINS

Change-Id: I2afaf013cfb8f2656fb6a8aa235354b2c7672d33
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/217760
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoARM64 changes
Alex Van Brunt [Wed, 17 Apr 2013 20:33:52 +0000]
ARM64 changes

Original merge commit:

commit 001997d7c06bdf9101ef93fce3f266074df97a25
   Merge commit '09c210a929e4dae8a4af96f677a576ccbb8a650a' into sifted/04

Change-Id: I1b02b0407348411eb462034322168695ca17ed45
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agot12x: video: tegra: dc: fix broken build
Bibek Basu [Mon, 1 Apr 2013 10:58:22 +0000]
t12x: video: tegra: dc: fix broken build

Blender gen2 features are not available
for T148.

Change-Id: I84e28cd19d4f8647d715c020f5775997901ffbc5
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/215029
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: configs: enable SMSC911X for all configs
Peng Du [Thu, 28 Mar 2013 21:27:08 +0000]
ARM: configs: enable SMSC911X for all configs

Various simulators have agreed to unify the fake NIC
to be SMSC911X, since both ASIM and TegraSIM support
it. To ease the transition, we firstly only enable
the new NIC (SMSC911X) while keep the legacy (SMC91X)
card around. Plan is that when things stablized after
a while, we would remove SMC91X completely from both
the configs and common.c to clean up the kernel.

Change-Id: I7bcfd66f32eaef4a97cfdfcaf7e002f8944dde32
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/214177
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/214677
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Tested-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra: pcie: Add T124 FPGA support
Jay Agarwal [Thu, 7 Mar 2013 05:46:21 +0000]
ARM: tegra: pcie: Add T124 FPGA support

1. Change PCIe base address and adjust other
   allocations accordingly
2. Add PCIe root port Mastering
3. Modify clock clamping
4. Add code to reset FPGA PCIe Phy
5. Disable powergate & Pads PLL code for FPGA
6. Put T30 WARs under it's macro
7. Configure lanes in x2_x1 mode
8. Avoid legacy PAD programming for T124

Bug 1201008

Change-Id: Ie9702aec6033155834acf59452204c3402ea6de6
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/204219
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

Conflicts:
arch/arm/mach-tegra/include/mach/io.h

5 years agoarm: tegra: config: bonaire configs for FPGA
Jin Qian [Thu, 28 Mar 2013 20:40:58 +0000]
arm: tegra: config: bonaire configs for FPGA

enable clock_debug_write
disable gk20a

Change-Id: Iabaa235bd283668fad8254c784aa73fad4e2c101
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/214143
Reviewed-by: Chao Xu <cxu@nvidia.com>

Conflicts:
arch/arm/configs/tegra_bonaire_android_defconfig

5 years agoARM: tegra: fix T30 build break
Bibek Basu [Fri, 29 Mar 2013 08:28:51 +0000]
ARM: tegra: fix T30 build break

Fix T30 build break

Bug 121179

Change-Id: I7e86ec2b133a83a55794eff5954291d295207cc1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>

5 years agotegra: video: fix T30 build issue
Bibek Basu [Fri, 29 Mar 2013 10:49:16 +0000]
tegra: video: fix T30 build issue

Fix cardhu build

Bug 121179

Change-Id: I7aefc4df5f5f7a433cb8932b289f21c5129676a8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>

5 years agovideo: tegra: gk20a: protect zcull bind from elpg
Jin Qian [Fri, 22 Mar 2013 23:34:53 +0000]
video: tegra: gk20a: protect zcull bind from elpg

Bug 1257392

Change-Id: Icb07f9189dcfcbadfaf637e17dbf9b959370f3f9
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/212269
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: nvavp: Enable nvavp driver support
Somasundaram S [Mon, 25 Mar 2013 11:35:43 +0000]
video: tegra: nvavp: Enable nvavp driver support

1> Enable nvavp driver support
2> Enable TEGRA_GRHOST
3> Enable DEBUG_FS
4> Fix compilation errors

Bug 1246854

Change-Id: I4cf1e69a69cc891f9d4311183ed74af0973e782b
Signed-off-by: Somasundaram S <somasundaram@nvidia.com>
Reviewed-on: http://git-master/r/212589
Reviewed-by: Somu Sundaram <somasundarams@nvidia.com>
Tested-by: Somu Sundaram <somasundarams@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: gk20a: fix priv_cmdbuf size
Jin Qian [Tue, 19 Mar 2013 02:07:42 +0000]
video: tegra: gk20a: fix priv_cmdbuf size

Triple gpfifo size based on user requested size.
Calculate and allocate worse case size for priv_cmdbuf.

Bug 1252635

Change-Id: I11f572d2c8c46cf747efd81201ff9253aee4242e
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/210566
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra12: allocate context buffers from VPR
Jussi Rasanen [Wed, 6 Mar 2013 14:45:12 +0000]
arm: tegra12: allocate context buffers from VPR

-handle allocations from NVMAP_HEAP_CARVEOUT_VPR.
-allocate GPU circular, pagepool, and attrib buffers from VPR.
-fix page fault address print.

Bug 1215470

Change-Id: I699b5346a6fca6a7418920f9cbd77744221c40f5
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/210016
Reviewed-by: Janne Kiviluoto <jkiviluoto@nvidia.com>
Tested-by: Janne Kiviluoto <jkiviluoto@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra12: Add function to set SOR0_CLK_SEL
Kaz Fukuoka [Wed, 20 Mar 2013 00:56:45 +0000]
ARM: tegra12: Add function to set SOR0_CLK_SEL

Add interface to set CLK_RST_CONTROLLER_CLK_SOURCE_SOR0_0:SOR0_CLK_SEL.

Usage: tegra_clk_cfg_ex(c, TEGRA_CLK_SOR_CLK_SEL, value);

Change-Id: I087eb62a2f8a4a6ac3c07436177829e49b17a40b
Signed-off-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-on: http://git-master/r/210996
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: host: use long as timeout variable
Peng Du [Wed, 20 Mar 2013 00:29:25 +0000]
video: tegra: host: use long as timeout variable

wait_event_timeout uses long as the returned timeout value.
However, host drivers have been using "int" variable might
get the sign bit set if the MSB of the returned timeout is
set on LP64 platform (eg. arm64). This causes problem as
negative timeout value indicate errors.

This change fixes the problem by replacing int with long.

Change-Id: I42b24daaa6603f7e897190bacc1c46f95f5655ea
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/211302
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra: Remove asim check in SMSC911X init
Edgardo Handal [Mon, 25 Mar 2013 20:48:21 +0000]
ARM: tegra: Remove asim check in SMSC911X init

Change-Id: I446e1452d3a628e764e78b5f5795dff8a46143d7
Signed-off-by: Edgardo Handal <ehandal@nvidia.com>
Reviewed-on: http://git-master/r/212772
Reviewed-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: set 64 bit coherent_dma_mask
Petlozu Pravareshwar [Mon, 25 Mar 2013 14:18:12 +0000]
ARM: tegra: set 64 bit coherent_dma_mask

Set 64 bit coherent_dma_mask for ehci devices.

Bug 1256513

Change-Id: Ie937af9b080ebd9bbcca88604043127168c464ca
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/212667
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: clear return data in addruart stub
Jin Qian [Thu, 28 Mar 2013 01:49:05 +0000]
ARM: clear return data in addruart stub

Change-Id: Id4e84fe2b360900d400371616e1c736f8b66655d

5 years agoarm: tegra: config: enable devfreq
Bibek Basu [Thu, 28 Mar 2013 11:32:56 +0000]
arm: tegra: config: enable devfreq

enable PM_DEVFREQ

Bug 1211729

Change-Id: I9ba46b1dff21ef83032055a2f2aaf67d5d94f3d1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/213951

5 years agoARM: tegra: pcie: Modify T124 interrupt mechanism
Jay Agarwal [Tue, 12 Mar 2013 07:00:07 +0000]
ARM: tegra: pcie: Modify T124 interrupt mechanism

Legacy interrupt handling mechanism has been changed
for T124 to avoid deadlock.

Bug 1057874

Change-Id: I649629438acd483fb4ee780fef73062e13ba3c9c
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/208315
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agodrivers: video: tegra: fix gk20a suspend on qt
Jin Qian [Wed, 20 Mar 2013 19:39:20 +0000]
drivers: video: tegra: fix gk20a suspend on qt

Move pmu destroy before gr suspend to disable ELPG before
gr priv register access.

Add function to disable perfmon for future use.

Bug 1218938

Change-Id: I428b63833d02b4cb17e6d1cac418e34a4d7ec5c9
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/211328
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agodrivers: video: tegra: enable gk20a pmu on qt
Jin Qian [Wed, 20 Mar 2013 23:32:28 +0000]
drivers: video: tegra: enable gk20a pmu on qt

Bug 1218938

Change-Id: I476638d518f4754b9fd8f0f53f0e5cbdf5ab7dc2
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/211382
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agodrivers: video: gk20a HWFS following VBIOS code
Xue Dong [Wed, 13 Mar 2013 21:39:12 +0000]
drivers: video: gk20a HWFS following VBIOS code

Bug 1164093

Change-Id: I5d23f260ccfedaaa565e30c0b726638ff75a9e29
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/208965
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: bonaire:Add vddio_sdmmc gpio regulator
rrajk [Tue, 5 Mar 2013 08:13:46 +0000]
arm: tegra: bonaire:Add vddio_sdmmc gpio regulator

Enable pinmux for GPIO_PV1
Enable vddio_sdmmc gpio regulator for sdmmc3 on GPIO_PV1.
Bug 1247029

Change-Id: I31070008420c1ae9a09a4b17bd39e846b6f854a6
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/206238
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: config: enable GPIO regulator
rrajk [Tue, 5 Mar 2013 06:49:59 +0000]
arm: tegra: config: enable GPIO regulator

Enabled GPIO regulator in bonaire.
Bug 1247029

Change-Id: Ief20176b45bcbebca57982b5620d5c2d512c35cf
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/206237
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: set 64 bit coherent_dma_mask
Rohith Seelaboyina [Mon, 18 Mar 2013 12:22:43 +0000]
ARM: tegra: set 64 bit coherent_dma_mask

set 64 bit coherent_dma_mask to support LPAE

Bug 1253192

Change-Id: I3db67094706db83850ace9f1a82853405f586bfd
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/210385
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: convert memory vars to phys_addr_t
Adeel Raza [Fri, 15 Mar 2013 20:21:31 +0000]
ARM: tegra: convert memory vars to phys_addr_t

Convert memory related variables from unsigned long to phys_addr_t. This
is needed because of LPAE which allows physical memory addresses above 4
GB. Also add checks for ensuring that the AVP kernel is loaded below 4
GB.

Change-Id: I896e8db69cd1d2ba2499800fec4a6b224bad8ed8
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/210113
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agommc: tegra: Enable HS200 mode support
rrajk [Sat, 16 Mar 2013 10:09:06 +0000]
mmc: tegra: Enable HS200 mode support

Set MMC_CAP2_HS200 to enable HS200 mode support.

Change-Id: I9e432ee8606d099708b2875b113686b9f3069241
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/210213
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

5 years agodrivers: video: tegra: fix bonaire build error
Jin Qian [Wed, 20 Mar 2013 00:45:02 +0000]
drivers: video: tegra: fix bonaire build error

Change-Id: I4771e3311a3c52d81bb5e023eb758323bb28acc4
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/210993
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: enable HIGHMEM for bonaire configs
Adeel Raza [Thu, 14 Mar 2013 20:56:38 +0000]
ARM: tegra12: enable HIGHMEM for bonaire configs

Enable CONFIG_HIGHMEM for bonaire and bonaire_sim configs.

Change-Id: Ib1f09856d9b597b11d5fca516324292de54e2cfd
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/209698
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agodrivers: video: tegra: fix gk20a priv ring init
Jin Qian [Sat, 9 Mar 2013 00:21:05 +0000]
drivers: video: tegra: fix gk20a priv ring init

Gk20a gpcpll init depends on priv ring init so move it early.
Remove the hack to enable gpcpll programming on qt.

Bug 1239005

Change-Id: I270c56ffb7aa75e8387fe5aac045aa8d21aa3f1e
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/207773
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: dvfs: use common core voltage capping code
Peng Du [Thu, 14 Mar 2013 00:55:47 +0000]
ARM: tegra12: dvfs: use common core voltage capping code

Fix tegra12_dvfs.c to use the common voltage capping code
introduced in: http://git-master/r/196730

Bug 1186037

Change-Id: I60c20dacba1612dbe78f2f1bc3bbc564b2a45d72
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/209775
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: Re-add TSC & timer init for simulation
Alex Van Brunt [Tue, 26 Mar 2013 00:42:12 +0000]
ARM: tegra: Re-add TSC & timer init for simulation

The simulator does not have a bootloader to program the TSC and \
generic timer. So, initialize it in the kernel.

This partially reverts http://git-master/r/203424

Change-Id: I04212be38fc2bfce923a910fbf3aac752f8a886a
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra12: Enable device tree for bonaire
Alex Van Brunt [Mon, 18 Mar 2013 18:16:32 +0000]
ARM: tegra12: Enable device tree for bonaire

Change-Id: I183b130a80ce8937137acab98d2d0c64dc65ee35
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra12: enable devfreq
Alex Van Brunt [Fri, 22 Mar 2013 18:13:16 +0000]
ARM: tegra12: enable devfreq

Change-Id: If85da2505ca60ba739bd7b78190a635c1ce54c12
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra12: host: Refactor cdma timeout
Alex Van Brunt [Wed, 20 Mar 2013 23:22:30 +0000]
video: tegra12: host: Refactor cdma timeout

This patch:

 - Refactors CDMA timeout to follow better split between device
    dependent and independent parts
 - Does a minor fix in CDMA timeout handling code. The channel
    timeout is set to be at most 500ms

Change-Id: I51542b84f0051ff1c387ad20939e1f2eb1d6c903
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra12: nvmap: move nvmap ioctls to linux/nvmap.h
Alex Van Brunt [Wed, 20 Mar 2013 23:14:22 +0000]
video: tegra12: nvmap: move nvmap ioctls to linux/nvmap.h

Prepare for marshal/unmarshal of nvmap handles. generate ioctl param
structs based on CONFIG_COMPAT flag. this is to allow nvmap work
with 64-bit kenel and 32-bit user space.
Add missing comments for ioctl params.
Bug 1228120

Change-Id: I4f68eba0e71638294ab2eb3775376d3446185e27
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra12: Replacement of PWM device structure
Alex Van Brunt [Wed, 20 Mar 2013 22:57:01 +0000]
ARM: tegra12: Replacement of PWM device structure

Replaced the old PWM platform device structure with a
new PWM platform device structure. This is done in
accordance with the new PWM driver framework and driver
which requires just one device which represent all the
PWM's available.

Bug 1207114
Bug 1252464

Change-Id: I7780e5f3219282484ae314435a344d32c4c15372
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra: bonaire: Move sim enet to pre-si cfg
Peng Du [Thu, 14 Mar 2013 20:18:18 +0000]
ARM: tegra: bonaire: Move sim enet to pre-si cfg

Sim ethernet device has been moved to common.c to share
among chips. This change refactored bonaire board as
such. In addition, the newly added smsc911x device is
also moved to common.c

Origin change: http://git-master/r/162270

Change-Id: Ibf5dd386e5038cd30abb9dc96b29ecf5e56571da
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/209776
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra12: Remove call to tegra_gpio_resume_init
Alex Van Brunt [Fri, 15 Mar 2013 21:13:36 +0000]
ARM: tegra12: Remove call to tegra_gpio_resume_init

It no longer exists in 3.8.x

Change-Id: I0e8d60ea05a23c97515f002201cc8210f9463178
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra: vic03: remove __dev* attributes
Alex Van Brunt [Fri, 15 Mar 2013 16:17:55 +0000]
video: tegra: vic03: remove __dev* attributes

Change-Id: I54d94174b071702c4f3dcef236301464075c5c5c
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra12: dvfs: Move common core voltage capping code
Alex Van Brunt [Thu, 14 Mar 2013 22:17:53 +0000]
ARM: tegra12: dvfs: Move common core voltage capping code

Use the commot Tegra2 and Tegra11 core voltage capping code.
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

Change-Id: I6db5b21848d48013d3fb04eae3b3245a2124da0a

5 years agovideo: tegra: gk20a: remove __dev* attributes
Alex Van Brunt [Fri, 15 Mar 2013 15:46:51 +0000]
video: tegra: gk20a: remove __dev* attributes

Change-Id: Ib32e9c40929390b22d7961b63f5dad7ab4dce520
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoARM tegra12: pinmux: remove __dev* attributes
Alex Van Brunt [Thu, 14 Mar 2013 22:08:39 +0000]
ARM tegra12: pinmux: remove __dev* attributes

Change-Id: I6714ef14280f269b6d8e2a6348c5628b47eda251
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agoregulator: Remove duplicate definition
Alex Van Brunt [Thu, 14 Mar 2013 21:01:53 +0000]
regulator: Remove duplicate definition

Remove extra definition of regulator_count_voltages.

Change-Id: I1bd7a75b61ef64e9e09c440c46ecc7d6d0a42fa9
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>

5 years agodrivers: video: change gk20a gating prod API
Xue Dong [Mon, 18 Feb 2013 23:30:34 +0000]
drivers: video: change gk20a gating prod API

bug 1164093

Change-Id: I15b66327c9b01e6c346cc9b83565c31e3b9f7850
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/201440
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: pcie: Enable PCIE for T124
Jay Agarwal [Thu, 7 Mar 2013 06:00:05 +0000]
ARM: tegra: pcie: Enable PCIE for T124

1. Enable PCIe compilation for T124 platforms
2. Call PCIe probe for T124 platforms

Bug 1201008

Change-Id: Ia45c61c9055b16f3ae28a6dfff42148d01105018
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/204218
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: move sdhci platform_data definition
Alex Van Brunt [Wed, 6 Mar 2013 23:08:08 +0000]
ARM: tegra: move sdhci platform_data definition

Move definition for dolak.

Change-Id: I0a69df7e5430e70f5e2cba519c177cc914f90dff
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/206827
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: Tegra: devices: fix bad merge for tegra_grhost_device definition
Varun Wadekar [Mon, 25 Jun 2012 12:57:50 +0000]
ARM: Tegra: devices: fix bad merge for tegra_grhost_device definition

Change-Id: I591b2bda244c1594fe07008eef43df9f3a803362
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/206825
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoFIXUP: ARM: tegra: iomap: Fix typo from merge
Alex Van Brunt [Wed, 6 Mar 2013 22:35:46 +0000]
FIXUP: ARM: tegra: iomap: Fix typo from merge

Change-Id: I6ec2bb3a5000245d2d02d3a8bb59052366eb1c53
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/206823
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agovideo: tegra: host: add VI client-managed syncpts
Pablo Ceballos [Thu, 7 Mar 2013 21:40:02 +0000]
video: tegra: host: add VI client-managed syncpts

Make the necessary VI syncpoints client-managed.

Change-Id: I0d6c7a69fa23926f3fc82f9600ace4ca2383b4df
Signed-off-by: Pablo Ceballos <pceballos@nvidia.com>
Reviewed-on: http://git-master/r/207296
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoarm: tegra: disable smc91x eth device for dsim
Peng Du [Wed, 6 Mar 2013 20:12:19 +0000]
arm: tegra: disable smc91x eth device for dsim

SMC91X is an ASIM-only device which DSIM doesn't support.

Change-Id: Icf40fed297c4fc3c9a51c88b8f304e2e54438c53
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/206772
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agodrivers : video: host: gpu cycle state support
Xue Dong [Sat, 9 Mar 2013 00:11:36 +0000]
drivers : video: host: gpu cycle state support

bug 1154464

Change-Id: Ie35f8ecc2236e4abdbd86c14a646a12b00b6144e
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/201518
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: skip reset_handle_enable for dsim
Peng Du [Wed, 27 Feb 2013 20:15:05 +0000]
arm: tegra: skip reset_handle_enable for dsim

The memory map of DSIM/MTS in aarch64 config doesn't map
IRAM (0x40000000 is a hole). This change works around
this quirk by disabling the reset handler enable function.

Change-Id: I74efd5d0e78ee5fba51fe525ca98efc7e202dd68
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/206377
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoarm: tegra: add asim+dsim+linsim pre-si tegra_id
Peng Du [Wed, 27 Feb 2013 18:28:16 +0000]
arm: tegra: add asim+dsim+linsim pre-si tegra_id

Change-Id: I742a1c3a8efef56047309bbd0ac148e0dc34e80b
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/206376
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra: fix nvhost_dmabuf_get_param return
Peng Du [Mon, 7 Jan 2013 23:54:17 +0000]
video: tegra: fix nvhost_dmabuf_get_param return

Fixed the declaration in the header to match the impl
in the C file.

Change-Id: Id984058df6049fca9aff11bb4feec8333382e848
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/196624
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agovideo: tegra: bitness sanitary cleanup
Peng Du [Fri, 1 Feb 2013 22:41:16 +0000]
video: tegra: bitness sanitary cleanup

* replace (u32) with (uintptr_t) which is portable;
* use portable print format strings, eg. %lx, %zd;

Change-Id: If9916436b2ee954f0e1487f9b09b9984b97cf4fe
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/196623
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra: bonaire: Add support for SMSC911X
Edgardo Handal [Tue, 19 Feb 2013 21:30:51 +0000]
ARM: tegra: bonaire: Add support for SMSC911X

Add support for using SMSC911X ethernet controller in bonaire

Change-Id: I2311a00ae80ee8fe507e12dd49ed5432a1d9a64a
Signed-off-by: Edgardo Handal <ehandal@nvidia.com>
Reviewed-on: http://git-master/r/202149
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra12: bonaire defconfig for l4t build
Bibek Basu [Tue, 19 Feb 2013 11:15:41 +0000]
arm: tegra12: bonaire defconfig for l4t build

This patch adds defconfig for bonaire and
bonaire_sim build for L4T

Bug 1211729

Change-Id: Ief358240f7389b89a39f031e95c4d8d5b5a3d12a
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/202023
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stefan Becker <stefanb@nvidia.com>
Tested-by: Stefan Becker <stefanb@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: bonaire: add SPI support
Kunal Agrawal [Fri, 1 Mar 2013 04:53:42 +0000]
ARM: tegra: bonaire: add SPI support

added code to enable and initialize spi on
bonaire platform

Change-Id: I91bc591c8949c9c61512c60daa0794a95622d93c
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/205377
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: bonaire: Enable SDMMC3 controller
rrajk [Wed, 6 Mar 2013 08:31:43 +0000]
arm: tegra: bonaire: Enable SDMMC3 controller

Enabled SDMMC3 controller in bonaire.
Bug 1247029
Bug 1246725

Change-Id: Iaffea6cc6dd22dd865241ec518ec7ae534d0606c
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/206603
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agommc: host: tegra: Set internel Clk for t124 fpga
rrajk [Wed, 6 Mar 2013 08:34:57 +0000]
mmc: host: tegra: Set internel Clk for t124 fpga

Currently external clock loopback is not there on FPGA,
so use internal clock loopback.
Bug 1247029
Bug 1246725

Change-Id: Ibc53cb141c289e12526655b2995f97afc295e75b
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/206604
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: Update pinmux settings for SDMMC3
rrajk [Wed, 6 Mar 2013 08:28:54 +0000]
arm: tegra: Update pinmux settings for SDMMC3

Updated pinmux settings for SDMMC3 in bonaire.
Bug 1246725
Bug 1247029

Change-Id: I6c7f344caf7a572009e65dc099702bdda0549f4f
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/206602
GVS: Gerrit_Virtual_Submit
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra12: Turn on LPAE for bonaire/bonaire_sim
Alex Van Brunt [Fri, 1 Mar 2013 00:06:51 +0000]
ARM: tegra12: Turn on LPAE for bonaire/bonaire_sim

This enables 64 bit physical addresses (LPAE) on bonaire and bonaire_sim.

Change-Id: Ida3ea9b2f3eabede7d855f57900cd6122baefc44
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/205316
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: Set dma_addr_t length with LPAE
Alex Van Brunt [Mon, 12 Nov 2012 23:57:24 +0000]
arm: tegra: Set dma_addr_t length with LPAE

On tegra platforms dma_addr_t and phys_addr_t should be the same.

Change-Id: I73a4fd1893f2a9711f0a9be23ed5c7eedc473453
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195685
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: mm: Use a page for the PGD with LPAE
Alex Van Brunt [Thu, 8 Nov 2012 23:57:36 +0000]
arm: mm: Use a page for the PGD with LPAE

Allocate a free page instead of useing kmalloc for the PGD. This is
needed to work with the pgd_list_{add|del}() functions that were added
to support the change_page_attr() function. Without it, the struct
page's "lru" list is corrupted by adding the same page to the list
twice because kmalloc would have already added it.

Change-Id: I2bb1a23df2f8af394f87756a167216fdc1f22a67
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195681
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoARM: tegra: reduce panel size on simulator
Chao Xu [Wed, 6 Mar 2013 19:35:11 +0000]
ARM: tegra: reduce panel size on simulator

So the sanity regression runs faster.

Change-Id: Ide38de539433053e62ace12d3cc9be81096e3e21
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/206755
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

5 years agoARM: tegra: bonaire: Update udc platform data
Petlozu Pravareshwar [Tue, 5 Mar 2013 19:14:10 +0000]
ARM: tegra: bonaire: Update udc platform data

Update the udc platform data to support usb device mode.

Change-Id: Ibe90ff3bcf53dda2fc9c721afe8b76639e8e36fc
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/206382
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agodrivers: video: tegra: Fix phys_add_t printing
Alex Van Brunt [Thu, 11 Oct 2012 18:29:52 +0000]
drivers: video: tegra: Fix phys_add_t printing

Use "%llx" to print variables with the type phys_addr_t.

Change-Id: I7e155dbf56b9118f16a92dcf5184acc9a56c048b
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195668

5 years agovideo: tegra: gk20a: Fixes for phys_addr_t
Alex Van Brunt [Thu, 11 Oct 2012 18:17:12 +0000]
video: tegra: gk20a: Fixes for phys_addr_t

Use "%llx" to convert phys_addr_t variables to strings and
remove the BUILD_BUT for phys_addr_t being bigger thatn 32 bits.

Change-Id: Ifcc1cfd62fb2971b4cd9c711cd13e8dbaa8adea9
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195667

5 years agoARM: mm: clean up membank size limit checks
Cyril Chemparathy [Fri, 20 Jul 2012 17:16:41 +0000]
ARM: mm: clean up membank size limit checks

This patch cleans up the highmem sanity check code by simplifying the range
checks with a pre-calculated size_limit.  This patch should otherwise have no
functional impact on behavior.

This patch also removes a redundant (bank->start < vmalloc_limit) check, since
this is already covered by the !highmem condition.

Change-Id: I6ee6ca1664aba3288af5c57280cf50d25407063a
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195676
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: mm: cleanup checks for membank overlap with vmalloc area
Cyril Chemparathy [Fri, 20 Jul 2012 16:24:45 +0000]
ARM: mm: cleanup checks for membank overlap with vmalloc area

On Keystone platforms, physical memory is entirely outside the 32-bit
addressible range.  Therefore, the (bank->start > ULONG_MAX) check below marks
the entire system memory as highmem, and this causes unpleasentness all over.

This patch eliminates the extra bank start check (against ULONG_MAX) by
checking bank->start against the physical address corresponding to vmalloc_min
instead.

In the process, this patch also cleans up parts of the highmem sanity check
code by removing what has now become a redundant check for banks that entirely
overlap with the vmalloc range.

Change-Id: I5dc3a7808f4a554b098b6333786af02647eab7fe
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195675
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: mm: use physical addresses in highmem sanity checks
Cyril Chemparathy [Fri, 20 Jul 2012 16:01:23 +0000]
ARM: mm: use physical addresses in highmem sanity checks

This patch modifies the highmem sanity checking code to use physical addresses
instead.  This change eliminates the wrap-around problems associated with the
original virtual address based checks, and this simplifies the code a bit.

The one constraint imposed here is that low physical memory must be mapped in
a monotonically increasing fashion if there are multiple banks of memory,
i.e., x < y must => pa(x) < pa(y).

Change-Id: I5ec769ff59ae69580167b02da23361693ed4dede
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195674
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: LPAE: use 64-bit accessors for TTBR registers
Cyril Chemparathy [Mon, 16 Jul 2012 21:20:17 +0000]
ARM: LPAE: use 64-bit accessors for TTBR registers

This patch adds TTBR accessor macros, and modifies cpu_get_pgd() and
the LPAE version of cpu_set_reserved_ttbr0() to use these instead.

In the process, we also fix these functions to correctly handle cases
where the physical address lies beyond the 4G limit of 32-bit addressing.

Change-Id: Ibf41d42fe59af020e1eb00d623cc5d5a483657e3
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195673
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: LPAE: use phys_addr_t in switch_mm()
Cyril Chemparathy [Mon, 16 Jul 2012 19:37:06 +0000]
ARM: LPAE: use phys_addr_t in switch_mm()

This patch modifies the switch_mm() processor functions to use phys_addr_t.
On LPAE systems, we now honor the upper 32-bits of the physical address that
is being passed in, and program these into TTBR as expected.

Change-Id: I596f50c4ff241b0769b43391de026b85c5774c6f
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195672
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: LPAE: use phys_addr_t for initrd location and size
Vitaly Andrianov [Fri, 22 Jun 2012 18:26:04 +0000]
ARM: LPAE: use phys_addr_t for initrd location and size

This patch fixes the initrd setup code to use phys_addr_t instead of assuming
32-bit addressing.  Without this we cannot boot on systems where initrd is
located above the 4G physical address limit.

Change-Id: Ib2967e18edb30695e5c40e918ecea37a1f074fdb
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195671
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: LPAE: use phys_addr_t in free_memmap()
Vitaly Andrianov [Thu, 21 Jun 2012 12:09:05 +0000]
ARM: LPAE: use phys_addr_t in free_memmap()

The free_memmap() was mistakenly using unsigned long type to represent
physical addresses.  This breaks on PAE systems where memory could be placed
above the 32-bit addressible limit.

This patch fixes this function to properly use phys_addr_t instead.

Change-Id: I4c62154017520d001bd97c1426b76d827c4842d0
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agoARM: LPAE: use phys_addr_t in alloc_init_pud()
Vitaly Andrianov [Tue, 10 Jul 2012 18:41:17 +0000]
ARM: LPAE: use phys_addr_t in alloc_init_pud()

This patch fixes the alloc_init_pud() function to use phys_addr_t instead of
unsigned long when passing in the phys argument.

This is an extension to commit 97092e0c56830457af0639f6bd904537a150ea4a (ARM:
pgtable: use phys_addr_t for physical addresses), which applied similar changes
elsewhere in the ARM memory management code.

Change-Id: I2ea4ad37cbec60cebbbe7513a4ef54e46ceed499
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195669
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>

5 years agovideo: tegra: host: Reassign T124 sync points
Terje Bergstrom [Fri, 1 Mar 2013 11:46:02 +0000]
video: tegra: host: Reassign T124 sync points

Reassign T124 sync points and remove overlaps. Also add a second
sync point for MSENC. Also moves all sync point definitions to the
same file.

Change-Id: I5f9fe9f671edc92f6b0fe35c521a1e896f5d3e48
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/205566
Reviewed-by: Amit Arora <amita@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agodrivers: video: nvmap: Fix ptr vs phys_addr types
Alex Van Brunt [Sat, 19 Jan 2013 00:57:26 +0000]
drivers: video: nvmap: Fix ptr vs phys_addr types

Use uintptr_t instead of phys_addr_t to store a pointer as an integer.

Change-Id: I164cc7b3a189d91a1926b74780d302af33cbf005
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195686
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra12: timer: Remove unused arch timer
Alex Van Brunt [Fri, 1 Mar 2013 00:53:18 +0000]
ARM: tegra12: timer: Remove unused arch timer

This code was needed before the merge from android-tegra-nv-3.7 fixed
arch_timer.

Now that it compiles, re-enable ARCH_TIMER for T12x

Change-Id: Ib026564652427e472e1644af34eb9f9bf4de2b08
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/205331
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agodrivers: video: tegra: remove nvhost suspend hack after merge
Jin Qian [Fri, 1 Mar 2013 19:46:25 +0000]
drivers: video: tegra: remove nvhost suspend hack after merge

It's a revert of c3263479974bfb661316fdc48309eb4da72d5442.
The issue is fixed by previous change.

Bug 1244239

Change-Id: Ide5a624e5e3d2d471676ad8c6b390847466f3e63
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/205635
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agodrivers: video: tegra: move gk20a init/deinit to probe/remove
Jin Qian [Thu, 28 Feb 2013 00:26:24 +0000]
drivers: video: tegra: move gk20a init/deinit to probe/remove

nvhost deinit gk20a before it's suspended in module idle after recent
merge from main. This is causing crash since suspend code requires
gk20a driver alive. Move init/deinit code to probe/remove to get around
this problem.

Bug 1244239

Change-Id: I699d41672c4c2c30f5f6266970ee322603035ad2
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/205247
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoarm: tegra: Make AVP reservation section sized
Alex Van Brunt [Wed, 24 Oct 2012 23:34:16 +0000]
arm: tegra: Make AVP reservation section sized

With LPAE, sections are 2MB instead of 1MB. Use SECTION_SIZE to use
the correct size int eh LPAE and non-LPAE cases.

Change-Id: I78fb3b7f988aca0c176af7d20e90283fdb66f8ed
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/195680
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: pinmux settings for t12x SPI
Jin Qian [Thu, 28 Feb 2013 01:32:19 +0000]
ARM: tegra: pinmux settings for t12x SPI

Change-Id: Ibf14b66cc91ed78fc3615c0e17f90f858dffc10a
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/204893
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: config: Enable USB,SCSI,network config
Petlozu Pravareshwar [Fri, 1 Mar 2013 13:50:41 +0000]
ARM: tegra: config: Enable USB,SCSI,network config

Add SCSI, USB, Network config variables for the proper
functionality of usb host and device mode.

Change-Id: I51c3e6c4181e8fd9fb9ddfdf159ddbf3c30b37db
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/202911
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: phy: Add USB support on T12x_SOC
Petlozu Pravareshwar [Thu, 28 Feb 2013 07:08:51 +0000]
ARM: tegra: phy: Add USB support on T12x_SOC

Disable pllu_clk for 124 fpga.

Change-Id: If5ab0326971560d02ecf500596adb1d7a1a2a376
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/204637
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoARM: tegra: bonaire: Add USB host support
Petlozu Pravareshwar [Wed, 27 Feb 2013 17:00:20 +0000]
ARM: tegra: bonaire: Add USB host support

Modifying board file sothat usb host works proper.

Change-Id: I4232c9b329728464bc145630d0cc42cf6b726018
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/202887
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoUSB: phy: update the Makefile
Petlozu Pravareshwar [Fri, 1 Mar 2013 06:49:58 +0000]
USB: phy: update the Makefile

Update Makefile for T12x_SOC.

Change-Id: I9d955f7681231edf88b4df43c3baab9faf71411b
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/205423
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: bonaire: Enable only SDMMC4
rrajk [Mon, 18 Feb 2013 06:56:04 +0000]
arm: tegra: bonaire: Enable only SDMMC4

Enabled only SDMMC4 controller for bonaire.
Bug 1218505

Change-Id: I04cef33d6900db4b57604161d5ec7f0a79e4b6a1
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/201626
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: config: enable mmc configs for bonaire
rrajk [Tue, 12 Feb 2013 15:47:04 +0000]
arm: tegra: config: enable mmc configs for bonaire

Bug 1218505

Change-Id: I50f7e0caf39382abe748a6e83884fdf3e1ab994f
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/200010
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agommc: host: tegra: Set number of pipe sates to zero
rrajk [Mon, 18 Feb 2013 09:14:33 +0000]
mmc: host: tegra: Set number of pipe sates to zero

Hack to set pipe stages to 0.

Bug 1218505

Change-Id: I7d1257c2afa2d82ac916bec94a155753e8e936b7
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/201704
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agotegra: bonaire: set SDMMC max clk support to 26MHz
rrajk [Mon, 18 Feb 2013 06:51:51 +0000]
tegra: bonaire: set SDMMC max clk support to 26MHz

As 26MHz supply is available to SDMMC controller,
this hack is necessary to handle ambiguity of clk setting
for SDMMC controller. Setting to 26MHZ is handled in our driver

Bug 1218505

Change-Id: I049feb7515c642e6e09c3066ebfb2ce3d1fa96a2
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/201623
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>