3 years agoARM64: dts: hawkeye: add dts file Hawkeye A03 version
Venkat Reddy Talla [Fri, 3 Jul 2015 04:58:14 +0000]
ARM64: dts: hawkeye: add dts file Hawkeye A03 version

Adding new dts files for Hawkeye A03 sku 3324 and 3326
platform version.

Bug 1661724

Change-Id: I7b9c0353e5d114f9968db6aa4c59319ed7dcf222
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/765776
(cherry picked from commit 85afe62c1b0f16e60bdf57c2700dba5f32f4014b)
Reviewed-on: http://git-master/r/769831
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agopower: battery-gauge: remove mutex lock while reading current limit
Venkat Reddy Talla [Tue, 30 Jun 2015 06:53:13 +0000]
power: battery-gauge: remove mutex lock while reading current limit

Removing mutex lock while reading input current limit.
mutex lock cuasing dead lock situation in suspend resume test.
while reading input current limit, mutex lock is not required
as no parameter is updated in this api.

Bug 200118347

Change-Id: I1db7adbe545eabfbfa4172d42b13571669ef62c7
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/763994
(cherry picked from commit b2f497d0b677c97f5b8027d4a56f9cac130e41cd)
Reviewed-on: http://git-master/r/769834
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoARM: dts: set max battery charge voltage to 4.2V
Venkat Reddy Talla [Fri, 19 Jun 2015 12:42:27 +0000]
ARM: dts: set max battery charge voltage to 4.2V

Reducing max battery charge voltage to 4.2V from dts
for ST8 A03 and A04 platforms for Yoku battery
powered devices.
Updating thermal configuration based on new battery soc
Updating VINDPM configuration based on new battery soc

Bug 200117878

Change-Id: Ic426403d134ad522baddddc80ad402c91a05293d
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/760137
(cherry picked from commit 754e7438f5dfdea440ed61fb7a0cd7428e9ade60)
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/763460
(cherry picked from commit 3d8964bef4b8a2d13b2b09f7ffa59157bfe65482)
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/763959
(cherry picked from commit e8ecff44b9412c54d36818d2491eb510aabddc91)
Reviewed-on: http://git-master/r/769833
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoARM64: dts: update Bq27441 FG parameter values
Venkat Reddy Talla [Fri, 10 Jul 2015 04:56:32 +0000]
ARM64: dts: update Bq27441 FG parameter values

Updating BQ27441 Fuel gauge paramter values for hawkeye
platform to see good charge and discharge curve in all
the scenarios.

Bug 200069078
Bug 200111308
Bug 200094118

Change-Id: I209d6e6e634405958a54e708cd556b6a7af95cf5
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/768751
(cherry picked from commit 1b61bb8de19ba2edf11943bbb74d7a5c1772e2fd)
Reviewed-on: http://git-master/r/773413
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoARM64: dts: Hawkeye: add dtb build time property
Venkat Reddy Talla [Thu, 2 Jul 2015 18:01:59 +0000]
ARM64: dts: Hawkeye: add dtb build time property

Adding dtb build time property to get dts file build time
details in the logs.

Bug 200120629

Change-Id: I224d414680fa2db5cfb5d126f93315a510233d55
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/765407
(cherry picked from commit d45908e00e62d45654d446dafd20ab4a50ff89a1)
Reviewed-on: http://git-master/r/769830
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agonet: wireless: Use the correct type of spin_lock
kraghavender [Fri, 24 Jul 2015 16:22:05 +0000]
net: wireless: Use the correct type of spin_lock

There chances that spin_lock_bh getting called when local irqs
are disabled so use normal spin_lock instead of spin_lock_bh
otherwise kernel will give the WARN exception for irq_disabled()
check in spin_lock_bh function call.

Bug 200114124

Change-Id: Ic105e056cf6a08ceb50107bfac8ea360f25d84ee
Signed-off-by: Raghavender <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/774496
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agotegra: adsp: dfs: allow min clock setting
Viraj Karandikar [Mon, 27 Jul 2015 15:50:42 +0000]
tegra: adsp: dfs: allow min clock setting

Expose function to set minimum ADSP clock

Bug 200126105
Bug 200126363
Bug 1669274

Change-Id: I7fa96f9d988706e6cf348ef56cd970ec25c241e5
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
(cherry picked from commit 17b5ed7e6e7f9fa9893bea3dd41182509ea57e94)
Reviewed-on: http://git-master/r/779168
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

3 years agotegra-alt: adsp: add control to set min ADSP clock
Viraj Karandikar [Mon, 27 Jul 2015 15:52:06 +0000]
tegra-alt: adsp: add control to set min ADSP clock

Certain cases like speaker protection which involve
real-time input require sudden increase in ADSP load.
ADSP DFS fails to cater such sudden increase in load
without compromising power.

Per APM control is added to set min ADSP clock when
APM is running. Min clock is restored when APM stops.

Bug 200126105
Bug 200126363

Change-Id: Icff8cee0b464f9621db0f8ba506d2e3ba307c683
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
(cherry picked from commit cb5c4c718ea2e8a26126cf70da2c44e26673d531)
Reviewed-on: http://git-master/r/779169
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

3 years agoARM64: dts: update embedded data properites
Ankit Gupta [Fri, 24 Jul 2015 15:01:05 +0000]
ARM64: dts: update embedded data properites

This change adds embedded data properties to
imx 214 device tree so that it can be populated
in static properties in user space.

Bug 1547007

Change-Id: I40ac8a6fa2907979b9b87f14f5bcc79162638a1b
Signed-off-by: Ankit Gupta <ankitgu@nvidia.com>
Reviewed-on: http://git-master/r/775775
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Sudhir Vyas <svyas@nvidia.com>

3 years agoadma: tegra: change interrupt-related log levels
Dara Ramesh [Tue, 21 Jul 2015 05:09:49 +0000]
adma: tegra: change interrupt-related log levels

Interrupts may be handled outside of the ISR
when tx_status is called because they need to be handled
before calculating the residual.

change log level from info -> debug

Change-Id: I611bfa3f19e4d08752f2fd54933da83db3d44492
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/772670
(cherry picked from commit 37a19ecea5b42ad64fc59d7b032b961031b42c81)
Reviewed-on: http://git-master/r/773866
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>

3 years agoARM64: DT: T210: Jetson: Pass sdmmc pin info
R Raj Kumar [Wed, 22 Jul 2015 12:58:49 +0000]
ARM64: DT: T210: Jetson: Pass sdmmc pin info

Pass sdmmc1 pin details for configuring them
into GPIO mode during device suspend operation
for Jetson-E and Jetson-CV platforms

Bug 1646287

Change-Id: I5b8bd50eec11fc552d5ca2311d3833745440eb52
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/773451
(cherry picked from commit 1fe8a7451551c19398efceeb1eea96bf90d1b00e)
Reviewed-on: http://git-master/r/775431
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

3 years agogpu: nvgpu: remove Tegra power calls from generic platform
Deepak Nibade [Tue, 4 Aug 2015 14:22:06 +0000]
gpu: nvgpu: remove Tegra power calls from generic platform

Remove Tegra specific powergate and power-domain calls
from generic platform file

Change-Id: I86e263193e01150cbcf7ae50fd0c86f0b8b59b14
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/778677
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agovideo: tegra: dp: fix coverity defects
Santosh Reddy Galma [Mon, 27 Jul 2015 15:11:56 +0000]
video: tegra: dp: fix coverity defects

fix coverity defects 19354, 19355 and 19356

Bug 1416640

Change-Id: Ib44901f0a25d3d1b0be1681dbb1312438c378705
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/775125
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agovideo: tegra: host: move dbgfs ops out of host1x
Sam Payne [Thu, 28 May 2015 18:58:08 +0000]
video: tegra: host: move dbgfs ops out of host1x

dbgfs ops for activity monitor are not hardware
specific and can be moved into nvhost.

This patch moves host1x_actmon_debug_init() and
the operations it uses into nvhost.

Bug 1645757

Change-Id: Ia13ec03cc8cf22712d6921d5b818c5d6158b0e1b
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/748369
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>

3 years agort5639: add option for jack detection source
Harry Hong [Wed, 29 Jul 2015 04:56:52 +0000]
rt5639: add option for jack detection source

by default, only JD2 as jack detection source is available.
for other platforms using the different source, adding dt property,

0 = OFF
1 = GPIO1
2 = JD1
3 = JD2
4 = GPIO2

Bug 200113589

Change-Id: Ic5ce3b1d6ddf8e238786072f140c4756d3c7640a
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/776070
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>

3 years agoarm: tegra: loki: enable tegra sku property
Ray Poudrier [Fri, 13 Mar 2015 04:42:25 +0000]
arm: tegra: loki: enable tegra sku property

Enable property showing sku for shield products

Bug 1558421

Change-Id: I54a1bfca5fb2a3b959ee39cd03a0384f037a930d
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/717178
(cherry picked from commit 585c8cae13e8c64093cf6efdbccec602c942cc95)
Reviewed-on: http://git-master/r/726589
(cherry picked from commit f9936806e23c93e001d13777b7057ac27ebacd62)
Reviewed-on: http://git-master/r/765128
Reviewed-by: Automatic_Commit_Validation_User

3 years agovideo: tegra: hdmi: Fix locks and race condition
Aly Hirani [Wed, 22 Jul 2015 20:52:23 +0000]
video: tegra: hdmi: Fix locks and race condition

The HDMI driver had a couple of race conditions that this change
attempts to fix.

1. ddc_enable/ddc_disable

tegra_hdmi_ddc_enable() and _ddc_disable() functions need to be
called before performing any ddc/i2c transactions on T210. These are
called at least from (1) edid thread, (2) scdc thread, (3) hdcp thread,
(4) from userspace by crc checker. The enable and disable functions
makes sure that the pads are powered on or powered off (with refcounting).
The hdmi driver was using a standard int with no locking around it,
causing typical race conditions and refcounting to go bad. This change
adds a new mutex to protect ddc_refcount.

2. clock_refcount_lock

The hdmi clocks are also refcounted with tegra_hdmi_get() and
tegra_hdmi_put(). They also make sure that the hdmi clocks are only
enabled and configured on the first enable() and turned off on the last
disable(). It was also using a standard int with no refcounting. This
change also adds a new mutex to protect clock_refcount_lock.

3. ddc_lock

ddc_lock was being held across some scdc transactions. However, this
is not needed. The i2c_transfer() function should be responsible for
maintaining the bus lock. Also, this is made worse by the fact that not
all ddc transactions were holding this lock.

Bug 200103101

Change-Id: Idaece90a5d7f9575c3f97e2848bcf1c605de693c
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/766759
(cherry picked from commit 0a4c926462a5ef79872fe2af34f3baec7ef5ff78)
Reviewed-on: http://git-master/r/778832
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agodrivers: video: tegra: Remove EDID clockrate check
Aly Hirani [Sat, 13 Jun 2015 00:46:54 +0000]
drivers: video: tegra: Remove EDID clockrate check

This change removes the mode-filtering which used to remove the
modes from the modedb based on the max TMDS clock rate suggested
by the EDID.

From the HDMI 2.0 spec, Section 10.3.2, with regards to
Max_TMDS_Character_Rate: "This field may be set by the Sink to a
value below the TMDS Character Rate corresponding to the maximum
Pixel clock rate at the maximum color depth". HDMI 1.4 has a same
clause for Max_TMDS_Clock.

This means that the actual maximum TMDS rate supported by the TV
can be higher than the value suggested in the EDID. This filter
should have never been added in the first place since it can
remove actually supported modes.

Bug 1653863

Change-Id: I087b7a4efc3e43de4dfb34071adb88dc9cc6b3e1
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/757615
(cherry picked from commit 4f0571106369cdcf7c81e5620351f4685bfe23ff)
Reviewed-on: http://git-master/r/778831
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agovideo: tegra: hdmi: fix tegra_hdmi_config function
Santosh Reddy Galma [Sat, 25 Jul 2015 18:33:09 +0000]
video: tegra: hdmi: fix tegra_hdmi_config function

This change fixes the improper CONFIG_TEGRA_NVDISPLAY
config handling that causes compilation errors

Bug 200113280

Change-Id: Ia393e99aa698b47fda4887219318a1eafabebdd5
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/774752
(cherry picked from commit b9dbc51a1645ef80655ede6dc2633e83559ba4f0)
Reviewed-on: http://git-master/r/778830
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aly Hirani <ahirani@nvidia.com>
Tested-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agovideo: tegra: dpaux: Fix dpaux seq
Aly Hirani [Wed, 3 Jun 2015 21:52:10 +0000]
video: tegra: dpaux: Fix dpaux seq

This change fixes the dpaux programming sequence. Specifically, the tegrashell
scripts recommend to program the mode before powering on the pad. In the
current state of code, we were turning on the pad first (in the default dpaux
mode) and then switching the mode.

This specifically led to an issue with certain ddc transactions where the
voltage on SDA lines would hover at ~1.0 V (instead of 0 V/5 V high).
Changing this programming sequence helps remove this hover voltage with
certain sinks.

Bug 1652890

Change-Id: I70ef3f351b9fe2a4126f05a0b546e4360365071a
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/754684
(cherry picked from commit 6896ce89b02a8cee7bd6ce4393346751fab9be39)
Reviewed-on: http://git-master/r/767165
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agodrivers: video: tegra: Fix HDMI_CTRL programming
Aly Hirani [Thu, 21 May 2015 01:11:16 +0000]
drivers: video: tegra: Fix HDMI_CTRL programming

This change fixes the programming for the NV_SOR_HDMI_CTRL programming
in the hdmi2.0 driver. The driver was not calculating the value of the
MAX_AC_PACKET correctly which should have been actually based on the
value of REKEY.

This change also cleans up the programming of this register and makes it
much more easier to read.

Bug 1648668

Change-Id: I9d4de4eec4a088719852ecec82c2a55de811c54d
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Reviewed-on: http://git-master/r/745245
(cherry picked from commit c2ce93f123232e966b4b53367ee223ae5a4517ab)
Reviewed-on: http://git-master/r/759239
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agovideo: tegra: dc: Detect TVs with no 594 support
Aly Hirani [Sat, 2 May 2015 06:47:14 +0000]
video: tegra: dc: Detect TVs with no 594 support

4k TVs currently in the market have at least 1 port where they support
HDCP 2.2. These ports usually do not support 4k@60Hz RGB444 (594 MHz)

Unfortunately, in the DTD block of their EDIDs, all these TVs mark
4k@60Hz RGB444 as a supported mode, but modesetting to it doesn't work.

However, the TVs do correctly not include the HF-VSDB and hence omit the
SCDC supported bit. This change adds the correct detection to ignore 6G
modes (which requires scrambling, which in-turn requires SCDC) when no
HF-VSDB and no SCDC bit is present. This will disable the 4k@60Hz RGB444
mode on these TVs. The GPU EDID parser already has this workaround.

This workaround was previously implemented but regressed with

Bug 1642388

Change-Id: I5e91faaf182824972b53b49764c1cec6b4b183e2
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Signed-off-by: Nitish <nrajguru@nvidia.com>
Reviewed-on: http://git-master/r/740525
(cherry picked from commit 31d3dc1abd94b2d438fd8e6e27bee81c7fa67333)
Reviewed-on: http://git-master/r/751993
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agoarm: tn8: Enable CMU on HDMI
Aly Hirani [Sun, 1 Feb 2015 22:54:30 +0000]
arm: tn8: Enable CMU on HDMI

As per the HDMI standard, we should be defaulting to the defined
"limited" color range. In Tegra, we use CMU on dc1/HDMI to achieve

In the userspace, NvCplService is responsible for setting the cmu_enable
node as per the user configuration. However, it actually picks up the
default setting based on what the kernel sets it.

Prior to this change, we were actually defaulting to cmu_enable being
off. This would actually cause us to send full range data with the
limited range avi infoframe and hence the "output is too dark" concern.
This change enables the cmu by default on HDMI instead.

Bug 1572199

Change-Id: I16cccba681f7208b3a5b24e069a211f277af1190
Signed-off-by: Aly Hirani <ahirani@nvidia.com>
Signed-off-by: Nitish <nrajguru@nvidia.com>
Reviewed-on: http://git-master/r/740531
(cherry picked from commit b215fa474e028f9f460733df243399c2b6db1980)
Reviewed-on: http://git-master/r/679872
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agovideo: tegra: dc: moved KSV reads before V'
Sharath Sarangpur [Tue, 30 Jun 2015 02:59:05 +0000]
video: tegra: dc: moved KSV reads before V'

Moved KSV reads for repeaters before V' reads

Change-Id: If34ec5c87c9d4e73c6c2dd2b08a0f5abd9924be6
Signed-off-by: Sharath Sarangpur <ssarangpur@nvidia.com>
Reviewed-on: http://git-master/r/768179
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agopcie: host: tegra: fixes aspm l1 count
Vidya Sagar [Sun, 19 Jul 2015 10:21:29 +0000]
pcie: host: tegra: fixes aspm l1 count

fixes aspm l1 enablement by checking only bit-1 instead
of checking bits-0 and 1 which is actually for both L0s
and L1

Change-Id: Id2a27f18d416488abc1fb9438098bc5938e6e791
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/772043
(cherry picked from commit 9adf2cfd50c0ff0c441c6e9b50c512f0ffa155c0)
Reviewed-on: http://git-master/r/777291
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm64: Update the Image header
Mark Rutland [Tue, 24 Jun 2014 15:51:36 +0000]
arm64: Update the Image header

Currently the kernel Image is stripped of everything past the initial
stack, and at runtime the memory is initialised and used by the kernel.
This makes the effective minimum memory footprint of the kernel larger
than the size of the loaded binary, though bootloaders have no mechanism
to identify how large this minimum memory footprint is. This makes it
difficult to choose safe locations to place both the kernel and other
binaries required at boot (DTB, initrd, etc), such that the kernel won't
clobber said binaries or other reserved memory during initialisation.

Additionally when big endian support was added the image load offset was
overlooked, and is currently of an arbitrary endianness, which makes it
difficult for bootloaders to make use of it. It seems that bootloaders
aren't respecting the image load offset at present anyway, and are
assuming that offset 0x80000 will always be correct.

This patch adds an effective image size to the kernel header which
describes the amount of memory from the start of the kernel Image binary
which the kernel expects to use before detecting memory and handling any
memory reservations. This can be used by bootloaders to choose suitable
locations to load the kernel and/or other binaries such that the kernel
will not clobber any memory unexpectedly. As before, memory reservations
are required to prevent the kernel from clobbering these locations

Both the image load offset and the effective image size are forced to be
little-endian regardless of the native endianness of the kernel to
enable bootloaders to load a kernel of arbitrary endianness. Bootloaders
which wish to make use of the load offset can inspect the effective
image size field for a non-zero value to determine if the offset is of a
known endianness. To enable software to determine the endinanness of the
kernel as may be required for certain use-cases, a new flags field (also
little-endian) is added to the kernel header to export this information.

The documentation is updated to clarify these details. To discourage
future assumptions regarding the value of text_offset, the value at this
point in time is removed from the main flow of the documentation (though
kept as a compatibility note). Some minor formatting issues in the
documentation are also corrected.

Bug 200051179

Change-Id: I07f1e972c20286f57fec082146ae45c79f7fa333
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Tom Rini <trini@ti.com>
Cc: Geoff Levand <geoff@infradead.org>
Cc: Kevin Hilman <kevin.hilman@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
(cherry picked from commit a2c1d73b94ed49f5fac12e95052d7b140783f800 in v3.17)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: http://git-master/r/773131
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

3 years agoiio: common: nvs: L4T suspend/resume
Erik Lilliebjerg [Fri, 17 Jul 2015 05:37:07 +0000]
iio: common: nvs: L4T suspend/resume

- Previously, NVS suspend disabled device for non-WAKE_UP devices.  The resume
  did nothing letting the Android OS resume the devices (re-enable it).
  This change stores the enable state before disabling on suspend and restores
  it during resume, at the kernel level.  The situation of the data being
  pushed to the IIO subsytem before ready is already addressed with the test if
  the IIO buffer is enabled.
- Allow sensor configuration flags changes in realtime.  flags is a member of
  the Android sensor list structure.  This change allows some of the flags bits
  to be changed via the kernel driver's flags attribute.  This allows runtime
  changes, specifically the ability to enable/disable the WAKE_UP bit (bit 0).

Bug 200121777
Bug 200124449

Change-Id: Ib809e559fa99ecd42c9a8ba92901928862f5c4f9
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/771497
(cherry picked from commit 168ddbb752581c71b3918080fbcd626edaef31b5)
Reviewed-on: http://git-master/r/777023
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agodts: sensors: added iqs sensor sleep settings
Shylender Gaddamwar [Wed, 22 Jul 2015 22:28:26 +0000]
dts: sensors: added iqs sensor sleep settings

- On Suspend load sleep settings
- On resume device reload init setting

Bug 200120886
Bug 200124614

Change-Id: I0e85ff2c47e8af7a1b089817a5cd075617922a62
Signed-off-by: Shylender Gaddamwar <sgaddamwar@nvidia.com>
Reviewed-on: http://git-master/r/773615
(cherry picked from commit a655637c8651a7f75c962604c53afa8ab6bb3fa6)
Reviewed-on: http://git-master/r/776365
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agoiio: proximity: IQS2x3 v12
Erik Lilliebjerg [Mon, 27 Jul 2015 16:57:26 +0000]
iio: proximity: IQS2x3 v12

- Fix I2C errors.  The IQS device requires a delay after an I2C STOP has been
  issued to the device and another transaction started.  The IQS device will
  hold the RDY line low ~94-120us *after* the STOP is issued causing a pending
  I2C transaction to think the comm window is open.  Transactions issued during
  this time may cause the device to hold the I2C clock line low.
- Fix runaway interrupts.  When the interrupt line is pulled low to force a
  comm window, the interrupt is first disabled.  However, when the interrupt
  is enabled again, that action causes another interrupt.  Setting the
  interrupt to level triggering prevents the pending interrupt.
- Add deferred resume mechanism.  Due to the device's horrendous communication
  protocol that causes unacceptable delays during suspend/resume, the resume
  action, which is reinitialization from the suspend programming, is deferred
  to the communication execution in normal operation, allowing resume with
  minimum delay.
- Add slider event/stream mode.  Involved putting the intelligence of whether
  to poll or force communication window for I2C transactions with the caller.
- Add ability to move the SAR GPIO value to follow any IQS device's output
  (proximity or touch).  In other words, SAR GPIO can assert based on either
  proximity or touch assertion depending on the DT setting.
- Add device tree suspend byte stream.
- Add DT optional irq_set_irq_wake.
- Add error messages to byte stream parsing.
- Add ATI busy testing before reinitialization.
- Add ATI redo if ATI error is detected.
- Add power cycling for error recovery.
- Add I2C STOP delay monitoring of RDY line before interrupt enable.
- Add interrupt handler debug spew message to discern the communication mode
  used (poll vs forced).
- Add debug functions for the SAR GPIO.  In other words, the SAR GPIO can be
  used as a signal for debugging certain issues and is configurable in the DT.
- Separate driver specific nvs messages to avoid buffer overflow.
- Add documentation that goes with this driver and explains all this.

Bug 200120886
Bug 200124614

Change-Id: I4787f287073c148ccc607cba51c882a310f8e643
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/775156
(cherry picked from commit 990c488cd423a0e30c1075ca13c03368fb0a3f10)
Reviewed-on: http://git-master/r/776364
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agodts: sensors: CM32180 GPIO interrupt
Erik Lilliebjerg [Mon, 20 Jul 2015 12:54:32 +0000]
dts: sensors: CM32180 GPIO interrupt

- Add the GPIO for the CM32180 interrupt.

Bug 200121777

Change-Id: Ieb9a6c90cb696fc297c8e14640663228628ba88c
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/772324
(cherry picked from commit 8b93b16c9c117a4d204a37ce24525ff6e2850231)
Reviewed-on: http://git-master/r/774120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agoiio: light: Add ARA to CM3218x driver.
Erik Lilliebjerg [Mon, 20 Jul 2015 12:27:05 +0000]
iio: light: Add ARA to CM3218x driver.

- The CM32180 device requires the I2C ARA (Alert Response Address) whether the
  interrupt is enable or not apparently.  By adding a GPIO define in the device
  tree for the interrupt, the driver is able to monitor the device's INT pin
  and issue an I2C ARA transaction when asserted (low).
- Add documentation that goes with this driver.

Bug 200121777

Change-Id: I1851186121f87f4ce9350f8a25a6de931c78e1a7
Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-on: http://git-master/r/772314
(cherry picked from commit 1706a69492f1779ddcbac57ef26450ba1930399d)
Reviewed-on: http://git-master/r/774119
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Collins <rcollins@nvidia.com>
Tested-by: Robert Collins <rcollins@nvidia.com>

3 years agoplatform: padctl: fix coverity defects
TW Chiu [Mon, 3 Aug 2015 16:42:11 +0000]
platform: padctl: fix coverity defects

Check return values of functions:

Coverity defect id: 19548

Bug 1416640

Change-Id: I43700fc35943bd67135f51199b1a4198ec3e76a3
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/778009
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

3 years agort5659: Add RT5659 driver
Sameer Pujar [Tue, 23 Jun 2015 13:42:13 +0000]
rt5659: Add RT5659 driver

The driver is received from Realtek.
Following changes have been made,
  1) Disable button detection IRQ. Required for now to
     allow headset/headphone detection to work consistently
  2) Introduced a delay of 20ms in rt5659_headset_detect()
     (suggested by realtek)

Bug 200118114

Change-Id: If5b3e1d25a3815f2cb67edacecddab4f939c262b
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: http://git-master/r/773925
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agoASoC: tegra-alt: machine driver for rt565x
Sameer Pujar [Thu, 23 Jul 2015 09:48:23 +0000]
ASoC: tegra-alt: machine driver for rt565x

Adding the machine driver to support rt565x family of
audio codecs from realtek.

 1) The button detection feature is pending which will
    be enabled going ahead.
 2) The sound card will be registered irrespective of
    whether the audio codec is present or not. This is
    required since all jetson-cv boards wont have audio
    codec connected.

Bug 200118114

Change-Id: Ie52bd4d3c303ebf25f2efed3d8c425e6d0273f0e
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: http://git-master/r/773857
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agoarm64: dts: jetson-cv: entries for sound node
Sameer Pujar [Thu, 23 Jul 2015 09:36:01 +0000]
arm64: dts: jetson-cv: entries for sound node

Sound node entries are made to support audio codec,
dmic, bt-sco and corresponding paths have been enabled

Bug 200118114

Change-Id: Ie4e53cf3f4b68402f57dd2956f30523d238eb9f0
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: http://git-master/r/773851
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agogpu: nvgpu: Dump GR register on ucode timeout
Gagan Grover [Sat, 18 Jul 2015 10:32:33 +0000]
gpu: nvgpu: Dump GR register on ucode timeout

Dump GR registers on ucode timeout.
GR dump is needed during ucode timeout to
get more details.

Bug 200124360

Change-Id: Id19f5bc0d092c060de2ec07a5e63a0a155f86b76
Signed-off-by: Gagan Grover <ggrover@nvidia.com>
Reviewed-on: http://git-master/r/771969
(cherry picked from commit 3f0f13073a174a357623d76db47b2148cb24503c)
Reviewed-on: http://git-master/r/777785
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gaurav Singh <gauravsingh@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agoarm64 : tegra21: disable USB_NET_RAW_IP
Bibek Basu [Fri, 24 Jul 2015 05:00:39 +0000]
arm64 : tegra21: disable USB_NET_RAW_IP

drop support for USB_NET_RAW_IP as its unused

Bug 200092344

Change-Id: I1c8ecd5589506cc3eba3eca9d6ec13257280806e
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/774241
(cherry picked from commit 7150b08895536c16b3c688ebe9e033a49ef4a7af)
Reviewed-on: http://git-master/r/775508
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

3 years agotegra-alt: add controls for CIF channel config
Viraj Karandikar [Fri, 19 Jun 2015 11:31:07 +0000]
tegra-alt: add controls for CIF channel config

Add controls for configuring CIF channels for AMX and ADMAIF.

Add controls for CIF stereo/mono conversion for SFC.

Remove non-zero check in put_byte_map() to update byte mask.
Due to this check, byte 0 map wasn't getting updated for valid
value of 0.

Bug 200100724

Change-Id: I37b96594464f699db93552f5c1e148c51e963c5e
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/760115
(cherry picked from commit 8c2d36d0303aac45553cc64c148d8c62a8bcf880)
Reviewed-on: http://git-master/r/772770
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

3 years agoarm64: dts: odin: fix for BT boot failure
David Yu [Mon, 3 Aug 2015 03:47:47 +0000]
arm64: dts: odin: fix for BT boot failure

When BT_GPIO_5 is low, BCM4356 BT chip cannot boot up.
It should be high or floating. Set GPIO PH7 which is connected
to it to tristate to boot up and reduce current leakage.

Bug 1642069

Change-Id: I4cde67c5537b444fec7cae9742223b9a09484f5e
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: http://git-master/r/777765
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: dts: odin: enable bt and wifi
David Yu [Mon, 3 Aug 2015 03:44:46 +0000]
arm: dts: odin: enable bt and wifi

Bug 1642069

Change-Id: Ibca26db746f366ea40bb292bc9875c621a73196c
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: http://git-master/r/777764
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agomedia: tegra_camera: optimize single shot mode
Bryan Wu [Thu, 9 Jul 2015 23:22:59 +0000]
media: tegra_camera: optimize single shot mode

Current single shot mode, pixel parser is disabled after capture one
frame and software waits for memory write ack done syncpoint, which
only gives us half the frame rate.

Optimized single shot mode:
 - during capture setup, set single shot mode
 - for each frame, wait for FRAME_START syncpoint
 - arm single shot bit to start capture
 - for the last frame, wait for MWA_DONE syncpoint to make sure capture

With optimized single shot mode, frame rate is about 4208x3120 @ 24fps
for IMX135, 1920x1080 @ 30fps for AR0261 and 3280x2464 @ 21fps for
IMX219 (2 lanes).

Bug 1639982

Change-Id: I00a434254c9783358872095f05b8765fe391182e
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/768664
(cherry picked from commit 5557733fc2d3d7022140d7ec4da7dedc415c1276)
Reviewed-on: http://git-master/r/775207
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

3 years agomedia: tegra_camera: add start streaming call
Bryan Wu [Thu, 9 Jul 2015 18:49:32 +0000]
media: tegra_camera: add start streaming call

Queueing buffer might happen before starting streaming. So any queueing
buffer operation before starting streaming shouldn't trigger real
capture but just queue the buffer. After starting streaming, it will
wake up kernel workqueue to start real capture.

Bug 1639982

Change-Id: Iaf4c4a5eb599d112e7ef266b0f1770f27b26ebef
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/768663
(cherry picked from commit 868d78d3c1a454e35fcb6ce0a687bd6d22868e84)
Reviewed-on: http://git-master/r/775206
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

3 years agomedia: tegra_camera: check ERR or NULL for clk
Bryan Wu [Wed, 8 Jul 2015 23:36:53 +0000]
media: tegra_camera: check ERR or NULL for clk

clk struct might be ERR or NULL in the pointer returned from
clk_get(). It should be checked by IS_ERR_OR_NULL().

Bug 1654140

Change-Id: I0debc3fd8172390efc8fa99ab048a36082847c89
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/768146
(cherry picked from commit bf8da66a842edeb29bc4f15444230ce0cb270ed6)
Reviewed-on: http://git-master/r/775205
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

3 years agomedia: tegra_camera: add clocks for CSIE/CSIF
Bryan Wu [Wed, 8 Jul 2015 17:55:33 +0000]
media: tegra_camera: add clocks for CSIE/CSIF

Bug 1654140

Change-Id: Id1617b343cdafec24b4c1757edcba7a37cc6b67d
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/768145
(cherry picked from commit 899fded8922bbd7963d89aa129d009a9d0ac2ae5)
Reviewed-on: http://git-master/r/775204
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

3 years agomedia: platform: tegra: export symbols
Bryan Wu [Tue, 23 Jun 2015 17:57:27 +0000]
media: platform: tegra: export symbols

Sensor driver might be a module which needs some symbols exported in

Bug 1654140

Change-Id: Ic9285ddc6dcd2eeb01d1634f418fe2f909eb2158
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/768147
(cherry picked from commit 3c2e620f3000bd0471d081241d32d3f8dcea57dc)
Reviewed-on: http://git-master/r/775201
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

3 years agodvfs: tegra: Integrate p4v50 CPU/GPU/SOC DVFS tables
Alex Frid [Mon, 27 Jul 2015 21:50:11 +0000]
dvfs: tegra: Integrate p4v50 CPU/GPU/SOC DVFS tables

Bug 1558421

Change-Id: I2769cb3001160afcde5648911c08da6b06990743
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/775437
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

3 years agovideo: tegra: nvmap: warn if no tag is passed
Krishna Reddy [Fri, 24 Jul 2015 21:41:05 +0000]
video: tegra: nvmap: warn if no tag is passed

Warn if no tag is passed during the allocation request.

Bug 1592678

Change-Id: I5e9578c0a0dfa49bfb394a4ec2b77ce3c9a9abcc
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/774639

3 years agoARM: tegra: hawkeye: enable SPI4 interface after master setup
Laxman Dewangan [Wed, 29 Jul 2015 14:34:57 +0000]
ARM: tegra: hawkeye: enable SPI4 interface after master setup

Provide the pincontrol handle for SPI pin interface so
that interface can be up only after controller is
configured. This will avoid any leakage from sharp touch
due to not configuring pin state properly.

bug 1650455

Change-Id: Idf9e48c1f71f5ffad5014a0d09200a67395b4001
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit a2eb6464ee95c55640a637aedf7e68fbc323b4aa)
Reviewed-on: http://git-master/r/778273
GVS: Gerrit_Virtual_Submit

3 years agospi: tegra: add support to enable pincontrol after setup
Laxman Dewangan [Wed, 29 Jul 2015 14:31:50 +0000]
spi: tegra: add support to enable pincontrol after setup

Some of interface required to enable SPI interface only when
spi controller is configured properly.
TO support this, add support to enable the interface through
pin-control  dynamically after configuring the controller.

bug 1650455

Change-Id: I5ff5fb889bd4ed54ce3415d04414fe04d51b176b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 6edbbe5c7efac9d44a06bf7d0c383bf55c385719)
Reviewed-on: http://git-master/r/778272
GVS: Gerrit_Virtual_Submit

3 years agoARM: tegra: hawkeye: Add rail enable/disable and ramp time
Laxman Dewangan [Wed, 29 Jul 2015 10:38:19 +0000]
ARM: tegra: hawkeye: Add rail enable/disable and ramp time

Add enable/disable and ramp time for all rails as per measurement.


bug 200122575

Change-Id: Icbd3d59034f837a7716bb3beb7acf35ba3c8e37f
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit c2bb7ee373026a4fb34276c39ae7b77bd9d61712)
Reviewed-on: http://git-master/r/778271
GVS: Gerrit_Virtual_Submit

3 years agoARM: tegra21: ERS: rails LDO1 and LDO8
TW Chiu [Thu, 11 Jun 2015 12:18:49 +0000]
ARM: tegra21: ERS: rails LDO1 and LDO8

Make LDO1 and LDO8 always ON with LP0 OFF.

Make these rails to be OFF in LP0 by connecting these rails with FPS1.

These rails are necessary for UPHY PAD and PLL. UPHY needs to be in
operating state in LP1. We can only turn these rails OFF in LP0.

Bug 200068549
Bug 1653521

Change-Id: If08dd287ec466bc36e8db0f5b13fe1c81f29be6a
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/756449
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoarm64: tegra210: add device node xusb_padctl
TW Chiu [Tue, 30 Jun 2015 05:18:34 +0000]
arm64: tegra210: add device node xusb_padctl

Rename the node from padctl to xusb_padctl and add properties:

nvidia,lane-map: assign lanes for PCIE driver
nvidia,enable-sata-port: specify if SATA driver will use lane or not

Add power rails necessary for UPHY.

Bug 200068549

Change-Id: Ib02b5551840c33ba853949477e5e3c8333d41e34
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/746213
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoata: ahci: t210 uphy pad and pll
TW Chiu [Thu, 4 Jun 2015 13:26:50 +0000]
ata: ahci: t210 uphy pad and pll

Move T210 PADCTL register access to padctl driver.

Bug 200068549

Change-Id: I504bf5264ed029d8736ea2c51677278e0f9eed99
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/752543
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoplatform: t210: padctl: enable plle hw sequencer
TW Chiu [Thu, 4 Jun 2015 13:14:12 +0000]
platform: t210: padctl: enable plle hw sequencer

Make PADCTL driver as a module to program UPHY PAD and PLL and enable
PLLE HW sequencer early during boot and system resume. This ensures
correct sequence that we only enable PLLE HW sequencer after both
PEX and SATA UPHY PLL HW sequencers are enabled.
PADCTL driver enables all power rails for UPHY PAD and PLL. It will
keep these rails ON during suspend also as we decided to keep UPHY
operating in LP1/SC4. Power tree may turn off these reails in LP0/SC7.

Add checks for UPHY PLL HW sequencers. If HW sequencer is enabled,
there is no need to assert UPHY reset or initialize UPHY PLL.

Export functions below for SATA driver to program UPHY PAD and PLL:

Controller drivers still call functions from PADCTL driver to program
UPHY PAD and PLL, but PADCTL driver will ensure UPHY PLLs are only
initialized once when necessary.

Add code to release always on PAD muxing logic state latching after
bringing all specific lanes of UPHY out of IDDQ.

Define a new spinlock for PADCTL register access to avoid dead lock.

There are two main parts for the change:
The 1st part is for SATA UPHY PAD. The programming sequence is mostly
copied from current SATA driver. The entry points are two exported
functions mentioned above.
The 2nd part is for PADCTL driver to program UPHY PAD and PLL. The entry
functions are tegra_padctl_uphy_init() and tegra_padctl_uphy_deinit().

Bug 200068549

Change-Id: Ic16a18e35b8290daadccb402fc1c3f85b13121dd
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/752541
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoclock: tegra21: Don't disable PLLE under h/w control
Joy Wang [Tue, 23 Dec 2014 10:18:27 +0000]
clock: tegra21: Don't disable PLLE under h/w control

Prevented s/w disable operation to actually disable PLLE if PLLE
control is already transferred to h/w sequencer. Updated s/w disable
procedure in case when h/w sequencer is not engaged.

Bug 200068549

Change-Id: Idc97de202064fb86f438a75b603f9bc437eb392c
Signed-off-by: Joy Wang <joyw@nvidia.com>
Reviewed-on: http://git-master/r/667114
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoclock: tegra21: Separate PLLE h/w control enable
Alex Frid [Thu, 9 Apr 2015 23:30:13 +0000]
clock: tegra21: Separate PLLE h/w control enable

Created a separate clock object "pll_e_hw" for PLLE h/w sequencer.
Moved PLLE sequencer enable procedure from "pll_e" clock enable to
"pll_e_hw" clock enable. This split is necessary because XUSB/SATA
drivers need to configure pad PLLs before PLLE sequencer is enabled
but after PLLE itself is ON. Once enabled, PLLE sequencer cannot be
disabled by s/w and PLLE state is controlled by h/w.

Bug 200068549

Change-Id: I58170d48b1d2fd41350e477dcd2711cf717ecd4e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/729976
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

3 years agobcmdhd: NULL check for interface pointer in dhd_txcomplete
Mohan Thadikamalla [Tue, 28 Jul 2015 11:29:08 +0000]
bcmdhd: NULL check for interface pointer in dhd_txcomplete

Issue: NULL pointer exception when dhd_txcomplete from
net device close.
Fix: ASSERT for ifp and do NULL check before update PKT stats

Call trace:
[<ffffffc00063fc58>] dhd_txcomplete+0xb8/0xd4
[<ffffffc00068cde4>] _dhd_wlfc_pktq_flush+0x274/0x35c
[<ffffffc00068eb0c>] _dhd_wlfc_cleanup+0xc4/0x1d0
[<ffffffc00069053c>] dhd_wlfc_cleanup+0x84/0xa4
[<ffffffc000644cb4>] dhd_stop+0x198/0x1e4
[<ffffffc000a0b04c>] __dev_close_many+0xb8/0xec
[<ffffffc000a0b154>] dev_close_many+0x94/0x120
[<ffffffc000a0b20c>] dev_close+0x2c/0x4c
[<ffffffc00063e650>] dhd_hang_process+0x24/0x44
[<ffffffc000647f94>] dhd_deferred_work_handler+0xfc/0x134
[<ffffffc0000cc81c>] process_one_work+0x26c/0x42c
[<ffffffc0000cd198>] worker_thread+0x180/0x294
[<ffffffc0000d4230>] kthread+0xbc/0xc8

Bug 200123250

Change-Id: Ieb985b5bf814e7c7c50cc89b274ea0c3d56d1ee8
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: http://git-master/r/770445
(cherry picked from commit f4cc22c0837749ba5977036ae4f91d9c0a184451)
Reviewed-on: http://git-master/r/775651
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

3 years agoarm64: save/restore cpuactlr_el1
Prashant Gaikwad [Sat, 18 Jul 2015 08:06:54 +0000]
arm64: save/restore cpuactlr_el1

Bug 1666500

Change-Id: Id724abc62d911b3263bb1bbece51505d910c2f0b
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/771948
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agosecurity: tlk_driver: remove ununsed include file
Mahesh Lagadapati [Thu, 23 Jul 2015 00:27:32 +0000]
security: tlk_driver: remove ununsed include file

This change removes unused include file outercache.h. This is resulting
in compilation failure for platforms which don't have this file.

Bug 200123569

Change-Id: Ia117c297399cedc466609e063c83ffdfbacc4da7
Signed-off-by: Mahesh Lagadapati <mlagadapati@nvidia.com>
Reviewed-on: http://git-master/r/773670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

3 years agoarm64: tegra: jetson_cv: add android firmware
Kerwin Wan [Mon, 27 Jul 2015 10:24:35 +0000]
arm64: tegra: jetson_cv: add android firmware

Bug 200086338

Change-Id: Ib2826bcc602775f65492ace89f85709643193fff
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/775069
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agotegra: pm: change message severity to debug
Naveen Kumar S [Thu, 9 Jul 2015 06:44:51 +0000]
tegra: pm: change message severity to debug

PMC DT related messages which were being printed as errors.
But are actually info messages, not errors.

bug 200114869

Change-Id: I0625355fc8dbe7263f585c38b75ddfc29b642b31
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/768252
(cherry picked from commit 358e1133f3b2589d17aac851a66d672c0e47d9b2)
Reviewed-on: http://git-master/r/774969
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

3 years agonet: wireless: bcmdhd: add nvidia fixes on 1.201.82 driver
Manikanta [Mon, 2 Mar 2015 17:20:47 +0000]
net: wireless: bcmdhd: add nvidia fixes on 1.201.82 driver

6204a40 net: wireless: bcmdhd: add nvidia specific changes
dc55185 wireless: enable rx filter once work mode set
7bc2df5 net: wireless: bcmdhd: don't advertise FW_ROAM feature to supplicant
71b5a00 net: wireless: bcmdhd: Set KSO enable sleep to 5ms
c8fd6f8 net: wireless: use CONFIG_BCMDHD_HW_OOB to enable HW_OOB and OOB_INTR_ONLY
a098912 net: wireless: Disable chip retry logic
0b7b4ea net: wireless: bcmdhd: Fix card detection race condition
2b7a226 net: wireless: bcmdhd: optimize scan time
df870f2 bcmdhd: DELBA support for game streaming.
55ed3fb net: wireless: bcmdhd: correct sdio_ids
eab2794 net: wireless: bcmdhd: correct sdio_ids
cce42ba bcmdhd: fix p2p interface and wlan0 assoc race
61a5a9f Add Miracast modes 5 and 6 to handle interference mitigation on blake
e0956ee net: wireless: bcmdhd: remove roam setting
f1e79c9 bcmdhd: update CONNECTED on WLC_E_SET_SSID event
1961606 bcmdhd: check NULL pointer in cfg80211 callbacks
7cf21ae bcmdhd: check null pointer in cfg80211 callbacks
0719874 bcmdhd: Override fw's check for flowcontrol
2dd91e4 bcmdhd: check NULL pointer
e696d5e bcmdhd: Do not allow p2p calls after netdev unreg
1e00259 bcmdhd: fix NULL pointer in setting IEs
cf6dded bcmdhd: ensure work completion before freeing
ad095a7 net: wireless: bcmdhd: add DT support to bcmdhd driver
4a1e71f net:wireless:bcmdhd: set rpt_hitxrate
edbe8aa net: wireless: bcmdhd: Enable Multi channel concurrency
ff0aa29 net: wireless: bcmdhd: update bcmdhd flags for bcm43241
a4bbed5 net: wireless: bcmdhd: add nvidia fixes on latest driver from st8 branch
7b9144f net: wireless: bcmdhd: Coverity fixes
4251b4a net: wireless: bcmdhd: Coverity fixes
6cc6801 net: wireless: bcmdhd: pick default ampdu_mpdu from dhd flag
89bca7f net: wireless: bcmdhd: add shutdown handler for bcmdhd driver
c039554 net: wireless: read edp consumer name from DT
a4f0bfd bcmdhd: Notify BSS connect done on WL_STATUS_CONNECTING set
3ab9296 net: wireless: bcmdhd: fix wdev pointer race condition
4f3ebce net: wireless: bcmdhd: Custom sysfs for Tegra.
e857358 net: wireless: bcmdhd: Remove verbose sysfs prints
d6dc0bb net: bcmdhd: Fix deadlock in kernel work queue
8a600f4 net: bcmdhd: Stop sysfs worker if wifi off
2a2bfcc net: bcmdhd: Adjust sysfs circular buffer size
7ccbdc5 net: wireless: bcmdhd: change the policy of TCPACKSUPPRESS
984cda2 net: wireless: bcmdhd: mask WLC_E_ROAM event for bcm4354
4826815 net:wireless:bcmdhd: Fix KSO retry logic
5474876 net:wireless:bcmdhd: Recover From Chip Crash Event
be2bea2 net: wireless: bcmdhd: Update the cfg layer with new channel info
cb1565f bcmdhd: reduce the unwanted log level to trace
e0ae415 bcmdhd: wait for cfg cleanup before unregistering
7660485 net: wireless: bcmdhd: synchronize 2 contexts
84ebf92 net: wireless: bcmdhd: start and stop packet logging
25d3a72 net: wireless: bcmdhd: Custom sysfs for rx packet with ethheader.
76ca4c4 net: bcmdhd: Add iovar support to android driver command
beb258e net: wireless: bcmdhd: added support for BCM4339
57fedc8 net: wireless: bcmdhd: add support for BCM4339
31a68ac net: wireless: bcmdhd: Add AUTOSLEEP driver command
81a4827 net: wireless: bcmdhd: set sdio block size to 256
5c7fa3a net: wireless: bcmdhd: Optimize DPC priority.
202e56e net: wireless: bcmdhd: Reset global net interface instance
0c6ecfb net: wireless: bcmdhd: Check SDIO flag for Auto Sleep
0a306fd net: wireless: bcmdhd: start and stop packet capture
fb070be net: wireless: bcmdhd: update wl_cnt structure
20436de net: wireless: bcmdhd: enable SUPPORT_P2P_GO_PS flag
7d128a9 net: wireless: bcmdhd: use nvidia specific country code
6d9d9c6 net: wireless: bcmdhd: get custom country code from dts file
085b837 net: wireless: bcmdhd: dummytimestamp packets
4293aac net: wireless: bcmdhd: fix p2p chanspec for 5GHz band
1aaf5e9 net:bcmdhd:Dump dhd_time consuming cnt after loop
89540e0 net: wireless: bcmdhd: ignore wl events
6e8e255 bcmdhd: clear driver status when link is down
3c0961d Fix rx_tid settings when VSDB disabled in firmware
2e3f285 net: wireless: bcmdhd: Fix p2p discovery fail
210c364 Add driver command MKEEP_ALIVE
27ab45f6 net: wireless: bcmdhd: Dynamically chip select
026fa5e bcmdhd: do not use null pointer after assert fails
3259928a7 bcmdhd: move WLC_E_ESCAN_RESULT to DHD_ISCAN logs
6941861 net: wireless: bcmdhd: handling rmmod of bcmdhd driver
92d320d bcmdhd: set on and off delay
86ff801 net: wireless: bcmdhd: fix skb->priority for QoS
7072e1c net: wireless: bcmdhd: Enable rxcb iovar
1f536ca net: wireless: bcmdhd: capture driver suspend/resume call
a058a7c bcmdhd: fix bcmdhd_irq_number issue for pcie
243a5db net: wireless: bcmdhd: Add custom scan policy.
1e5ea88 net: wireless: bcmdhd: Disable rxcb iovar for PCIE
6554f74 net: wireless: bcmdhd: kernel log cleanup
3a0bd36 net:wireless bcmdhd: add 64bit PCIe bus support
c4fccd5 net: wireless: bcmdhd: Clear CONNECTING status in driver
91bbd3e net: wireless: bcmdhd: NULL checks in dhd_wl_host_event
aaa8035 net: wireless: bcmdhd: enable nvcap for pcie interface
net: wireless: bcmdhd: fix compile and link errors in 1.201.82 driver
net: wireless: bcmdhd: fix udp tx throughput issue
net: wireless: bcmdhd: fix cmd timeout in 1.201.82 driver

bug 200063026

Change-Id: I3cc8f55e528170c3cb475dd2ceeb019838b333f7
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/761947
(cherry picked from commit 517d163c24892950796b64c28b0344b7c69db207)
Reviewed-on: http://git-master/r/774952
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agonet: wireless: bcmdhd: update bcmdhd driver to 1.201.82
Dhruvaraja [Wed, 24 Jun 2015 16:13:29 +0000]
net: wireless: bcmdhd: update bcmdhd driver to 1.201.82

bug 200063026

Change-Id: I26533cbaffe3a5e46f4bf99cb17486cd89f5916d
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/761946
(cherry picked from commit dee6d0b3f1a48bac9ccd555c7f638f76dfafa74d)
Reviewed-on: http://git-master/r/774951
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

3 years agovideo: tegra: dc: fix dsi seamless logic
Santosh Reddy Galma [Thu, 16 Jul 2015 11:52:55 +0000]
video: tegra: dc: fix dsi seamless logic

removed the code snippet that is never reached and
can break dsi seamless on older platforms.

Change-Id: Ie25b5459682eddc8a70f83a473d9f836a5e05beb
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/771053
(cherry picked from commit f2a94a6749a60671ce17d93fc669b608c75ce8c8)
Reviewed-on: http://git-master/r/774797
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: tegra: enable dynamic seamless for jdi 5.8" panel
Santosh Reddy Galma [Wed, 15 Jul 2015 10:07:43 +0000]
arm: tegra: enable dynamic seamless for jdi 5.8" panel

Bug 200123472

Change-Id: Id4e6806e8788b87427f82362a1f421fef08cd506
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/770424
(cherry picked from commit af9386430031e71d63b26913fdb8adc706b05cca)
Reviewed-on: http://git-master/r/773493
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: tegra: enable seamless for auo 8 inch panel
Santosh Reddy Galma [Wed, 15 Jul 2015 08:30:45 +0000]
arm: tegra: enable seamless for auo 8 inch panel

Bug 200123472

Change-Id: I52a57445ca510df22b8615d8cc42571c45eb3fcd
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/770371
(cherry picked from commit 16db21befecd4a67bd3b5713a3e7f20d5f9bf23c)
Reviewed-on: http://git-master/r/773492
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: tegra: enable dynamic seamless for jdi 5" panel
Santosh Reddy Galma [Wed, 15 Jul 2015 10:21:31 +0000]
arm: tegra: enable dynamic seamless for jdi 5" panel

Bug 200123472

Change-Id: I94929219e381eedec98f12a1b61af67d6b7b34ca
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/770426
(cherry picked from commit 6ac9d4239c8d6c335ae1c4c46b59b196e831fe2d)
Reviewed-on: http://git-master/r/773491
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: tegra: enable dynamic seamless for sharp 7" panel
Santosh Reddy Galma [Wed, 15 Jul 2015 10:35:51 +0000]
arm: tegra: enable dynamic seamless for sharp 7" panel

Bug 200123472

Change-Id: I7cdcf87e70f46a5518a889d2c2e4ef7fdadcf87c
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/770431
(cherry picked from commit 4e4110641308137a67a2ccf7c01ff8f82b5978bb)
Reviewed-on: http://git-master/r/773490
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: tegra: enable dynamic seamless for loki 5" panel
Santosh Reddy Galma [Wed, 15 Jul 2015 10:26:51 +0000]
arm: tegra: enable dynamic seamless for loki 5" panel

Bug 200123472

Change-Id: Iaf0afe4f82606b2d627835e0cc88bd4e12e851af
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/770429
(cherry picked from commit 54ddbae8c1bc806d2d31e1c8551bf1819659966b)
Reviewed-on: http://git-master/r/773489
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm: tegra: enable seamless for sharp wuxga 8in
Santosh Reddy Galma [Mon, 29 Jun 2015 15:54:15 +0000]
arm: tegra: enable seamless for sharp wuxga 8in

Bug 200100359

Change-Id: Ie0b0cc8884d3b9361f5d13ab59cf7d33ef57e93b
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/763694
(cherry picked from commit f00cfd1c8d4e56db59267d347952a2dde1be332a)
Reviewed-on: http://git-master/r/770211
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agovideo: tegra: dc: WAR to disable seamless in l4t
Santosh Reddy Galma [Mon, 13 Jul 2015 11:20:51 +0000]
video: tegra: dc: WAR to disable seamless in l4t

WAR to enable seamless feature only in android
usecase as bootloader doesn't initialize display
properly for l4t.

Bug 200100359
Bug 200122858

Change-Id: I9534af6be5d0d310fad8dd0d224e432c19d8e819
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/769344
(cherry picked from commit 0b2e8d7737b46dac85ef4bdd191adfa800f64a7a)
Reviewed-on: http://git-master/r/770210
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agovideo: tegra: dsi: add dynamic seamless support
Santosh Reddy Galma [Mon, 29 Jun 2015 15:39:36 +0000]
video: tegra: dsi: add dynamic seamless support

add dynamic seamless support for DSI based on whether
bootloader initialized the corresponding dc instance

Bug 200100359

Change-Id: I4ccdd8ea6965c0b9ad4e858ab3c34a284d939619
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/763693
(cherry picked from commit 97af30a5e946a713e873b110f7fca18e8e70290a)
Reviewed-on: http://git-master/r/770208
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agocpuidle: tegra21: notify frozen CPUs to BPMP
Sivaram Nair [Tue, 9 Jun 2015 02:06:58 +0000]
cpuidle: tegra21: notify frozen CPUs to BPMP

During suspend entry & exit, non-boot CPU's idle tolerance is notified
to BPMP. This is causing a delay during suspend exit because
tegra_bpmp_send() get blocked until BPMP resume is complete.

Deploy the newly added MRQ_CPU_FROZEN to notify BPMP during
suspend-entry so that CCPLEX need not issue a second notification during
suspend-resume (BPMP will remember the CPUs that are being frozen and
can resore their tolerance level during BPMP's internal resume process).

Bug 200088740

Change-Id: I384e3e5397b3b7fb33fe20d5359e150c8a440ad0
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/758282
(cherry picked from commit 46495bbee73e6e554effd47e4c15ecac79be9411)
Reviewed-on: http://git-master/r/773104
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>

3 years agoplatfotrm: tegra: Set CPUFREQ maximum frequency target
Alex Frid [Sat, 4 Jul 2015 06:28:22 +0000]
platfotrm: tegra: Set CPUFREQ maximum frequency target

set maximum CPU frequency target, instead of switching to PERFORMANCE
governor. This would still boosts CPU frequency while Tegra default
USERSPACE governor is set, but avoid reloading governor from kernel.

Bug 200114201

Change-Id: I17192cd5478e5e035302421b8593f7adb2e80a24
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/766359
Reviewed-by: Sreenivasulu Velpula <svelpula@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

3 years agouart: serial: tegra: add receive fifo error log.
puneet saini [Mon, 15 Jun 2015 05:05:18 +0000]
uart: serial: tegra: add receive fifo error log.

Bug 200051480

Change-Id: I46177789f52cdf13ac1d4ec8d5de7739f006ce56
Signed-off-by: puneet saini <psaini@nvidia.com>
Reviewed-on: http://git-master/r/757786
(cherry picked from commit cdf1725e23fffcd156a13b4a2dc344f9d4ceee4b)
Reviewed-on: http://git-master/r/772667
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>

3 years agovideo: tegra: dc: fix when vrr is called
Daniel Solomon [Thu, 4 Jun 2015 21:35:56 +0000]
video: tegra: dc: fix when vrr is called

Do not run VRR logic while a flip is still pending.
See bug comment #24 for details.

Bug 1647695

Change-Id: I46bfeceab92193094d3661f5b36670c2085427bc
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/752731
(cherry picked from commit 9fa6334ace50543724f18ead6091aeb834555e7d)
Reviewed-on: http://git-master/r/771165
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

3 years agomisc: tegra_ppm: fix bug in _pow(0,0)
Matt Longnecker [Sun, 26 Jul 2015 04:56:55 +0000]
misc: tegra_ppm: fix bug in _pow(0,0)

Change the implementation of _pow such that _pow(0,0) returns 1
instead of 0. This corrects a discontinuity at 0 degrees Celcius.

Bug 200116400

Change-Id: I193bd78aa53717e1c5979d919446aba5379570df
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/774777
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

3 years agotegra: imx214: Enable embedded metadata feature
Ankit Gupta [Wed, 22 Jul 2015 09:08:16 +0000]
tegra: imx214: Enable embedded metadata feature

This change enables the embedded metadata register
in the imx214 sensor driver.

Bug 1547007

Change-Id: I71e5f1de4fe15ee77f8470d72293da9f43e4434a
Signed-off-by: Ankit Gupta <ankitgu@nvidia.com>
Reviewed-on: http://git-master/r/773388
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sudhir Vyas <svyas@nvidia.com>

3 years agoxhci: tegra: fix return value for boost_cpu_freq
Bibek Basu [Mon, 20 Jul 2015 06:38:15 +0000]
xhci: tegra: fix return value for boost_cpu_freq

Fixed sparse tool warning for return value.
tegra_xusb_boost_cpu_freq should be bool

Bug 200067946

Change-Id: I5be35b8e8ef1b070ddcc32ee9543b899363d2210
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/772211
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

3 years agobacklight: lp855x: skip backlight off in seamless
Santosh Reddy Galma [Mon, 29 Jun 2015 06:55:04 +0000]
backlight: lp855x: skip backlight off in seamless

skip turning off backlight for seamless usecase
to avoid blink if bootloader has initialized dc

Bug 200100359

Change-Id: I55b5a4937cab03c2c784d0873ea5ed89d83b6160
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/763492
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
(cherry picked from commit cb64404c68a1f1131f1ed7995d9e5b94f61136a2)
Reviewed-on: http://git-master/r/769282
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agodtc: add check for reserved-memory usage
Sri Krishna chowdary [Fri, 3 Jul 2015 09:24:40 +0000]
dtc: add check for reserved-memory usage

If a node is present under /reserved-memory/ but not being
referenced by any device node through the memory-region property,
then it will be reserved but potentially unused when device boots

Bug 200027296

Change-Id: I7e78e368e0ab0b83c9d8414206834792da44b834
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/766525
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

3 years agovideo: tegra: host: make success log dbg not info
Sam Payne [Thu, 23 Jul 2015 17:03:30 +0000]
video: tegra: host: make success log dbg not info

log for nvdec falcon booting success should be
dbg level to prevent spam

bug 200030193
bug 200091571

Change-Id: If65dfe9f07af05196d974d67dbe51707ac7ef8e5
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/773974
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

3 years agoarm64: dt: odin: correct i2c instance for bq2419x
Harry Hong [Thu, 23 Jul 2015 00:29:22 +0000]
arm64: dt: odin: correct i2c instance for bq2419x

Changing to GEN1 based on board design

Bug 200111952

Change-Id: Ica49ebc232eedfee405a635671b1d099a84f664a
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/773673
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm64: dt: odin: add properties for fts node
Harry Hong [Tue, 21 Jul 2015 01:59:07 +0000]
arm64: dt: odin: add properties for fts node

- add reset gpio
- add avdd regulator

Bug 200111832

Change-Id: I6fc1ae595916185e1295e417639fce0df8e5f982
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/772620
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm64: dt: odin: adding vol up/down gpio-keys
Harry Hong [Wed, 22 Jul 2015 01:47:21 +0000]
arm64: dt: odin: adding vol up/down gpio-keys

bug 200108481

Change-Id: I2b54e3d742ffcf5e8e90d9ed671e5564a2b08283
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/773223
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoarm64: dts: hawkeye: set backlight current to 20mA
Daniel Solomon [Mon, 13 Jul 2015 18:30:58 +0000]
arm64: dts: hawkeye: set backlight current to 20mA

As per latest discussions with the panel vendor.

Bug 1664626

Change-Id: Ibf9ed1adaed046ad88372414ea3ef2f5d4e1b90a
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/769442
(cherry picked from commit b0ed92a94b0f3a9cddc572d82cc9f04c0756138a)
Reviewed-on: http://git-master/r/771173
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoregulator: tps65132: fix register address typo
Daniel Solomon [Fri, 10 Jul 2015 03:20:53 +0000]
regulator: tps65132: fix register address typo

Bug 1630935

Change-Id: I1931b398df1dd74e1fa118dcde5c46ea70671c90
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/768733
(cherry picked from commit 4066451b27a1437d8f45427abf8b87ab642846b0)
Reviewed-on: http://git-master/r/771166
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoARM64: t210: add support for t186-interposer
Laxman Dewangan [Thu, 23 Jul 2015 12:33:25 +0000]
ARM64: t210: add support for t186-interposer

Add base DTS for the t186-interposer.
Interposer are:
P3310-1000-a00 + P2597
E3301-1000-a00 + P2597

Also add the t186-interposer as one of machine for t210
ref platforms.

Change-Id: Iab3c2fda5292de5f6dc395100a64fde4e0e2d316
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 94e3652096cc4819939ade258a529a92c0c867ef)
Reviewed-on: http://git-master/r/774796
GVS: Gerrit_Virtual_Submit

3 years agoata:tegra_ahci: Fix Powergate and ungate ref count
Preetham Chandru R [Thu, 16 Jul 2015 06:25:04 +0000]
ata:tegra_ahci: Fix Powergate and ungate ref count

Bug 1653521

Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Change-Id: I1167a819a10d29ebf66fba732fcf71de4e16ed6e
Reviewed-on: http://git-master/r/769412
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

3 years agoplatform: tegra: powergate: skip GPU in powergate debugfs
Deepak Nibade [Thu, 23 Jul 2015 06:57:07 +0000]
platform: tegra: powergate: skip GPU in powergate debugfs

Skip printing GPU's powered status in /d/powergate debugfs
since GPU driver now itself manages its railgating and
powergate driver cannot keep track of GPU's status

Note that GPU entry will still appear in the debugfs but
the status will be displayed as "skip"

Bug 200124736

Change-Id: I66eb7881e24d4f7747c5041e59d3275e47592235
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/773794
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Gagan Grover <ggrover@nvidia.com>

3 years agogpu: nvgpu: sysfs to check if GPU is railgated
Deepak Nibade [Wed, 22 Jul 2015 13:04:46 +0000]
gpu: nvgpu: sysfs to check if GPU is railgated

Add below sysfs to check if GPU is railgated or not :

Bug 200124736

Change-Id: Iafac48bbe82fcd422eeb2b948490e8dc8ad3801a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/773456
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agommc: tegra: Enable GPIO mode during device suspend
R Raj Kumar [Fri, 12 Jun 2015 05:58:44 +0000]
mmc: tegra: Enable GPIO mode during device suspend

- Parse the sdmmc-pins details in tegra driver
- Enable GPIO mode and output a "1" on the entire
  sdmmc bus before shutdown of the sdmmc power rails.
- Disable GPIO mode after shutdown of the sdmmc power
- Sequence to turn-off vddio rail for SD2.0 cards is
  3.3V --> 1.8V --> 0V
- Set PWR_DET_VAL(E_3v3) to 1 (default value) after
  sdmmc power rail shutdown.

Bug 1646287

Change-Id: Ifa70d0c73acb71ffa073e99cf2f90ca3f29b360e
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/773756
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agoARM64: DT: T210: Hawkeye: Pass sdmmc pin info
R Raj Kumar [Fri, 12 Jun 2015 05:54:59 +0000]
ARM64: DT: T210: Hawkeye: Pass sdmmc pin info

Pass sdmmc3 pin details for configuring them
into GPIO mode during device suspend operation.

Bug 1646287

Change-Id: Idcea35689e1acaa1e6b9a8aef3bc44cc60ee1573
Reviewed-on: http://git-master/r/757949
(cherry picked from commit f8a9673eb8e7e76f8b5cfacd365dd4744038150d)

Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Change-Id: I80c471010a4edebe0fc3b0723c7a1579aad9bded
Reviewed-on: http://git-master/r/773755
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

3 years agoRevert "net: wireless: bcmdhd2: Add 2nd instance of bcmdhd"
kraghavender [Wed, 17 Jun 2015 07:04:10 +0000]
Revert "net: wireless: bcmdhd2: Add 2nd instance of bcmdhd"

This reverts commit a1bf3e9bd74d8fdce71bb318520b9886bc278604.
Removing the support of the second Wi-Fi chip as of now although
it may be supported in future as this driver is going to be
obsolete for future need. Currently, code is having the coverity
issue and decided to remove the driver from code tree instead of
fixing anything on this as this is obsolete driver.

Bug 200093532

Change-Id: I7b08e39ef07aece555994db1794798e1f5e4be12
Signed-off-by: Raghavender <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/773853
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

3 years agoisomgr: remove VI_ONE_DEVICE configs checks
Shridhar Rasal [Wed, 22 Jul 2015 10:44:17 +0000]
isomgr: remove VI_ONE_DEVICE configs checks

This removes VI_ONE_DEVICE checks of t12x and t21x from isomgr,

Bug 1650530

Change-Id: I1e0b276e521c370259f27bbd652f3eb0f1d0a6a1
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/773733
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agoclocks: tegra12: remove VI_ONE_DEVICE references
Shridhar Rasal [Wed, 22 Jul 2015 10:43:36 +0000]
clocks: tegra12: remove VI_ONE_DEVICE references

As VI_ONE_DEVICE config enabled on all t12x devices,
remove unnecessary clock references

Bug 1650530

Change-Id: Ie5422ad0992e6d231aa6ae7e13472459f2bfa059
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/773732
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agoarm: t124: remove OF_DEV_AUXDATA for tegra_vi
Shridhar Rasal [Thu, 23 Jul 2015 04:24:16 +0000]
arm: t124: remove OF_DEV_AUXDATA for tegra_vi

- As VI_ONE_DEVICE konfig enabled on device, remove OF_DEV_AUXDATA with
 protected config.

Bug 1650530

Change-Id: I994e3d20b67983aa1468aa56e32d8f11c36c8b03
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/773731
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agovcm30t124: remove unused VI DT nodes
Shridhar Rasal [Thu, 23 Jul 2015 04:21:28 +0000]
vcm30t124: remove unused  VI DT nodes

- Remove tegra_vi device DT node as VI_ONE_CONFIG config
  enabled default for platform

bug 1650530

Change-Id: I2d97c85138e5b5292fa8bbe0f2d0818efc18b985
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/773730
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agoclock: tegra21: remove VI_ONE config references
Shridhar Rasal [Wed, 22 Jul 2015 10:23:52 +0000]
clock: tegra21: remove VI_ONE config references

VI_ONE config is enabled default for all platforms, remove
dead clock reference code.

Bug 1650530

Change-Id: Ib31e34a6ea9265f2313bdf1fd8ab8d688fb21ac5
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/773729
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

3 years agomedia: tegra_camera: remove master dev reference
Shridhar Rasal [Thu, 25 Jun 2015 05:20:33 +0000]
media: tegra_camera: remove master dev reference

- This removes master device references which is not effective
 after multi channel support.

Bug 1650530

Change-Id: I41d6406a3d6ff3bc39bf067a02eb7a81850db0b3
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/762221
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>