5 years agogpu: nvgpu: Fix invalid GPFIFO entries
Alex Waterman [Wed, 3 Jun 2015 20:41:04 +0000]
gpu: nvgpu: Fix invalid GPFIFO entries

With the addition of the buddy allocator often times push buffers are
allocated by the kernel in high GVA memory regions. These addresses,
when written into a GPFIFO entry, have bits set in entry1 of the GPFIFO
command.

As a result, if no length is set, then these address bits will be
interpreted as opcodes by the GPU. The bug fixed by this patch was
caused by a wait_cmd being inserted into the GPFIFO with an address
of a pushbuffer above 4GB and a zero length. This occured becasue
the code that creates the wait_cmd was able to return what appeared
to be a valid priv_cmd_entry even though there was nothing in that
command.

This bug does not appear before the buddy allocator because the FFF
allocator always starts allocating from low addresses. As such when a
channel's GPFIFO is allocated it gets an address below 32bits. The,
because no higher address bits are set, entry1 of the GPFIFO is simply
0 and the GPU trets the command as a no-op.

Change-Id: I9c1e600c368b55626e99f6f712f1821148bbb76d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/752079
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoiommu/tegra: smmu: modify iova_to_phys debugfs
Sri Krishna chowdary [Thu, 21 May 2015 18:46:57 +0000]
iommu/tegra: smmu: modify iova_to_phys debugfs

1. Avoid dumping pages when physical address is not valid.
2. Do not dump physical page from iova_to_phys debugfs, instead use
newly created iovadump debugfs.
3. By default, dump physical page to seq_file as this new iovadump debugfs
is meant to do the same.

Bug 200106873

Change-Id: Ia5884f4be551599de5e845dc1be0e630dad8e829
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/745544
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: nvmap: make local function static
Amit Sharma (SW-TEGRA) [Wed, 3 Jun 2015 14:45:32 +0000]
video: tegra: nvmap: make local function static

Fixed the following sparse warning by making the local function as 'static':
- warning: symbol 'nvmap_create_fd' was not declared.
           Should it be static?

Bug 200067946
Bug 200088648

Change-Id: I2545db9ec8abd9fb83583cf5e5bfae93fa9fa8f7
Signed-off-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/751942
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Maneet Maneet Singh <mmaneetsingh@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoptm: tegra210: add formatter reg to readout
Sam Payne [Wed, 27 May 2015 17:02:15 +0000]
ptm: tegra210: add formatter reg to readout

formatter register value is now read out as
part of trace cpu-config.

Change-Id: I0731a8bd1120cdb1d54c01dead102e17a9613aa6
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/747837
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Liang Cheng (SW) <licheng@nvidia.com>

5 years agoRevert "Revert "arm64: configs: enable connector""
Bharat Nihalani [Fri, 29 May 2015 13:23:40 +0000]
Revert "Revert "arm64: configs: enable connector""

This reverts commit af3aac07bc6f3a2c0706002b17cb941a5cbef24d
since the change was reverted to fix bpmp_sanity failure.

Proper (and most probable) fix for bpmp_sanity failure was
merged with change http://git-master/r/#/c/748726.

Bug 1650534

Change-Id: I5c8d80c4a3e15b4a81e75278b62361a6b01d3dca
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/748727

5 years agoarm/arm64: odin: add number of lanes to dt
Alvin Park [Mon, 1 Jun 2015 04:32:32 +0000]
arm/arm64: odin: add number of lanes to dt

add 'nvidia,lanes' to odin common dt and
set 'nvidia.lanes' to '2'.
This is made to work with change
Ie8dbc434b5d6301d2c13241622a74783b053b0e6

Bug 200106509

Change-Id: Id780c10a2510f70306e3a5aa9efa516b32335add
Signed-off-by: Alvin Park <apark@nvidia.com>
Reviewed-on: http://git-master/r/749272
(cherry picked from commit 2d4e83579357e728634e8c6fad88c74b4a23036e)
Reviewed-on: http://git-master/r/751151
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Tested-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoplatform: tegra: do not set delay for MC clock domain
Prashant Gaikwad [Fri, 29 May 2015 13:19:00 +0000]
platform: tegra: do not set delay for MC clock domain

Bug 1650534

Change-Id: Ia92a068625e77951db937ccac3ec3b9e6e7b02d8
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/748726
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: move pod_scaling.c
Sam Payne [Mon, 18 May 2015 18:58:47 +0000]
video: tegra: host: move pod_scaling.c

move pod_scaling.c from nvhost to devfreq

bug 1645757

Change-Id: I0e905bf7e14aa264c4235ddfa94536acd5e4c008
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/743942
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>

5 years agopinctrl: tegra: uphy: update sata params through prods
Rakesh Babu Bodla [Thu, 28 May 2015 11:58:44 +0000]
pinctrl: tegra: uphy: update sata params through prods

Provide option to bypass fuse and update sata params
through prods.

Bug 200090139

Change-Id: If0bb2b1460e13d84e2b5db30def77bddbfc8ae0d
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/748666
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agovideo: tegra: host: remove hwctx_syncpt_idx refs
Sam Payne [Mon, 18 May 2015 19:09:12 +0000]
video: tegra: host: remove hwctx_syncpt_idx refs

hwctx_syncpt_idx references have not been
used for a few years

bug 1645757

Change-Id: If469c58113a1338147a6e861162af3e4a9d32cca
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/743948
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

5 years agoscsi: ufs: add ufs tegra driver support
venkata jagadish [Wed, 20 May 2015 10:37:07 +0000]
scsi: ufs: add ufs tegra driver support

Bug 200078857

Change-Id: If35819b89535008d999e9ff73e0921f27afda881
Signed-off-by: venkata jagadish <vjagadish@nvidia.com>
Reviewed-on: http://git-master/r/744890
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agodriver: video: skip unsupported mode based on lanes
Alvin Park [Mon, 1 Jun 2015 01:50:21 +0000]
driver: video: skip unsupported mode based on lanes

Do not add unsupported mode based number of lanes on video driver
so that hwcomposer could not know unsupported mode.

For example, if number of lanes is 2, could not support 4K 60fps
Then kernel driver will not pass 4K 60fps to hwcomposer.

Bug 200106509

Change-Id: Ie8dbc434b5d6301d2c13241622a74783b053b0e6
Signed-off-by: Alvin Park <apark@nvidia.com>
Reviewed-on: http://git-master/r/749271
(cherry picked from commit 60b8c1aeaed587e35cee293cfbec5c7852d1e19e)
Reviewed-on: http://git-master/r/751150
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agommc: tegra: Enable E_Input before setting 3.3v.
Naveen Kumar Arepalli [Thu, 21 May 2015 10:23:11 +0000]
mmc: tegra: Enable E_Input before setting 3.3v.

-Enable E_Input before setting 3.3V, this change is required
for T210 only hence NVQUIRK2_SET_PAD_E_INPUT_3_v_3 is used.

Bug 1645608

Change-Id: I448e4481ab5a4038be4290482b676962dbf308f9
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/747026
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agotegra-alt: adsp: free compress buffer on stream close
Viraj Karandikar [Fri, 29 May 2015 12:41:00 +0000]
tegra-alt: adsp: free compress buffer on stream close

Free of compress stream buffer.
Fix freeing of PCM capture buffer.

Bug 200056741

Change-Id: Ia64ba3206563f0d22f30bca1bab9349a7a5ca0dd
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/748714
(cherry picked from commit 9cc04c256d3e8b56f4264d5f246d773a3192a1ca)
Reviewed-on: http://git-master/r/751863
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agotegra: adsp: actmon: tune to avoid occasional audio pops
Viraj Karandikar [Wed, 27 May 2015 11:01:10 +0000]
tegra: adsp: actmon: tune to avoid occasional audio pops

Occasional audio pops were observed for 2-3 seconds when
starting offload stream while there is already a CPU PCM
stream playback in progress. Audio pops were due to drop
in clock during frequent clock transitions.

Increased down_wmark_window to 8. Bring down boost_freq
smoothly instead of abruptly setting to 0 when it drops
below boost_freq_step.

Bug 200107517
Bug 200106653
Bug 200104805

Change-Id: Ic42462c9345629b182405c1ca1f87034b425fd3c
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/747714
(cherry picked from commit b24e45ab7d774c90104b9bca5e093d7984607dba)
Reviewed-on: http://git-master/r/751862
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agotegra-alt: use actual rate values to configure SFC
Viraj Karandikar [Mon, 25 May 2015 06:04:36 +0000]
tegra-alt: use actual rate values to configure SFC

Use actual values for sample rate instead of strings/enums
when configuring SFC.

Bug 200082413
Bug 200086391
Bug 200100093

Change-Id: I736a31a9569e0353e059417f10f54e9e4efa1185
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/746656
(cherry picked from commit eb4ba049cfc2ea2fb052a9e18484d1d9b4eb329b)
Reviewed-on: http://git-master/r/751861
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agotegra-alt: add mixer control for SFC init
Viraj Karandikar [Fri, 22 May 2015 06:15:37 +0000]
tegra-alt: add mixer control for SFC init

- Add mixer control for SFC init. This should be called ONLY when
there is no data flow happening through SFC.
- Use actual rates instead of indices/strings when setting rates

Bug 200082413
Bug 200086391
Bug 200100093

Change-Id: I7969f91e8371466b0e9c2dc0d4433803fb0a558c
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/746033
(cherry picked from commit c3c88d0612affa12b537233d66e480ec743001a9)
Reviewed-on: http://git-master/r/751860
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoasoc: tegra-alt: hra usecases support
Dara Ramesh [Tue, 5 May 2015 07:41:24 +0000]
asoc: tegra-alt: hra usecases support

a) add sfc coeff. RAM tables for 48 to 192, 48 to 96
   sample rate.
b) add mixer control to change SFC input bit foramt.
c) add mixer control to change codec format and
   non pcm link format for HRA usecases to support.

bug 200086376

Change-Id: Id82fc6190ed5978102a3afc290e877f9a772734d
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/738977
(cherry picked from commit a970151270e1200779141464e19d8fe1ba0028d0)
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/751859
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoasoc: tegra-alt: Fix offload and capture usecase using SFC
Deepa Madiregama [Mon, 13 Apr 2015 05:54:01 +0000]
asoc: tegra-alt: Fix offload and capture usecase using SFC

Add soft reset support for changing the SFC params
dynamically after every stream.

Make changes in machine driver to pick the clk as
per the codec-x-rate set. Configure I2S as per the
codec-x-rate set.

SFC input rate was taken from hw_params which results
in input rate same as stream sample rate. Also the
SFC output rate is set to stream sample rate via mixer
control. This results in same input and output rates
and SFC is put into bypass mode when used in capture
stream path and no rate conversion happens. Fix this
by adding "SFCx input rate" control to allow setting
input rate different than stream rate.

Bug 200097141
Bug 200056741

Change-Id: I294c484050cfa636c8173c5837feb4461ada2ddb
Signed-off-by: Deepa Madiregama <dmadiregama@nvidia.com>
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/730685
(cherry picked from commit a2ee28c6ba423751b8bbc0743a645241391823b7)
Reviewed-on: http://git-master/r/751858
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoplatform: tegra: move pmc power detect to platform/tegra
Laxman Dewangan [Wed, 3 Jun 2015 10:54:49 +0000]
platform: tegra: move pmc power detect to platform/tegra

Move Tegra PMC power detect driver to platform/tegra as central
location for all architecture.

Change-Id: I43a013407dea79bccef698b4614e18e7148837a7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/751883

5 years agoASoC: tegra-alt: Enable coeff RAM based SFC
Manoj Gangwal [Fri, 10 Apr 2015 10:14:34 +0000]
ASoC: tegra-alt: Enable coeff RAM based SFC

This change will
1) Add coeff. RAM tables for few SFC combs
2) Enable coeff. RAM based SFC for mostly used
   sample rates combinations (P0).

Bug 200090046

Change-Id: Ia3b44577103daf3f68b98e76ed63c7e264550145
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/730146
(cherry picked from commit 3cb0a34632178b518852f24adcdb51495cd85674)
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/751857
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoASoC:tegra-alt: Add alsa ctls to set SFC o/p rates
Ravindra Lokhande [Thu, 8 Jan 2015 13:16:59 +0000]
ASoC:tegra-alt: Add alsa ctls to set SFC o/p rates

This change will add the alsa controls to set
SFC i/o rates. SFC from 44.1 to 48 Khz is validated
using this change.

Find below the list of added alsa controls :-
1)"SFC# output rate"
2)"codec-x rate"

'#' = 1,2,3,4 for the respective SFC used.

Bug 200090046

Change-Id: Ibbbbcec9b52d5a36b188131fe2cd620e9f3b041f
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/729519
(cherry picked from commit f439a370832f5a8515a8be09c977082c89566111)
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/718908
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoarm: boot: dts: update camera badge info
David Wang [Tue, 28 Apr 2015 07:14:34 +0000]
arm: boot: dts: update camera badge info

Updating camera badge infos to match part number
for the camera sensor module.

Bug 1610414.

Change-Id: I49b82950ac5dce45b545ad6fdab5a597d32a96d3
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/736640
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

5 years agovideo: tegra: nvsd: move asthetic checking
Sam Payne [Mon, 1 Jun 2015 23:09:45 +0000]
video: tegra: nvsd: move asthetic checking

some panels turn off prism when brightness
is below a certain threshold to improve
user experience. This threshold has been
moved to device tree and will be handled
by the driver instead of the panel.

bug 200104584

Change-Id: I1b3b15738579b0e56ba84c535ba000755afb1f4e
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/751061
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

5 years agorm: dts: tegra: add threshold for prism
Sam Payne [Mon, 1 Jun 2015 21:01:46 +0000]
rm: dts: tegra: add threshold for prism

some panels turn off prism below a certain
brightness to improve user experience. This
threshold value should be stored in DT instead
of card coded per panel.

bug 200104584

Change-Id: I3ae21d41b1a62b9e86f3b047c65341649dd76710
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/750987
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoclock: tegra: Separate cpufreq clock control
Alex Frid [Fri, 29 May 2015 01:43:55 +0000]
clock: tegra: Separate cpufreq clock control

Moved Tegra cpufreq driver clock control functions into separate files.

Bug 200085579

Change-Id: I8eebed14b42de66a859e7e6c0255e7856889a523
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/748539
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoirqchip: tegra: Fix IRQ affinity for nonboot CPUs
Sai Gurrappadi [Thu, 14 May 2015 04:33:37 +0000]
irqchip: tegra: Fix IRQ affinity for nonboot CPUs

tegra_unmask() set the affinity at the LIC by setting/clearing the irq
mask for_each_online_cpu(). However, if the tegra_unmask() call happens
before a CPU is fully onlined (!cpu_online), the affinity, which also
serves as enable/disable never gets set at the LIC. This in turn causes
long latencies when a nonboot CPUs IRQ is waking up the cluster from
CC4. Fix this incorrect LIC enable/affinity setting by using
for_each_present_cpu() instead.

Similarly, also fixed tegra_mask() to properly clear the irq affinity
setting for all CPUs regardless of cpu_online.

Bug 200098600

Change-Id: I02fe0185d2af5c73f0d9e72b111916300e79e994
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/742908
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

5 years agovideo: tegra: dc: Changes for simulation support
Vinod G [Wed, 27 May 2015 22:09:09 +0000]
video: tegra: dc: Changes for simulation support

clk_prepare and clk_unprepare calls are done for
real silicon. If needed, this can be used
with bpmp loaded in simulation platform as well.

Change-Id: I942cf9a8277f5e43723534c562842c6130cdae65
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: http://git-master/r/747972
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agotegra: disp: dc: fake edid init monspec properly
Sam Payne [Wed, 22 Apr 2015 20:59:24 +0000]
tegra: disp: dc: fake edid init monspec properly

fix fake edid interface to initialize monspec
datastructure properly.

Change-Id: Ie69a692ffcfd7192439887a190050abb70553f64
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/734409
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agosysedp: Fix Documentation typo.
Anand Prasad [Wed, 15 Apr 2015 00:27:58 +0000]
sysedp: Fix Documentation typo.

Change-Id: I224cef44f7cf1b3299e72a6f7086fcc8cc08e5d6
Signed-off-by: Anand Prasad <anprasad@nvidia.com>
Reviewed-on: http://git-master/r/731552
(cherry picked from commit 8b1bc4774d56a2203365e03607cd58bd950b0ef1)
Reviewed-on: http://git-master/r/752001
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Timo Alho <talho@nvidia.com>

5 years agommc: emmc: MMC_RPTM emmc fix
Srinivas Vummadisingu [Tue, 26 May 2015 21:49:01 +0000]
mmc: emmc: MMC_RPTM emmc fix

Issue:
With CQ enabled, the emmc boot shows bug i.e. sleeping function called from invalid context at kernel/drivers/base/power/runtime.c 972".

bug 200093351

Change-Id: I9aede0e416d740b99d571cf789a0eb72f37a21a9
Signed-off-by: srinivasv@nvidia.com
Reviewed-on: http://git-master/r/747412
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agozram: add decompression/compression count support
Amit Sharma (SW-TEGRA) [Sat, 30 May 2015 10:58:46 +0000]
zram: add decompression/compression count support

num_reads and num_writes specifies the number of reads/writes
(failed or successful) done on device whereas failed_reads specifies
the failed read happend on device. But, they do not tell about the
real compression/decompression happened.

Real compression is only happened when zram_decompress_page() returns
successfullly. In order to account the real decompression, we need these
two fields and it can be evaluated as num_decompression - failed_decompression.
 1) num_decompression
 2) failed_decompression

num_reads is simply incremented if we issued the zram_bvec_read().
Thus, num_reads slips the following cases:
- in case of partial IO zram_decompress_page() API is directly being called
  from zram_bvec_write in which we need to read the full page before
  writing the changes. Thus, num_reads missed this case.
- no need to account zero_pages as they are not compressed.
num_decompression can account the above listed cases too.

failed_decompression only acccounts the number of times zram_decompress_page
API is got failed, whereas failed_reads might be incremented for cases like
'unable to allocate the memory' other than failure of zram_decompress_page API.

num_compression only accounts the number of successsful zram_compress API
calls, whereas num_writes also include the zram_compress failure and zsmalloc
allocation failure for compressed page, other than successful compression.

The real compression can be obtained by diff of num_compression and
failed_compression as failed_compression accounts the true failure of
zcomp_compress API.

The following four member in 'zram struct' adds the support for monitoring
the total real decompression/compression happended in zram activity.

num_decompression : to track the real decompression
num_compression   : to track the real compression
failed_decompression : accounts the failure of zcomp_decompress API
failed_compression : accounts the failure of zcomp_compress API

Bug 200067758

Change-Id: I6f83283a9f0e70dfe8b74495418cf4006fe7c9d7
Signed-off-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/749082
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agogpu: nvgpu: minor cleanups in cyclestats snapshots
Leonid Moiseichuk [Tue, 2 Jun 2015 13:36:43 +0000]
gpu: nvgpu: minor cleanups in cyclestats snapshots

There are two minor cleanups of cyclestats snapshots code implemented:

1. In case of unacceptably small buffer passed as a cyclestats snapshot
   it causes a kernel panic during list element removal:
   NvRmGpuTest_Channel_Cyclestats_Snapshot_Gen for 1 clients,
each has 4 KB mappings and 1 perfmons
   [  304.533073] Unable to handle kernel NULL .... address 00000008
   [  304.541825] pgd = ffffffc04fc9f000
   [  304.545277] [00000008] *pgd=0000000000000000
   [  304.549554] Internal error: Oops: 96000045 [#1] PREEMPT SMPa
   ....
   [  304.584978] PC is at css_gr_free_client_data+0x28/0xe4
   [  304.590105] LR is at gr_gk20a_css_attach+0x6e0/0x700

2. Also fix with improved allocation of perfmon IDs implemented.

Bug 1573150

Change-Id: I58b753434141bf573463563fdd699c11ea914943
Signed-off-by: Leonid Moiseichuk <lmoiseichuk@nvidia.com>
Reviewed-on: http://git-master/r/751385
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: avoid pasr's spin lock
Sri Krishna chowdary [Tue, 31 Mar 2015 13:39:09 +0000]
ARM: tegra: avoid pasr's spin lock

memory page free/alloc code would deal with contention
on pasr. Avoid additional lock/unlock overhead.

Bug 200035883

Change-Id: Icb1fccb2e6227f57fe8b51a4b80ce3e27a5aa8e2
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/496320
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoarm64:configs: Enable tcrypt module to test SE
Shravani Dingari [Wed, 20 May 2015 04:57:09 +0000]
arm64:configs: Enable tcrypt module to test SE

tcrypt testing module is not enabled in tegra21
defconfig for some reason. Enable it to
verify SE tests

Bug 200089454

Change-Id: I1993a437a631be20f8df1f8ece97262bf3ad4988
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/744707
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Tested-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM64: dt: odin: modify settings
David Yu [Wed, 20 May 2015 04:59:44 +0000]
ARM64: dt: odin: modify settings

Removed hs533 mode
Changed sdmmc2/4 max clock from 266MHz to 200MHz
Removed sdmmc1 max clock limit
Removed unused sound card
Removed accel/gyro sensors

Bug 200096610

Change-Id: I28e053249977b0cb37b60511a2d3d9985dac2fd5
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: http://git-master/r/745228
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: dts: odin: add android firmware node.
Harry Hong [Tue, 2 Jun 2015 07:34:38 +0000]
arm64: dts: odin: add android firmware node.

Add android firmware to pass hardware info for Odin platform.

Bug 200086338

Change-Id: I421050a9d68127fc0bc50b6316d1ac2f8e0fc060
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/751263
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoi2c: tegra: enable multi-master mode
Shardar Shariff Md [Thu, 9 Apr 2015 14:23:41 +0000]
i2c: tegra: enable multi-master mode

Enable multi-master mode in I2C_CNFG reg
using single/multi-master mode bit introduced
for T210, whereas multi-master mode is
enabled by default in HW for T124 and earlier
SOC.

Bug 200077847

Change-Id: Idcb50355884fc52d44b12ecfecb779e366fbb733
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/729792
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agotegra-alt: adsp: remove broken app deinit code
Viraj Karandikar [Wed, 20 May 2015 11:19:39 +0000]
tegra-alt: adsp: remove broken app deinit code

Existing app deinit code is setting info and other pointers
to NULL, but not calling nvadsp_app_deinit() to close instance
on ADSP. Due to this multiple instances app get created on ADSP
and causing memory leaks.

Current usecases use static paths so app_deinit functionality
is not needed and adds overhead of freeing and allocating apps
everytime. So making tegra210_adsp_app_deinit() a empty function
for now. Proper app deinit functionality will be added in future
if needed.

Bug 200106688

Change-Id: I2b57efa6fa57253ee249c3dc3c43b5843109e2ae
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/744945
(cherry picked from commit ad17bed71e23a978202de7f7a695a4c4cede5dc7)
Reviewed-on: http://git-master/r/747320
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoasoc: tegra-alt: remove hardcoded AMX mapping
Viraj Karandikar [Tue, 19 May 2015 11:31:17 +0000]
asoc: tegra-alt: remove hardcoded AMX mapping

Remove hardcoded mapping for AMX. Use mixer controls to
dynamically program AMX byte map.

Remove redundant init functions for AMX and SFC.

Bug 200100724

Change-Id: I7a703cf3705118228e41e79a4891cc4f8c30f77b
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/744340
(cherry picked from commit 593f12ad65e5ef17bf10a245c79414c778bbaf70)
Reviewed-on: http://git-master/r/747322
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agotegra-alt: add controls for setting AMX byte map
Viraj Karandikar [Tue, 19 May 2015 11:28:05 +0000]
tegra-alt: add controls for setting AMX byte map

Add controls for dynamically configuring AMX byte map.
Fix bug with byte mask update.

Bug 200100724

Change-Id: Ia3bfc263b025d391548959f4006d18bf18726968
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/744339
(cherry picked from commit 7271587d028dd9e8d3b8762776cba42220becdbc)
Reviewed-on: http://git-master/r/747321
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agotegra-alt: adsp: get/put from compress open/free
Viraj Karandikar [Wed, 13 May 2015 08:42:44 +0000]
tegra-alt: adsp: get/put from compress open/free

During device switch, runtime count becomes zero and
runtime_suspend gets called which suspends ADSP OS.
ADSP OS is resume immediately when resuming playback
on new device. ADSP OS suspend/resume can happen while
ADMA is running, which disturbs SW/HW sync causing
noisy output.

Prevent ADSP OS suspend as long as compress stream
is open by acquiring a runtime get() from stream open
and releasing it in stream free.

Bug 200100093

Change-Id: Id0da81c16efa3682131e98f6132aa02c8e7cfcab
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/742105
(cherry picked from commit 6f11140bb41166a9797b2d7fe3bfb1610b55b513)
Reviewed-on: http://git-master/r/747319
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agoadsp: limit emc clock request to 102MHz
Viraj Karandikar [Wed, 18 Mar 2015 07:37:24 +0000]
adsp: limit emc clock request to 102MHz

On ADSP, memory requirements don't increase in
same proportion as CPU. All audio use cases on
ADSP can be run at 102MHz. So higher EMC clock
isn't necessary.

Also power measurements have shown that 102MHz
is optimal frequency for power. Higher clocks
increase power consumption without any benefits.
See bug 200082064.

So limit EMC clock request from ADSP to 102MHz.
Tested with MP3+SRC+SP usecase.

Bug 200082064

Change-Id: I9b5094876a46a9ab6dcddcdb1f6a541ccd58d6ca
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/726773
(cherry picked from commit e8ae83f849e3152feec2f165d6cec56462f05550)
Reviewed-on: http://git-master/r/718838
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

5 years agovideo: tegra: nvmap: turn on build warnings
Sri Krishna chowdary [Tue, 2 Jun 2015 14:15:37 +0000]
video: tegra: nvmap: turn on build warnings

Turn on compile time warnings to build protection.

Bug 200027296

Change-Id: If8182d9e26cfdb63e3b84cc4c8a576534a772409
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/751397
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agovideo: tegra: nvmap: rearrange generic carveout init code
Sri Krishna chowdary [Tue, 2 Jun 2015 14:15:11 +0000]
video: tegra: nvmap: rearrange generic carveout init code

carveout init should be separated from setup.

1. Abstract the carveout setup and init code so that
other carveouts can reuse the code.
2. Prevent carveout legacy init in case init is taken care of
within the reserved memory ops.
3. Move coherent initializations to device init calls as these
need to happen from nvmap's probe.

Bug 200027296

Change-Id: I34556ed19547ce23392a3fe4a373a3c992bfbd33
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/734988
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agovideo: tegra: dc: revert to original pclk calc
Santosh Reddy Galma [Fri, 17 Apr 2015 07:07:41 +0000]
video: tegra: dc: revert to original pclk calc

This change reverts to original pclk calculation as the CL
http://git-master/r/#/c/671189 that rounds the pclk is causing issues.
This will be investigated later.

Bug 200090058

Change-Id: If27bdb4cee64d6d1b209f6d2c40e1bc9905bce6d
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/732613
(cherry picked from commit 68006d79cf3af6f8779843956f9b48008ef2189c)
Reviewed-on: http://git-master/r/738459
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: tegra: Hawkeye: make DSI regulators booton
Santosh Reddy Galma [Wed, 27 May 2015 14:01:35 +0000]
arm64: tegra: Hawkeye: make DSI regulators booton

make the following regulators boot-on for seamless boot
on internal panel for Hawkeye platform.
-mipi_1v2
-vdd_lcd_3v0
-vdd_lcd_1v8
-tps65132_outn
-tps65132_outp

Bug 200100359

Change-Id: I38177f47a0139b54561dca8887cb81a97ebadc84
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: http://git-master/r/747774
(cherry picked from commit 6b71bfe32dbdf46cf46666ed4132afb49de673d8)
Reviewed-on: http://git-master/r/751281
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agonet: wireless: bcmdhd: Disable rxcb iovar for PCIE
kraghavender [Wed, 27 May 2015 09:35:46 +0000]
net: wireless: bcmdhd: Disable rxcb iovar for PCIE

Disable the rxcb iovar for PCIE

Bug 200105983

Change-Id: I290a7932b12c6bc1814fba4df23767beefc7f2ed
Signed-off-by: Raghavender <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/747643
Reviewed-on: http://git-master/r/750738
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: dsi: add delay after register write
Naveen Kumar S [Wed, 6 May 2015 07:21:43 +0000]
video: tegra: dsi: add delay after register write

Providing a small delay after writing to dc registers while
stopping dc stream helps in stabilizing the registers. This
helps in resolving the intermittent register read failure issue.

bug 200087039

Change-Id: I159d1d75aa2472b9e33bc42d890382f33def218a
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/746062
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agommu_notifier: Call invalidate_range_free_pages() notifier v2
Joerg Roedel [Wed, 2 Jul 2014 19:14:13 +0000]
mmu_notifier: Call invalidate_range_free_pages() notifier v2

This patch adds the necessary calls to the new notifier.

Changed since v1:
  - Rebase on top of current kernel

Signed-off-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
(cherry picked from commit b5e653f2e3955d01761e504dd0605ebd343a596c)

Conflicts:
mm/huge_memory.c
mm/hugetlb.c
mm/memory.c

Bug 200074285

Change-Id: I2590aea4b177a57eef6801083dd0d542569d03d2
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/678278
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agommu_notifier: Add invalidate_range_free_pages() notifier v2
Joerg Roedel [Tue, 1 Jul 2014 19:22:28 +0000]
mmu_notifier: Add invalidate_range_free_pages() notifier v2

This notifier closes an important gap in the current
invalidate_range_start()/end() notifiers. The _start() part
is called when all pages are still mapped while the _end()
notifier is called when all pages are potentially unmapped
and already freed.

This does not allow to manage external (non-CPU) hardware
TLBs with MMU-notifiers because there is no way to prevent
that hardware will esablish new TLB entries between the
calls of these two functions. But this is a requirement to
the subsytem that implements these existing notifiers.

To allow managing external TLBs the MMU-notifiers need to
catch the moment when pages are unmapped but not yet freed.
This new notifier catches that moment and notifies the
interested subsytem when pages that were unmapped are about
to be freed. The new notifier will only be called between
invalidate_range_start()/end().

Changed since v1:
  - Rebase on top of lastest linux next.
  - Expect vma and range to be provided to callback.

Signed-off-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
(cherry picked from commit 086155fd0e89e6c6a211cb114841e29076e633cb)
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>

Conflicts:
include/linux/mmu_notifier.h

Bug 200074285

Change-Id: Ic63c83173aa50f4439cd02d72dd0590eed5e86bb
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/678277
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agommu_notifier: pass through vma to invalidate_range and invalidate_page v2
Jérôme Glisse [Thu, 16 Jan 2014 21:05:47 +0000]
mmu_notifier: pass through vma to invalidate_range and invalidate_page v2

New user of the mmu_notifier interface need to lookup vma in order to
perform the invalidation operation. Instead of redoing a vma lookup
inside the callback just pass through the vma from the call site where
it is already available.

This needs small refactoring in memory.c to call invalidate_range on
vma boundary while previously it was call once for larger range. The
overhead might be offseted by the fact that mmu_notifier listener now
work on smaller and exact range.

Changed since v1 :
  - Only passthrough the vma.
  - Commit comment.

Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
(cherry picked from commit eeb9f7693d2a86a7caa368e2c51d3ac09da04a8e)

Conflicts:
drivers/gpu/drm/i915/i915_gem_userptr.c
kernel/events/uprobes.c
mm/huge_memory.c
mm/hugetlb.c
mm/migrate.c
mm/rmap.c
mm/mprotect.c

Bug 200074285

Change-Id: I076973244386b359b1db6c6c2fe0c68d289b19ff
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/678276
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agonet: wireless: bcmdhd: Enable rxcb iovar
kraghavender [Thu, 23 Apr 2015 10:25:25 +0000]
net: wireless: bcmdhd: Enable rxcb iovar

Enable the rxcb in firmware to avoid the "out of bus credits"
condition which was causing the dhd hang condition.

Bug 1594708

Change-Id: I7f89f8b1fbc092a65cc1ea5155592fb3e15b7903
Signed-off-by: Raghavender <kraghavender@nvidia.com>
Reviewed-on: http://git-master/r/680606
(cherry picked from commit f013ea77160e9291efd3f0a506f2d62c3d387e92)
Reviewed-on: http://git-master/r/696334
Reviewed-on: http://git-master/r/734885
Reviewed-on: http://git-master/r/739570
GVS: Gerrit_Virtual_Submit
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agommu_notifier: add event information to address invalidation v3
Jérôme Glisse [Fri, 2 Aug 2013 19:17:24 +0000]
mmu_notifier: add event information to address invalidation v3

The event information will be usefull for new user of mmu_notifier API.
The event argument differentiate between a vma disappearing, a page
being write protected or simply a page being unmaped. This allow new
user to take different path for different event for instance on unmap
the resource used to track a vma are still valid and should stay around.
While if the event is saying that a vma is being destroy it means that any
resources used to track this vma can be free.

Changed since v1:
  - renamed action into event (updated commit message too).
  - simplified the event names and clarified their intented usage
    also documenting what exceptation the listener can have in
    respect to each event.

Changed since v2:
  - Avoid crazy name.
  - Do not move code that do not need to move.

Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
(cherry picked from commit ebed63225a6939121d313b2ddd4737fc60d2f0a1)

Conflicts:
drivers/gpu/drm/i915/i915_gem_userptr.c
fs/proc/task_mmu.c
kernel/events/uprobes.c
mm/huge_memory.c
mm/hugetlb.c
mm/ksm.c
mm/migrate.c
mm/rmap.c
include/linux/mmu_notifier.h

Bug 200074285

Change-Id: Ief91a665128bcb4ac5e6fa7dd60215285be54f20
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/678260
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agovideo: tegra: host: remove non-actmon paths
Sam Payne [Tue, 19 May 2015 17:01:56 +0000]
video: tegra: host: remove non-actmon paths

remove update_load_estimate in preparation for
removing SW load estimate.

Change-Id: I27958d34e47f4e5cd3686d75fe58385273176744
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/744432
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

5 years agovideo: tegra: nvmap: Add orphan_handles debugfs
Sri Krishna chowdary [Sun, 24 May 2015 04:56:50 +0000]
video: tegra: nvmap: Add orphan_handles debugfs

handles which have share_count == 0, are not referenced by any
user clients. Such handles are orphan. Show all such handles
though this new debugfs.

Bug 200106878

Change-Id: I84a084df024e99a9ff50c112faa0e822248d350e
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/746527
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: remove multiple powergate ids
Sam Payne [Tue, 19 May 2015 18:39:03 +0000]
video: tegra: host: remove multiple powergate ids

Removes support for multiple powergate ids. No
ids were used beyond the first ID. This feature
is no longer necessary.

Bug 1645757

Change-Id: I14f0d46c167af8dafc719a5c78f4b58e8890f99d
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/744456
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

5 years agommc: tegra: Remove clk-name member from sdhci platform data
R Raj Kumar [Mon, 25 May 2015 09:12:59 +0000]
mmc: tegra: Remove clk-name member from sdhci platform data

- Removed clk-name data member from sdhci platform
as new clock driver doesn't require it to pass the clock
name through clk_get() APIs now.
- Removed FPGA specific code since limiting max
clock frequency for sdmmc is being done through
DT nodes now in T18x FPGA platform.

Bug 200102614
Bug 200103352

Change-Id: I22c9df2b000b85cf963db5285da86d9a636b6d72
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/746733
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoserial: tegra: check for FIFO mode enabled status
Shardar Shariff Md [Tue, 2 Jun 2015 10:20:00 +0000]
serial: tegra: check for FIFO mode enabled status

- Check if FIFO mode is enabled or not after enabling
the FIFO mode before filling FIFO.
- Correct the delay 20 micro sec after enabling FIFO mode
as per the HW Bug for previous Tegra SOCs (earlier to T186)

Bug 200075959

Change-Id: I93e615afd9c43fc604cec262e811a9e561654e02
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/751327
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoserial: tegra: add chipdata for T186
Shardar Shariff Md [Mon, 1 Jun 2015 16:09:05 +0000]
serial: tegra: add chipdata for T186

Add chip data and compatible for T186

Bug 200111442

Change-Id: I5e2b0cdf11999b25490da3d92608c7d936608405
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/750913
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoserial: tegra: Add PLATFORM_TEGRA for serial tegra driver
Shardar Shariff Md [Sat, 30 May 2015 10:19:29 +0000]
serial: tegra: Add PLATFORM_TEGRA for serial tegra driver

Add PLATFORM_TEGRA config flag as ARCH_TEGRA is deprecated
for T186 platforms and TEGRA186_GPC_DMA dependency

Bug 200111442

Change-Id: I8bf40391824e458d997b27fb128305eaca029509
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/749081
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agousb: gadget: tegra: handle aca cables disconnection properly
Rakesh Babu Bodla [Mon, 4 May 2015 08:38:07 +0000]
usb: gadget: tegra: handle aca cables disconnection properly

Check for lp0 connect type status to detect disconnection of
aca cables in LP0. Otherwise driver is setting
current limit to zero during LP0 resume which is
causing the display wakeup.

Bug 2000102173

Change-Id: Ia503bf240c1ea25bf79907559212fa2970e17f35
Signed-off-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/738434
(cherry picked from commit 921e8950400a8062ab3301e0ed8b1341d765b8b7)
Reviewed-on: http://git-master/r/741623
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoof: fix return value in of_reserved_mem_device_init
Sri Krishna chowdary [Fri, 22 May 2015 06:14:30 +0000]
of: fix return value in of_reserved_mem_device_init

Need a way to find out if device node does not have "memory-region"
property. return -ENODEV in such case.

Bug 200027296

Change-Id: Ie729b5bfdf1bf9557fa182330ee0d93bfecdfd84
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/746031
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoplatform:tegra: Reduce power down sleep for OV5693
Wenjia Zhou [Sat, 23 May 2015 02:36:35 +0000]
platform:tegra: Reduce power down sleep for OV5693

Bug 1641930

Change-Id: I14aeb73881814a6ba65549c3f6b3924566129eb1
Signed-off-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-on: http://git-master/r/746457
Reviewed-by: Jihoon Bang <jbang@nvidia.com>

5 years agothermal: soctherm: add CPU sensor invalidation
navneet kumar [Fri, 15 May 2015 00:51:14 +0000]
thermal: soctherm: add CPU sensor invalidation

invalidate the CPU tsosc and subsequently fall back on pllx
tsosc (hw based offsetting) if enabled.

The request to do so comes from external clients via a zone_adjust due to a
cluster switch, low Vmin etc.

Change-Id: Id8dd5c5a88eeaeeefc2837b07dbc4d72a4784f82
Signed-off-by: navneet kumar <navneetk@nvidia.com>
Reviewed-on: http://git-master/r/743369
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Tested-by: Sivaram Nair <sivaramn@nvidia.com>

5 years agodvfs: tegra21: Add DFLL tuning threshold
Alex Frid [Sat, 25 Apr 2015 05:55:05 +0000]
dvfs: tegra21: Add DFLL tuning threshold

Added DFLL tuning threshold 903mV and installed associated SOC-THERM
callback on Tegra21 platforms. Although, DFLL tuning settings do not
change with voltage, high/low voltage range separation is necessary
to assure proper backup of SOC-THERM CPU sensor at low voltages.

Bug 1593595

Change-Id: If29fbe5cdc34c3b1fcfe2ac651a46a5d4a0a8aea
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit efc51389bdc9c3df39337fbd04df5adc10988f1a)
Reviewed-on: http://git-master/r/743368
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Tested-by: Sivaram Nair <sivaramn@nvidia.com>

5 years agovideo: tegra: nvsd: fix SD brightness overwritten
Allen Chang [Mon, 25 May 2015 07:50:30 +0000]
video: tegra: nvsd: fix SD brightness overwritten

DC2 initialization overwrites the shared SD brightness value.
Only reset shared SD brightness in DC1 initialization.

Bug 200080696

Change-Id: I2216d4f60c196965fe509ecdad6b144d0f13c6a3
Reviewed-on: http://git-master/r/746697
(cherry picked from commit 72311aa5c31465f92f89c2125cb19b066a2f216d)
Signed-off-by: Allen Chang <allchang@nvidia.com>
Reviewed-on: http://git-master/r/747496
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agogpu:nvgpu: update channel_setup_ramfc interface
Seshendra Gadagottu [Fri, 15 May 2015 18:53:54 +0000]
gpu:nvgpu: update channel_setup_ramfc interface

Pass flags parameter to channel_setup_ramfc for
indicating nvgpu_alloc_gpfifo_args characteristics.

Bug 1645628

Change-Id: Ia40b37c5c7b208d459aa84f1b022036dd5e1b599
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/743381
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoclock: tegra21: Assign clock IDs for DSI-FIXED
Hoang Pham [Mon, 1 Jun 2015 23:34:30 +0000]
clock: tegra21: Assign clock IDs for DSI-FIXED

Assign Tegra21 clock IDs for dsi1-fixed and
dsi2-fixed

Bug 1608456

Change-Id: Ib49d34edb3126510bf269f38e54352cf6987857f
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/751076
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agousb: gadget: xudc: disable LPM for T186
Henry Lin [Thu, 14 May 2015 07:56:36 +0000]
usb: gadget: xudc: disable LPM for T186

T186 still needs sw war to disable LPM.

Bug 1644221

Change-Id: Ia2c5540372ee49ca62762fd9c472961737650b3a
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/742598
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Ashutosh Jha <ajha@nvidia.com>

5 years agovideo: tegra: dc: Support for third head
Vinod G [Thu, 28 May 2015 21:01:04 +0000]
video: tegra: dc: Support for third head

Calls for supporting third panel for third head.

Change-Id: I5de6fa9848202b206648e6b595596d05298a3de3
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: http://git-master/r/748399
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoarm: arch: mach-tegra: Support for three heads
Vinod G [Thu, 28 May 2015 20:59:21 +0000]
arm: arch: mach-tegra: Support for three heads

Add support for three heads and third panel

Change-Id: Ia26730653c1b86f7e37e99cf9d7d45537e501412
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: http://git-master/r/748398
Reviewed-by: Aron Wong <awong@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agofirmware: tegra: export bpmp run state
Sivaram Nair [Fri, 29 May 2015 17:04:51 +0000]
firmware: tegra: export bpmp run state

Export an API to return whether bpmp is running the PM firmware or not.
We will use the 'connected' flag to determine whether bpmp firmware is
running.  Technically, it is possible that the firmware is running but
it is not connected (=no IPC established) - but we will ignore this as
an exception.

Change-Id: I685b5ad8f2fffa608b4b331634feb7a67557f952
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/748767
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>

5 years agoarm64: tegra: odin: FP 1.1 fixed regulator pinmux
Yong Goo Yi [Tue, 26 May 2015 07:43:31 +0000]
arm64: tegra: odin: FP 1.1 fixed regulator pinmux

Pinmux setup for FP 1.1 fixed regulator.
Unuse dmic3_clk_pe4, pz4 and gps_rst_pi3.
Use pz3 as gpio ouput.

bug 1634623

Change-Id: I5116a74306788ce91ba80f7cb44aacb57cbca5a2
Signed-off-by: Yong Goo Yi <yyi@nvidia.com>
Reviewed-on: http://git-master/r/747104
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: tegra: odin: power rail setup for FP 1.1
Yong Goo Yi [Tue, 12 May 2015 01:45:56 +0000]
arm64: tegra: odin: power rail setup for FP 1.1

Add regulators for LCD, usb0/1 vbus and pwm fan.
Change rail setups for ldo3 and ldo6 used in test purpose.
Change rail setup for sdmmc1.
Remove DT property of unused gpios related to fixed regulator.

bug 1634623

Change-Id: I33112e73dbe30d2ab3a378c14bf989c3992aa264
Signed-off-by: Yong Goo Yi <yyi@nvidia.com>
Reviewed-on: http://git-master/r/741462
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM64: dts: pca9539 programming to ERS2220-1170
Peter Yu [Mon, 18 May 2015 02:57:44 +0000]
ARM64: dts: pca9539 programming to ERS2220-1170

According to the path of pca9539 gpio setting in DT file,
nvdtshim tool override the setting to support dynamic pex/sata
lane configuration for T210 E2220 variants, but gpio setting
was removed so add it back in ERS2220-1170 sku.

bug 200103180

Change-Id: I79eaebc5731a219b2168321ef4e971474983772c
Signed-off-by: Peter Yu <pyu@nvidia.com>
Reviewed-on: http://git-master/r/743596
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: dts: odin: 270 degree rotated screen.
Min-wuk Lee [Wed, 20 May 2015 05:00:14 +0000]
arm64: dts: odin: 270 degree rotated screen.

This panel is portrait based panel, whereas,
platform requires landscape view.

Bug 1629139

Change-Id: I62287bd9b93c80cffcb92b1ba247981594ac4523
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/744709
(cherry picked from commit 834c66e13cbd3af6df6effe469c3cd62a0750d5c)
Reviewed-on: http://git-master/r/746520
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: panel-o-720p-6-0 reset control
Min-wuk Lee [Wed, 20 May 2015 04:11:28 +0000]
arm: tegra: panel-o-720p-6-0 reset control

Having 20ms and assert reset in postpoweron
is not good, since dsi signals are already
output. This makes panel up failed in booting
intermittently.

This change have reset assert in enable ops
callback.

Bug 1629139

Change-Id: I602e7ee8d745099a3215676430e08a17a2756656
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/744694
(cherry picked from commit 4b4e1d08d3b992e7138bc4f9a294e51c6a3bc6ff)
Reviewed-on: http://git-master/r/746519
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: dts: odin: remove unnecessary gpio prop
Min-wuk Lee [Tue, 19 May 2015 09:28:26 +0000]
arm64: dts: odin: remove unnecessary gpio prop

Remove unnecessary panel gpio properties
since we will use regulator properties.

Bug 1629139

Change-Id: Icb2c86f874ccb884ef168ffcf21302a0ee3b6b2f
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/744277
(cherry picked from commit 2717e78d7283dfec38214003b840a1eeb4f205e7)
Reviewed-on: http://git-master/r/746518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: tegra: panel-o-720p-6-0: use regulator api
Min-wuk Lee [Tue, 19 May 2015 08:22:39 +0000]
arm: tegra: panel-o-720p-6-0: use regulator api

Instead of gpio handling with gpio api, use regulator
api. power tree maps these gpios to regulators, whereas
regulator api is not used, regulator property
overwrite default gpio value.

Bug 1629139

Change-Id: I6cb9dfb393df67f0dfc93f6581a33c3ae5da840e
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/744245
(cherry picked from commit c4e51b046fc6a0abfcfe2205a9eeb9bb41594851)
Reviewed-on: http://git-master/r/746517
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm: dts: odin: update 720p 6" panel info
Min-wuk Lee [Fri, 15 May 2015 15:20:54 +0000]
arm: dts: odin: update 720p 6" panel info

1) This panel requires CLK_LP in VFP and VBP.
   Also, should not have CLK_LP in HFP and HBP.
   With TEGRA_DSI_VIDEO_CLOCK_TX_ONLY and
   TEGRA_DSI_VIDEO_NONE_BURST_MODE, it can be
   accomplished.
2) Set PWM freq to 20KHz.
3) Fix minor physical screen height.

Bug 1629139
Change-Id: I4cb3b839da4d1b7ce37add678820785d512e4368
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-on: http://git-master/r/743283
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoiommu/arm-smmu: expose iova_to_phys as debugfs
Hiroshi Doyu [Mon, 1 Jun 2015 06:01:20 +0000]
iommu/arm-smmu: expose iova_to_phys as debugfs

Userland can inquire phys address by iova.

usage:
  $ cat /d/12000000.iommu/cb000/ptdump
  ...
  va=0x00000000800f9000 pa=0x00000000d42a9000 *pte=0x00600000d42a9f43
  $ echo 0x00000000800f9000 >  /d/12000000.iommu/cb000/iova_to_phys
  $ cat  /d/12000000.iommu/cb000/iova_to_phys
  iova=0x00000000800f9000 pa=0x00000000d42a9000

Bug 1650512

Change-Id: I9b5c8b0efaaa69049c9f6b804e63e3ff1fd9af5b
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/749318

5 years agovideo: tegra: host: nvdec: Use temp bl ucode for nvdec
Sarvesh Satavalekar [Mon, 1 Jun 2015 14:28:30 +0000]
video: tegra: host: nvdec: Use temp bl ucode for nvdec

Use temp bl ucode for nvdec.
Next We will change actual bl firmware with updated bct files.This
is required due to dependency of bl firmware (which will be merged
in main) and bct files ( which will be merged in dev-kernel).

bug 1628471

Change-Id: I9e203dc097140cd00d94b900c00866342bba3c11
Signed-off-by: Sarvesh Satavalekar <ssatavalekar@nvidia.com>
Reviewed-on: http://git-master/r/751138
Reviewed-by: Mohan Nimaje <mnimaje@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoarm64: tegra21: config: enable Intel PCie NIC
Vidya Sagar [Tue, 19 May 2015 16:08:44 +0000]
arm64: tegra21: config: enable Intel PCie NIC

enable Intel PCIe NIC with ID 8086:10d3

Bug 200106384

Reviewed-on: http://git-master/r/744422
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Change-Id: I20f397e90fb7393f033b14b6cc4bc2585100e59e
Reviewed-on: http://git-master/r/748100
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: tegra21: config: enable Broadcom PCie NIC
Vidya Sagar [Tue, 19 May 2015 16:30:47 +0000]
arm64: tegra21: config: enable Broadcom PCie NIC

enable Broadcom PCIe NIC with ID 14e4:1677

Bug 200106384

Reviewed-on: http://git-master/r/744424
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Change-Id: If8ce1b397e379ee1a6148cabdd8b3c73a2038248
Reviewed-on: http://git-master/r/748101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm64: tegra: odin: DT change for pwm-fan
Yong Goo Yi [Thu, 14 May 2015 10:26:48 +0000]
arm64: tegra: odin: DT change for pwm-fan

Change pwm-fan tach input from TEGRA_GPIO_PG0(Pin name UART2_TX)
to TEGRA_GPIO_PS7

Bug 200097276

Change-Id: Ie42b698ea079535fb545943450eb18f9c0d95f57
Signed-off-by: Yong Goo Yi <yyi@nvidia.com>
Reviewed-on: http://git-master/r/742687
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM64: dt: odin: override ddr-clk-limit
Harry Hong [Wed, 27 May 2015 07:21:36 +0000]
ARM64: dt: odin: override ddr-clk-limit

ddr-clk-limit is set to 41MHz.
To achieve Max clk of DDR50 mode,
override ddr-clk-limit to 52MHz.

Bug 200096064

Change-Id: Ib39e1a6c3c8635bfce3409427b431617a1fc73f6
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/747611
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoi2c: tegra-vi: Get regulator on driver probe
Laxman Dewangan [Fri, 29 May 2015 11:05:43 +0000]
i2c: tegra-vi: Get regulator on driver probe

Get all required regulator on driver probe instead of runtime PM
callback.

bug 200111241

Change-Id: I3b08658cb04cafdb8b66a9213e522898f3d1ce2d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Ian Chang <ianc@nvidia.com>
(cherry picked from commit ccf241d241302d9ab92678c795f6ef4e0e7b1cf7)
Reviewed-on: http://git-master/r/750849

5 years agoARM: tegra: remove IO-PAD initialisation via deprecated property
Laxman Dewangan [Tue, 26 May 2015 20:35:51 +0000]
ARM: tegra: remove IO-PAD initialisation via deprecated property

IO-DPD are initialised via the io-pad-defaults subnode property
and hence remove the duplicated and deprecated property for
IO PAD initialisation.

bug 1648039

Change-Id: I206e6feda7a867e05b88dc3f193a4672521c9a26
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 39d5df82cc68cd3bdb8af06331557b6894d79dd6)
Reviewed-on: http://git-master/r/750848

5 years agopadctrl: tegra210-pad: remove duplication of IO PAD init
Laxman Dewangan [Tue, 26 May 2015 14:54:35 +0000]
padctrl: tegra210-pad: remove duplication of IO PAD init

Remove duplication of IO pad voltage and dpd initialization
via DT properties platform-io-pad-voltage and platform-io-pad-power
as the same can be achieve with io-pad-defaults node.

bug 1648039

Change-Id: I09308f65868fe53288e235c4adae8232569701f5
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 11cdbcc830fe01e55c55cb0a780a4ced77a21a2b)
Reviewed-on: http://git-master/r/750847

5 years agopadctrl: tegra210-pmc: made IO PAD enums from pad group
Laxman Dewangan [Tue, 26 May 2015 14:48:08 +0000]
padctrl: tegra210-pmc: made IO PAD enums from pad group

Made the IO PAD enums from the PAD group macro instead of redefining it
again. This provide the unique identification for pad group.

bug 1648039

Change-Id: Iebb7253719dc39d1bb859d6aedf8f56ded8e6eaf
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit dfd93d0ed88f7aa19c9ef9da3998bde0fad7bd93)
Reviewed-on: http://git-master/r/750846

5 years agoARM: tegra210: initialise IO Pad DPD and voltage through pad subnode.
Laxman Dewangan [Tue, 26 May 2015 14:47:30 +0000]
ARM: tegra210: initialise IO Pad DPD and voltage through pad subnode.

Initialise the IO PAD for voltage and DPD through IO pad default
subnode "io-pad-defaults". Initialization on this way is easy
to read and override the values based on platforms.

bug 1648039

Change-Id: Iee2911dd642358ddc5e3eb79b3890c23d92a3478
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 3684581a6106cb4c452b68474cc14867d378245c)
Reviewed-on: http://git-master/r/750845

5 years agopadctr: tegra210-pmc: add support to set IO pad voltage and dpd
Laxman Dewangan [Tue, 26 May 2015 14:12:03 +0000]
padctr: tegra210-pmc: add support to set IO pad voltage and dpd

Add support to configure voltage and IO-DPD mode from DT through
individual pad dt node.

This helps to set/unset the particular IO-pad instead of re-writing
untouched pads through ARRAY method. This also helps on better
managing the property override.

pmc {
::::
io-pad-defaults {
pex-clk1 {
nvidia,deep-power-down-enable;

gpio {
nvidia,io-pad-init-voltage = <IO_RAIL_VOLTAGE_1_8V>;
};
:::
};
};

bug 1648039

Change-Id: I31969fc5b4986234fbb57db2d87a7026c54f0086
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 26b3ad98027d277591ffcaf93d0ed0da07a84a16)
Reviewed-on: http://git-master/r/750844

5 years agopadctrl: tegra210-pmc: clear DPD before setting platform specific
Laxman Dewangan [Sun, 24 May 2015 05:51:06 +0000]
padctrl: tegra210-pmc: clear DPD before setting platform specific

Clear DPD from PMC pad control driver before setting for platform
specific configuration.

Bug: 1648039, 200107223

Change-Id: I3dffe031926c68dbf80165351651feb93cf8b321
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Cyril Raju <craju@nvidia.com>
(cherry picked from commit 0c4909323a1f5b3d491f87f3ca88f7bb70d99499)
Reviewed-on: http://git-master/r/750843

5 years agopadctrl: tegra210-pmc: add DT binding doc for PAD power control
Laxman Dewangan [Thu, 21 May 2015 15:26:29 +0000]
padctrl: tegra210-pmc: add DT binding doc for PAD power control

Update DT binding document for Tegra 210 PAD power control
properties. Also add macro for dt-binding header which can
be use by the DTS file.

bug 1648039

Change-Id: Id2191031f277fdc8a22b0a29acbc7f84a395455a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit b70f7b32a930ab7da73a3fbc5a81820449bb1b65)
Reviewed-on: http://git-master/r/750842

5 years agopadctrl: tegra210-pmc: Add support for PAD DPD control
Laxman Dewangan [Thu, 21 May 2015 15:25:41 +0000]
padctrl: tegra210-pmc: Add support for PAD DPD control

Add support for PAD DPD control through padcontrol framework.
Implement the power enable/disable of the PAD group. It uses
the tegra pmc interface for pmc register access.

bug 1648039

Change-Id: I5e0c6557339f8762129fe43590d4eab44c9ca7a3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 0117bef42761cff20dd789b912da3cbacbc901dc)
Reviewed-on: http://git-master/r/750841

5 years agoiio: adc: ads1015: cleanups on oneshot and continuous mode
Laxman Dewangan [Wed, 20 May 2015 14:15:39 +0000]
iio: adc: ads1015: cleanups on oneshot and continuous mode

Cleanup is done to have better readbility and reducing code size
and variable. Highlight of changes are:
- Renames variable for continuous config,
- remove redundant variables,
- rewrite big code on optimised way.

bug 200069173

Change-Id: I4ae51dfdf4cec089bdfc68d7d4ad5d5d296a105b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
(cherry picked from commit 35ea290200e15611fc178d7c43cc60a38f9ad3f7)
Reviewed-on: http://git-master/r/750840

5 years agoarm64: tegra: pinmux: Amend GPIO K0 and K1 pinmux
Jay Bhukhanwala [Mon, 13 Apr 2015 23:04:48 +0000]
arm64: tegra: pinmux: Amend GPIO K0 and K1 pinmux

Cboot sets up the values for pinmuxes from DTB. Changing the values so that
they match the expectation on boot

Bug 1611427

Change-Id: I93b3e7796f2eb61c0a197181ec9d5ab6b0b31fdc
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Reviewed-on: http://git-master/r/731041
(cherry picked from commit 4245bad7f040588ec1dc579cfa15e8783bda5f52)
Reviewed-on: http://git-master/r/750958
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoarm64: t210: Add fastboot-instructions in /chosen
Jay Bhukhanwala [Tue, 21 Apr 2015 00:30:26 +0000]
arm64: t210: Add fastboot-instructions in /chosen

Since fastboot instructions can differ for different platforms,
we need to retrieve them from DTB

Bug 200085098

Change-Id: I4632affc3766abd49311373196c85557cf8ae890
Signed-off-by: Jay Bhukhanwala <jbhukhanwala@nvidia.com>
Reviewed-on: http://git-master/r/733430
(cherry picked from commit 056d4f00d017db784991d053db406c84d4967c5b)
Reviewed-on: http://git-master/r/750959
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agovideo: tegra: host: remove unused debug categories
Sam Payne [Thu, 21 May 2015 21:32:24 +0000]
video: tegra: host: remove unused debug categories

debug catagories intr, pmu, map and gpu_dbg
are unused. this patch removes them.

bug 200097198

Change-Id: Ice9797cf79d5dcecb11dbd77e722934c9defb50c
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/745844
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>