5 years agoARM: tegra: bonaire: Lower UART clock for QT
Adeel Raza [Fri, 21 Sep 2012 20:17:47 +0000]
ARM: tegra: bonaire: Lower UART clock for QT

UART clock is slower in QT compared to silicon. Therefore, lower UART
clock for QT.

Change-Id: Ib2c3acbced3315a78450392528823c5d999db10b
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/134545
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Use generic intr for Tegra12
Terje Bergstrom [Wed, 19 Sep 2012 12:37:24 +0000]
video: tegra: host: Use generic intr for Tegra12

Use generic interrupt code for Tegra12.

Bug 982965

Change-Id: I17059f8ef93d073860b09d187a0798a8a124a556
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133850
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Use generic syncpt for Tegra12
Terje Bergstrom [Wed, 19 Sep 2012 12:35:11 +0000]
video: tegra: host: Use generic syncpt for Tegra12

Use generic syncpt code for Tegra12.

Bug 982965

Change-Id: I17b7a1b7d4ef3f76421b1c2bcd58485cdaa6f08e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133849
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: fix merge issue in dc_reg.h
Xue Dong [Sat, 8 Sep 2012 05:40:18 +0000]
video: tegra: fix merge issue in dc_reg.h

Change-Id: I5b11fefbce863cf8368cd9d0a00b6c8c94cf2630
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/130861
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>

5 years agodrivers: video: tegra: fix CONFIG_TEGRA_GK20A
Jin Qian [Fri, 21 Sep 2012 01:14:48 +0000]
drivers: video: tegra: fix CONFIG_TEGRA_GK20A

set this config to n to disable gk20a code

Change-Id: Ic973bbb3ff3e92309527baf58c087593db104d72
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/134244
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agodrivers: video: tegra: change buffer gpu cacheable and add flush
Jin Qian [Tue, 11 Sep 2012 18:54:40 +0000]
drivers: video: tegra: change buffer gpu cacheable and add flush

default kernel buffers to non-cacheable and no-flush.
circular/pagepool/attribute buffer are cacheable but no flush because
of no cpu access in driver.
channel gr_ctx is cacheable and need flush around cpu access.

Bug 1004057

Change-Id: If7bfce46cb70da3b9b5e867bd99ffb08ae1bd27d
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/131518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agodrivers: video: tegra: use host syncpt increment method
Jin Qian [Sat, 8 Sep 2012 01:07:12 +0000]
drivers: video: tegra: use host syncpt increment method

Use host method since it will always be recognized while graphics
syncpt method relies on using kepler_c class.

Change-Id: I52f543aaf8a7b630ec24905776e0f50fcfc99734
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/131516
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: add lvds framework
Chao Xu [Mon, 27 Aug 2012 22:36:35 +0000]
video: tegra: dc: add lvds framework

Change-Id: I4dd215e8e4103569694d6c43b59f55b177ebd341
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/127958
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: update sor programming
Chao Xu [Tue, 7 Aug 2012 23:36:46 +0000]
video: tegra: dc: update sor programming

- Update SOR register definitions.
- Program SOR power up/power down sequencer.
- Enhance dp enable/disable functions.
- Add lvds enable/disable.

Change-Id: I1e3265d7fbe30bf8c11ea5309917425dfc33bda2
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/127304
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Update t12x pll selection
Chao Xu [Tue, 31 Jul 2012 23:35:58 +0000]
video: tegra: dc: Update t12x pll selection

T124 PLL usage was changed in the following way:

* pll_d is the only MIPI PLL for DSI. Both DSI panels need
  to use this clock.
* pll_d2 is used for the source to all display clok (display,
  displayb, hdmi, lvds etc).
* Also move usleep() to usleep_range().

Change-Id: If0ddde18f6dd9b0831b21ebe7a2549bb9c04f77e
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/127303
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: fix after merge
Mark Stadler [Wed, 19 Sep 2012 17:05:33 +0000]
video: tegra: host: fix after merge

add call to disable per syncpt

Change-Id: Ib019ac2e1767cd18e86be9c606cc8a19b58b2192
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/133835
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra12: clock: fix after merge
Mark Stadler [Wed, 19 Sep 2012 16:41:31 +0000]
ARM: tegra12: clock: fix after merge

incorporate latest tegra11 clock changes into tegra12

Change-Id: I6fd44b65568aee7b4d104fbcefebf9e7f60c0720
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/133834

5 years agovideo: tegra: dc: fix after merge
Mark Stadler [Wed, 19 Sep 2012 15:31:28 +0000]
video: tegra: dc: fix after merge

resolve differences with upstream blend support

Change-Id: I9b17b425d3f4859b5434c20b77c85648d90e53a8
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/133833
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agodrivers: video: tegra: disable pmu for qt
Jin Qian [Tue, 4 Sep 2012 23:35:54 +0000]
drivers: video: tegra: disable pmu for qt

Change-Id: I9c431c1733d37c0aa610c9270c9e1b66cf53a9e5
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/129512
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: enable split_mem for simulation by default
Jin Qian [Wed, 5 Sep 2012 01:19:40 +0000]
ARM: tegra: enable split_mem for simulation by default

Rely on runtime check tegra_split_mem_active to choose correct
code path.

Change-Id: I9784d8056ad5e164fc750abeedbe0a03c4915a81
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/129536
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Bond <rbond@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire_sim: dpd init
Jin Qian [Wed, 5 Sep 2012 21:36:40 +0000]
ARM: tegra: bonaire_sim: dpd init

disable tegra io dpd on t12x

Change-Id: I2e61d24ce94b3bb2a4380e4b3d0741514913096b
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/129808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Bond <rbond@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agodrivers: video: tegra: invalid ctx on fecs after golden ctx init
Jin Qian [Thu, 30 Aug 2012 00:42:08 +0000]
drivers: video: tegra: invalid ctx on fecs after golden ctx init

Bug 1035430

Change-Id: I51eece3826c50d9b44afdb08bee5dccbca3bdf4c
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/128347
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agodrivers: video: host: check tegra revision at runtime
Jin Qian [Wed, 22 Aug 2012 23:36:50 +0000]
drivers: video: host: check tegra revision at runtime

replace compile time check for gk20a sim/qt

Change-Id: I5f22077aa2be016af9ef2b04be18ec3fd935fc9e
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/125356
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoarm: tegra12: clock: fix after merge
Mark Stadler [Thu, 30 Aug 2012 22:31:24 +0000]
arm: tegra12: clock: fix after merge

Stub out EMC scaling parent_ready() check for now.
EMC scaling for tegra12 will be revisited later.

Change-Id: I21e06ce95a0e7f1b6281643833cc2555630a6f9c
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128670
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: host: rearrange tegra12x syncpts (merge fix)
Mark Stadler [Thu, 30 Aug 2012 22:26:16 +0000]
video: tegra: host: rearrange tegra12x syncpts (merge fix)

To be compatible with what's happening upstream.
There is more that needs to be done - look for FIXME

Change-Id: I95cd16ccbdbcc062749e76c65b1f26e27a4a249d
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128669
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agovideo: tegra: dynamic tsec, msenc firmware name
Mark Stadler [Thu, 30 Aug 2012 22:04:32 +0000]
video: tegra: dynamic tsec, msenc firmware name

Post-merge fix in support of runtime firmware choice

Change-Id: I4d4beaa54c5bc91e8ffd5a4ba4e1f1e72a522f59
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128668
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agovideo: tegra: gk20a: fixes for stricter compiler
Mark Stadler [Thu, 30 Aug 2012 21:49:57 +0000]
video: tegra: gk20a: fixes for stricter compiler

Change-Id: I0dbba346ba4031f58093608456e62822ba92ced3
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128666
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>

5 years agoarm: bonaire: minor updates tracking earlier platforms
Mark Stadler [Thu, 30 Aug 2012 21:40:16 +0000]
arm: bonaire: minor updates tracking earlier platforms

remove last usages of tegra_gpio_[enable|disable]
remove reference to (removed) tegra_wdt_device

Change-Id: I0e0fba7e946f1c30cf08eeb81c4211693c3e3331
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128665
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: Tegra12x wake table created
Mark Stadler [Thu, 30 Aug 2012 21:29:59 +0000]
arm: tegra: Tegra12x wake table created

Tegra12x specific wakeup table is created

Change-Id: Ic74eb77790965dad5bdc21b6c3282aa604a6b9dc
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128664
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra12: clock: bring up to tegra11 level
Mark Stadler [Thu, 30 Aug 2012 21:21:28 +0000]
arm: tegra12: clock: bring up to tegra11 level

Most clock development is happening in tegra11 source.
This change refreshes tegra12 source to same level.

Change-Id: I6759a62cce1762147d8917655c16049733595fed
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128663

5 years agovideo: tegra: dc: move blending support to window.c
Mark Stadler [Thu, 30 Aug 2012 21:06:23 +0000]
video: tegra: dc: move blending support to window.c

To match organition of upstream sources.
Original source was removed in the merge.

Change-Id: If665bdca2d91b13d408de3e29560b1112d1f9a49
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/128661
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agoxen: mark local pages as FOREIGN in the m2p_override
Stefano Stabellini [Wed, 23 May 2012 17:57:20 +0000]
xen: mark local pages as FOREIGN in the m2p_override

commit b9e0d95c041ca2d7ad297ee37c2e9cfab67a188f upstream.

When the frontend and the backend reside on the same domain, even if we
add pages to the m2p_override, these pages will never be returned by
mfn_to_pfn because the check "get_phys_to_machine(pfn) != mfn" will
always fail, so the pfn of the frontend will be returned instead
(resulting in a deadlock because the frontend pages are already locked).

INFO: task qemu-system-i38:1085 blocked for more than 120 seconds.
"echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
qemu-system-i38 D ffff8800cfc137c0     0  1085      1 0x00000000
 ffff8800c47ed898 0000000000000282 ffff8800be4596b0 00000000000137c0
 ffff8800c47edfd8 ffff8800c47ec010 00000000000137c0 00000000000137c0
 ffff8800c47edfd8 00000000000137c0 ffffffff82213020 ffff8800be4596b0
Call Trace:
 [<ffffffff81101ee0>] ? __lock_page+0x70/0x70
 [<ffffffff81a0fdd9>] schedule+0x29/0x70
 [<ffffffff81a0fe80>] io_schedule+0x60/0x80
 [<ffffffff81101eee>] sleep_on_page+0xe/0x20
 [<ffffffff81a0e1ca>] __wait_on_bit_lock+0x5a/0xc0
 [<ffffffff81101ed7>] __lock_page+0x67/0x70
 [<ffffffff8106f750>] ? autoremove_wake_function+0x40/0x40
 [<ffffffff811867e6>] ? bio_add_page+0x36/0x40
 [<ffffffff8110b692>] set_page_dirty_lock+0x52/0x60
 [<ffffffff81186021>] bio_set_pages_dirty+0x51/0x70
 [<ffffffff8118c6b4>] do_blockdev_direct_IO+0xb24/0xeb0
 [<ffffffff811e71a0>] ? ext3_get_blocks_handle+0xe00/0xe00
 [<ffffffff8118ca95>] __blockdev_direct_IO+0x55/0x60
 [<ffffffff811e71a0>] ? ext3_get_blocks_handle+0xe00/0xe00
 [<ffffffff811e91c8>] ext3_direct_IO+0xf8/0x390
 [<ffffffff811e71a0>] ? ext3_get_blocks_handle+0xe00/0xe00
 [<ffffffff81004b60>] ? xen_mc_flush+0xb0/0x1b0
 [<ffffffff81104027>] generic_file_aio_read+0x737/0x780
 [<ffffffff813bedeb>] ? gnttab_map_refs+0x15b/0x1e0
 [<ffffffff811038f0>] ? find_get_pages+0x150/0x150
 [<ffffffff8119736c>] aio_rw_vect_retry+0x7c/0x1d0
 [<ffffffff811972f0>] ? lookup_ioctx+0x90/0x90
 [<ffffffff81198856>] aio_run_iocb+0x66/0x1a0
 [<ffffffff811998b8>] do_io_submit+0x708/0xb90
 [<ffffffff81199d50>] sys_io_submit+0x10/0x20
 [<ffffffff81a18d69>] system_call_fastpath+0x16/0x1b

The explanation is in the comment within the code:

We need to do this because the pages shared by the frontend
(xen-blkfront) can be already locked (lock_page, called by
do_read_cache_page); when the userspace backend tries to use them
with direct_IO, mfn_to_pfn returns the pfn of the frontend, so
do_blockdev_direct_IO is going to try to lock the same pages
again resulting in a deadlock.

A simplified call graph looks like this:

pygrub                          QEMU
-----------------------------------------------
do_read_cache_page              io_submit
  |                              |
lock_page                       ext3_direct_IO
                                 |
                                bio_add_page
                                 |
                                lock_page

Internally the xen-blkback uses m2p_add_override to swizzle (temporarily)
a 'struct page' to have a different MFN (so that it can point to another
guest). It also can easily find out whether another pfn corresponding
to the mfn exists in the m2p, and can set the FOREIGN bit
in the p2m, making sure that mfn_to_pfn returns the pfn of the backend.

This allows the backend to perform direct_IO on these pages, but as a
side effect prevents the frontend from using get_user_pages_fast on
them while they are being shared with the backend.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

5 years agoARM: tegra: change tegra revision decoding
Jin Qian [Wed, 22 Aug 2012 21:43:05 +0000]
ARM: tegra: change tegra revision decoding

major=0,minor=3 means ASIM+Linsim
major=0,minor=2 means ASIM+Qt

Change-Id: I1309d95998a62ad41f2a063185259d578f394d77
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/125335
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Bond <rbond@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire: Fix dithering error message
Chao Xu [Fri, 24 Aug 2012 00:04:35 +0000]
ARM: tegra: bonaire: Fix dithering error message

Change-Id: I87fa024f68b496530465c20b3c1faf0d167876ba
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/127246
Reviewed-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Fix clock debugfs on Tegra12
Ken Adams [Mon, 13 Aug 2012 19:39:13 +0000]
ARM: tegra: Fix clock debugfs on Tegra12

The vi shared clock entries must be named uniquely.
Otherwise the debugfs will cancel/recursively destroy all those
which were otherwise successfully setup.
Bug 1030674

Change-Id: I901dc0f86f691c72edade4a5feca60053539ce47
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/123155
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agodrivers: video: host: add gk20a ctrl ioctls
Jin Qian [Fri, 3 Aug 2012 18:43:30 +0000]
drivers: video: host: add gk20a ctrl ioctls

Change-Id: I25739ffe9134aae19096b83c54ff58dd1c4d15a9
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/124756
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: resolve deltas - address past merge issues
Mark Stadler [Tue, 14 Aug 2012 20:42:23 +0000]
video: tegra: dc: resolve deltas - address past merge issues

The transition to 3.4 kernel, behind tegra14x exposed some
unintended changes due to incorrect merge conflict resolutions
throughout 3.1 kernel development.  This change addresses that.

Change-Id: I454439e1a47b7011f48c3247e0d0a07174c2c6c7
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/123454
Reviewed-by: Automatic_Commit_Validation_User

5 years agovideo: tegra: dc: program surface kind register
Mark Stadler [Fri, 10 Aug 2012 02:46:07 +0000]
video: tegra: dc: program surface kind register

Change-Id: I8ca8a8970338ad2a3ffcfeb32f370e6b8684ea89
Reviewed-on: http://git-master/r/119075
Tested-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: add support for block linear format
Mark Stadler [Thu, 9 Aug 2012 02:17:36 +0000]
video: tegra: dc: add support for block linear format

Change-Id: Icd8feba013b1d6d00b9c3b685b22f5feb7778ba4
Reviewed-on: http://git-master/r/113407
Tested-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: add kernel blocklinear interface
Chao Xu [Thu, 21 Jun 2012 00:05:45 +0000]
video: tegra: dc: add kernel blocklinear interface

Change-Id: I2cc33844d07f34b5391c927293015294b45ae125
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/110199
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: add support for yuv semi planar
Mark Stadler [Thu, 9 Aug 2012 00:04:42 +0000]
video: tegra: dc: add support for yuv semi planar

Change-Id: Ia9a2e2cb14c7acade7a0c13b63f732b7e8605176
Reviewed-on: http://git-master/r/110214
Tested-by: Xue Dong <xdong@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: configs: enable GK20A PMU for bonaire_sim
Jin Qian [Fri, 1 Jun 2012 19:38:48 +0000]
ARM: tegra: configs: enable GK20A PMU for bonaire_sim

Change-Id: I05b135d6349461cf85f86db0212b2370bd176205
Reviewed-on: http://git-master/r/105986
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: add kconfig to disable gk20a pmu
Jin Qian [Mon, 14 May 2012 18:37:00 +0000]
video: tegra: host: add kconfig to disable gk20a pmu

http://nvbugs/981347
Change-Id: Ibfa8546ffc6f73af54e372565d009dae266a02d0
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/102284
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: add GK20A_NETLIST_FIRMWARE kconfig
Jin Qian [Tue, 8 May 2012 01:56:21 +0000]
video: tegra: host: add GK20A_NETLIST_FIRMWARE kconfig

Enable this config to load gk20a netlist from android firmware
directory, otherwise from simulation environment.

Change-Id: Ia01ecd1ea6311c9708f5b6b63e866e888819b9d2
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/101108
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire_sim: Enable GCOV for kernel
Chao Xu [Mon, 30 Apr 2012 17:22:24 +0000]
ARM: tegra: bonaire_sim: Enable GCOV for kernel

Change-Id: I77269a516e7c69a4a75570980315accc275a803d
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/99680
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: Tegra: Make simulated split memory a runtime option
Mark Stadler [Wed, 8 Aug 2012 03:19:14 +0000]
ARM: Tegra: Make simulated split memory a runtime option

Change-Id: I7fa90bcf110ddb9105f7ca631a88668482307307
Signed-off-by: Bob Bond <rbond@nvidia.com>
Reviewed-on: http://git-master/r/95947
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: add temporal dither config
Mark Stadler [Wed, 8 Aug 2012 02:15:46 +0000]
video: tegra: dc: add temporal dither config

Change-Id: I2b9d52955a781c061ca74c33f97dc6a1268e8633
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/93912
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Add temporal dither support to dc
Chao Xu [Mon, 2 Apr 2012 21:49:37 +0000]
video: tegra: dc: Add temporal dither support to dc

Change-Id: I18df125f069df2ad343a6b29cf318d69e68e93b5
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/93991
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire: Add temporal dither definition
Chao Xu [Mon, 2 Apr 2012 21:46:13 +0000]
ARM: tegra: bonaire: Add temporal dither definition

Change-Id: I77484541f50896656dec94cf940396e9440a913d
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/93990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Update register offsets
Chao Xu [Fri, 9 Mar 2012 20:05:44 +0000]
video: tegra: dc: Update register offsets

Change-Id: I7203f6235ac4c120f20ff4064ab1c1acf4354e09
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/89194
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: disable TEGRA_IOVMM_SMMU
Ken Adams [Wed, 21 Mar 2012 16:26:04 +0000]
ARM: tegra: disable TEGRA_IOVMM_SMMU

Temporary workaround to allow re-enabling of the framebuffer_test
on bonaire_sim... We aren't using this functionality yet it is causing
a crash nonetheless.

Change-Id: Ia01c820e9c1b03f4f2dd5b708d21f5a8f516757b
Reviewed-on: http://git-master/r/90687
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire_sim: Enable DEBUG_FS, CLOCK_DEBUG_WRITE
Somasundaram S [Wed, 14 Mar 2012 09:39:59 +0000]
ARM: tegra: bonaire_sim: Enable DEBUG_FS, CLOCK_DEBUG_WRITE

Enable debugfs and write access to debugfs clock tree
options for bonaire_sim

Change-Id: I864da6f81e0b3f387b39a890a54abd4280881245
Signed-off-by: Somasundaram S <somasundaram@nvidia.com>
Reviewed-on: http://git-master/r/90015
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Somu Sundaram <somasundarams@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agotegra: QT clock hackery
Mark Stadler [Wed, 8 Aug 2012 00:31:51 +0000]
tegra: QT clock hackery

Change-Id: Iaab514e0c523c33f94c5b8c021e249a4c25cb1c0
Signed-off-by: Bob Bond <rbond@nvidia.com>
Reviewed-on: http://git-master/r/90375
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agotegra: simulation: QT split memory changes
Bob Bond [Thu, 15 Mar 2012 17:43:44 +0000]
tegra: simulation: QT split memory changes

Change-Id: Id502922438aa7fbeebea990f08d6e058bdd7b99d
Signed-off-by: Bob Bond <rbond@nvidia.com>
Reviewed-on: http://git-master/r/90373
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: enable I2C driver for kernel
Chao Xu [Mon, 12 Mar 2012 21:15:15 +0000]
ARM: tegra: enable I2C driver for kernel

Change-Id: I8ca24fc17b2e5ce79b83a39b009ae4819c9af3f6
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/89563
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoarm: tegra: Add split memory region to iomap
Mark Stadler [Tue, 7 Aug 2012 22:56:51 +0000]
arm: tegra: Add split memory region to iomap

Change-Id: I1652eff9f89f9ff8a570c65f767dddd33b77b38a
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agokconfig: Add CONFIG_TEGRA_SIMULATION_SPLIT_MEM
Bob Bond [Tue, 6 Mar 2012 23:07:24 +0000]
kconfig: Add CONFIG_TEGRA_SIMULATION_SPLIT_MEM

Change-Id: I0c014a8e0b41a87559954f0cb4fd7f9bee843130
Signed-off-by: Bob Bond <rbond@nvidia.com>
Reviewed-on: http://git-master/r/86665
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire_sim: sdmmc uhs2 support
Mark Stadler [Tue, 7 Aug 2012 22:26:15 +0000]
ARM: tegra: bonaire_sim: sdmmc uhs2 support

Adding platform data which tells whether SDMMC controller
is UHS2 capable or not.

Bug 896249

Change-Id: Iffe68ef9fbc094c65c600a31ae5ad322d2215442
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/84894
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agommc: controller register update as per SD4.0 specs
Sachin Nikam [Thu, 10 Nov 2011 10:52:42 +0000]
mmc: controller register update as per SD4.0 specs

Updating the header for sdmmc controller registers so that
it is compatible with SD4.0 specifications.

Bug 896249

Change-Id: I35e383441c216af8877af3015eb079337c324152
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/84782
Reviewed-by: Mark Stadler <mastadler@nvidia.com>

5 years agoregulator: remove duplicate regulator_force_disable()
Mark Stadler [Tue, 7 Aug 2012 18:43:22 +0000]
regulator: remove duplicate regulator_force_disable()

fixes build issue, likely due to faulty prior merge

Change-Id: I1616aa17d6e9f403df4b0d22d5d712f8b4cfb2be
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoarm: tegra: fix build after Tegra14 k3.4 merge (part 2)
Mark Stadler [Tue, 7 Aug 2012 18:34:18 +0000]
arm: tegra: fix build after Tegra14 k3.4 merge (part 2)

The prior change only fixed the CONFIG_HAVE_ARM_TWD codepath.
Future chips needs to use the CONFIG_ARM_ARCH_TIMER codepath,
and that path was still broken.

Change-Id: I3050671564f9d909167b46190187573028cf2f10
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Enable wake-lock driver for bonaire_sim.
Jin Qian [Wed, 15 Feb 2012 01:37:46 +0000]
ARM: tegra: Enable wake-lock driver for bonaire_sim.

Change-Id: I6e1d39fc5f661083970851a97a8e426302dd4d69
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/77695
Tested-by: Antoine Chauveau <achauveau@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/83966
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire: Add defconfig
Yudong Tan [Wed, 14 Sep 2011 21:13:11 +0000]
ARM: tegra: bonaire: Add defconfig

Change-Id: I0f0786d0d04b4280f23e96b3d5fb6823748a17c8
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82942
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire_sim: Add defconfig
Jin Qian [Tue, 7 Feb 2012 20:28:33 +0000]
ARM: tegra: bonaire_sim: Add defconfig

Change-Id: Id6332bfa45ecb8c25c00bfc8368a541f542a82d9
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82941
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire: Add sdhci support
Jin Qian [Sat, 11 Feb 2012 00:31:49 +0000]
ARM: tegra: bonaire: Add sdhci support

Change-Id: Ifb0bc045a83b3d19dae90ca6d18103c50cc679cb
Tested-by: Robert Bond <rbond@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82960
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agommc: add uhs2 header for commands
Jin Qian [Thu, 9 Feb 2012 23:28:43 +0000]
mmc: add uhs2 header for commands

Bug 896249

Change-Id: I4cd70d161d0088725523ab38350d4ea0b466b24c
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82957
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agommc: add UHS-II controller register interface
Jin Qian [Thu, 9 Feb 2012 23:28:10 +0000]
mmc: add UHS-II controller register interface

Adding uhs2i.h as per SD4.0 specifications

Bug 896249

Change-Id: Iae69393396f9edc05f30d00760e269b207ec9572
Reviewed-on: http://git-master/r/63822
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82956
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Add display feature table support.
Mark Stadler [Tue, 7 Aug 2012 03:55:36 +0000]
video: tegra: dc: Add display feature table support.

Add display feature table so that user and kernel could set and
update window attributes properly.

Bug 962353

Change-Id: Ic5fb0b712a6ccb912e49b4cfd14282f552c1408a
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/105529
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Add eDP support to dc
Mark Stadler [Thu, 2 Aug 2012 00:51:41 +0000]
video: tegra: dc: Add eDP support to dc

Change-Id: I040963c38bf68f4ceb17aa7ce00ef65fd6ec5a7a
Tested-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Chao Xu <cxu@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82945
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add eDP support for Tegra12x
Jin Qian [Mon, 13 Feb 2012 22:49:43 +0000]
ARM: tegra: Add eDP support for Tegra12x

Change-Id: I5f7ec1166c5806e2d63bce586879945231b17f6a
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/83572
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Adding restrictions to enable DSI on the simulator.
Mark Stadler [Thu, 2 Aug 2012 00:28:18 +0000]
video: tegra: dc: Adding restrictions to enable DSI on the simulator.

The dsi cmodel is not fully implemented or functional. For exmaple
it does not interpret command mode commands, it does not support EOT
packet yet. To run full stack linux kernel on the simulator with DSI
enabled, we have to impose some restrictions/hacks.

Change-Id: If274d4ffced87486e8cc93b9446036adfbabddb2
Tested-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82944
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Add new blender config
Mark Stadler [Thu, 2 Aug 2012 00:20:03 +0000]
video: tegra: dc: Add new blender config

Change-Id: I3defeae842675cdc87199560a1f6061af9550568
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: dc: Add new blender support
Mark Stadler [Thu, 2 Aug 2012 00:20:03 +0000]
video: tegra: dc: Add new blender support

Legacy blending modes are specified by the following flags:
 - TEGRA_WIN_FLAG_BLEND_COVERAGE -> source alpha blending
 - TEGRA_WIN_FLAG_BLEND_PREMULT -> pre-multiplied destination alpha
                                   blending
 - No flag -> no blending (opaque)

Change-Id: I3defeae842675cdc87199560a1f6061af9550568
Tested-by: Chao Xu <cxu@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82943
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to host
Mark Stadler [Wed, 1 Aug 2012 20:40:26 +0000]
video: tegra: host: Tegra12 updates to host

Change-Id: I341c55571b8f0f60b7a4bfae374c8c4c771fd27b
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to tsec
Mark Stadler [Wed, 1 Aug 2012 23:16:34 +0000]
video: tegra: host: Tegra12 updates to tsec

Change-Id: I4caae29d351355b336d3ea326bd80875f0d39bd1
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to msenc
Mark Stadler [Wed, 1 Aug 2012 22:52:48 +0000]
video: tegra: host: Tegra12 updates to msenc

Change-Id: I306deab1020fc95abc9a7015e8a2d31601b5c164
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to mpe
Mark Stadler [Wed, 1 Aug 2012 22:38:54 +0000]
video: tegra: host: Tegra12 updates to mpe

Change-Id: Ic94931663a4fc408fe27536f8169deda71fe852a
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to host1x
Mark Stadler [Wed, 1 Aug 2012 22:12:52 +0000]
video: tegra: host: Tegra12 updates to host1x

Change-Id: Icbc3efd01e05538ffb954a12f694bdd5fbaa2f1f
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to Tegra14 support
Mark Stadler [Wed, 1 Aug 2012 23:06:03 +0000]
video: tegra: host: Tegra12 updates to Tegra14 support

Change-Id: Id9966599b580b51dc48d7fd82efd19d9b6ae50ab
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to Tegra11 support
Mark Stadler [Wed, 1 Aug 2012 22:57:43 +0000]
video: tegra: host: Tegra12 updates to Tegra11 support

Change-Id: I42c4ad1abe6d2e43b8f936a15b7536e99346a0b4
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to Tegra3 support
Mark Stadler [Wed, 1 Aug 2012 23:12:40 +0000]
video: tegra: host: Tegra12 updates to Tegra3 support

Change-Id: I8f9c4bbcb15c8bb9e89497adbfb5d277b0c9ce6c
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Tegra12 updates to Tegra2 support
Mark Stadler [Wed, 1 Aug 2012 23:10:03 +0000]
video: tegra: host: Tegra12 updates to Tegra2 support

Change-Id: I70cc97810ef541802e4b18a1e740b23635240859
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Add Tegra12 support
Mark Stadler [Thu, 2 Aug 2012 17:53:51 +0000]
video: tegra: host: Add Tegra12 support

Change-Id: I85eaa0199bb590fe4c55bc73b54592bfdcec0697
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Add gk20a driver for Tegra12
Mark Stadler [Thu, 2 Aug 2012 16:52:03 +0000]
video: tegra: host: Add gk20a driver for Tegra12

Change-Id: I3f92ff7129a8b6bda9f4645f9360b419fd12334d
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: host: Add VIC driver for Tegra12
Mark Stadler [Thu, 2 Aug 2012 01:02:02 +0000]
video: tegra: host: Add VIC driver for Tegra12

Change-Id: I2f7854dee65fb9bd5ea63cdf39e1548f1476d496
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add VIC device resource for Tegra12x
Mark Stadler [Wed, 1 Aug 2012 05:58:50 +0000]
ARM: tegra: Add VIC device resource for Tegra12x

Change-Id: I36549d3bfbf7297a789af0e34993639da8496e5b
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/83275
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agovideo: tegra: nvmap: Tegra12 updates to nvmap
Mark Stadler [Fri, 3 Aug 2012 03:20:03 +0000]
video: tegra: nvmap: Tegra12 updates to nvmap

Change-Id: Ie3e089c4aee36295da3d26e9d5ee2523e16859cc
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agomedia: video: tegra: Update nvmap interface for Tegra12x
Jin Qian [Fri, 10 Feb 2012 22:38:27 +0000]
media: video: tegra: Update nvmap interface for Tegra12x

Change-Id: I340557ac1ead8259f03cf453a8c52dd7b3703ace
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/83274
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: bonaire: add board files
Jin Qian [Fri, 3 Feb 2012 02:25:15 +0000]
ARM: tegra: bonaire: add board files

and the include for host1x init (invoked from board file)

Change-Id: I5a7cb2e074f6c7395aec5ede1db31b2bdeae5cb0
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82938
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add MACH_BONAIRE in config file
Jin Qian [Fri, 3 Feb 2012 02:26:58 +0000]
ARM: tegra: Add MACH_BONAIRE in config file

Change-Id: I118fd6fd55dc28dae39fd3f2977d4dbce00694fe
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82937
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Update MC defines for Tegra12x
Mark Stadler [Wed, 1 Aug 2012 04:28:12 +0000]
ARM: tegra: Update MC defines for Tegra12x

Change-Id: If621b74762e5182743820f61b4ae5c67c0ea73ba
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82935
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Update iomap for Tegra12x
Mark Stadler [Wed, 1 Aug 2012 00:48:27 +0000]
ARM: tegra: Update iomap for Tegra12x

Change-Id: I11e6956d182f9787d79651b91c8270d27ce2807d
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82933
Reviewed-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add io regions for Tegra12x
Mark Stadler [Wed, 1 Aug 2012 00:42:50 +0000]
ARM: tegra: Add io regions for Tegra12x

Change-Id: Icc5b76d72769ba18ad37722d7b13ea65e2966737
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Robert Bond <rbond@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82932
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add emc files for Tegra12x
Mark Stadler [Wed, 1 Aug 2012 01:23:52 +0000]
ARM: tegra: Add emc files for Tegra12x

Change-Id: Iee70053fff3a63fe56c76363289834c0e5d7165b
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82934
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add Tegra12x clock and dvfs files
Mark Stadler [Wed, 1 Aug 2012 00:31:06 +0000]
ARM: tegra: Add Tegra12x clock and dvfs files

Change-Id: Ib1a70afc6f626fc943ec810ea51ff5d917a96c80
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82931
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: pinmux: Add Tegra12x pinmux tables
Mark Stadler [Tue, 31 Jul 2012 23:18:13 +0000]
ARM: tegra: pinmux: Add Tegra12x pinmux tables

Change-Id: I021b1bed4e84a8d47463b8ee289ff400d9767767
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82930
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: add Tegra12x configuration options
Mark Stadler [Tue, 31 Jul 2012 22:51:18 +0000]
ARM: tegra: add Tegra12x configuration options

Change-Id: Ie78706cfb60806a283fc2a4aaa0571b274d5c0ad
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82929
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: add irq defines for Tegra12x
Jin Qian [Fri, 3 Feb 2012 00:57:45 +0000]
ARM: tegra: add irq defines for Tegra12x

Change-Id: If15eb541fd5893afbb74d4d84950e7a79786afa7
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82928
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: Add code to handle chip ID for Tegra12x
Mark Stadler [Tue, 31 Jul 2012 20:42:39 +0000]
ARM: tegra: Add code to handle chip ID for Tegra12x

Change-Id: I1d0e9117f2a5be77479b93a52dd8baa1f8c2ead8
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82927
Signed-off-by: Mark Stadler <mastadler@nvidia.com>

5 years agoARM: tegra: pluto: Adding late init call to MACHINE_START
Shridhar Rasal [Fri, 23 Aug 2013 05:10:48 +0000]
ARM: tegra: pluto: Adding late init call to MACHINE_START

With this Debug Sys file entries pertaining to clock is created
through late initcall.

Bug 1327616

Change-Id: I5b751892d67623eefe5292a6f3ee802eed586360
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/265304

5 years agoarm: mm: dma-mapping: add support for prefech and gap pages
Krishna Reddy [Wed, 17 Jul 2013 20:04:39 +0000]
arm: mm: dma-mapping: add support for prefech and gap pages

add support for prefetch and gap pages to be part of iova allocations
and mapping.
prefetch pages are necessary to avoid smmu faults, which are the result
of hw engines speculatively fetching beyond the iova mapped area.
gap pages are to separate the iova allcoations in order catch iova
access violations.

Bug 1303110
Bug 1265246
Bug 1215880
Bug 1327616

Change-Id: Ieacc0cd0a82e7f93746b453dafcec6a1766088a6
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/246693
(cherry picked from commit 889be8cbffa184c38f31542546d1f1ffbe8d8502)
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/264780

5 years agommc: sdhci-tegra: disable auto callibration
Shridhar Rasal [Mon, 15 Apr 2013 14:50:44 +0000]
mmc: sdhci-tegra: disable auto callibration

For SDMMC3 on Dalmore, CRC errors observed keeping auto callibration ON.
So temp disabling it.

Bug 1271060
Bug 1343519

Change-Id: I73697f385dd5d8345f68839bd6c9576daa1f23c4
Reviewed-on: http://git-master/r/219430
(cherry picked from commit ce73859c650993685c2f120077164f79963fc2ca)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/264704
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ajay Nandakumar M <anandakumarm@nvidia.com>
Tested-by: Ajay Nandakumar M <anandakumarm@nvidia.com>

5 years agoARM: tegra: dalmore: sdhci platform registration
R Raj Kumar [Wed, 24 Jul 2013 05:00:37 +0000]
ARM: tegra: dalmore: sdhci platform registration

Enabled sdhci registration through platform.
Update max clock limit for eMMC, SD and SDIO.

Bug 1249335
Bug 1343519

Change-Id: Id4893e4117693d94dc180b05bc01fa91cb4d6f59
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/252738
(cherry picked from commit c80e8cabec46ae8c04fe523844cf4400bc4d5983)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/264703
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ajay Nandakumar M <anandakumarm@nvidia.com>
Tested-by: Ajay Nandakumar M <anandakumarm@nvidia.com>

5 years agoARM: dma-mapping: Use iommu_map_sg() in dma_map_sg()
Hiroshi Doyu [Tue, 11 Jun 2013 12:25:10 +0000]
ARM: dma-mapping: Use iommu_map_sg() in dma_map_sg()

Use iommu_map_sg() in dma_map_sg() for perf instead of calling
iommu_map() repeatedly.

Bug 1304956
Bug 1327616

Change-Id: Ib5941f719fdf822a166fbbb0dc3fad22e2767e21
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/253307
(cherry picked from commit 1765eb73dd6f668e8f9fde99230af8fcba0bd906)
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/264779

5 years agoiommu/tegra: smmu: Implement map_sg() for perf
Hiroshi Doyu [Tue, 11 Jun 2013 12:24:02 +0000]
iommu/tegra: smmu: Implement map_sg() for perf

Implement a new API, map_sg() for perf, which does cache maintenance
at once.

Bug 1304956
Bug 1327616

Change-Id: I8bd1a65670afb1bfe778ec077dbac64f14218f78
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/253306
(cherry picked from commit 59cf6adb12e229165232492379e4a5ab019000f3)
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/264778
Reviewed-by: Automatic_Commit_Validation_User