5 years agovideo: tegra: dc: add sysfs interface for hdmi settings
siddardha naraharisetti [Tue, 27 Aug 2013 20:51:18 +0000]
video: tegra: dc: add sysfs interface for hdmi settings

Added sysfs interface to update hdmi related settings like
drive strength etc for the purpose of tuning

Bug 1313494

Change-Id: I5ada1fb68fef34208dfdbce817c788bd266d8054
Signed-off-by: siddardha naraharisetti <siddardhan@nvidia.com>
Reviewed-on: http://git-master/r/267539
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agopinctrl: palmas: add dt support for palmas pincontrol driver
Laxman Dewangan [Thu, 29 Aug 2013 16:02:34 +0000]
pinctrl: palmas: add dt support for palmas pincontrol driver

Add DT support for the palmas pincontrol driver. The driver can
be instantiated from DT as well as from board files.

Modify the boardfiles to align with changes.

Change-Id: I20a6ece4016b7028b3640ba7df4b798805d9e598
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267845

5 years agopinctrl: utils : add support to pass config type in generic util APIs
Laxman Dewangan [Thu, 29 Aug 2013 07:36:11 +0000]
pinctrl: utils : add support to pass config type in generic util APIs

Add support to pass the config type like GROUP or PIN when using
the utils or generic pin configuration APIs. This will make the
APIs more generic.

Added additional inline APIs such that it can be use directly as
callback for the pinctrl_ops.

Changes from V1:
- Remove separate implementation for pins and group for
  pinctrl_utils_dt_free_map and improve this function
  to support both i.e. PINS and GROUPs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 3287c24088abded9f111ca797fdd36f86912d199)

Conflicts:

drivers/pinctrl/pinctrl-palmas.c

Change-Id: Ib37c1692040c606f07267e617cea915876b4fb1e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267844

5 years agopinctrl: add includes and ifdefs for non-DT builds
Linus Walleij [Thu, 15 Aug 2013 19:38:49 +0000]
pinctrl: add includes and ifdefs for non-DT builds

Commit e81c8f18afc4fdd6e34d8c83814b8b5134dbb30f
"pinctrl: pinconf-generic: add generic APIs for mapping pinctrl node"
Added function prototypes with implicit dependencies
on other header files causing build warnings like this:

In file included from
arch/arm/mach-ux500/board-mop500-pins.c:12:0:
include/linux/pinctrl/pinconf-generic.h:142:3:
warning: 'struct device_node' declared inside parameter list [enabled
by default]
   unsigned *reserved_maps, unsigned *num_maps);
   ^
include/linux/pinctrl/pinconf-generic.h:142:3:
warning: its scope is only this definition or declaration, which is
probably not what you want [enabled by default]
include/linux/pinctrl/pinconf-generic.h:142:3:
warning: 'struct pinctrl_dev' declared inside parameter list [enabled
by default]
include/linux/pinctrl/pinconf-generic.h:145:3:
warning: 'struct device_node' declared inside parameter list [enabled
by default]
   unsigned *num_maps);
   ^
Let's just add ifdefs for non-DT systems (the actual code is
already ifdefed) and #include <linux/device.h> to get the
most important structs and forward-declare the pinctrl
core structs.

Reported-by: Olof Johansson <olof@lixom.net>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 0d74d4a161c9f9870039af414b712552c0ed6dfb)
Change-Id: I8f0b93068af033d4255c3f34b497a7d6974d4793
Reviewed-on: http://git-master/r/267843
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoregulator: palmas: make sure disable boost during suspend for SMPS10
Laxman Dewangan [Thu, 29 Aug 2013 02:35:30 +0000]
regulator: palmas: make sure disable boost during suspend for SMPS10

If flag for SMPS10 has the disable_boost_on_suspend is true then
make sure that boost of SMPS10 is disabled.

If any regulator is using this then defer the boost disable and
disable when client actually disable the smps10.

bug 1291841

Change-Id: Ia03d29f68132f87b970d4df8402b3cdd4dba95df
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/239722
(cherry picked from commit 368abfad3a0b27fa893df2d1b201339701df367d)
Reviewed-on: http://git-master/r/267662
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: use macro in place of magic number for external control
Laxman Dewangan [Thu, 29 Aug 2013 11:38:11 +0000]
ARM: tegra: use macro in place of magic number for external control

Use macro for setting external control in place of the direct
number when populating AMS AS3722 regulator platform data.

Change-Id: Id8e00b3d6ec14b8ba3d12d1280d7a46f4e4586a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267919
GVS: Gerrit_Virtual_Submit

5 years agommc: tegra: Always enable calibration
Pavan Kunapuli [Wed, 28 Aug 2013 15:14:14 +0000]
mmc: tegra: Always enable calibration

Do not disable calibration unless NVQUIRK_SET_DRIVE_STRENGTH is set
which means the drive strength codes would be updated in the pad ctrl
registers and the same would be sent to the pads.

Bug 1357541

Change-Id: I2574e412859b3c2e0214ebf996f0459dcda4b139
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/267403
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agoarm: tegra: use the correct initail value for pwm_gpio
Kerwin Wan [Fri, 9 Aug 2013 08:42:04 +0000]
arm: tegra: use the correct initail value for pwm_gpio

pwm-backlight driver will check whether pwm_gpio is a valid gpio
by gpio_is_valid. If it's a valid gpio pin, it will use
it as a pwm output pin. If not, it will ignore and the pwm
output pin should be configured in board files. But pwm_gpio
is 0 by default and 0(TEGRA_GPIO_PA0) is a valid gpio.
So the pwm-backlight drvier will do gpio_request(TEGRA_GPIO_PA0)
and gpio_free(TEGRA_GPIO_PA0). This is definetly wrong.
So set pwm_gpio to TEGRA_GPIO_INVALID for those panels which
pwm output pin is set in board files to fix the wrong behavior.

Change-Id: I96e451b1f82c494731e29c09695a399d46c243b9
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/267752
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: Remove VE from pg skiplist
Terje Bergstrom [Tue, 27 Aug 2013 12:10:03 +0000]
ARM: tegra: Remove VE from pg skiplist

nvhost has a separate flag for enabling power gating for VE. Remove
VE from power gating skiplist. Fix clock list of VE domain.

Change-Id: I295f6ef3fec9f15d6644295b47545d4d3b73fc14
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/267117
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Enable ISP 2nd level cg
Terje Bergstrom [Tue, 27 Aug 2013 12:08:23 +0000]
video: tegra: host: Enable ISP 2nd level cg

Enable ISP's 2nd level clock gating when ISP is powered up.

Bug 1346075

Change-Id: I9c1f1f67b3ecd33b57c073ba1ae426db4985d317
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/267116
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Merge runtime PM code
Terje Bergstrom [Tue, 27 Aug 2013 11:41:43 +0000]
video: tegra: host: Merge runtime PM code

Merge enabling of runtime to common code in
nvhost_module_init().

Change-Id: Iabd21b6b9c1b89d9d2fea593e693acbb29445d0b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/267115
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Merge power domain code
Terje Bergstrom [Tue, 27 Aug 2013 10:20:55 +0000]
video: tegra: host: Merge power domain code

Merge different instances of power domain code into one.

Change-Id: I8ba329601c624aa66e7a4793d4bf16ae5cbf116f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/267114
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Implement generic module resume
Terje Bergstrom [Tue, 27 Aug 2013 08:53:28 +0000]
video: tegra: host: Implement generic module resume

Implement generic module resume which gets called when a power domain
is turned on. Convert VIC to use the generic module resume.

Change-Id: I2a40a1a050fd38d3e793b35ac16019ee1cb5e525
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/267113
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: tn8: set LDO1 to EXT_CONTROL_NSLEEP
Hunk Lin [Wed, 28 Aug 2013 09:43:23 +0000]
ARM: tegra: tn8: set LDO1 to EXT_CONTROL_NSLEEP

LDO1 is used for PLLs. So it should be on in active use cases and off in
LP0.

Bug 1357501

Change-Id: Id77d5d3af8aec9cb2c2cb24047c198f739fa4d4d
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/267224
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: cpuidle: Attach MC clock PM on CPU0
Prashant Gaikwad [Tue, 27 Aug 2013 04:27:14 +0000]
ARM: tegra: cpuidle: Attach MC clock PM on CPU0

Attach MC clock PM with CPUIDLE driver of CPU0.When attaching the
PM with cpuidle through the API pm_genpd_attach_cpuidle,it attaches to
the curent cpu's cpuidle driver on which the code is executing.Hence
there is possiblity that it can attach to other CPUs than 0.On Tegra,
CPU0 can't  enter an idle state until all the other CPUs are idle.
Therefore, the code can be scheduled to run on CPU 0.

Bug 1331433
Bug 1355109

Change-Id: I8850fb88f328723e4a286693cfc978ca8c44ca51
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/266370
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agopinctrl: utils: include export.h to avoid warnings
Laxman Dewangan [Wed, 28 Aug 2013 12:02:15 +0000]
pinctrl: utils: include export.h to avoid warnings

Include "linux/export.h" to avoid following warnings during compilation:

/***
pinctrl/pinctrl-utils.c:53:1: warning: data definition has no type or storage class [enabled by default]
pinctrl/pinctrl-utils.c:53:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int]
pinctrl/pinctrl-utils.c:53:1: warning: parameter names (without types) in function declaration [enabled by default]
pinctrl/pinctrl-utils.c:70:1: warning: data definition has no type or storage class [enabled by default]
pinctrl/pinctrl-utils.c:70:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int]
pinctrl/pinctrl-utils.c:70:1: warning: parameter names (without types) in function declaration [enabled by default]
pinctrl/pinctrl-utils.c:98:1: warning: data definition has no type or storage class [enabled by default]
pinctrl/pinctrl-utils.c:98:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int]
pinctrl/pinctrl-utils.c:98:1: warning: parameter names (without types) in function declaration [enabled by default]
pinctrl/pinctrl-utils.c:122:1: warning: data definition has no type or storage class [enabled by default]
pinctrl/pinctrl-utils.c:122:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int]
pinctrl/pinctrl-utils.c:122:1: warning: parameter names (without types) in function declaration [enabled by default]
pinctrl/pinctrl-utils.c:135:1: warning: data definition has no type or storage class [enabled by default]
pinctrl/pinctrl-utils.c:135:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int]
pinctrl/pinctrl-utils.c:135:1: warning: parameter names (without types) in function declaration [enabled by default]
**/

Change-Id: I6062ced44284ca3f692a89d6f3e74952f333ea86
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267335
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: add utility functions for add map/configs
Laxman Dewangan [Tue, 6 Aug 2013 13:12:33 +0000]
pinctrl: add utility functions for add map/configs

Some of pincontrol driver needs the utility function to create map
list. The utility function needed for adding mux, configs etc.

In place of duplicating this in each driver, add the common utility
function in common file and use from device specific driver. This will
reduce the duplicating of code across drivers.

Changes from V1:
- Add this files in this patch and add common utility APIs to here.

Changes from V2:
- Nothing in code.
- Added Reviewed by Stephen.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 1eb207a9ecaafb980704d8bc055a9a0269f62f8e)

Change-Id: I96612c3f46d3466d62fe90f518b75c132e40d771
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267318
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: pinconf-generic: add generic APIs for mapping pinctrl node
Laxman Dewangan [Tue, 6 Aug 2013 13:12:34 +0000]
pinctrl: pinconf-generic: add generic APIs for mapping pinctrl node

Add generic APIs to map the DT node and its sub node in pinconf generic
driver. These APIs can be used from driver to parse the DT node who
uses the pinconf generic APIs for defining their nodes.

Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Rebased the pinctrl binding doc on top of Stephen's cleanup.
- Rename properties "pinctrl-pins" and "pinctrl-function" to
  "pins" and "function".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit e81c8f18afc4fdd6e34d8c83814b8b5134dbb30f)

Change-Id: I8bce66c1e082d8599ecac6c3440a668dfaab4c06
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267334
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: remove bindings for pinconf options needing more thought
Heiko Stübner [Tue, 25 Jun 2013 12:57:10 +0000]
pinctrl: remove bindings for pinconf options needing more thought

Some options currently take arguments in unspecified driver-specific units.
As pointed out by Stephen Warren, driver specific values should not be part
of generic devicetree bindings describing the hardware.

Therefore remove the critical bindings again, before they become part of
an official release.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 5b81d55c4ccf23b9de398f819571dfc8941c7b04)

Change-Id: I4df5788c3c14fe41e4dbf8bcecdabd32c807cc2c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267333
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: set unit for debounce time pinconfig to usec
Heiko Stübner [Tue, 25 Jun 2013 12:56:11 +0000]
pinctrl: set unit for debounce time pinconfig to usec

Currently the debounce time pinconfig option uses an unspecified
"time units" unit. As pinconfig options should use SI units and a
real unit is also necessary for generic dt bindings, change it
to usec. Currently no driver is using the generic pinconfig option
for this, so the unit change is safe to do.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 256aeb648741bf095e884793862d3dfa6b1c1fb5)

Change-Id: I9e5be7753f00881013e7d0dd84246b7bc9e86e4b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267332
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: dynamically alloc temp array when parsing dt pinconf options
Heiko Stübner [Fri, 14 Jun 2013 15:43:55 +0000]
pinctrl: dynamically alloc temp array when parsing dt pinconf options

Allocating the temorary array in pinconf_generic_parse_dt_config on stack
might cause problems later on, when the number of options grows over time.
Therefore also allocate this array dynamically to be on the safe side.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 6abab2d4bec982bcefbe99201ddee5f25227daf4)

Change-Id: I5739f8d37a6ce6c11eefc45dc38d886735e20af0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267331
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: handle zero found dt pinconfig properties better
Heiko Stübner [Fri, 14 Jun 2013 15:43:21 +0000]
pinctrl: handle zero found dt pinconfig properties better

This adds a shortcut when no valid pinconf properties are found
in the parsed dt node, to set the values immediately and return.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit e4a8844c04c00a1a64c6779692e1baff3851c1f7)

Change-Id: Ib7cdc320de37097b642074412c5ff3a717ac7f1c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267330
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: clarify some dt pinconfig options
Heiko Stübner [Fri, 14 Jun 2013 15:42:49 +0000]
pinctrl: clarify some dt pinconfig options

The bias-pull-* options use values > 0 to indicate that the pull should
be activated and optionally also indicate the strength of the pull.
Therefore use an default value of 1 for these options.

Split the low-power-mode option into low-power-enable and -disable.

Update the documentation to describe the param arguments better.

Reported-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 9ee1f7d266aa1e2bfeb20cb5d4ac299c8e8ef8c7)

Change-Id: I4ad03658500b7d54b8b067d79abecf3fc8b0bf70
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267329
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: add function to parse generic pinconfig properties from a dt node
Heiko Stübner [Mon, 10 Jun 2013 19:40:29 +0000]
pinctrl: add function to parse generic pinconfig properties from a dt node

pinconf_generic_parse_dt_config() takes a node as input and generates an
array of generic pinconfig values from the properties of this node.

As I couldn't find a mechanism to count the number of properties of a node
the function uses internally an array to accept one of parameter and copies
the real present options to a smaller variable at its end.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 7db9af4b6e41be599e0fcd50d687138a5add428c)

Change-Id: Ife82b86c851f354ee123cb520ea6c02ef9b025f8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267328
GVS: Gerrit_Virtual_Submit

5 years agopinctrl: add pinconf-generic define for a pin-default pull
Heiko Stübner [Thu, 6 Jun 2013 14:44:25 +0000]
pinctrl: add pinconf-generic define for a pin-default pull

There exist controllers that don't support to set the pull to up or down
separately but instead automatically set the pull direction based on
embedded knowledge inside the controller, for example depending on the
selected mux function of the pin.

Therefore this patch adds another config option to use this default
pull-state for a pin where it is not possible to know or decide if the
pin will be pulled up or down.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 7970cb770dffa23cb20a36f46602e688e075f5d9)

Change-Id: Ibdf32c6fc52f55c31f940ed472a268e3cdc34425
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267327
GVS: Gerrit_Virtual_Submit

5 years agopinconf-generic: add BIAS_BUS_HOLD pinconf
James Hogan [Fri, 24 May 2013 16:21:12 +0000]
pinconf-generic: add BIAS_BUS_HOLD pinconf

Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder
pin mode (also known as bus keeper, or repeater). This is a weak latch
which drives the last value on a tristate bus. Another device on the bus
can drive the bus high or low before going tristate to change the value
driven by the pin.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit a2df4269cad79635201587c5c5404f0b1cb0b05c)

Change-Id: I4b5e1b54008b09cbcd9d911cb3e671d06a25badd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267326
GVS: Gerrit_Virtual_Submit

5 years agopinconf-generic: add drive strength to debugfs output
James Hogan [Fri, 24 May 2013 16:21:11 +0000]
pinconf-generic: add drive strength to debugfs output

Add the drive strength pinconf to debugfs output (with the unit "mA").

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit 73ae368cd309dae277b66444d471ac62825ee407)

Change-Id: Ia90dad63f1fad74b7f76a8dba22d26cae1cd66ba
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267325
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: Move from video/tegra to platform/tegra
Ajay Nandakumar [Tue, 16 Jul 2013 08:02:18 +0000]
video: tegra: Move from video/tegra to platform/tegra

Moving the drivers/media/video/tegra to drivers/media/platform/tegra.
This is done with respect with the upstream version of kernel 3.8.

Bug 1319074

Change-Id: Id30bc8616ed77aa7777394e153330969647112ed
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/267209
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agosecurity: tlk_driver: Use CPU0 for smc calls
James Zhao [Tue, 20 Aug 2013 01:41:47 +0000]
security: tlk_driver: Use CPU0 for smc calls

- All smc calls need to be done through CPU0.
- Add the sched_setaffinity logic to tlk_generic_smc(), will solve
  the occasional prefetch abort.
- Also adding sched_setaffinity logic to tlk_extended_smc().

bug 1322280

Change-Id: I67716bec49aec1f1c9a2e33ec3de90aec2048870
Signed-off-by: James Zhao <jamesz@nvidia.com>
Signed-off-by: Aaron Gamble <jgamble@nvidia.com>
Reviewed-on: http://git-master/r/264177
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Tested-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

5 years agovideo: tegra: nvmap: Set nvmap DMA parameters
Alex Waterman [Wed, 28 Aug 2013 21:37:27 +0000]
video: tegra: nvmap: Set nvmap DMA parameters

This makes sure the DMA mapping API does not split passed buffers
into multiple IO maps.

Change-Id: Icacaedd410faf83e264694ce4293f5f7ef236341
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/267560
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agovideo: tegra: dc: Set dma parameters
Alex Waterman [Wed, 28 Aug 2013 21:29:09 +0000]
video: tegra: dc: Set dma parameters

For usage with the DMA API the DC driver must specify DMA max
segment size parameter.

Change-Id: I59661c81239fee4b51d61b29ae782515a73a13e2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/267559
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agotegra: of: enable HDMI output for t114 boards
Alexandre Courbot [Wed, 28 Aug 2013 07:23:04 +0000]
tegra: of: enable HDMI output for t114 boards

HDMI node is disabled by default. Enable it for boards that have a HDMI
output.

Bug 1332618.

Change-Id: I16fdb062845b2e2248d39413295736414749ca6d
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/267130
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: clock: Combine bus cap/floor callbacks
Alex Frid [Wed, 28 Aug 2013 06:11:23 +0000]
ARM: tegra: clock: Combine bus cap/floor callbacks

Used common callbacks for shared bus cap and floor sysfs show/store
operations, and PM QoS notifier. Only final bus user update operation
is different, since applying floor implies that shared bus should be
enabled, while cap does not require it.

As a result of this refactoring PM QoS optional support implemented
for bus caps become available for bus floors as well.

Change-Id: I6cfa79b8f203f40dd69772199dabb7da73c4ba2a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/267533
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: clock: Expand clock stats
Alex Frid [Wed, 28 Aug 2013 20:18:54 +0000]
ARM: tegra12: clock: Expand clock stats

Added to clock statistic new shared buses: c4bus (VI/ISP) and
gbus (gk20a).

Bug 1349649
Bug 1357006

Change-Id: I1063137df22838ee52dc4797a194ad862146be6d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/267516
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: clock: Don't select dynamic cbus
Alex Frid [Wed, 28 Aug 2013 19:53:27 +0000]
ARM: tegra12: clock: Don't select dynamic cbus

Removed dynamic cbus option from Tegra12 configuration - not needed,
static cbus works fine per characterization.

Change-Id: Iea936b85df88338ac2a4d4c4da4a738372f2961d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/267515
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: fb: Add LPAE support for FB driver
Chao Xu [Fri, 23 Aug 2013 17:30:05 +0000]
video: tegra: fb: Add LPAE support for FB driver

Bug 1341658

Change-Id: I14b54505382cf2aa671c588bda4e48c200f46b8f
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/265623
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: nvmap: remove unused nvmap_pin_array
Krishna Reddy [Wed, 28 Aug 2013 21:18:20 +0000]
video: tegra: nvmap: remove unused nvmap_pin_array

remove unused nvmap_pin_array API.

Change-Id: I33d96c327decfc79a36efd51503ed9bb6956b9b9
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/267545
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: Use correct device pointer
Alex Waterman [Tue, 27 Aug 2013 19:43:28 +0000]
video: tegra: dc: Use correct device pointer

Pass the correct device to dmabuf API which is the dc platform
device. This causes the correct IOMMU DMA operations to be used
thereby generating mappings in the tegra SMMU.

Change-Id: I64904f31b836773ae2bc61e0bf0103b8a91bc40f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/266893
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoarm: config: removed incorrectly applied errata
Matt Craighead [Wed, 28 Aug 2013 18:30:47 +0000]
arm: config: removed incorrectly applied errata

Bug 1349683

Change-Id: I86f97e07157f6aa42cfc22fe0c7cbf53375e6f4c
Signed-off-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-on: http://git-master/r/267460
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>

5 years agoARM: tegra: allow disabling HDMI through DT
Alexandre Courbot [Tue, 12 Mar 2013 06:42:40 +0000]
ARM: tegra: allow disabling HDMI through DT

HDMI output can be disabled by setting the "host1x/hdmi" node's status
to disabled. Also factorizes the common HDMI initialization code to one
place.

Bug 1239870
Bug 1332618

Change-Id: I34f8d3cfdcc205b640b4294e8cfc38449484d6ba
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/208311
Reviewed-on: http://git-master/r/263200
(cherry picked from commit c0b71f030335bf33c0aaa227c139f4ce056950bb)
(cherry picked from commit fcaff7edf54611d085b2f21f9674fd1e58bc4f46)
Reviewed-on: http://git-master/r/263764
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
Tested-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: make VBUS-ENx gpio to open drain type
Laxman Dewangan [Wed, 28 Aug 2013 10:25:01 +0000]
ARM: tegra: make VBUS-ENx gpio to open drain type

The VBUS-ENx are bidirectional gpio and it should not be
driver high in output mode, it should be set high by
enabling Pull up and setting this as gpio-input mode.

Making these pins as open drain type.

Change-Id: Ib6218958211c928c97ea07a344435aee257fb2c3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267241
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: remove pinmux-tegra11x header for T124 platform
Laxman Dewangan [Wed, 28 Aug 2013 10:23:42 +0000]
ARM: tegra: remove pinmux-tegra11x header for T124 platform

T114 support is removed from the T124 platforms and hence removing
their pinmux files also.

Change-Id: I5fdc9c874392be8c9ae0e269b45b8eab020e78d8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/267240
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra12: clk: Always enable common XUSB gate
Krishna Yarlagadda [Tue, 27 Aug 2013 12:36:55 +0000]
ARM: tegra12: clk: Always enable common XUSB gate

Added separate common XUSB gate clock. It has to be always enabled,
so that h/w sequencers that automatically control XUSB operations can
properly work.

Bug 1320271

Change-Id: I6a9d51bf8821b6010ed03a5974f1065b22e1988f
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/266755
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: defconfig: enable USB_VIDEO_CLASS
Naveen Kumar Rai [Tue, 20 Aug 2013 11:39:41 +0000]
ARM: defconfig: enable USB_VIDEO_CLASS

This is on dalmore. Ardbeg already has this enabled.

Bug 1333188

Change-Id: I3885a6e0459f1212b1e3e439ef1df2adab80776d
Signed-off-by: Naveen Kumar Rai <nkumarrai@nvidia.com>
Reviewed-on: http://git-master/r/263868
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM mm: memcg: do not trap chargers with full callstack on OOM
Johannes Weiner [Thu, 8 Aug 2013 02:56:33 +0000]
UPSTREAM mm: memcg: do not trap chargers with full callstack on OOM

The memcg OOM handling is incredibly fragile and can deadlock.  When a
task fails to charge memory, it invokes the OOM killer and loops right
there in the charge code until it succeeds.  Comparably, any other task
that enters the charge path at this point will go to a waitqueue right
then and there and sleep until the OOM situation is resolved.  The problem
is that these tasks may hold filesystem locks and the mmap_sem; locks that
the selected OOM victim may need to exit.

For example, in one reported case, the task invoking the OOM killer was
about to charge a page cache page during a write(), which holds the
i_mutex.  The OOM killer selected a task that was just entering truncate()
and trying to acquire the i_mutex:

OOM invoking task:
[<ffffffff8110a9c1>] mem_cgroup_handle_oom+0x241/0x3b0
[<ffffffff8110b5ab>] T.1146+0x5ab/0x5c0
[<ffffffff8110c22e>] mem_cgroup_cache_charge+0xbe/0xe0
[<ffffffff810ca28c>] add_to_page_cache_locked+0x4c/0x140
[<ffffffff810ca3a2>] add_to_page_cache_lru+0x22/0x50
[<ffffffff810ca45b>] grab_cache_page_write_begin+0x8b/0xe0
[<ffffffff81193a18>] ext3_write_begin+0x88/0x270
[<ffffffff810c8fc6>] generic_file_buffered_write+0x116/0x290
[<ffffffff810cb3cc>] __generic_file_aio_write+0x27c/0x480
[<ffffffff810cb646>] generic_file_aio_write+0x76/0xf0           # takes ->i_mutex
[<ffffffff8111156a>] do_sync_write+0xea/0x130
[<ffffffff81112183>] vfs_write+0xf3/0x1f0
[<ffffffff81112381>] sys_write+0x51/0x90
[<ffffffff815b5926>] system_call_fastpath+0x18/0x1d
[<ffffffffffffffff>] 0xffffffffffffffff

OOM kill victim:
[<ffffffff811109b8>] do_truncate+0x58/0xa0              # takes i_mutex
[<ffffffff81121c90>] do_last+0x250/0xa30
[<ffffffff81122547>] path_openat+0xd7/0x440
[<ffffffff811229c9>] do_filp_open+0x49/0xa0
[<ffffffff8110f7d6>] do_sys_open+0x106/0x240
[<ffffffff8110f950>] sys_open+0x20/0x30
[<ffffffff815b5926>] system_call_fastpath+0x18/0x1d
[<ffffffffffffffff>] 0xffffffffffffffff

The OOM handling task will retry the charge indefinitely while the OOM
killed task is not releasing any resources.

A similar scenario can happen when the kernel OOM killer for a memcg is
disabled and a userspace task is in charge of resolving OOM situations.
In this case, ALL tasks that enter the OOM path will be made to sleep on
the OOM waitqueue and wait for userspace to free resources or increase the
group's limit.  But a userspace OOM handler is prone to deadlock itself on
the locks held by the waiting tasks.  For example one of the sleeping
tasks may be stuck in a brk() call with the mmap_sem held for writing but
the userspace handler, in order to pick an optimal victim, may need to
read files from /proc/<pid>, which tries to acquire the same mmap_sem for
reading and deadlocks.

This patch changes the way tasks behave after detecting a memcg OOM and
makes sure nobody loops or sleeps with locks held:

1. When OOMing in a user fault, invoke the OOM killer and restart the
   fault instead of looping on the charge attempt.  This way, the OOM
   victim can not get stuck on locks the looping task may hold.

2. When OOMing in a user fault but somebody else is handling it
   (either the kernel OOM killer or a userspace handler), don't go to
   sleep in the charge context.  Instead, remember the OOMing memcg in
   the task struct and then fully unwind the page fault stack with
   -ENOMEM.  pagefault_out_of_memory() will then call back into the
   memcg code to check if the -ENOMEM came from the memcg, and then
   either put the task to sleep on the memcg's OOM waitqueue or just
   restart the fault.  The OOM victim can no longer get stuck on any
   lock a sleeping task may hold.

Debugged by Michal Hocko.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reported-by: azurIt <azurit@pobox.sk>
Acked-by: Michal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit fdb134a97c437a513d8587a78ca8f0c2291a3c8a)
Change-Id: Ifb7c4c5688d1c4bb5c0ff71e1672b4ff3fb424f1
Reviewed-on: http://git-master/r/266407
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM mm: memcg: rework and document OOM waiting and wakeup
Johannes Weiner [Thu, 8 Aug 2013 02:56:33 +0000]
UPSTREAM mm: memcg: rework and document OOM waiting and wakeup

The memcg OOM handler open-codes a sleeping lock for OOM serialization
(trylock, wait, repeat) because the required locking is so specific to
memcg hierarchies.  However, it would be nice if this construct would be
clearly recognizable and not be as obfuscated as it is right now.  Clean
up as follows:

1. Remove the return value of mem_cgroup_oom_unlock()

2. Rename mem_cgroup_oom_lock() to mem_cgroup_oom_trylock().

3. Pull the prepare_to_wait() out of the memcg_oom_lock scope.  This
   makes it more obvious that the task has to be on the waitqueue
   before attempting to OOM-trylock the hierarchy, to not miss any
   wakeups before going to sleep.  It just didn't matter until now
   because it was all lumped together into the global memcg_oom_lock
   spinlock section.

4. Pull the mem_cgroup_oom_notify() out of the memcg_oom_lock scope.
   It is proctected by the hierarchical OOM-lock.

5. The memcg_oom_lock spinlock is only required to propagate the OOM
   lock in any given hierarchy atomically.  Restrict its scope to
   mem_cgroup_oom_(trylock|unlock).

6. Do not wake up the waitqueue unconditionally at the end of the
   function.  Only the lockholder has to wake up the next in line
   after releasing the lock.

   Note that the lockholder kicks off the OOM-killer, which in turn
   leads to wakeups from the uncharges of the exiting task.  But a
   contender is not guaranteed to see them if it enters the OOM path
   after the OOM kills but before the lockholder releases the lock.
   Thus there has to be an explicit wakeup after releasing the lock.

7. Put the OOM task on the waitqueue before marking the hierarchy as
   under OOM as that is the point where we start to receive wakeups.
   No point in listening before being on the waitqueue.

8. Likewise, unmark the hierarchy before finishing the sleep, for
   symmetry.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Michal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit f75dd54204e9078dabad2b53ab4fa638c9cfd4cc)
Change-Id: Ic1d2bb06cb31cbe8c9062a93f33220115e3a1d0e
Reviewed-on: http://git-master/r/266406
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM mm: memcg: enable memcg OOM killer only for user faults
Johannes Weiner [Thu, 8 Aug 2013 02:56:32 +0000]
UPSTREAM mm: memcg: enable memcg OOM killer only for user faults

System calls and kernel faults (uaccess, gup) can handle an out of memory
situation gracefully and just return -ENOMEM.

Enable the memcg OOM killer only for user faults, where it's really the
only option available.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Michal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit 31d1d8b2aa8733b4fe221b4bcbaa15aec3582b99)
Change-Id: If84752f6c46e464bc0d1d868ac543497425ba7cc
Reviewed-on: http://git-master/r/266405
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM arch: mm: pass userspace fault flag to generic fault handler
Prashant Gaikwad [Mon, 12 Aug 2013 10:39:13 +0000]
UPSTREAM arch: mm: pass userspace fault flag to generic fault handler

Unlike global OOM handling, memory cgroup code will invoke the OOM killer
in any OOM situation because it has no way of telling faults occuring in
kernel context - which could be handled more gracefully - from
user-triggered faults.

Pass a flag that identifies faults originating in user space from the
architecture-specific fault handlers to generic code so that memcg OOM
handling can be improved.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit 407c454cb0ac6e68ca66974da787a71118cfef84)

Conflicts:

arch/arc/mm/fault.c
arch/arm64/mm/fault.c
arch/metag/mm/fault.c
arch/parisc/mm/fault.c

Change-Id: Iee53942737627be8dd8e2e325b5ba87fe85d6814
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/266410
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM arch: mm: remove obsolete init OOM protection
Prashant Gaikwad [Mon, 12 Aug 2013 10:33:22 +0000]
UPSTREAM arch: mm: remove obsolete init OOM protection

The memcg code can trap tasks in the context of the failing allocation
until an OOM situation is resolved.  They can hold all kinds of locks (fs,
mm) at this point, which makes it prone to deadlocking.

This series converts memcg OOM handling into a two step process that is
started in the charge context, but any waiting is done after the fault
stack is fully unwound.

Patches 1-4 prepare architecture handlers to support the new memcg
requirements, but in doing so they also remove old cruft and unify
out-of-memory behavior across architectures.

Patch 5 disables the memcg OOM handling for syscalls, readahead, kernel
faults, because they can gracefully unwind the stack with -ENOMEM.  OOM
handling is restricted to user triggered faults that have no other option.

Patch 6 reworks memcg's hierarchical OOM locking to make it a little more
obvious wth is going on in there: reduce locked regions, rename locking
functions, reorder and document.

Patch 7 implements the two-part OOM handling such that tasks are never
trapped with the full charge stack in an OOM situation.

This patch:

Back before smart OOM killing, when faulting tasks were killed directly on
allocation failures, the arch-specific fault handlers needed special
protection for the init process.

Now that all fault handlers call into the generic OOM killer (609838c "mm:
invoke oom-killer from remaining unconverted page fault handlers"), which
already provides init protection, the arch-specific leftovers can be
removed.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(cherry picked from commit c5659bca566f8b4798a34c0bf19b7afd0bfa706e)

Conflicts:

arch/arc/mm/fault.c

Change-Id: I8807370a955f5a730832db8a86eb8dade81be251
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/266409
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM mm: invoke oom-killer from remaining unconverted page fault handlers
Prashant Gaikwad [Mon, 12 Aug 2013 10:32:28 +0000]
UPSTREAM mm: invoke oom-killer from remaining unconverted page fault handlers

A few remaining architectures directly kill the page faulting task in an
out of memory situation.  This is usually not a good idea since that
task might not even use a significant amount of memory and so may not be
the optimal victim to resolve the situation.

Since 2.6.29's 1c0fe6e ("mm: invoke oom-killer from page fault") there
is a hook that architecture page fault handlers are supposed to call to
invoke the OOM killer and let it pick the right task to kill.  Convert
the remaining architectures over to this hook.

To have the previous behavior of simply taking out the faulting task the
vm.oom_kill_allocating_task sysctl can be set to 1.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Acked-by: David Rientjes <rientjes@google.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com> [arch/arc bits]
Cc: James Hogan <james.hogan@imgtec.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Lennox Wu <lennox.wu@gmail.com>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
(cherry picked from commit 609838cfed972d49a65aac7923a9ff5cbe482e30)

Conflicts:

arch/arc/mm/fault.c
arch/metag/mm/fault.c

Change-Id: I3a9435be0bd4b8ea43cefd87ca8d408201ae3bf1
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/266408
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoUPSTREAM arch: mm: do not invoke OOM killer on kernel fault OOM
Johannes Weiner [Thu, 8 Aug 2013 02:56:30 +0000]
UPSTREAM arch: mm: do not invoke OOM killer on kernel fault OOM

Kernel faults are expected to handle OOM conditions gracefully (gup,
uaccess etc.), so they should never invoke the OOM killer.  Reserve this
for faults triggered in user context when it is the only option.

Most architectures already do this, fix up the remaining few.

Signed-off-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: David Rientjes <rientjes@google.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: azurIt <azurit@pobox.sk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Change-Id: Id58a8ebe3ee619ef9ae3590b5788823fa6bd2dce
Reviewed-on: http://git-master/r/266404
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agommc: tegra: Set pu,pd offsets for T148 SDMMC
Naveen Kumar Arepalli [Wed, 28 Aug 2013 05:57:28 +0000]
mmc: tegra: Set pu,pd offsets for T148 SDMMC

-Set pu,pd offsets for T148 SDMMC.
-Program pu,pd offset values to 2.

Bug 1333552

Change-Id: I61f17949e8c4da5e7b6044027769a9a437339e52
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/267086
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agodma: tegra: Use runtime_pm for enabling/disabling clock
Chaitanya Bandi [Tue, 27 Aug 2013 14:48:12 +0000]
dma: tegra: Use runtime_pm for enabling/disabling clock

Used runtime pm APIs for clock enabling/disabling and
also made changes such that clock is not enabled during
idle.

Bug 1326667

Change-Id: I7cf478006e11b3a63271c8c7b0a8f0e9406cbbca
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/265931
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoi2c: tegra: Add debug prints for i2c timed out case
Chaitanya Bandi [Mon, 26 Aug 2013 11:22:28 +0000]
i2c: tegra: Add debug prints for i2c timed out case

Added debug prints for i2c timed out case to
help debug.

Change-Id: I9b8b66acdc80b9bbddbf9d824d7fbd71fa602460
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/266034
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: pm: Add tegra-apbdma to MC clock power domain
Chaitanya Bandi [Tue, 27 Aug 2013 06:18:36 +0000]
ARM: tegra: pm: Add tegra-apbdma to MC clock power domain

Added tegra-apbdma device to MC clock power domain.

Bug 1326667

Change-Id: Iae1433280f79c3b50cb9e7e08fd324fdbf9a302e
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/266459
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agovideo: tegra: host: Force runlist update
Terje Bergstrom [Mon, 26 Aug 2013 07:29:45 +0000]
video: tegra: host: Force runlist update

If runlist update hangs, recover the hung channel.

Bug 1342089

Change-Id: Id5d4db9ddd8c58e915b4af84f0f6ed8f77e7f414
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/265972

5 years agovideo: tegra: host: Handle context switch timeout
Terje Bergstrom [Fri, 23 Aug 2013 06:15:38 +0000]
video: tegra: host: Handle context switch timeout

Implement handling of CTXSW_TIMEOUT. We force the hung channel out via
a fake MMU fault, handle the fake MMU fault and disable the channel.
The channel is freed when the process owning it quits.

Bug 1342089

Change-Id: If2195e6a35a22f45f66317e0beac5118916cc845
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/265375

5 years agovideo: tegra: host: Remove compilation warning
Terje Bergstrom [Sun, 25 Aug 2013 12:32:22 +0000]
video: tegra: host: Remove compilation warning

A variable was left unused. Remove the variable.

Change-Id: I4b114c9fcaee5ae154718cf7c9e8e162d88c3979
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/265942
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Use usleep_range when possible
Terje Bergstrom [Sun, 25 Aug 2013 12:06:56 +0000]
video: tegra: host: Use usleep_range when possible

Replace all udelay()'s with wait time longer than 10ms with
usleep_range(). Give a range of double the delay to reduce impact
on amount of interrupts.

Clock code is the only exception for now.

Bug 1342089

Change-Id: I80fc014016ca7d3ea2ead6b619ec718b12c03b1e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/265941
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Use usleep_range on long waits
Terje Bergstrom [Sat, 24 Aug 2013 13:49:44 +0000]
video: tegra: host: Use usleep_range on long waits

Use usleep_range() for all long delays. It allows kernel to run other
threads while waiting, and coalesces the wakeup interrupts.

Bug 1342089

Change-Id: I9f645530285ac3938671803dfa1a3b341145a0b4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/265940
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Use wall clock time in ms
Terje Bergstrom [Sat, 24 Aug 2013 12:47:03 +0000]
video: tegra: host: Use wall clock time in ms

When waiting for an event with a timeout, use wall time for checking
if timeout has been exceeded. Also changes timeouts to be managed as
milliseconds in unsigned long to unify with the rest of driver.

Changes infinite timeouts to sane maximums.

Bug 1342089

Change-Id: I7659f7fa85441d1e32b8c207023338d34042c796
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/265939
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: nvmap: add api's that take dmabuf
Krishna Reddy [Tue, 27 Aug 2013 21:15:03 +0000]
video: tegra: nvmap: add api's that take dmabuf

add api's that take dmabuf instead of nvmap_handle_ref.
these are necessary for nvhost to start using dmabuf.
Bug 1356091

Change-Id: I61c74641f2c013e4aa9812aabf2a6f558fdf1fcf
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/266897
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoiommu/tegra: smmu: T124 : enable support for sata
Bibek Basu [Mon, 26 Aug 2013 05:47:54 +0000]
iommu/tegra: smmu: T124 : enable support for sata

Enable SMMU support for sata in T124

Bug 1350808

Change-Id: Ia3061acc162b98c3225241bead997974ab01e2aa
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/265930
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agovideo: tegra: host: Check kzalloc return value
Tuomas Tynkkynen [Thu, 22 Aug 2013 23:50:09 +0000]
video: tegra: host: Check kzalloc return value

Check return value from kzalloc or we'll crash due to a NULL pointer.

Bug 1352454

Change-Id: I5e81ea87ca3a216e48acd601e370dcab961e82cd
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/265163
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agovideo: tegra: nvmap: add api to get param based on dmabuf
Krishna Reddy [Tue, 27 Aug 2013 06:13:16 +0000]
video: tegra: nvmap: add api to get param based on dmabuf

this api is necessary for nvhost to start using dmabuf till
the dependency on params like heap, kind, size and aligment
are fixed in nvhost/gk20a.
Bug 1356091

Change-Id: I77900df42cdcc067c5d9b4f7815a4da7e03b5366
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/266454
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

5 years agovideo: tegra: host: Use ERR_PTR, not NULL
Tuomas Tynkkynen [Thu, 15 Aug 2013 01:34:32 +0000]
video: tegra: host: Use ERR_PTR, not NULL

nvhost_memmgr_get should return an ERR_PTR value instead of NULL if
someone gives us a bad handle, since its callers are not expecting NULLs
which leads to a kernel panic.

Bug 1352454

Change-Id: Ie533c1cd319436dcb481119b0a252d17a063ff54
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/264008
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: clock: Add PM QoS option for core bus cap
Alex Frid [Tue, 23 Jul 2013 02:05:32 +0000]
ARM: tegra: clock: Add PM QoS option for core bus cap

Added an option to specify core bus cap level via PM QoS interface in
addition to the existing sysfs nodes. The most aggressive (minimum)
constraint is applied.

This commit does not add any PM QoS cap limits.

Change-Id: Ie9d30a679127bc6db09afbd0f80dea8df00d0b58
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/266844
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: gk20a: enable ELCG
Kevin Huang [Sat, 10 Aug 2013 00:16:52 +0000]
video: tegra: gk20a: enable ELCG

Bug 1327269

Change-Id: I31ecb79fa388561670d58e74a6f30eeb8af2860b
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/265715
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agovideo: tegra: gk20a: modify perfmon algorithm
Prashant Malani [Tue, 27 Aug 2013 00:06:07 +0000]
video: tegra: gk20a: modify perfmon algorithm

Modify perfmon algorithm to allow first event to
be either increase or decrease event. Since the
init parameter is no longer necessary, we remove
it.

Also modify the event handler to decrease gk20a
frequency by 70% on a decrease event.

Change-Id: I67647d2b689a107dc0a84cf2abf04f83404f485b
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/266285
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoRevert "video: tegra: gk20a: update power_on correctly"
Alex Frid [Sun, 25 Aug 2013 01:05:18 +0000]
Revert "video: tegra: gk20a: update power_on correctly"

This reverts commit 4d312be7ca8a3512999422bb95e434c9cdefde04.

The logic of the original commit is sound, but in this case applied
incorrectly: the nvhost_gk20a_finalize_poweron() is called after gk20a
power is on and h/w is accessible, so the power_on flag can be set at
the beginning.  Complementary the flag can be cleared at the end of
nvhost_gk20a_prepare_poweroff() function.

Change-Id: I29174757582cd8f3d94f07bdddfd0ce9fb852584
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/265877
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: gk20a: Export clock operations
Alex Frid [Fri, 23 Aug 2013 05:29:19 +0000]
video: tegra: gk20a: Export clock operations

Re-factored GPCPLL clock control:
- added s/w shadow for GPCPLL enabled/disabled state
- implemented GPCPLL enable/disable operations
- made sure set rate operation does not enable disabled pll

Connected gk20a tegra_clk handle to gpu shared user clock (instead of
GPCPLL reference clock). Re-factored all clock operations accordingly.
Removed any direct calls into dvfs layer, since gpu voltage will be
automatically scaled bu gpu shared bus in response to user requests.
Registered gk20a clock operations with tegra clock framework.

Bug 1320966

Change-Id: I6827ba99b0d0660114f729efd8e243f11c2a4414
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/265876
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra12: clock: Add gpu shared bus
Alex Frid [Sat, 24 Aug 2013 04:44:23 +0000]
ARM: tegra12: clock: Add gpu shared bus

Added Tegra12 gpu shared bus (gbus) on top of clock operations exported
by gk20a driver. Populated bus with gk20a shared user, cap and override
user clocks. Updated gbus dvfs tables.

Bug 1320966

Change-Id: Iafadc4e00fa6348f1f139d69f467c4071c48b145
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/265875
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agovideo: tegra: deal with invalid window number
Xue Dong [Mon, 26 Aug 2013 20:23:23 +0000]
video: tegra: deal with invalid window number

bug 1322596

Change-Id: I6baee32a769a67863707a4603cc723b0330427ec
Signed-off-by: Xue Dong <xdong@nvidia.com>
Reviewed-on: http://git-master/r/266191
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: clock: Support clock operations export
Alex Frid [Sat, 24 Aug 2013 03:21:44 +0000]
ARM: tegra: clock: Support clock operations export

Added mechanism for clock producers outside of tegra clock-and-reset
module to register clock operations with tegra clock framework.

Bug 1320966

Change-Id: I5dd49dabd1624e042309f550d68cdf3de8ba2afe
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/265874
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoinput: cfboost: Fix pm_qos_add_request
Xiaohui Tao [Mon, 26 Aug 2013 17:47:06 +0000]
input: cfboost: Fix pm_qos_add_request

cf_core is used to set how many cpu cores to be brought
online. The pm_qos_class is set to be the wrong value.
Change it from PM_QOS_CPU_FREQ_MIN to PM_QOS_MIN_ONLINE_CPUS.

Change-Id: I0905ef1afbc2bc3724367e6d6e69da3dcc566632
Signed-off-by: Xiaohui Tao <xtao@nvidia.com>
(cherry picked from commit 78e77f377560188d57a894146c57425cc809bb60)
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
Reviewed-on: http://git-master/r/266160
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

5 years agoarm: tegra: ardbeg: Enable panel bl regulator
Vineel Kumar Reddy Kovvuri [Wed, 21 Aug 2013 05:42:09 +0000]
arm: tegra: ardbeg: Enable panel bl regulator

Enabled dvdd_lcd regulator responsible for backlight
intensity.

Bug 1322150

Change-Id: Iebd815691246ae33a6bc5d4dc6546366c77912bf
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/264195
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

5 years agovideo: tegra: dc: Fix crash on missing regulators
Vineel Kumar Reddy Kovvuri [Wed, 21 Aug 2013 06:33:57 +0000]
video: tegra: dc: Fix crash on missing regulators

Fix kernel crash if avdd_dsi_csi regulator is
missing

Bug 1311949

Change-Id: Ic63b30a5d1a51288a6eae876a278ee41fedd8fbd
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/264218
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>

5 years agotegra: dc: hdmi: allow LP0 wakeup by hotplug GPIO
Alexandre Courbot [Tue, 27 Aug 2013 04:22:16 +0000]
tegra: dc: hdmi: allow LP0 wakeup by hotplug GPIO

Introduce a new TEGRA_DC_OUT_HOTPLUG_WAKE_LP0 flag which can be
specified for DC controllers for which we want the HDMI hotplug
GPIO to serve as a LP0 wake source.

Bug 1345127

Change-Id: I9193be6ada4b0eca1c074c4b9a5888e3b0e49150
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/266365
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aaron Gamble <jgamble@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agovideo: tegra: dc: Update DC LPAE support
Chao Xu [Wed, 21 Aug 2013 00:38:21 +0000]
video: tegra: dc: Update DC LPAE support

bug 1341658

Change-Id: I9cb506f5ffb4be36804c1c294025898dcf9b9a7e
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/265622
GVS: Gerrit_Virtual_Submit

5 years agohwmon: ina230: fix negative current reading
Xin Xie [Tue, 4 Jun 2013 01:27:55 +0000]
hwmon: ina230: fix negative current reading

bug 1298931

Change-Id: If0037afb285b88dde11fe5f40def8f8fe9727c56
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/235215
(cherry picked from commit 339d494c5790e7a96d00e94e7e6c68716644c18a)
Reviewed-on: http://git-master/r/266525
Reviewed-by: Timo Alho <talho@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: config: remove CONFIG_TEST_POWER
Timo Alho [Tue, 27 Aug 2013 09:58:46 +0000]
ARM: tegra: config: remove CONFIG_TEST_POWER

Removing CONFIG_TEST_POWER=y as it is a debug feature that may
potentially cause problems in production systems.

Change-Id: I3bec94c8f9c13fc183945716b317c5b3f5234573
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/266689
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agortc: palmas: clean-up rtc driver
Laxman Dewangan [Tue, 27 Aug 2013 09:53:47 +0000]
rtc: palmas: clean-up rtc driver

Clean-up and align the Palmas RTC driver to mainline.
Following are the changes:
- Remove intermediate read/write API and directly use the palmas_*
  APIs.
- Simplify the read-time/set-time/read-alarm and set-alarm
  implementation.
- Avoid duplication of code by using function.

Change-Id: I70a3c65312a21da170a5a0558a3cefd7d8f796bd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266677

5 years agortc: palmas: rename platform data to more appropriate
Laxman Dewangan [Mon, 26 Aug 2013 12:26:26 +0000]
rtc: palmas: rename platform data to more appropriate

Renames platform data for Palmas RTC to more appropriate:
- enable_charging->backup_battery_chargeable
- charging_current_ua -> backup_battery_charger_high_current

Change-Id: Id8b48c4e337dbeda2b0545ce9ed5e3f5230edd83
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266102

5 years agoARM: tegra: reset system through PMIC
Laxman Dewangan [Tue, 27 Aug 2013 07:36:38 +0000]
ARM: tegra: reset system through PMIC

If there is need of system reboot without any command then
use then reset system through PMIC rather than PMC reset.

Enable this for Ardbeg with TI PMIC.

bug 1234703

Change-Id: I3628f7460f1ddd3ebd8e7d35217fb0fcc41fe5b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266506
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: enable bit-banging i2c transfer after shutdown on ardbeg pwr-i2c
Laxman Dewangan [Tue, 27 Aug 2013 07:35:28 +0000]
ARM: tegra: enable bit-banging i2c transfer after shutdown on ardbeg pwr-i2c

To provide the system reset through PMIC, enable the gpio based i2c
transfer after shutdown.

bug 1234703

Change-Id: I27d6c7fad05f293f07ecba0f8c452d8b194db709
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266505
GVS: Gerrit_Virtual_Submit

5 years agopower: reset: palmas: implement errata for palams reset
Laxman Dewangan [Tue, 27 Aug 2013 07:17:53 +0000]
power: reset: palmas: implement errata for palams reset

Palmas device version ES2.1, ES2.0 and ES1.0 have the hw issue
when doing reset and as a SW-WAR, it need to reset the PMIC as
power-off and then power on through RTC alarm.

Implement the same for the above ES version.

Bug 1234703

Change-Id: I97e27162a572676c1fe2139cd574753a73f9ed3a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266504
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: reset system through PMIC
Laxman Dewangan [Mon, 26 Aug 2013 14:06:47 +0000]
ARM: tegra: reset system through PMIC

If there is need of system reboot without any command then
use then reset system through PMIC rather than PMC reset.

Change-Id: I18e44137e08fe73819cd60f2f256d0f3a1924c01
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266131
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: enable bit-banging i2c transfer after shutdown on TN8 pwr-i2c
Laxman Dewangan [Mon, 26 Aug 2013 10:11:31 +0000]
ARM: tegra: enable bit-banging i2c transfer after shutdown on TN8 pwr-i2c

To provide the system reset through PMIC, enable the gpio based i2c
transfer after shutdown.

Change-Id: I8ef5dff371e4df2de7b3a7f50afb3907c4e16d15
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266130
GVS: Gerrit_Virtual_Submit

5 years agopower: reset: palmas: implement power reset API
Laxman Dewangan [Mon, 26 Aug 2013 10:10:14 +0000]
power: reset: palmas: implement power reset API

Implement power reset to provide the system reset through
PMIC. This functionality can be enable through platform data.

Change-Id: Ia6fb70306c8afa7674f9f3fb79e20527bc7ea2b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/266128
GVS: Gerrit_Virtual_Submit

5 years agovideo: tegra: host: Block timed out gk20a channel
Terje Bergstrom [Thu, 22 Aug 2013 07:59:54 +0000]
video: tegra: host: Block timed out gk20a channel

Return error when trying to submit to a channel that has been
blacklisted.

Bug 1342089

Change-Id: Ic0e259c6573f4b7c617bbebd19a81cb7f6987f1a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/264850
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Use sleep when preempting
Terje Bergstrom [Thu, 22 Aug 2013 07:57:04 +0000]
video: tegra: host: Use sleep when preempting

Waiting for preemption can take several seconds if there is a long
submit in channel. A busy loop can peg the CPU for many seconds. Use
usleep_range() to yield CPU time to other tasks.

Bug 1342089

Change-Id: I85a053a95f102c5d3a0cf6e8d60295615e14e491
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/264849
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agovideo: tegra: host: Add debug support for gk20a ch
Terje Bergstrom [Thu, 22 Aug 2013 07:41:06 +0000]
video: tegra: host: Add debug support for gk20a ch

Add support for dumping the state of gk20a channels. At the moment
dumping the status of active channel is broken, but dormant channels
should be ok.

Bug 1342089

Change-Id: I32174f0fac46cc0793803e8cc84803164791cd55
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/264848
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: Increase PMU max voltage for vdd_cpu to 1350
Chaitanya Bandi [Tue, 2 Jul 2013 08:21:35 +0000]
ARM: tegra: Increase PMU max voltage for vdd_cpu to 1350

Bug 1310622

Change-Id: I2d47023f46a0d6fb56731274b6312d89b51f1635
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/244224
(cherry picked from commit 80d052a8ba69489a95b50bbc8584470387602b3f)
(cherry picked from commit e494dcf525192161ee08d93f396a6488ace2cc95)
Reviewed-on: http://git-master/r/266044
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: config: tegra12: vcm30_t124: Update defconfig
Ashwin Joshi [Mon, 26 Aug 2013 12:11:26 +0000]
arm: config: tegra12: vcm30_t124: Update defconfig

Update defconfig of board vcm30_t124, enable following options:

CONFIG_TEGRA_MC_DOMAINS
CONFIG_PLATFORM_ENABLE_IOMMU
CONFIG_TEGRA_IOMMU_SMMU

Bug 1319925

Change-Id: Ib4fb4a49f0313adf6beb1ddc04199d257bd519b6
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/266108
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: dts for vcm30_t124.
Ashwin Joshi [Mon, 26 Aug 2013 12:10:00 +0000]
arm: tegra: dts for vcm30_t124.

Add dts file for vcm30_t124 board.

Bug 1319925

Change-Id: Ic1e53ec38f03b38163da28aaae22ab56f256ab2d
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/262292
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoarm: tegra: vcm3.0: t124: Add initial board files.
Ashwin Joshi [Tue, 6 Aug 2013 12:06:18 +0000]
arm: tegra: vcm3.0: t124: Add initial board files.

Add initial board files for automotive board. The board will be named as
vcm30_t124 and will support all automotive boards.

Bug 1319925

Change-Id: Ib23aa3ef1d57a8d2e4f18f2d1de26c12de5b28f0
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/262290
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agopower: max17048: Add thermal zone name for max17048
Chaitanya Bandi [Mon, 22 Jul 2013 05:36:35 +0000]
power: max17048: Add thermal zone name for max17048

Bug 1325837

Change-Id: I58095ca0daab92aee762f86b6e90792c6b72ff7a
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
(cherry picked from commit 4a1ec0614da4374e8232921a58b6df53e501f831)
Reviewed-on: http://git-master/r/266041
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoi2c: tegra: Use appropriate clk divisor and debounce for HS mode
Chaitanya Bandi [Mon, 8 Jul 2013 06:45:46 +0000]
i2c: tegra: Use appropriate clk divisor and debounce for HS mode

Bug 1318578

Change-Id: I5d53b71e977f0a8ab8282820dbcdbfe6188d588a
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
(cherry picked from commit a307421c4e0a400ed1905648ee5b695f17bbf403)
Reviewed-on: http://git-master/r/266040
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoi2c: tegra: Add appropriate clk divisor for FM Plus mode
Chaitanya Bandi [Fri, 5 Jul 2013 10:45:28 +0000]
i2c: tegra: Add appropriate clk divisor for FM Plus mode

Added appropriate clock divisor for FM Plus mode.

Bug 1318578

Change-Id: I5f5d0fdbcb3df54f6ca74b752c81b00ab8841f05
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
(cherry picked from commit 01faecda1d6ab479ada1f12ada3da4fbbe1fb7e1)
Reviewed-on: http://git-master/r/266039
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

5 years agoARM: tegra: pinmux: Fix GME drive pinmux in T14x
Chaitanya Bandi [Wed, 3 Jul 2013 10:10:02 +0000]
ARM: tegra: pinmux: Fix GME drive pinmux in T14x

The GME drive pinmux was set to wrong register configuration.
Corrected it as per register spec.

Change-Id: I61b21719ff3140c4972407b45114a55d23bb584b
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
(cherry picked from commit af3412c61662d8c2ad4bdee8578f02ed95e1124f)
Reviewed-on: http://git-master/r/266038
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>