5 years agoedp: edp nodes moved to $DEBUGFS/edp/vdd_cpu/
Mitch Luban [Tue, 11 Sep 2012 01:30:19 +0000]
edp: edp nodes moved to $DEBUGFS/edp/vdd_cpu/

Moved edp nodes to $DEBUGFS/edp/vdd_cpu/ so
that EDP manager and VDD_CPU_EDP capping have
equal footing in debugfs namespace.

Requires the following changes:
http://git-master/r/131482
http://git-master/r/131272
http://git-master/r/131273

Bug 1046809

Change-Id: I61184bf8bd54a2a701fd4182b421b0da229883b7
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/131271
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>

Rebase-Id: R53b209ad7c921751165797462049f5f8a5641094

5 years agoARM: tegra: pm: Use rcuidle tracing for cluster switch
Antti P Miettinen [Wed, 12 Sep 2012 16:16:25 +0000]
ARM: tegra: pm: Use rcuidle tracing for cluster switch

Change traces in idle to use rcuidle variants.

Change-Id: I3684c5ddd246202ae204f583f4755b542def4c5c
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/131882
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R43a0ed55a084037f42d43e96f1f0e2f0e1dce8eb

5 years agoARM: Tegra: Define DT bindings for T30 DVFS
Prashant Gaikwad [Wed, 1 Aug 2012 12:45:34 +0000]
ARM: Tegra: Define DT bindings for T30 DVFS

Define device tree bindings for Tegra30 CPU and
Core DVFS tables.

Bug 906383

Change-Id: Ib04bc59fe314c82321f9cf414dd50b6ba9c3b822
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/130670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R3e5b51a8bfffa5baab319745fccd533b37abed5c

5 years agodrivers: devfreq: Fix devfreq stub functions
Arto Merilainen [Fri, 14 Sep 2012 06:36:13 +0000]
drivers: devfreq: Fix devfreq stub functions

This patch allows the kernel to build even if devfreq.h is included
when devfreq support is not available.

Change-Id: I01f1bdd9dda755f86255e5609c2a5411cfb64480
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/132557
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

Rebase-Id: R346b3b9ea9d3dd27487fe893795b7684dcd8be27

5 years agoARM: tegra: dalmore: Add cpu dfll platform data
Alex Frid [Thu, 13 Sep 2012 00:34:07 +0000]
ARM: tegra: dalmore: Add cpu dfll platform data

Change-Id: Ie61c0a87c1c5d71ead81fd9768de5ecff2a32c8e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/131982
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R173d4759367c462db73432a4dc6739dd6caf6d13

5 years agoarm: tegra: la: Add latency allowance support for T11x.
Krishna Reddy [Fri, 7 Sep 2012 07:01:42 +0000]
arm: tegra: la: Add latency allowance support for T11x.

Change-Id: If204129a17041601beba04192eb58bb10c11e1c5
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/130571
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>

Rebase-Id: R6e3607d1e9e0a6a138129463a3659ad3547cee21

5 years agousb: gadget: tegra: check vbus before run bit set
Rohith Seelaboyina [Wed, 12 Sep 2012 08:52:15 +0000]
usb: gadget: tegra: check vbus before run bit set

Adding the check for vbus before setting the
run bit.

Bug 1046443

Reviewed-on: http://git-master/r/131733
(cherry picked from commit e2dcc0fff0bde89eced1482f3df763bfc7afd3a2)

Change-Id: Ie88ad2ab60b0e8c7691d5b66e52f9ee6c19d34fa
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/132210
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R6414284b141a301c4d20df288f247a367ee9eaef

5 years agoARM: tegra: cpuquiet: add min/max_cpus debugfs nodes back
Peter Boonstoppel [Wed, 12 Sep 2012 00:03:06 +0000]
ARM: tegra: cpuquiet: add min/max_cpus debugfs nodes back

Bug 1047573

Change-Id: I7209ca87075b3d8a1d53141c48fe8fbdd86c4728
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/131606
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Ilan Aelion <iaelion@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R81f2ceacae7865e1941c3eb7fb3950a9a0195f5c

5 years agoarm: tegra: configs: removal of auto_hotplug
Ramalingam C [Tue, 11 Sep 2012 14:38:12 +0000]
arm: tegra: configs: removal of auto_hotplug

Recreating the tegra11_defconfig with the removal of AUTO_HOTPLUG

Bug 1046885

Change-Id: I676de8a2c50819c50bf9e08c3b409045d4468a1d
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/131443
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rbc13df1f327d6fe42ff651f51fc2b7bc07f8128c

5 years agochromeos: config: enable PM_DEVFREQ
Rhyland Klein [Thu, 13 Sep 2012 14:52:06 +0000]
chromeos: config: enable PM_DEVFREQ

Recent kernel changes have made it required to enable PM_DEVFREQ which
is used for scaling in nvhost. This is required to be enabled otherwise
the kernel build fails with warnings about unused functions. This only
occurs if PM_DEVFREQ isn't enabled AND T114 support (which uses devfreq)
is also not enabled.

Also, renormalized configs to tot 3.4 today which pulled in a couple
more options.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I9986836c43d3bbda5ba7597c4fba64ff38f06f1c
Reviewed-on: http://git-master/r/132287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R7254099f0d05d7fe5cb9d2fee13cc65c17858daf

5 years agoARM: curacao: Add include to fix build error
Terje Bergstrom [Mon, 10 Sep 2012 10:12:32 +0000]
ARM: curacao: Add include to fix build error

board.h requires power_supply.h, which uses a constant from
linux/errno.h. Unfortunately that file is not included anywhere.

Change-Id: I7012698df38b13cf18bf2b98d37713ad5c52f59b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132163
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R7eca456ea6b605699380ca871863402dbff43bf7

5 years agoALSA: hda: check validity of speaker allocation field
Nikesh Oswal [Thu, 13 Sep 2012 08:58:02 +0000]
ALSA: hda: check validity of speaker allocation field

Kernel 3.1 hda driver read the eld data once and if
the speaker allocation field was 0 (not set yet by
hdmi driver) then it considers it as 0xFFFF which
allows multichannel and doesn't block it. In Kernel
3.4 hda driver there is a repolling mechanism added
for ELD data, if the ELD data sanity check fails
then HDA driver re-schedules the work unit to poll
ELD data again hence the check on speaker allocation
field was removed. But the NVIDIA hda/hdmi controller
for some reason fails to update the speaker allocation
field and the read data is not valid even after
repeated attempts, hence the ASP channel mapping
happens for default 2 channel case. Adding the check
for speaker allocation field again solves the issue
and multichannel content plays fine over hda/hdmi.

Bug 1045435
Bug 1043021

Change-Id: I79fe33c0e354142f5af16c3ebbb3611a733dd88d
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/132128
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>

Rebase-Id: Racb3856e878119e64f393a578e9c6cae0e3ab4f4

5 years agopm: EDP: fixing simulator build break
Sivaram Nair [Thu, 13 Sep 2012 08:28:57 +0000]
pm: EDP: fixing simulator build break

This patch fixes a build break in configs where CONFIG_PM is disabled.

Change-Id: I8f51b9808ffb9b546c4772d50ac95bcbc37ee7ab
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/132118
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R92014fdc919695d83510fb5dc243be7c33df080b

5 years agoARM: tegra11: clock: Account for memory access efficiency.
Alex Frid [Thu, 13 Sep 2012 03:32:31 +0000]
ARM: tegra11: clock: Account for memory access efficiency.

Change-Id: I6e2f45f35e8bd51f54bef12743a12d265dfde8e0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/132027
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R65da0da79a5851be8b040bd377c350dda341f123

5 years agoARM: tegra11: clock: Update EMC actmon count weight
Alex Frid [Thu, 13 Sep 2012 02:22:45 +0000]
ARM: tegra11: clock: Update EMC actmon count weight

On tegra11 there is only one EMC clock per memory transaction.
Set EMC actmon count weight accordingly.

Change-Id: Iac7a078cdf81643804aace1b064c40afbb1284fd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/132026
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R29a065ae41a09caaac33e7612d9406f5261e5299

5 years agoARM: Tegra: Dalmore: Check regulators before disabling
Graziano Misuraca [Wed, 12 Sep 2012 20:06:30 +0000]
ARM: Tegra: Dalmore: Check regulators before disabling

Check hdmi regulators are set before trying to disable
them.

Bug 1037443

Change-Id: Ic5f2df3eaa4beb54e5a4566c8a2bdd4e0ca7251a
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/131925
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R4c7a161d25092e3c9e7da5ba78ce6c4289c39e92

5 years agoARM: tegra: pluto: Add support for MAX8831 LED on pluto
Chaitanya Bandi [Wed, 12 Sep 2012 10:09:20 +0000]
ARM: tegra: pluto: Add support for MAX8831 LED on pluto

Bug 1034472

Change-Id: I2d9a74164ba82a818e4e8687702510dbd2d35a9f
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/131763
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R17ed964ebbc1eb27467064ac504e3f9ebaa27b7d

5 years agoarm: tegra: xmm: fix coverity issue
Sri Krishna chowdary [Tue, 11 Sep 2012 13:08:04 +0000]
arm: tegra: xmm: fix coverity issue

Fixed NULL dereference by NULL checking.

Bug 1046331

Change-Id: I7d7ca75255ddb86b1f238fed469ac8e727f86a78
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/131415
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Vinayak Pane <vpane@nvidia.com>

Rebase-Id: R05694dd371bb644e43d6455a4e38453a27e47377

5 years agoarm: tegra: pcie: Fix Coverity issue
Sri Krishna chowdary [Tue, 11 Sep 2012 10:44:00 +0000]
arm: tegra: pcie: Fix Coverity issue

Fixed data type mismatch.
As irq was unsigned int following code was skipped always.

Bug 1046331

Change-Id: I5b04c72dfeafb3fb2f2d97cdf4c10fc5ad53dc1b
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/131366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

Rebase-Id: Rc18197d3094ee574403f2d8a3be6a552728a70e8

5 years agoarm: tegra: usb: usb phy changes
Suresh Mangipudi [Wed, 12 Sep 2012 07:15:48 +0000]
arm: tegra: usb: usb phy changes

Port UTMI changes from tegra3 usb phy to tegra11x usb phy.

Change-Id: I0bc17332707be538f23232e1aee52d3431694aca
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/131322
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R033c0f132928bde6ca31849e51fa4d48863b9f46

5 years agocpuquiet: Update averaging of nr_runnables
Sai Charan Gurrappadi [Sat, 25 Aug 2012 01:42:36 +0000]
cpuquiet: Update averaging of nr_runnables

Doing a Exponential moving average per nr_running++/-- does not
guarantee a fixed sample rate which induces errors if there are lots of
threads being enqueued/dequeued from the rq (Linpack mt). Instead of
keeping track of the avg, the scheduler now keeps track of the integral
of nr_running and allows the readers to perform filtering on top.

Implemented a proper exponential moving average for the runnables
governor and a straight 100ms average for the balanced governor. Tweaked
the thresholds for the runnables governor to minimize latency. Also,
decreased sample_rate for the runnables governor to the absolute minimum
of 10msecs.

Updated to K3.4

Change-Id: Ia25bf8baf2a1a015ba188b2c06e551e89b16c5f8
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/131147
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R7a20292e2cfb551a875962f0903647f69b78a0ab

5 years agoARM: tegra: Add DT support for Tegra30 EMC tables
Prashant Gaikwad [Thu, 13 Sep 2012 10:56:19 +0000]
ARM: tegra: Add DT support for Tegra30 EMC tables

Implements function to parse EMC tables from
device tree.

Bug 999688

Change-Id: I9c5b028feed46dc8b720220d97e360a3c7ced603
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/130699
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

Rebase-Id: R2c3620ae73523a2849ce8ec89387c69fae81370f

5 years agoARM: tegra11x: change CPUPWRGOOD_EN in LP0 cycle
Bo Yan [Thu, 6 Sep 2012 18:41:34 +0000]
ARM: tegra11x: change CPUPWRGOOD_EN in LP0 cycle

CPUPWRGOOD_EN needs to be disabled before LP0 entry, then enabled
after LP0 exit.

This is only needed when CPUPWRGOOD_EN is available on the chip and
the POR function of the pin used for CPUPWRGOOD_EN is CPUPWRGOOD_EN.
For T114, both conditions are met.

bug 926643
bug 1010972

Change-Id: I3379668df1ffcf91dd9649b1e42d9d91f6294e4d
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/130241
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R7f06568d4a9d41c2e2674aa5b6e136b20389ab06

5 years agoARM: tegra: dalmore/pluto: update sdmmc pinmux
naveenk [Wed, 12 Sep 2012 12:54:59 +0000]
ARM: tegra: dalmore/pluto: update sdmmc pinmux

update sdmmc pinmux settings for dalmore and pluto.
sdmmc3 drive strength is disabled, as per hardware team
drive strength should be set when the voltage supply is 1.8V .

Bug 1017708

Change-Id: I038d1838779cb3cc74e514d3c86dad840db89d92
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/131811
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rf7767cfb6508592f4ad589d586ab4817399cb9b7

5 years agoarm: tegra: pinmux: dalmore pinmux usb vbus
Suresh Mangipudi [Wed, 12 Sep 2012 11:21:27 +0000]
arm: tegra: pinmux: dalmore pinmux usb vbus

Changes for enabling the usb vbus for dalmore.

Bug 981704

Change-Id: I20a97d15fa6f5686d0580bbfc1b0d9833a95f8ac
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/131777
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com>
Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R123a483ebb12579447a6240af26a30f10296f91f

5 years agoARM: tegra: Enable Display Backlight for MAX8831
Chaitanya Bandi [Wed, 12 Sep 2012 09:52:10 +0000]
ARM: tegra: Enable Display Backlight for MAX8831

Bug 1034472

Change-Id: I8442fe919e4e13be64d24ee1ba4a9cd6bbc81b9c
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/131756
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R4504a5f7d74903c4880d3c833029eb01d9618c41

5 years agoARM: tegra: Enabled LED support for MAX8831
Chaitanya Bandi [Wed, 12 Sep 2012 09:42:45 +0000]
ARM: tegra: Enabled LED support for MAX8831

Bug 1034472

Change-Id: Ia41be7e48d37e6fd79e657a15c9ba11ced8f022f
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/131754
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rde5fe5e95bb3cfcdce44fa1f8c4de369697b4cee

5 years agoARM: tegra: Enable MAX8831 MFD base driver
Chaitanya Bandi [Wed, 12 Sep 2012 09:27:13 +0000]
ARM: tegra: Enable MAX8831 MFD base driver

Bug 1034472

Change-Id: I09822ec6430c57e33e9879a74ec48e9eb341ee40
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/131744
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R681a36b249a4874e7d2bcb57c5d326b6c8e53e78

5 years agoARM: tegra11: dvfs: Change default cvb alignment
Alex Frid [Wed, 12 Sep 2012 04:03:12 +0000]
ARM: tegra11: dvfs: Change default cvb alignment

Set default cvb alignment to 10mV (expected for Tegra11 platforms),
and override it on FPGA with previous setting - 12.5mV.

Change-Id: I2e3ab6e34200ca0a0769e977076500e744e2b6fd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/131651
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R2eff29aa4788d5f6cd9654cdf298c6e9864410e1

5 years agoarm: tegra: powerdetect update
Bitan Biswas [Tue, 11 Sep 2012 17:09:06 +0000]
arm: tegra: powerdetect update

T11x powerdetect table updated

Change-Id: I19ba11015ae80b6c715d35b78e8743b2a6ed8da1
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/131474
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R1aec12a178c3f5e5b9d8755b18dd32e8e26d2d28

5 years agoarm: tegra: pluto pwrdet regulators
Bitan Biswas [Thu, 30 Aug 2012 15:09:16 +0000]
arm: tegra: pluto pwrdet regulators

Pluto board regulator entries for power detect added

bug 1039236

Change-Id: I697ed4fd6db4f8e564b80768b20cb369b2a932fc
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/131414
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Re2195baaab54b5388029a3b51ea93bf33846bdec

5 years agoarm: tegra: dalmore pwrdet regulators
Bitan Biswas [Thu, 30 Aug 2012 09:22:18 +0000]
arm: tegra: dalmore pwrdet regulators

Dalmore board regulator entries for power detect added

bug 1039236

Change-Id: I12e1c261b9203ab856cf01cdc45f93bfd0678035
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/131406
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R5c1111f6e89612eaab17cf3c99d71be8470b6956

5 years agoARM: tegra: T114: fix t114-compilation errors
aghuge [Tue, 11 Sep 2012 09:29:05 +0000]
ARM: tegra: T114: fix t114-compilation errors

Change-Id: I4ebdee35994bd65eaf7f56371a5ca64f1189c14f
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/131340
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R89e91483c8c420e45affc3d9e1876bd1d5ecf220

5 years agoARM: tegra: pluto: enable pluto on T114
aghuge [Tue, 11 Sep 2012 10:49:27 +0000]
ARM: tegra: pluto: enable pluto on T114

Change-Id: Ifcbaa13916ed68d3a89a7b786d95c90e56db419f
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/131338
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R920ff83ba3bdbe4443750a405b3757bc1c11f4f8

5 years agoarm: tegra: pinmux: split board pinmux files for modularity
Andy Park [Tue, 4 Sep 2012 16:12:34 +0000]
arm: tegra: pinmux: split board pinmux files for modularity

T114 board files now refer to separate pinmux configuration table files
that are going to be automatically generated. Pinmux configuration still
requires review and test. So the added header files are apt to change.

Bug 1026002

Change-Id: I33c8a2758aa1c53352382fd4760923a48c56941d
Signed-off-by: Andy Park <andyp@nvidia.com>
Reviewed-on: http://git-master/r/131336
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Tested-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R078b8f1c578fbe9a4dfeada221c3840615a78b3d

5 years agoleds: max8831: Add led support for MAX8831
Chaitanya Bandi [Wed, 5 Sep 2012 08:06:08 +0000]
leds: max8831: Add led support for MAX8831

Added led driver support for MAX8831

Bug 1034472

Change-Id: I15e24f312ce4da725b5cddb916f74920c3c602b1
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/131319
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R879a212b8570f44fddeede2e1d3ebc776aa377b1

5 years agomfd: max8831: Add support for MAX8831 with I2C
Chaitanya Bandi [Tue, 4 Sep 2012 06:48:06 +0000]
mfd: max8831: Add support for MAX8831 with I2C

Added support for MAX8831 with I2C

Bug 1034472

Change-Id: I778f967747514c7def4d770debada75740908627
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/131318
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R573203bece2faf45ac1e03c7fcb47cb042a53e64

5 years agoARM: tegra: cpuquiet: Bring back hotplug stats support
Peter Boonstoppel [Mon, 10 Sep 2012 20:47:29 +0000]
ARM: tegra: cpuquiet: Bring back hotplug stats support

Hotplug stats are needed for dfs_log and Power Signature. Cpuquiet
provides similar stats in the core layer, but cannot provide stats for
LP cpu, since this is only visible at the driver level.

Bug 1045785

Change-Id: I6c5c26912d1a26637e81c73741637fbd2bee6157
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/131210
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Shaoming Feng <shaomingf@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R8e578267939d0bcde96d4851fb46b44da78baf28

5 years agortc: max77663: Set Alarm wday to its reset value
Daniel Fu [Thu, 23 Aug 2012 11:40:08 +0000]
rtc: max77663: Set Alarm wday to its reset value

The wday is configured only when disabled alarm.
When enable alarm, set it to its default reset value 0x01,
and not enable it, to prevent an error happened when re-read the
alarm value into the virtualized generic layer at boot up in
reading alarm setting of RTC.

Bug 1034871

Change-Id: I8bfa997653edaaa286cf768c1827b5ab986f52cc
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/129398
(cherry picked from commit 1a61c310b66245a73e021d786eea45c31cd9f6e9)

Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Change-Id: Ifa78078c6387689d12fe1aade8a9c531fef4f771
Reviewed-on: http://git-master/r/131130
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R495bc7741a8c90891f27e158af9ebdbcd820db97

5 years agoARM: tegra: dalmore: Fill palmas-E1611 power rails
Pradeep Goudagunta [Tue, 11 Sep 2012 16:43:17 +0000]
ARM: tegra: dalmore: Fill palmas-E1611 power rails

-Fill palmas-E1611 power rails
-Add hack for T30-Interposer board
-Add boardid based pmu selection support

Bug 982726

Change-Id: I634cf5bce493fad415d8dc5df657db9ed36e48a2
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/131090
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Rfc4cd9370b184df0b63c02f9d7ea9a1e47735b2a

5 years agoVibrator : Make regulator enable & disable paired
Hayden Du [Wed, 29 Aug 2012 09:26:52 +0000]
Vibrator : Make regulator enable & disable paired

We can see many WARNING messages, when Kai try to enter to
LP0.
Because Kai didn't defined a regulator used by vibrator device
then vibrator device try to get the regulator resource, its
will got the dummy regulator. But other devices also get the
dummy regulator resource.
When a process want to turn off the vibrator, vibrator driver
use regulator_is_enabled to check wether regulator is on, if
it is, then disable the regulator, regardless the regulator
enable and disable is paired or not. This isn't right when
vibrator not use a dedicate regulator.

Move vibrator device registration in corresponding files.
Add a flag to make regulator enable and disable paired.

bug 1030465

Change-Id: I124584eac8a3a9962ee39c51020174e09d18fc69
Signed-off-by: Hayden Du <haydend@nvidia.com>
Reviewed-on: http://git-master/r/131060
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R83712fcb9b6ea9d2dffe3945f0c71b9437963024

5 years agoarch: arm: configs: Enabled devfreq for tegra
Arto Merilainen [Fri, 7 Sep 2012 08:04:59 +0000]
arch: arm: configs: Enabled devfreq for tegra

Bug 965517

Change-Id: I44803170e91e957a69f06ac9c3ec98643f619b31
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/130580
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R4b0d046b49db7b2d0f2dc5712cd47c9791314e38

5 years agoARM: tegra: thermal: removed thermal find device
Joshua Primero [Tue, 28 Aug 2012 18:32:34 +0000]
ARM: tegra: thermal: removed thermal find device

Removed the tegra thermal layer find device functionality
and replaced it with the Linux thermal version.

Change-Id: If0531f438af4dc66354f8d2beade49034c6fd2ff
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/130284
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R9d74935baa1bef8ce298b5ba8e3d22194101d585

5 years agoARM: tegra: thermal: Refactored thermals
Joshua Primero [Thu, 23 Aug 2012 23:29:11 +0000]
ARM: tegra: thermal: Refactored thermals

1) Removed skin thermals from tegra_thermal layer
2) Removed throttle initialization from tegra_thermal layer
3) Simplified thermal device interface
4) Create a therm estimator device as a platform device

Change-Id: Ic8ffd111817f03f7aadc89d6185eb749b274b830
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/130282
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: Ra98f7e38d1273b0b75c6e4789f1ea98e3be4bf7c

5 years agoarm: tegra: pluto: Fix panel regulator
Animesh Kishore [Wed, 12 Sep 2012 11:37:23 +0000]
arm: tegra: pluto: Fix panel regulator

Fix panel regulator get fail.

Bug 1034528
Bug 1028791

Change-Id: I9b29dd35d7797a7eca43b84d123b5e819d283fe0
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/131776
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rf403c8008821cda51e69810d54bb5b14837bda15

5 years agoARM: tegra: pluto: enable sleep for rails
Laxman Dewangan [Wed, 12 Sep 2012 09:45:07 +0000]
ARM: tegra: pluto: enable sleep for rails

Enable sleep for core power rail and cpu power rail.
Make ldo8 in tracking mode with core rail.

Change-Id: I6fa6643a58ec1a89ad455b5247e0028ad87caeef
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131764
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R0fcb47f126f302c08a845d2c12f91a6f330fc642

5 years agoarm: tegra: dalmore: Fix regulator fail
Animesh Kishore [Wed, 12 Sep 2012 09:10:29 +0000]
arm: tegra: dalmore: Fix regulator fail

Fix regulator get fail.

Bug 1028790
Bug 1028789
Bug 1012298

Change-Id: Ifed8d871ddcdc6c03dd094141355cba8f9294e2b
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/131735
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Re534fa2fa0c696a454bc5e88d89abb2768b6693c

5 years agoarm: tegra: Support arb emem intr statistics.
Krishna Reddy [Tue, 11 Sep 2012 19:52:19 +0000]
arm: tegra: Support arb emem intr statistics.

Add Sysfs nodes to allow reading the arbitration emem intr
count and modified moving average.

Change-Id: I0b0585342bf4960da2c26079af6c8487cd0d8526
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/131517
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Rebase-Id: R650b2261e6242ffba1fb1295ea3c53173d5a057f

5 years agochromeos: update split configs for 3.4
Rhyland Klein [Fri, 7 Sep 2012 20:09:19 +0000]
chromeos: update split configs for 3.4

Update split configs for kernel 3.4

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I92a2e569cf43e9dc9f7df0f7e8e8ea7f45379684
Reviewed-on: http://git-master/r/131484
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R2f98398d348be37f56a68ded382c9617293bf0f0

5 years agoarm: tegra: Support for Pluto with T114
Ramalingam C [Tue, 11 Sep 2012 13:19:19 +0000]
arm: tegra: Support for Pluto with T114

Supporting the PLUTO board with T114

Bug 1046885

Change-Id: Iea95ceda502fdefa460770f044b7007cc702cf66
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/131442
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R30429ab03e2baa683167757f16d1558b2931e48c

5 years agoasoc: tegra: fix compilation error in max98095
Rhyland Klein [Thu, 2 Aug 2012 19:27:53 +0000]
asoc: tegra: fix compilation error in max98095

change 4b70cc537cadc787b748c7c246d703a240b08985 introduced
a compilation error.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I59e54537d9bb4b30e807478e5b7634db0813a739
Reviewed-on: http://git-master/r/120443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ankit Gupta (Engrg-SW) <ankitgupta@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
(cherry picked from commit c5dea888253285e23107585805b7728ebe46e17e)

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Change-Id: I1accd0ded99bfb9c12e2acffda79eebe2ff753c8
Reviewed-on: http://git-master/r/131483
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Rebase-Id: Rd74b33d0f5a9a7c61f11509ee6a1b91b8d6e408e

5 years agoarm: tegra: pluto: Change suspend mode to lp0
Mallikarjun Kasoju [Tue, 11 Sep 2012 17:06:22 +0000]
arm: tegra: pluto: Change suspend mode to lp0

Change suspend mode to lp0

Bug 1040429

Change-Id: I850a57ba63719c63447bf956967ebc3ea7f6f39a
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/131473
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R1f456d87fb9cdf95e4adfe1929cac7632d5b809e

5 years agoARM: tegra: pluto/dalmore: fix sd slot power rail
Pradeep Goudagunta [Tue, 11 Sep 2012 16:19:09 +0000]
ARM: tegra: pluto/dalmore: fix sd slot power rail

mmc core driver uses vddio_sd_slot to turn on slot power.

Bug 1046725

Change-Id: I2cdefd3219f0aac066eddd1ce842174905dff84d
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/131464
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R9f4cf0e96083412d12a8f6437f0c2c93231a17f4

5 years agomfd: palmas: support for external control of clock outputs
Laxman Dewangan [Tue, 11 Sep 2012 14:33:45 +0000]
mfd: palmas: support for external control of clock outputs

Add support to control different clock32K output through
external control signal.

Change-Id: I1c7c033d8b0a5a7ac2f1be7f6e32511b58e628a3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131451
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R02017551e11638971d0dbd38fa6133920d4c670e

5 years agomfd: palmas: support for the external control request
Laxman Dewangan [Tue, 11 Sep 2012 14:30:06 +0000]
mfd: palmas: support for the external control request

Palma support the control of different output signals
through external input signal like ENABLE1, ENABLE2 and
NSLEEP.
Add support to control the different outputs through
these signals.

Change-Id: Iea071b999879aa2580dd778f131e37c0372aa994
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131450

Rebase-Id: R6e3ecc708d762945b9055e11b06a8b92d53d1275

5 years agoARM: tegra: dvfs: Update dfll mode rate/voltage control
Alex Frid [Tue, 11 Sep 2012 04:52:26 +0000]
ARM: tegra: dvfs: Update dfll mode rate/voltage control

Updated dvfs rate and voltage control in dfll mode:

- use dfll voltages in set dvfs rate operation when dfll mode
is enabled
- use dfll voltages in predict voltage level operation when dfll
mode is enabled
- do not trigger any transaction to regulator when dfll mode is
enabled

Change-Id: Id66fbc21ac19f9495e743b785a99c7a1e250fce1
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/131306
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: Rba13d56ebf2d48ac5e3f1be002fa569642437906

5 years agoARM: tegra11: dvfs: Rename rail auto-control to dfll-mode
Alex Frid [Tue, 11 Sep 2012 04:46:57 +0000]
ARM: tegra11: dvfs: Rename rail auto-control to dfll-mode

Change-Id: Iea2372418a23286b21b58aa8eb665c90cf53043b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/131305
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rd853cbcdb20dc27c44ebbacff434eb73a2eb6695

5 years agoARM: tegra11: dvfs: Update dvfs settings
Alex Frid [Tue, 11 Sep 2012 01:23:19 +0000]
ARM: tegra11: dvfs: Update dvfs settings

Increased dvfs rail maximum limits, updated cvb scaling margins, and
dfll tuning parameters.

Change-Id: Icdaf5dfde00d68e6b8e2345f42e2a00d6c99bd11
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/131304
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Re60b0ff4179d361da4abfba539d2137fe583445e

5 years agokernel: config: fix missing quote for LESS_GCC_OPT
Jong Kim [Mon, 10 Sep 2012 23:50:14 +0000]
kernel: config: fix missing quote for LESS_GCC_OPT

Add closing quote for LESS_GCC_OPT.

Change-Id: I6b48b19625ac3ab2cc9f4d651cc216fb890063fa
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/131257
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R3f0f660244fb7e5f29bd8cf4ec480c7d6a19b796

5 years agoarm: tegra: usb_phy: enable pllu_regulator
Suresh Mangipudi [Fri, 31 Aug 2012 11:50:14 +0000]
arm: tegra: usb_phy: enable pllu_regulator

Change to enable the pllu regulator.

Change-Id: I6f8beb00c71e55b017c10576bf0aa990e09b362d
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/130990
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rdc45b9788887c16eeb927350f87b6be579ab7424

5 years agoARM: tegra: dalmore: Add sensor board support
Sudhir Vyas [Fri, 7 Sep 2012 16:33:07 +0000]
ARM: tegra: dalmore: Add sensor board support

Add sensor board support for dalmore.

Bug 1011363

Change-Id: I2c8dbfb0a7328e39653137d248db04e4e288793b
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/130735
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R2fdbce0bf51e521c9f0f75684b210fe664dd5a0c

5 years agoarm: tegra: la: Add config option for latency allowance scaling
Krishna Reddy [Fri, 7 Sep 2012 00:41:24 +0000]
arm: tegra: la: Add config option for latency allowance scaling

Change-Id: I90d7fd87e774e04f8d671dfcec5f1833871c7ef9
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/130403
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Re780070ae179523c97dd833555dc9f1bceead353

5 years agopower: Add GCOV_PROFILE
Juha Tukkinen [Mon, 10 Sep 2012 14:02:28 +0000]
power: Add GCOV_PROFILE

Include cpufreq in GCOV profiling when enabled by defconfig.

Change-Id: I4c6c94198873c53683a2486f56caab360a3a6a93
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/131129
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R8df825f4214a4ebdf62b51205ab6a619e6ab791f

5 years agoARM: tegra: pluto: enable clk32K from PMIC
Laxman Dewangan [Tue, 11 Sep 2012 09:34:43 +0000]
ARM: tegra: pluto: enable clk32K from PMIC

Enable clk32 from PMIC TPS65913 i.e. Palmas.

Change-Id: I581a77488e59db0b674e33fc9563fa744b584199
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131349
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R48247901c027e31d747de48a690e7f6cfd41bc3f

5 years agomfd: palma: support for clock
Laxman Dewangan [Tue, 11 Sep 2012 09:34:15 +0000]
mfd: palma: support for clock

Palma support for generating 32K Hz signal. Adding
support for this.

Change-Id: Ia0cf7c82e7b222f33c4ddb0aff748b1e12dfa273
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131348
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R2085d70a745b5e1825c0a2d6bc01262edfd1228e

5 years agoARM: tegra: pluto: populate plama-regen regulators
Laxman Dewangan [Tue, 11 Sep 2012 08:25:57 +0000]
ARM: tegra: pluto: populate plama-regen regulators

Populate Palma's REGEN1 and REGEN2 regulators.

Change-Id: Id1e2cdda5af783585b81fb443b7c15d890523d63
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131332
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Rc323a200f81550ecfc0ba2cf15daaee25416a3fe

5 years agoregulator: palma: support for external regulator
Laxman Dewangan [Tue, 11 Sep 2012 08:00:25 +0000]
regulator: palma: support for external regulator

Palma supports the multiple external regulator named
as REGEN1, REGEN2, REGEN3, SYSEN1 and SYSEN2.
Supports these regulator through regulator driver.

Change-Id: I4f5fae65dc6e5b8dcd1f80ac41ad406933a1fe7e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/131331
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Rf713533c4902afe3cd22adfb04e6dc1650f69ce1

5 years agodrivers: rtc: tegra: Remove rtc register reset
Prashant Malani [Tue, 11 Sep 2012 00:08:36 +0000]
drivers: rtc: tegra: Remove rtc register reset

RTC registers are accessed before
tegra_rtc_probe(). As such, resetting them here
would lead to inconsistent state, and possible
problems with time subtraction.

Bug 1010972

Change-Id: I342a88411b5fcde86078537c313d857e3cd9a4f2
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/131263
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>

Rebase-Id: Rdfd5f6598c9cc9ec86fd2faae7af3e035fa81d29

5 years agopinctrl: Add GCOV_PROFILE
Juha Tukkinen [Mon, 10 Sep 2012 14:01:18 +0000]
pinctrl: Add GCOV_PROFILE

Include pinctrl in GCOV profiling when enabled by defconfig.

Change-Id: I978515db3196e81e024450e08c9dcffd24277047
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/131128
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R9d4b954bedf21097c2df028cff5e3d54b9c38ca9

5 years agocpuquiet: Add GCOV_PROFILE
Juha Tukkinen [Mon, 10 Sep 2012 14:00:35 +0000]
cpuquiet: Add GCOV_PROFILE

Include cpuquiet in GCOV profiling when enabled by defconfig.

Change-Id: I448602d2c79f4113b99e6546743585e629fa726e
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/131127
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R7daa534f10a211bf7b15a253f5cfee7a126428f0

5 years agocpuidle: Add GCOV_PROFILE
Juha Tukkinen [Mon, 10 Sep 2012 13:59:55 +0000]
cpuidle: Add GCOV_PROFILE

Include cpuidle in GCOV profiling when enabled by defconfig.

Change-Id: Ic5a891a2b2683405606770f86393f7f73928d8ea
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/131126
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R98e503e3061909f4a2832b4313e4305ac8adf0e2

5 years agocpufreq: Add GCOV_PROFILE
Juha Tukkinen [Mon, 10 Sep 2012 13:59:15 +0000]
cpufreq: Add GCOV_PROFILE

Include cpufreq in GCOV profiling when enabled by defconfig.

Change-Id: Iab3d2b7d2868acd51c66d975fc255552e2af1724
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/131125
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R2089148455cf5b2476c75741190fb196cdfe9409

5 years agortc: max77663: fix alarm reading bug
Daniel Fu [Wed, 5 Sep 2012 03:45:04 +0000]
rtc: max77663: fix alarm reading bug

When reading alarm of RTC-max77663, it didn't set alrm->enabled correctly,
if irq is masked, means disable alarm, alrm->enabled should be set to 0,
else it should be 1.

Change-Id: Id0b1ffd9a816643712f33624d7d52cbe7b66b3c3
Signed-off-by: Daniel Fu <danifu@nvidia.com>
Reviewed-on: http://git-master/r/129593
(cherry picked from commit e81b06d36a924dcdf8bb0456e7a50d1634d0365f)

Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Change-Id: I21eb95bd6c051963db22e9b4494c6b59c79ae17c
Reviewed-on: http://git-master/r/131124
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R38146862894845a5f02698d6865d97ddd82b2db1

5 years agoarm: tegra: board: usb fixes for unaligned buffer
Suresh Mangipudi [Fri, 7 Sep 2012 11:52:03 +0000]
arm: tegra: board: usb fixes for unaligned buffer

Add support for unaligned buffers for usb, as it is fixed for T114.

Bug 1017714

Change-Id: I5cb486f707c6427dcd657bc8edf822d5cfc4dad2
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/130677
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R5188ed224b25914605ceb0d0e1c5ac834fd63ca0

5 years agopm: EDP: enabling EDP framework for tegra11
Sivaram Nair [Mon, 10 Sep 2012 14:29:34 +0000]
pm: EDP: enabling EDP framework for tegra11

This patch enables the EDP_FRAMEWORK config flag for tegra11 SoCs

Change-Id: I366e649ae9f27c1664a86fe46f160a7147826c77
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/131136
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R32fba5ca0bf1fba6d680041bdb190ef0df2c6774

5 years agoarm: tegra: pluto: add sensor support
Sri Krishna chowdary [Fri, 7 Sep 2012 08:21:57 +0000]
arm: tegra: pluto: add sensor support

Registration of isl29028 ALS+Proximity sensor on i2c

Bug 980722

Change-Id: I4718e2c7965065d1136bb6df2a941b6d15f0ab3b
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/131121
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1a9f1db54f0b9a122648771a989191a52511adaa

5 years agoARM: tegra11: clock: Add XUSB shared EMC user
Alex Frid [Sun, 9 Sep 2012 23:17:59 +0000]
ARM: tegra11: clock: Add XUSB shared EMC user

Added EMC shared user for XUSB driver. Changed XUSB device id to
"tegra_xhci".

Change-Id: I1a884ef6ff67d9b2698284bb00c60c39a3b324fa
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130936
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc03aceaf5154433b2583938ba22bace0ed5df5e7

5 years agoARM: tegra11: dvfs: Add uart dvfs tables
Alex Frid [Fri, 31 Aug 2012 07:09:15 +0000]
ARM: tegra11: dvfs: Add uart dvfs tables

On Tegra11 there are two alternative configurations of UART clock:
(a) clock module source mux, and clock module 15.1 fractional divider
(b) clock module source mux, and legacy serial port 16-bit integer
divider inside UART module

In configuration (a) actual UART rate, and respective voltage level
is known by clock framework. In configuration (b) dvfs can be applied
correctly only when internal UART divider is set as 1:1. Hence, high
speed tegra UART driver must use either (a) or (b) with 1:1 settings.

Standard serial 8250 port driver, however, will use configuration (b)
with scaled internal divider. Since baud rates set by this driver are
way below Tegra11 UART capabilities at minimum voltage, dvfs limits
will not be checked in this case at all.

For now, the application of dvfs tables is deferred until tegra UART
driver is modified.

Change-Id: Idf9d1f088925c7a8389564dab91a0de9ab3086dc
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130935
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R58c29941ffb1de4ea8a5491309d2b9cd602f8040

5 years agoARM: tegra: clock: Make maximum rate writable via debugfs
Alex Frid [Sun, 9 Sep 2012 06:11:53 +0000]
ARM: tegra: clock: Make maximum rate writable via debugfs

Change-Id: I3a9cf1a393797484de3e836b664636e79a95ac74
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130900
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R61b637a0ecd61a423755ea047794c193d1e8d9fa

5 years agoarm: tegra: pluto: enable sdhci configuration
Nagarjuna Kristam [Fri, 7 Sep 2012 09:58:55 +0000]
arm: tegra: pluto: enable sdhci configuration

rename DALMORE_* macros to PLUTO_*
correct WOW GPIO pin
remove conditional else code for CONFIG_ARCH_TEGRA_11x_SOC

Bug 1029054

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Change-Id: I245d03b90e5f48fef66d2a1d7e8aa0855d5290e4
Reviewed-on: http://git-master/r/130473
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1fb71d04f9ce01e61b4028472aaf8621acea1105

5 years agopower: max77665: add battery charger support
Syed Rafiuddin [Wed, 5 Sep 2012 05:39:37 +0000]
power: max77665: add battery charger support

MAX77665 supports battery charging.

Add driver for supporting this feature

Bug 1011298

Change-Id: I34a1b95836c1fce24548592dd073fdfedcc49669
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/130619
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R65f7f45e492d4fcd3c240b57f829ede0a4a0f2c8

5 years agodrivers: extcon: add max77665 muic driver
Syed Rafiuddin [Tue, 4 Sep 2012 07:00:21 +0000]
drivers: extcon: add max77665 muic driver

MAX77665 support muic feature.

Addition of driver to support this feature.

Change-Id: Ifd0c934d2ab457e511c0a2cd1d312dba6afe8a89
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/130618
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: Re591631e06e8381db0f310b26653254a083b2b65

5 years agomax17042_battery: Move dev_pm_ops struct under CONFIG_PM
Syed Rafiuddin [Mon, 3 Sep 2012 05:51:53 +0000]
max17042_battery: Move dev_pm_ops struct under CONFIG_PM

This is what we do for the rest of the drivers, saves some bytes.

Plus a small style change while at it.

(cherry picked from commit 48e41c70c10f10541d922fc67e7952f06ad59d9a)

Signed-off-by: Anton Vorontsov <anton.vorontsov@linaro.org>

Change-Id: Ia6818c41c5c9fbae3427755dd71ceb27016bfdb8
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/130587
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R393ef29e3c83b5846c0e21a8dd706cc7f76fae1d

5 years agomax17042_battery: Add suspend/resume hooks
Syed Rafiuddin [Mon, 3 Sep 2012 05:49:38 +0000]
max17042_battery: Add suspend/resume hooks

This patch adds suspend/resume methods to the driver.

In suspend method irq line is disabled to avoid i2c
read/write errors from the interrupt handler as the
i2c bus itself could be in suspend state.
In resume function irq line will be re-enabled.

(cherry picked from commit 48bc177441d68c0ba70631beb544c3d695328d56)

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Signed-off-by: Anton Vorontsov <anton.vorontsov@linaro.org>

Change-Id: Id4129ae087e73ab72ecd415772e559573770fe86
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Reviewed-on: http://git-master/r/130586
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R0d4d1bdadbcc4f00fff5cae664d2d3e92d32e0ba

5 years agoarch: arm: tegra: Add support for marvell 8797
Nitin Bindal [Thu, 26 Apr 2012 09:48:59 +0000]
arch: arm: tegra: Add support for marvell 8797

If bootloader specify that marvell wifi chip is
present on the board, then create marvell wifi device,
else create broadcom wifi device.

Bug 954218

Change-Id: I8e12722b2f39174d19159e626e8555bd632002e1
Reviewed-on: http://git-master/r/98490
(cherry picked from commit 3bcfb01a01faf8ecc3d1d1ca19eee98c33d39a25)
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/130124
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R64321934416be15970379eb26aa452c2f8859c69

5 years agoarm: tegra: pluto: enable bluetooth support
Nagarjuna Kristam [Fri, 31 Aug 2012 05:12:19 +0000]
arm: tegra: pluto: enable bluetooth support

Enable pinmux config for BT_EN, BT_RST, BT_EXT and BT_IRQ
Add bluesleep and rfkill platform resources

Bug 1029054

Change-Id: I652f0c771acf5087f34dab7d2498c2cd5808c7a2
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/130081
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rfe61f811496cecd2721ac50d5f964af365488ac5

5 years agopm: EDP: added overage governor
Sivaram Nair [Sat, 8 Sep 2012 14:02:16 +0000]
pm: EDP: added overage governor

This patch adds the overage governor to EDP framework.

Change-Id: I2f587e6df9556206fec2a3f3b64a2e35514a3d20
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/131067
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R364f657f9e124162c1eaa53f94c85ce2637e6824

5 years agopm: EDP: refactoring and bug fixes
Sivaram Nair [Fri, 7 Sep 2012 11:54:04 +0000]
pm: EDP: refactoring and bug fixes

(1) identified some generic governor functions and moved to edp.c.
(2) Changes to allow duplicate E-state entries (as long as they are in
    sorted sorted order and at least one of them is non-zero)

Change-Id: Iff5f07b3291fb0fd90449abf68d5bed77e8d7df1
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/131066
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

Rebase-Id: R4844b5624d14c2765aed6fdfb5e042c4daa186f4

5 years agopm: EDP: added kernel documentation
Sivaram Nair [Fri, 7 Sep 2012 11:45:19 +0000]
pm: EDP: added kernel documentation

This patch adds documentation about:

(1) dynamic EDP capping in general
(2) EDP framework design
(3) user guide with example for device driver authors
(4) EDP sysfs
(5) EDP policy governors

Change-Id: I63e7ac25d28e025e5faead276a091ceaaa3c64f0
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/131065
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>

Rebase-Id: R41c3588f3860ec0b7b73705757a081af2d3b0d91

5 years agoasoc: codec: convert gpio to irq for max98088
Nikesh Oswal [Mon, 10 Sep 2012 09:32:59 +0000]
asoc: codec: convert gpio to irq for max98088

Bug 1044921

Change-Id: Idd59f0e34241052f0cde2948ec529e7696af2337
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/131052
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rcbb6561f337126af11119e3f4b9b1e5d64cf4e86

5 years agoARM: tegra11: clock: Register clock suspend/resume
Alex Frid [Wed, 5 Sep 2012 03:16:02 +0000]
ARM: tegra11: clock: Register clock suspend/resume

Registered clock suspend/resume as syscore operations.

Change-Id: Icb2cf9365cf469f8a3ea29052a8a18d5545397b5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130857
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb0e78fa7fc2af9b31efa5e0f05d1383775325262

5 years agoARM: tegra11: clock: Modify pllx and cpu burst policy restore
Alex Frid [Tue, 4 Sep 2012 22:42:28 +0000]
ARM: tegra11: clock: Modify pllx and cpu burst policy restore

Removed PLLX and cpu burst policy restoration on Tegra11 from
restore_cpu_complex() routine. These settings are preserved across
cpu complex rail-gating, and should be restored by common clock
suspend/resume code across core rail-gating (LP0 state).

Added PLLX restoration to common clock resume procedure (was missing,
since it was done in restore_cpu_complex()). Fixed cpu burst policy
restoration for LP CPU to make sure PLLX DIV2 bypass is not changing
while PLLX is used as cpu clock source.

Change-Id: I3425a4ad65c51d9485e1c3240905b3ce3066e74c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130856
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R1984894b43e1c16e9f984880e200df68b867a2c2

5 years agoARM: tegra11: clock: Change the order of pll restoration
Alex Frid [Sat, 8 Sep 2012 04:31:30 +0000]
ARM: tegra11: clock: Change the order of pll restoration

Reversed the order of base and miscellaneous registers restoration
for PLLA, PLLD/D2 (base should be restored after miscellaneous
register).

Change-Id: Ide199b876c133e15b1340abea802179d46d03abd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130855
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R4417e9d1b0d106439651e7cd160f8ea52b05d5e0

5 years agoARM: tegra11: clock: Update clock suspend/resume
Alex Frid [Sat, 1 Sep 2012 05:50:35 +0000]
ARM: tegra11: clock: Update clock suspend/resume

Updated clock suspend/resume procedures:
- added missed module clock sources and clock control registers
  to save/restore pool
- added secondary PLLP dividers suspend/resume
- added PLLC2/C3 suspend/resume
- used Tegra11 PLLC suspend/resume operations (instead of direct base
  register save/restore)
- updated clock enable masks

Change-Id: I91949065f85067ddd2ad4bc3a26ed8c92ea7c51d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130854
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rcc48c762f827cfdb5d4469d290a140a0caa7c847

5 years agoARM: tegra11: clock: Add PLLC2/3, PLLC, PLLX resume operations
Alex Frid [Sat, 1 Sep 2012 03:40:02 +0000]
ARM: tegra11: clock: Add PLLC2/3, PLLC, PLLX resume operations

Change-Id: Idc1fc070e77ea8161a10321fe074ea329671fb98
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/130853
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R61182064153c1ad0939273c3a9994106a7a559a5

5 years agoarm: tegra: Define DT bindings for Tegra30 EMC tables
Prashant Gaikwad [Thu, 16 Aug 2012 11:44:43 +0000]
arm: tegra: Define DT bindings for Tegra30 EMC tables

Bug 999688

Change-Id: I86041009ff686073dc81857aaf47e4fcee2618ea
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/130698
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R51ae7597c4ab461e337559efdec8c1be7c7ec5c3

5 years agoarm: tegra: phy: enable wakeup event for usb phy
Rakesh Bodla [Fri, 7 Sep 2012 10:24:55 +0000]
arm: tegra: phy: enable wakeup event for usb phy

If usb device already connected, should disable WKCN
in USB2D_PORTSC1, and enable WKDS in USB2D_PORTSC1,
during utmi phy power off. All the wakeup resource
should be cleared after the event happened.

Bug 1020021
Bug 1028429

Reviewed-on: http://git-master/r/128547
(cherry picked from commit 65ce999d1b22b01f6a2e6b3516be47e83d6d2584)

Change-Id: I0c4f704cd0517f0195053a5835ddf5c2956a2fa9
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/130601
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: Rb7338395f8a9d46506479c43f9fffa36b0eacb3e

5 years agoARM: tegra: Fix debugfs strings for powergate
Peter De Schrijver [Thu, 30 Aug 2012 13:57:21 +0000]
ARM: tegra: Fix debugfs strings for powergate

Replace powergate_name[] by a call to tegra_powergate_get_name().
This fixes the out of bounds accesses for SoCs other than Tegra20.

bug 1041476

Change-Id: I0e299960404fae33af3ef0423344001e133b8653
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/130597
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rb97068d00a429d16bca1fc7ddda3a97c9d3f919b

5 years agoARM: tegra: usb_phy: Remove WAR for host connection detect
srinivas [Wed, 29 Aug 2012 17:30:03 +0000]
ARM: tegra: usb_phy: Remove WAR for host connection detect

T30 USB controller sets fake connect event when it is
in HSIC mode without regard to actual device connection.
This issue got fixed in T114 by adding the connect detect
interrupt. Now standard EHCI interrupt can be used for host
connection detect hence SW WAR kept during T30 is removed.

Removed phy_resume & phy_fence_read functions which are
not required for T114.

Bug 969326

Change-Id: I9bec5f3bfb0c0dca8ad9a584b9514e3680026041
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/130477
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rafa1354a28e12df8bd507b60653ad739022e61f3

5 years agoARM: tegra: usb_phy: Remove WAR for HSIC bus reset
srinivas [Wed, 29 Aug 2012 17:24:45 +0000]
ARM: tegra: usb_phy: Remove WAR for HSIC bus reset

When UHSIC_DISABLE_BUSRESET, UHSIC_FORCE_XCVR_MODE
bits are set, controller forces bus reset using the
WAR sequences in T30. As HSIC bus reset timer issue
is fixed in T114, these settings can be removed.

Bug 1021578

Change-Id: I21e5acc533d1bec5691d7142eb6776e852db9392
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/130474
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R3e282d7bd223f678e5cef5c57f24a9962872afed