4 years agomisc:cryptodev: fix null_check coverity issue
Shravani Dingari [Fri, 15 May 2015 06:22:46 +0000]
misc:cryptodev: fix null_check coverity issue

Fix coverity issue of not returning when null_check
shows the memory allocated is NULL
Coverity id : 30087

Bug 1416640

Change-Id: Idfaa2968de6e4e4719bf0cc089267177a0a4f588
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/743120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agot124: udc/otg: Add DT support for T124 power-domains
Sumit Singh [Wed, 6 May 2015 17:44:40 +0000]
t124: udc/otg: Add DT support for T124 power-domains

Make modifications so as to add otg device to
its powerdomain using device tree.

Bug 200070810

Change-Id: I8fa7d4b8e982fe890172a105d0727f874de5d672
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739717
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agousb: ehci: tegra: Add DT support for T124 power-domains
Sumit Singh [Wed, 6 May 2015 17:40:27 +0000]
usb: ehci: tegra: Add DT support for T124 power-domains

Make modifications so as to add ehci devices to their
power-domains using using device tree for T124 chip.

Bug 200070810

Change-Id: I1ff082375d810f6e4199288725448c8f16cbf0a9
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739716
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agommc: sdhci: Add DT support for T124 power-domains
Sumit Singh [Wed, 6 May 2015 17:34:35 +0000]
mmc: sdhci: Add DT support for T124 power-domains

Make modifications so as to add sdhci devices to
their power-domains using using DT for T124 chip.

Bug 200070810

Change-Id: Iec1c3cdae6f43efba8637666548c0339b656477b
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739715
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agovideo: tegra: host: DT support for host1x domains
Sumit Singh [Wed, 6 May 2015 16:26:22 +0000]
video: tegra: host: DT support for host1x domains

Add DT support for power domains for host1x clients
for T124 chip.

Bug 200070810

Change-Id: I94b815d66fbc6c10296cdbf34528438bbaa6a8c8
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739699
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agogpu: nvgpu: Add DT support for gpu power-domain
Sumit Singh [Wed, 6 May 2015 16:20:26 +0000]
gpu: nvgpu: Add DT support for gpu power-domain

Make modification to add DT support for gpu
power-domain for T124 chip.

Bug 200070810

Change-Id: Iac63c8fb5fc5280e9a9f5758e63c9da009f3813d
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739698
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoplatform: tegra: Add DT support for T124 power-domains
Sumit Singh [Wed, 6 May 2015 16:34:31 +0000]
platform: tegra: Add DT support for T124 power-domains

Add DT support for the following tegra power-domains:
-mc_clk
-nvavp
-sdhci

Also correct a typo for T210 nvavp entry.

Bug 200070810

Change-Id: Ie1dc44bb64f298f5a85501da4441151e323dfb9e
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739704
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agoPM/Domain: Add pd supporting functions
Sumit Singh [Wed, 6 May 2015 16:06:37 +0000]
PM/Domain: Add pd supporting functions

Add function, which we are using as a work-around to add
a few devices to their power-domains using device-tree.

Bug 200105664

Change-Id: I5a510f0bf5f3b213ec932dfd29878cb9e310be4f
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/739687
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

4 years agoARM: dts: tegra: Add DT nodes for power-domains
Sumit Singh [Tue, 31 Mar 2015 05:23:42 +0000]
ARM: dts: tegra: Add DT nodes for power-domains

To add DT support for tegra power-domains, adding
nodes for tegra power-domains, filling the relevant
properties, and adding a phandle to devices pointing
to power-domain to which they belong.

Bug 200070810

Change-Id: I27fe999233549e113f1e46ac1393b9830bd4b24a
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/725377
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoi2c: busses: make local function as static
Amit Sharma (SW-TEGRA) [Tue, 19 May 2015 04:27:34 +0000]
i2c: busses: make local function as static

Fixed the following sparse warnings by making the local function as static:
- warning: symbol 'tegra_vi_i2c_runtime_resume' was not declared.
   Should it be static?
- warning: symbol 'tegra_vi_i2c_runtime_suspend' was not declared.
   Should it be static?

Bug 200067946

Change-Id: I2d2b7be4ec24e4dd1f8afbaf3646900df302ccf6
Signed-off-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/744125
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agoplatform: tegra: emc: fix Coverity defects
Alex Waterman [Tue, 21 Apr 2015 20:01:12 +0000]
platform: tegra: emc: fix Coverity defects

Remove some dead code found by coverity
Coverity defect id : 26816

Remove unsigned comparison against zero
Coverity defect id : 29955

Bug 1416640

Change-Id: I9fdc53ed5974a6b61a2b1ef00b89544a722ef7c5
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/733719
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agoarm64: dts: p2530: disable charger-die
Naveen Kumar S [Wed, 15 Apr 2015 05:59:30 +0000]
arm64: dts: p2530: disable charger-die

Charger-die is not needed for any platform with P2530.
Removed the node from dtsi file.

bug 200093042

Change-Id: Ied012827148139d273fb6856484ec5877619d7a3
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/727984
(cherry picked from commit 6b94e373eb7fe5b84654fb252d814c7fcf8ab5a0)
Reviewed-on: http://git-master/r/739976
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agomisc: tegra-profiler: add cpu notifier
Igor Nabirushkin [Wed, 29 Apr 2015 06:44:01 +0000]
misc: tegra-profiler: add cpu notifier

Detect when the CPU goes online/offline.

Bug 1634024

Change-Id: I989a9aefbc32a70070b37fe42ce5dcf75b18263b
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/729497
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dmitry Antipov <dantipov@nvidia.com>
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agodrivers: of: add return value to of_reserved_mem_device_init()
Marek Szyprowski [Wed, 29 Oct 2014 21:50:29 +0000]
drivers: of: add return value to of_reserved_mem_device_init()

Driver calling of_reserved_mem_device_init() might be interested if the
initialization has been successful or not, so add support for returning
error code.

This fixes a build warining caused by commit 7bfa5ab6fa1b ("drivers:
dma-coherent: add initialization from device tree"), which has been
merged without this change and without fixing function return value.

Bug 200027296

Fixes: 7bfa5ab6fa1b1 ("drivers: dma-coherent: add initialization from device tree")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Michal Nazarewicz <mina86@mina86.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Laura Abbott <lauraa@codeaurora.org>
Cc: Josh Cartwright <joshc@codeaurora.org>
Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
(cherry picked from commit 47f29df7db78ee4fcdb104cf36918d987ddd0278)
Change-Id: I41bc730cf1d2a70a19a7797972d4af7a6635508d
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/740577
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agousb: gadget: tegra: fix kernel panic in test mode
BH Hsieh [Tue, 28 Apr 2015 04:49:40 +0000]
usb: gadget: tegra: fix kernel panic in test mode

Drivers should NOT use virt_to_phys,
use dma_map_single instead.

Bug 200098808

Change-Id: Ie86d64d5176b89c2ef68251a5dd4c18883ce7cf3
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Reviewed-on: http://git-master/r/733600
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agotegra: fiq_debugger: use device node to attach debugger
dmitry pervushin [Mon, 20 Apr 2015 11:35:02 +0000]
tegra: fiq_debugger: use device node to attach debugger

Although FIQ debugger is a software entity, it makes sense to configure
it using device tree, as it is a hardware device. New device node with
compatible="nvidia,fiq-debugger" references another device nodes: console
port and interrupt source. Console port is specified using use-console-port
property, the interrupt source is referenced using use-wdt-irq. However,
in both cases it is possible to use "reg" and "interrupt" properties to
specify port and irq manually.

Bug 200081897

Change-Id: If33debe553653d5c753806320f203c3be49a51e8
Signed-off-by: dmitry pervushin <dpervushin@nvidia.com>
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/733183
(cherry picked from commit c7bd7c485a7019aa41d8151b971500fa0e6b53b5)
Reviewed-on: http://git-master/r/741081
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agoarm64: Hawkeye: update emc DVFS table
Robert Shih [Thu, 2 Apr 2015 08:44:31 +0000]
arm64: Hawkeye: update emc DVFS table

bug 1608434

Change-Id: Id5dea6c212568a99b5995c3ecbff531cf90e169d
Signed-off-by: Robert Shih <rshih@nvidia.com>
Reviewed-on: http://git-master/r/726797
(cherry picked from commit a7315b4ef54063c28ed697fe9f6b858ca0d0408c)
Reviewed-on: http://git-master/r/730083
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agoUSB: phy: disable PD_TX after delay
Suresh Mangipudi [Thu, 12 Mar 2015 13:44:38 +0000]
USB: phy: disable PD_TX after delay

Delay after disabling PD_TX could cause a glitch on the USB bus

Bug 1600315

Change-Id: I89e9eec228201ecca27dd750eaf8116704dd4315
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/734251
(cherry picked from commit 9e1005b01be24f09a7ee66e3c9e5dacfa139c03a)
Reviewed-on: http://git-master/r/740042
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agoarm: tegra: enable NTFS config for tegra210
Bibek Basu [Tue, 7 Apr 2015 10:39:34 +0000]
arm: tegra: enable NTFS config for tegra210

Enable CONFIG_NTFS_FS for tegra210

Bug 200093380

Change-Id: I3699f58919a8851aaff181b38b6b584c06a621b6
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/728487
(cherry picked from commit 07ece0487a58688fe06198549152180320a8d6d3)
Reviewed-on: http://git-master/r/731721
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agopcie: tegra: move err print to info print
Bibek Basu [Tue, 7 Apr 2015 10:45:24 +0000]
pcie: tegra: move err print to info print

Change link down print to info print

Bug 200094238

Change-Id: I7ea4ab4862609d34766c7cd1ea12870b0fa80eb5
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/728488
(cherry picked from commit e547fb5d0185c49704322ff406889cb1d3c0b277)
Reviewed-on: http://git-master/r/731722
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Tested-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agopcie: tegra: remove delay in resume code
Bibek Basu [Tue, 5 May 2015 04:28:44 +0000]
pcie: tegra: remove delay in resume code

regulator ramp delay will take care of voltage
stabilization, no need to add delay in driver

Bug 200088740

Change-Id: I0d672c0b91f2fcaa6938553976f65f3fd04ece60
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/738837
(cherry picked from commit 687c925788f933d2b4b14b9816682e3612d1d03c)
Reviewed-on: http://git-master/r/740969
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agohost: nvhost: fix the sparse warnings
Amit Sharma (SW-TEGRA) [Thu, 14 May 2015 04:59:47 +0000]
host: nvhost: fix the sparse warnings

Fixed the following sparse warnings by adding the '__user' cast
to user space pointers, this will notify the sparse that they are
user space pointer. Hence, remove the sparse error and warnings.

- bus_client.c:905:51: warning: incorrect type in argument 4
- bus_client.c:905:60: warning: incorrect type in argument 5
- host1x.c:325:51: warning: incorrect type in argument 4
- host1x.c:325:60: warning: incorrect type in argument 5
- vhost.c:231:43: warning: incorrect type in argument 2
- vhost.c:238:51: warning: cast removes address space of expression
- vhost.c:238:51: warning: incorrect type in argument 2
- vhost.c:254:35: warning: cast removes address space of expression
- vhost.c:254:35: warning: incorrect type in argument 1
- vhost.c:211:5: error: symbol 'vhost_rdwr_module_regs' redeclared
                 with different type (originally declared at - vhost.h:52)
                 - incompatible argument 4 (different address spaces)

Bug 200067946
Bug 200088648

Change-Id: Ib9b8172fa9aeea4e1be061d8d43c4a029a72aeb0
Signed-off-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/742685
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agoarm64: tegra: enable tegra WDT on probe for t210
Allen Yu [Wed, 29 Apr 2015 07:55:03 +0000]
arm64: tegra: enable tegra WDT on probe for t210

For t210 we can use WDT IRQ handler for WDT petting so it's safe to
enable WDT by default on all t210 platforms. This helps device recover
from early hang/lockup condition.

Bug 200100035

Change-Id: I8cca435ed195e07c9ecede002cd24f1e2f663a9f
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/737169
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agowatchdog: tegra: revmap support for enable-on-init
Allen Yu [Tue, 28 Apr 2015 06:55:13 +0000]
watchdog: tegra: revmap support for enable-on-init

To recover device from early hang before userspace watchdog daemon starts,
WDT needs to be enabled on init and a kernel WDT petting routine is preferable
since the time to userspace boot is non-deterministic and it is possible that
userspace may not provide a watchdog daemon. This change does following:

- Request a threaded irq (WDT_IRQ) if enable-on-init is provided in DT
- Reload WDT in the threaded interrupt context to probe CPU lockup
- Remove the IRQ handler once userspace watchdog daemon takes over WDT

For legacy chips like t124 and t132, WDT_IRQ is not available for WDT petting
since it's used for FIQ debugger. So they still expect userspace to boot and
start petting the watchdog.

Bug 200100035

Change-Id: I9d6345aa2a154dcb91adf0d42c044902dece4744
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/736803
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agowatchdog: tegra: get expiry count from DT
Allen Yu [Tue, 28 Apr 2015 06:08:21 +0000]
watchdog: tegra: get expiry count from DT

The total expiry count of Tegra WDTs is limited to HW design and depends
on skip configuration if supported. This change adds support to get the
expiry count through device tree. To be safe, we set the default expiry
count to 1, in case device tree doesn't provide the value.

Bug 200100035

Change-Id: I490dc21d3c1a217c3873a25cb60bba991bd80873
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/736602
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agoARM: tegra: add DT properties for tegra WDT
Allen Yu [Wed, 29 Apr 2015 07:10:51 +0000]
ARM: tegra: add DT properties for tegra WDT

Add "interrupts" and "nvidia,expiry-count" DT properties
for tegra WDT to better support enable WDT on probe.

Bug 200100035

Change-Id: Ia4e43b196e1475dbbaee199b4c040fd05450a017
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/737160
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agogpu: nvgpu: Disable channel when updating SMPC WAR
Terje Bergstrom [Mon, 11 May 2015 19:13:05 +0000]
gpu: nvgpu: Disable channel when updating SMPC WAR

When updating SMPC WAR for channel, it needs to be kicked out. This
ensures that the updated information is re-read from context header.

Bug 1579548

Change-Id: Ia65bdb638cec7125021a8e60c365b83085efe0d4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/741322
Reviewed-on: http://git-master/r/743859

4 years agopower: tegra12: Hot reset GPU MC client
Seshendra Gadagottu [Fri, 8 May 2015 17:59:10 +0000]
power: tegra12: Hot reset GPU MC client

Hot reset GPU MC client interface when GPU is powered ON
after boot or SC7 or rail-gate.

Bug 1642920

Change-Id: I421d535af4e9d627bf272814594ac3c7a50aaae7
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/740730
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agogpu: nvgpu: Correction in allow_all flag usage
sujeet baranwal [Fri, 27 Mar 2015 00:51:11 +0000]
gpu: nvgpu: Correction in allow_all flag usage

The allow_all flag is used to avoid any kind of register's
offset being validate when called through regops. but the
current implementation was flawed. It printed error messages
and set the status of each operation invalid, even when
allow_all was set.

Change-Id: Ie5a70a3cdc2368715731cf1c9cd771fdcf6b0d57
Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com>
Reviewed-on: http://git-master/r/723830
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agommc: tegra: set max command queue depth to 32
Srinivas Vummadisingu [Thu, 14 May 2015 21:54:31 +0000]
mmc: tegra: set max command queue depth to 32

Modified the default cq depth from 16 to 32.

Bug 200093351

Change-Id: Ic268482c1e2509300c57795caf81956495862546
Signed-off-by: Srinivas Vummadisingu <srinivasv@nvidia.com>
Reviewed-on: http://git-master/r/742930
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

4 years agodrivers: thermal: enable reading sensors_active
Neil Patel [Thu, 16 Apr 2015 17:03:06 +0000]
drivers: thermal: enable reading sensors_active

Enable reading of the sensors_active attribute from user space to
help diagnose cases where the modem temperature readings are
returning an error.

Bug 1619534

Change-Id: I8672feb31a08f0c9d9c4ff6583abc2cbb9d270dc
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/733234
(cherry picked from commit d8f8f464c405db08df05fe9cb5dd773759798e03)
Reviewed-on: http://git-master/r/732342
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>

4 years agousb: gadget: xudc: Fix compiling warnings.
Hui Fu [Wed, 6 May 2015 22:00:02 +0000]
usb: gadget: xudc: Fix compiling warnings.

Enable -Werror option, and fixed all the compiling errors.

Bug 1454125

Change-Id: I5306e8f6f7046f423755d95ee9ac02bb37a067bb
Signed-off-by: Hui Fu <hfu@nvidia.com>
Reviewed-on: http://git-master/r/739802
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agoARM: mm: dma-mapping: limit iova alignment
Sri Krishna chowdary [Mon, 11 May 2015 09:28:38 +0000]
ARM: mm: dma-mapping: limit iova alignment

iova space is prone to early exhaustion if the default alignment
rule is followed as alignment is of order of mapping size. This patch
tries to restrict arbitrarily large alignments by considering mapping's
alignment as the maximum.

bug 1483482

Change-Id: Id6ee1d8280ba934325bbfd6db733d24a68d05443
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/741186
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agoARM: dt: tegra: cleanup alignment in address-space-prop
Sri Krishna chowdary [Mon, 11 May 2015 09:40:56 +0000]
ARM: dt: tegra: cleanup alignment in address-space-prop

{max}alignment within address space property is going to be used
currently by only GPU as the iova space is getting exhausted easily.
Rest devices can work fine.

Bug 1483482

Change-Id: I1740c2937b5d0be124b67561441a9aefeb032745
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/741185
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agogpu: nvgpu: fix channel leak with immediate close
Deepak Nibade [Fri, 15 May 2015 12:29:59 +0000]
gpu: nvgpu: fix channel leak with immediate close

If a GPU channel is closed immediately after opening without
performing any operation on it, we leak that channel

e.g. below command leaks a channel
echo > /dev/nvhost-gpu

Fix this leak by releasing the channel before returning

Change-Id: I2598e3cabec6996cb1cf8066a1e6d7d5864ae02b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/743235
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agoRevert "gpu: nvgpu: Disable channel when updating SMPC WAR"
Terje Bergstrom [Mon, 18 May 2015 15:36:05 +0000]
Revert "gpu: nvgpu: Disable channel when updating SMPC WAR"

This reverts commit 6cabe69b7b9e5767ae0305961cfba4f72f029807.

Change-Id: I00bfb83038e659a3caaf8a5549039d025417cd1c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/743858

4 years agogpu: nvgpu: Disable channel when updating SMPC WAR
Terje Bergstrom [Mon, 11 May 2015 19:13:05 +0000]
gpu: nvgpu: Disable channel when updating SMPC WAR

Change-Id: I9b6d8e902c894e4ae0d8103bc56cb20f755b2065
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/741322

4 years agommu_notifier: call mmu_notifier_invalidate_range() from VMM
Joerg Roedel [Thu, 13 Nov 2014 02:46:09 +0000]
mmu_notifier: call mmu_notifier_invalidate_range() from VMM

Add calls to the new mmu_notifier_invalidate_range() function to all
places in the VMM that need it.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Reviewed-by: Andrea Arcangeli <aarcange@redhat.com>
Reviewed-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Rik van Riel <riel@redhat.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Johannes Weiner <jweiner@redhat.com>
Cc: Jay Cornwall <Jay.Cornwall@amd.com>
Cc: Oded Gabbay <Oded.Gabbay@amd.com>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
(cherry picked from commit 34ee645e83b60ae3d5955f70ab9ab9a159136673)

Conflicts:
mm/huge_memory.c
mm/migrate.c

Bug 200074285

Change-Id: I9d8a923d744f043c77e2710c315b605def64cfa6
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/678256
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agommu_notifier: add the callback for mmu_notifier_invalidate_range()
Joerg Roedel [Thu, 13 Nov 2014 02:46:09 +0000]
mmu_notifier: add the callback for mmu_notifier_invalidate_range()

Now that the mmu_notifier_invalidate_range() calls are in place, add the
callback to allow subsystems to register against it.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Reviewed-by: Andrea Arcangeli <aarcange@redhat.com>
Reviewed-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Rik van Riel <riel@redhat.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Johannes Weiner <jweiner@redhat.com>
Cc: Jay Cornwall <Jay.Cornwall@amd.com>
Cc: Oded Gabbay <Oded.Gabbay@amd.com>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
(cherry picked from commit 0f0a327fa12cd55de5e7f8c05a70ac3d047f405e)
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>

Conflicts:
include/linux/mmu_notifier.h

Bug 200074285

Change-Id: Id559a6594db651ab986c56e8ea255d024d5f4478
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/679844
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agoarm: tegra124: support for PSCIv0.2
Varun Wadekar [Wed, 8 Apr 2015 12:25:15 +0000]
arm: tegra124: support for PSCIv0.2

Enable "arm,psci-0.2" in the base dtsi file to switch over to the latest
kernel driver. The secure monitor running on T124 now implements the
PSCI spec, so let the monitor take care of PM functions.

To enter LP0, the monitor needs the IRAM vector address which is passed
using a new SMC during bootup.

Bug 1626796

Change-Id: I7261f740d275ccf8cb5723e7ac711d486c2edeb4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/709757
GVS: Gerrit_Virtual_Submit

4 years agoarm64: jetson-e: Enable mass storage gadget driver
Preetham Chandru R [Wed, 13 May 2015 11:51:07 +0000]
arm64: jetson-e: Enable mass storage gadget driver

Bug 200089451

Change-Id: Ib0ef94a344cdb4c4b1c839c71218d9b877495a45
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/742181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

4 years agoata: ahci: update L2P fifo depth
Preetham Chandru R [Fri, 8 May 2015 06:32:49 +0000]
ata: ahci: update L2P fifo depth

This change updates L2P fifo depth to the one specified by DT, if any or
it uses the recommended value as specified in the bug 1592893 for t210 and
bug 1368635 for t124

Bug 1368635
Bug 1592893

Change-Id: I77db7969a98f0963c3896b16d517417189ed4edc
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/740528
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

4 years agovideo: tegra: host: make get_aperture() public API
Deepak Nibade [Wed, 6 May 2015 15:25:35 +0000]
video: tegra: host: make get_aperture() public API

Make get_aperture() as public API by declaring it in bus_client.h

Also, add one more parameter to it which specifies index of
the aperture to be returned

Bug 1611482

Change-Id: I88877fc9a7c5660202d68981beaa5d680ddc0bba
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/741242
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>

4 years agovideo: tegra: host: define and use nvhost_device_get_resources()
Deepak Nibade [Tue, 5 May 2015 13:27:17 +0000]
video: tegra: host: define and use nvhost_device_get_resources()

Define new generic API nvhost_device_get_resources() and use it for
clients (in nvhost_client_device_get_resources()) and also
for Host1x

Bug 1611482

Change-Id: Ida0548dd0779c8625da3c730ef0f59474dd3f3a1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/741241
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Tested-by: Arto Merilainen <amerilainen@nvidia.com>

4 years agoRevert "Kconfig: fix TEGRA_USB_SHARED_PAD dependency"
Bharat Nihalani [Mon, 18 May 2015 04:44:04 +0000]
Revert "Kconfig: fix TEGRA_USB_SHARED_PAD dependency"

This reverts commit 1278f95982a143974317d7141a0dd981327f9a6e
since it causes build break.

Original bug 200084946
Bug 200105726

Change-Id: Ia0a7efd0535be4c972d787f563616b0876a4835f
Signed-off-by: Bharat Nihalani: <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/743594

4 years agoARM64: dt: odin: add dp dt file
Alvin Park [Fri, 8 May 2015 04:54:28 +0000]
ARM64: dt: odin: add dp dt file

include display port dt file and configure
'nvidia,sor1-output-type' as 'dp'.
And removed hdmi dt file.

Bug 200096610

Change-Id: I9dae488eaa25ded6d3b4633de8d9d89dee8a94d8
Signed-off-by: Alvin Park <apark@nvidia.com>
Reviewed-on: http://git-master/r/740464
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agopcie: host: tegra: program prod settings from DT
Vidya Sagar [Thu, 30 Apr 2015 12:15:37 +0000]
pcie: host: tegra: program prod settings from DT

fetches productions settings from DT of respective chip
instead of hardcoded values

Bug 200090097

Change-Id: I553a0f09f3084b442fd902dc298cc2d1cedd56fe
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/737796
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

4 years agoarm64: tegra: support pcie prod for T210
Vidya Sagar [Thu, 30 Apr 2015 12:14:51 +0000]
arm64: tegra: support pcie prod for T210

support production settings through DT for pcie
in T210 chip

Bug 200090097

Change-Id: I942cf0d17793952cfd335faa06b8e8679830fe74
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/737795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

4 years agoplatform: tegra: change scope of function
Prashant Gaikwad [Wed, 13 May 2015 10:41:01 +0000]
platform: tegra: change scope of function

tegra_bpmp_pasr_mask is not being used outside this file,
make it static. Include header where tegra21_pasr_init
is declared.

Fixed following coverity warnings:
- warning: symbol 'tegra_bpmp_pasr_mask' was not declared. Should it be static?
- warning: symbol 'tegra21_pasr_init' was not declared. Should it be static?

Bug 200067946

Change-Id: I222addeb787aacc98403b5969fec7ef488e81a2d
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/742150
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

4 years agovideo: tegra: host: fix coverity issue
Shridhar Rasal [Fri, 8 May 2015 10:52:03 +0000]
video: tegra: host: fix coverity issue

Fix coverity issue "Dereference before null check"
coverity id : 30106

Bug 1416640

Change-Id: I664c32797be1f8627750cc5ce76d0e3e93da377f
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/740630

4 years agoclock: tegra21: Assign clock IDs for XUSB
Hoang Pham [Fri, 15 May 2015 19:56:20 +0000]
clock: tegra21: Assign clock IDs for XUSB

Assign Tegra21 clock IDs for XUSB_HOST_SRC, XUSB_FALCON_SRC,
XUSB_FS_SRC, XUSB_SS_SRC, XUSB_DEV_SRC, XUSB_SSP_SRC,
XUSB.EMC, XUSB_SS_DIV2, XUSB_HS_SRC

Bug 1608456

Change-Id: If40de67fd20910421d3e7e5005331b86d4e44521
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/742898
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoarm64: tegra: support pcie prod for T132
Vidya Sagar [Thu, 30 Apr 2015 12:13:41 +0000]
arm64: tegra: support pcie prod for T132

support production settings through DT for pcie
in T132 chip

Bug 200090097

Change-Id: Ic25aa87cc2533ca274e89fd4adab81fcae98d813
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/737794
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Fu <danifu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

4 years agoarm: tegra: support pcie prod for T124
Vidya Sagar [Thu, 30 Apr 2015 12:11:38 +0000]
arm: tegra: support pcie prod for T124

support production settings through DT for pcie
in T124 chip

Bug 200090097

Change-Id: Ie02083b90f83eeaf0dcc8b0ad2ebd78576d3a538
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/737793
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Daniel Fu <danifu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

4 years agotegra: dc: remove extra dc unlock call in nvsd
Mitch Luban [Fri, 8 May 2015 00:30:07 +0000]
tegra: dc: remove extra dc unlock call in nvsd

Bug xxx

Change-Id: I22c12073367400433801c36a0f5b7da184670808
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/740365
Tested-by: Anshuman Kar <anshumank@nvidia.com>
Reviewed-by: Anshuman Kar <anshumank@nvidia.com>
GVS: Gerrit_Virtual_Submit

4 years agopower: tegra21: Hot reset GPU MC client after railgate
Seshendra Gadagottu [Tue, 5 May 2015 17:42:35 +0000]
power: tegra21: Hot reset GPU MC client after railgate

Execute complete GPU MC hot reset sequence as part of rail-ungate.

Bug 200096226

Change-Id: Ia9a92d17423eb03f1875844edfd222000668a122
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/739402
(cherry picked from commit dea8eb9754170e2d8a3dde562c307920b02b7a69)
Reviewed-on: http://git-master/r/740733
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agoKconfig: fix TEGRA_USB_SHARED_PAD dependency
JC Kuo [Thu, 5 Mar 2015 08:05:10 +0000]
Kconfig: fix TEGRA_USB_SHARED_PAD dependency

tegra_usb_pad_ctrl driver supports NVIDIA Tegra210 and former
chips. For Tegra186 and later chips, there will be pinctrl-*
driver to take care of XUSB PADCTL and UPHY Lane/PLL programming.

bug 200084946

Change-Id: I5a289c75ec72419973bcd5967d856ad84cb03f9d
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/714162
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agoarm: tegra: hawkeye: extend delays in display power-on sequence
Daniel Solomon [Fri, 10 Apr 2015 21:52:39 +0000]
arm: tegra: hawkeye: extend delays in display power-on sequence

The VSN rail takes several ms to ramp up.
This, together with variable SW latency, causes the reset
pin to be enabled prematurely on some power-on attempts.

Bug 1630935

Change-Id: I8cec02dcac5ea59ffb42e419a4acfd3bc8a99650
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/730432
(cherry picked from commit a870b50d5b5781f18c44c51e62542b9b23f52c22)
Reviewed-on: http://git-master/r/741036
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agoarm: tegra: hawkeye: update panel timings
Daniel Solomon [Tue, 7 Apr 2015 20:57:01 +0000]
arm: tegra: hawkeye: update panel timings

The DSI block requires Htotal to be evenly
divisible across all data lanes in ganged mode.
The panel vendor provided an updated
set of panel timings that satisfies this
requirement.

Bug 1619492

Change-Id: I60ea7d739727eeca9baa5987388aaf6c24248842
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/728760
(cherry picked from commit 1cc89eea5f1d4be79d2c031c8d460525797c8a89)
Reviewed-on: http://git-master/r/741035
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agoarm: tegra: eDP vs DP
Shu Zhong [Fri, 10 Apr 2015 20:01:59 +0000]
arm: tegra: eDP vs DP

Added new TEGRA_DC_EXT_EDP type so that hwcomposer
can distinguish between internal and external
dp panels. TEGRA_DC_EXT_EDP is set based on
the 'nvidia,is_ext_dp_panel' prop.

Bug 200041308

Change-Id: Ie805d7eae6edd20542c81a16a279e1686309a047
Signed-off-by: Shu Zhong <shuz@nvidia.com>
Reviewed-on: http://git-master/r/731585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agovideo: tegra: hdmi: Log scdc reconfiguration
Animesh Kishore [Tue, 14 Apr 2015 14:47:08 +0000]
video: tegra: hdmi: Log scdc reconfiguration

This patch adds a debug print when scdc reconfiguration is triggered.
Not expected to happen often, but this is to understand how often
it occurs.

Bug 200066983

Change-Id: Ia01a4fb0931998b9e7af83391fe45989b9dd8418
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Nitish <nrajguru@nvidia.com>
Reviewed-on: http://git-master/r/742162
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agovideo: tegra: fb: Fix vmode 420 bitmap
Animesh Kishore [Tue, 21 Apr 2015 13:37:33 +0000]
video: tegra: fb: Fix vmode 420 bitmap

FB_VMODE_420_ONLY is for userspace notification only.
For kernel use FB_VMODE_420 bit.

Bug 1626827

Change-Id: I3c4f4f3c8d483e9bbef24afa54b371abd9aad9ec
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Nitish <nrajguru@nvidia.com>
Reviewed-on: http://git-master/r/738455
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agovideo: tegra: hdmi: Fix aspect ratio
Animesh Kishore [Thu, 23 Apr 2015 10:47:49 +0000]
video: tegra: hdmi: Fix aspect ratio

Fixing aspect ratio selection logic during
VIC identification.

Bug 2000098530

Change-Id: Ied836a3ed6e6f5feecd1e4a929424af4bc303f54
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Nitish <nrajguru@nvidia.com>
Reviewed-on: http://git-master/r/742155
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agoclocks: tegra21: Don't use SDMMC4 fractional dividers
Alex Frid [Thu, 14 May 2015 03:09:27 +0000]
clocks: tegra21: Don't use SDMMC4 fractional dividers

Bug 1558421

Change-Id: Iea208cb098f4ffbcefd741e0d5dbb3c806a1f4bd
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/742487
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoclock: tegra: Fix sparse warning
Alex Frid [Wed, 13 May 2015 04:40:01 +0000]
clock: tegra: Fix sparse warning

Bug 200067946

Change-Id: I1aa85ecd18d6181010be8b675a7e6902c452b83a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/742027
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoclock: tegra21: Remove usb3 users clocks
Hoang Pham [Fri, 15 May 2015 17:17:18 +0000]
clock: tegra21: Remove usb3 users clocks

Remove usb3.sclk and usb3.emc clocks as
usb3 is no longer existing for T210

Change-Id: I1aa35bea95f16191ab05043303b02c0417226731
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/742269
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoarm: mm: Add v7_clean_kern_cache_louis
Krishna Reddy [Mon, 13 Apr 2015 23:12:33 +0000]
arm: mm: Add v7_clean_kern_cache_louis

This allows perform L1 cache clean alone.

Bug 200077334

Change-Id: I7a6106ed53755df33e09e3fa32a9e2524eb98649
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/740215

4 years agoMerge "Merge branch 'android-3.10' into 'dev-kernel-3.10'" into dev-kernel-3.10
Bharat Nihalani [Fri, 15 May 2015 17:08:00 +0000]
Merge "Merge branch 'android-3.10' into 'dev-kernel-3.10'" into dev-kernel-3.10

4 years agoclock: tegra21: Assign clock IDs to SBUS
Hoang Pham [Tue, 12 May 2015 00:44:24 +0000]
clock: tegra21: Assign clock IDs to SBUS

Assign Tegra21 clock IDs to SBUS and bus users

Bug 1608456

Change-Id: Iffcd46d2ee1c3bd26d41466dba1cbdd7ae58e4b7
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/741447
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agogpu: nvgpu: add zbc support to vgpu
Richard Zhao [Thu, 16 Apr 2015 18:57:10 +0000]
gpu: nvgpu: add zbc support to vgpu

For both adding and querying zbc entry, added callbacks in gr ops.
Native gpu driver (gk20a) and vgpu will both hook there. For vgpu, it
will add or query zbc entry from RM server.

Bug 1558561

Change-Id: If8a4850ecfbff41d8592664f5f93ad8c25f6fbce
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/732775
(cherry picked from commit a3787cf971128904c2712338087685b02673065d)
Reviewed-on: http://git-master/r/737880
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agoarm64: tegra210: Align gm20b entry with upstream
Terje Bergstrom [Fri, 8 May 2015 22:45:50 +0000]
arm64: tegra210: Align gm20b entry with upstream

Add upstream nvidia,gm20b compatibility, and upstream style interrupt
references.

Change-Id: I2123221182be6646df8a88c2d2625278c659167a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/740856

4 years agoarm64: tegra132: Align gk20a entry with upstream
Terje Bergstrom [Fri, 8 May 2015 20:25:48 +0000]
arm64: tegra132: Align gk20a entry with upstream

Add upstream nvidia,gk20a compatibility, and upstream style interrupt
references.

Change-Id: I480617879953c2f5b014bc939d6494943af6c8f0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/740771
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>

4 years agoarm: dts: Align gk20a entry with upstream
Terje Bergstrom [Fri, 8 May 2015 20:25:17 +0000]
arm: dts: Align gk20a entry with upstream

Add upstream nvidia,gk20a compatibility, and upstream style interrupt
and clock references.

Change-Id: Ibf0e9dc59ea31eec669461b7cbf9c0ade240ff0b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/740770
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>

4 years agoclock: Assign clock IDs for VI
Hoang Pham [Mon, 11 May 2015 18:41:44 +0000]
clock: Assign clock IDs for VI

Assign Tegra21 clock IDs for VI, FUSE_BURN,
SDMMC1_DDR, SDMMC3_DDR, SDMMC2_DDR, SDMMC4_DDR

Bug 1608456

Change-Id: I6302edde7738336eaa0fef6c1c4496b832b1515d
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/741315
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

4 years agoi2c: tegra: vi: Implement pm runtime back-end
Arto Merilainen [Mon, 11 May 2015 18:18:54 +0000]
i2c: tegra: vi: Implement pm runtime back-end

Currently i2c-tegra-vi driver does not implement the back-end for
pm runtime but it uses it only for tracking when the device is
active. This patch adds the proper pm_runtime back-end for
vi-i2c.

Change-Id: Ic572ba35ee0e41372fdc16676df29f8e0cf97e85
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/741309
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>

4 years agoplatform: tegra: powergate: Fix race in refcount
Arto Merilainen [Wed, 13 May 2015 08:04:18 +0000]
platform: tegra: powergate: Fix race in refcount

Currently power partition refcount variable is a single integer
without any protection. This causes various possible issues:
- the refcount variable in itself may get outdated when if two
threads are making increments/decrements at the same time
- if one thread is requesting a reference while another is dropping
it, power-up may get canceled.

Bug 1634885

Change-Id: I2a35140d90f4ab24a83b8e2ca6cc37d43788956a
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/742203
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>

4 years agoiommu/tegra: of: allow empty alignment property
Sri Krishna chowdary [Thu, 14 May 2015 07:04:31 +0000]
iommu/tegra: of: allow empty alignment property

It is okay for iommu address space node not to specify an alignment.
alignment is needed only if the address space wants to restrict the
maximum alignment. So, leave it as optional.

Bug 1483482

Change-Id: I634fbbcbb7425cf2bcfc9fa71857400935ad826d
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/742564
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agoRevert "gpu: nvgpu: New allocator for VA space"
Terje Bergstrom [Tue, 12 May 2015 02:26:56 +0000]
Revert "gpu: nvgpu: New allocator for VA space"

This reverts commit 6ab2e0c49cb79ca68d2f83f1d4610783d2eaa79b.

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: Ie9f6c6b09624b1c4721680105bf1f169c622ebe2
Reviewed-on: http://git-master/r/741467
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>

4 years agovideo: tegra: nvmap: modify reserved memory init
Sri Krishna chowdary [Fri, 8 May 2015 09:32:19 +0000]
video: tegra: nvmap: modify reserved memory init

nvmap_co_device_init needs to return value as the definition
is changed in upstream. Without this change, the build can break
when upstream modification enters the tree.

Also, temporarily disable compiler warnings till upstream change is merged.

Bug 200027296

Change-Id: I615e3b30a52caedc95750e05de5ab20e516fb835
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/740576
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agomailbox: Add NVIDIA Tegra XUSB mailbox driver
JC Kuo [Thu, 15 Jan 2015 09:37:17 +0000]
mailbox: Add NVIDIA Tegra XUSB mailbox driver

The Tegra xHCI controller's firmware communicates requests to the host
processor through a mailbox interface.  While there is only a single
physical channel, messages sent by the controller can be divided
into two groups: those intended for the PHY driver and those intended
for the host-controller driver.  The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested.  All incoming messages are sent to both virtual channels.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

bug 200084946

Change-Id: I116e4a3944afe7f137a7c62630640859bf840987
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/736744
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agomailbox: fix early completion blocking mbox_send
JC Kuo [Fri, 24 Apr 2015 09:26:28 +0000]
mailbox: fix early completion blocking mbox_send

Blocking mode mbox_send_message() has to wait till transmission
over chan completes or timeout. However, if mbox->ops->send_data()
returns -EBUSY, mbox_send_message() will return immediately with 0
which indicates success.

This commit fixes the issue by:
1. in poll_txdone(), re-submitting the message to chan if there is
no active message but queue of the chan is not empty,
2. in mbox_send_message(), wait for completion if tx_block is set.

bug 200084946

Change-Id: Ib1448d4426cb9aa24d81a6bb2a816a28c2c8c066
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/736743
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agomailbox: error handling in mbox_request_channel()
JC Kuo [Thu, 15 Jan 2015 09:29:22 +0000]
mailbox: error handling in mbox_request_channel()

From: Benson Leung <bleung@chromium.org>

mbox_request_channel() currently returns EBUSY in the event the controller
is not present or if of_xlate() fails, but in neither case is EBUSY really
appropriate.  Return EPROBE_DEFER if the controller is not yet present
and change of_xlate() to return an ERR_PTR instead of NULL so that the
error can be propagated back to the caller of mbox_request_channel().

Signed-off-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>

bug 200084946

Change-Id: I00cdb89b5e6dcacc33f5ac7705436b0e906a32b2
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/736742
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agomailbox: Introduce framework for mailbox
Jassi Brar [Thu, 12 Jun 2014 17:01:19 +0000]
mailbox: Introduce framework for mailbox

Introduce common framework for client/protocol drivers and
controller drivers of Inter-Processor-Communication (IPC).

Client driver developers should have a look at
 include/linux/mailbox_client.h to understand the part of
the API exposed to client drivers.
Similarly controller driver developers should have a look
at include/linux/mailbox_controller.h

Reviewed-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
(cherry picked from commit 2b6d83e2b8b7de82331a6a1dcd64b51020a6031c)

bug 200084946

Change-Id: Ifcdbbb9fcee79198a405b889948c9df12d2c15ce
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/736741
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

4 years agoplatform: tegra: MC: Add new LA API
Alex Waterman [Thu, 30 Apr 2015 19:22:20 +0000]
platform: tegra: MC: Add new LA API

Add a new latency allowance API to check if a possible LA value exists
for a given frequency/BW combination. The other API for this always
programs the LA if it turns out there is a possible LA value. This new
API is just a check and as such does not program the computed LA.

Bug 1637311

Change-Id: Ie71762f50d093d6482c7c088615dd198cf65dc84
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/737900
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

4 years agoclock: tegra21: Assign clock IDs to EMC users
Alex Frid [Sat, 9 May 2015 05:13:06 +0000]
clock: tegra21: Assign clock IDs to EMC users

Assigned clock IDs to EMC shared bus users.

Bug 1608456

Change-Id: I3cd7eb92be2cfeec7f343b6cb7e9f9503038ce6e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/740948
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoclock: tegra21: Assign clock IDs to bridges users
Alex Frid [Sat, 9 May 2015 04:00:56 +0000]
clock: tegra21: Assign clock IDs to bridges users

Assigned clock IDs to users of shared buses for bridges: HOST1x,
MSELECT, and APE

Bug 1608456

Change-Id: Ie4495c7b65729fd71c98494895af6c379bcc6f60
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/740947
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoclock: tegra21: Assign clock IDs to CXBUS/GBUS
Alex Frid [Thu, 7 May 2015 05:32:04 +0000]
clock: tegra21: Assign clock IDs to CXBUS/GBUS

Assigned clock IDs to Tegra21 shared buses: CBUS, C2BUS, C3BUS, GBUS
and bus users.

Bug 1608456

Change-Id: I0adc7487a682233ffb822d47e5571d9d08d3ef8c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/740946
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agoARM64: tegra21: Add DT overrides for VCM31
Alex Frid [Fri, 17 Apr 2015 20:46:11 +0000]
ARM64: tegra21: Add DT overrides for VCM31

Specified DT overrides for T210 VCM31 platforms.

Bug 200098066
Bug 200096120
Bug 1625003

Change-Id: I40bcb9ae3297770bb1da2a1ad95e61df6cc170eb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/732896
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agodvfs: tegra21: Add support for VCM31 SKU
Alex Frid [Fri, 8 May 2015 02:20:36 +0000]
dvfs: tegra21: Add support for VCM31 SKU

Added support for soft VCM31 SKU chosen in DT to allow re-mapping of
SKU 0x17 to SKU 0x57 speedo IDs/DVFS tables.

Bug 200098066
Bug 200096120
Bug 1625003

Change-Id: Ifd5aa65244dbba1af8376a10aca1846dc631bf13
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/740775
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agosysedp: DT: changes consumer name for dsi display
Sam Payne [Mon, 4 May 2015 20:43:33 +0000]
sysedp: DT: changes consumer name for dsi display

display_0 -> dsi_0
display_1 -> dsi_1

bug 200095419

Change-Id: I142726adf1976fc3f55a5fcb2edfe1115298fed5
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/738641
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>

4 years agotegra: disp: dc: move sysedp consumer to output
Sam Payne [Mon, 4 May 2015 18:33:06 +0000]
tegra: disp: dc: move sysedp consumer to output

sysedp consumer now associated with the
output, not the display controller driving
the output.

bug 200095419

Change-Id: I058f4575a59ef993ff7d615b0381e8a489a9b28c
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/738601
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: John Moser <jmoser@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

4 years agovideo: tegra: dc: calc ref_to_sync for HDMI 2.0
Jon Mayo [Wed, 8 Oct 2014 17:00:01 +0000]
video: tegra: dc: calc ref_to_sync for HDMI 2.0

Use calculated v/h ref_to_sync values for SOR-based HDMI, and not the
fixed values used on the previous HDMI IP.

This patch is important because IMP assumes the maximum spool up time is
available. Without this adjustment only the minimum spool up time is
available.

Bug 1631663

Change-Id: Ie53d9d8d4d06bc3e46ad58417ecef1de06bf7c9f
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/554713
Reviewed-by: Automatic_Commit_Validation_User

4 years agoclock: tegra21: Assign clock IDs for NVDEC
Hoang Pham [Mon, 4 May 2015 20:24:45 +0000]
clock: tegra21: Assign clock IDs for NVDEC

Assign Tegra21 clock IDs for NVDEC, MSENC, NVJPG, VIC,
SE, TSEC, TSECB, ISPA, and ISPB

Bug 1608456

Change-Id: I07f5b5d50e3939d65ac4ea1d6fdb7fb13847c765
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/734427
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 years agogpu: nvgpu: New allocator for VA space
Alex Waterman [Wed, 18 Mar 2015 20:33:09 +0000]
gpu: nvgpu: New allocator for VA space

Implement a new buddy allocation scheme for the GPU's VA space.
The bitmap allocator was using too much memory and is not a scaleable
solution as the GPU's address space keeps getting bigger. The buddy
allocation scheme is much more memory efficient when the majority
of the address space is not allocated.

The buddy allocator is not constrained by the notion of a split
address space. The bitmap allocator could only manage either small
pages or large pages but not both at the same time. Thus the bottom
of the address space was for small pages, the top for large pages.
Although, that split is not removed quite yet, the new allocator
enables that to happen.

The buddy allocator is also very scalable. It manages the relatively
small comptag space to the enormous GPU VA space and everything in
between. This is important since the GPU has lots of different sized
spaces that need managing.

Currently there are certain limitations. For one the allocator does
not handle the fixed allocations from CUDA very well. It can do so
but with certain caveats. The PTE page size is always set to small.
This means the BA may place other small page allocations in the
buddies around the fixed allocation. It does this to avoid having
large and small page allocations in the same PDE.

Change-Id: I501cd15af03611536490137331d43761c402c7f9
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/680886
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 years agoARM64: dts: tegra210: add syncpoint range for host1x
Deepak Nibade [Tue, 17 Mar 2015 13:33:07 +0000]
ARM64: dts: tegra210: add syncpoint range for host1x

Speficy number of syncpoints supported in h/w, base id and number
of syncpoins supported in s/w
Also add the documentation for the bindings

Bug 1611482

Change-Id: Iddbc4d91a4c64dbb84886a40981c934aca865c8d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/719041
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>

4 years agovideo: tegra: host: read syncpoint range from DT
Deepak Nibade [Wed, 4 Mar 2015 10:06:15 +0000]
video: tegra: host: read syncpoint range from DT

Read syncpoint range from Device Trees using below properties :

Get number of syncpoints supported in h/w from "nvidia,nb-hw-pts"
Get s/w syncpoint base from "nvidia,pts-base"
Get number of syncpoints supported in s/w from "nvidia,nb-pts"

Return error if nb_pts > nb_hw_pts

Calculate syncpoint limit as :
pts_limit = pts_base + nb_pts

Bug 1611482

Change-Id: Iddf610c9f30847fc80189c712eac52506e062447
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/715126
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

4 years agoarm64: dts: enable watchdog for jetson-e
Naveen Kumar S [Mon, 4 May 2015 07:38:40 +0000]
arm64: dts: enable watchdog for jetson-e

Watchdog needs to be enabled for jetson-e. Enabled both
Tegra and PMIC watchdog.

bug 200089439

Change-Id: Ia4e06b387a7d9173bde6ded62dab009e14dec490
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/731756
(cherry picked from commit fa47fc312c5e78c8bd161b52dcd79b7462a74265)
Reviewed-on: http://git-master/r/739987
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

4 years agoMerge branch 'android-3.10' into 'dev-kernel-3.10'
Sumit Singh [Mon, 11 May 2015 09:17:22 +0000]
Merge branch 'android-3.10' into 'dev-kernel-3.10'

Conflicts:
drivers/misc/Kconfig
drivers/misc/Makefile
drivers/staging/android/Kconfig
drivers/staging/android/alarm-dev.c
drivers/staging/android/logger.c
drivers/staging/android/uapi/android_alarm.h
drivers/usb/gadget/android.c
lib/lz4/lz4_compress.c
lib/lz4/lz4_decompress.c
lib/lz4/lz4hc_compress.c

Bug 200091315

Change-Id: I8e69ba55d2fa8e4f955b2838bb211a8481167670
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>

4 years agovideo: tegra: nvmap: Add all_allocations debugfs
Sri Krishna chowdary [Fri, 8 May 2015 04:19:18 +0000]
video: tegra: nvmap: Add all_allocations debugfs

all_allocations debugfs dumps all outstanding allocations.
This will aid in tracking memory that is no longer visible under
clients.

usage: cat /d/nvmap/<heap>/all_allocations

output:
    BASE        SIZE USERFLAGS   REFS  KMAPS  UMAPS  SHARE      UID
       0        512K   7010001      3      0      1      1 ffffffc0ed87c8c0
       0        128K   7010001      2      0      0      1 ffffffc0ed87cbc0
       0        128K   7010001      2      0      0      1 ffffffc0ed87cec0
       0        512K   7010001      3      0      1      1 ffffffc0eded89c0
       0        128K   7010001      2      0      0      1 ffffffc0eded8cc0
       0        128K   7010001      2      0      0      1 ffffffc0edfd4280
       0        128K   7010001      2      0      0      1 ffffffc0edfd4580

Bug 1501754

Change-Id: Iacff4958f44c4f078d259a98a653786987f80909
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/739203
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

4 years agotegra: adsp: actmon: tune actmon for power optimization
Viraj Karandikar [Thu, 23 Apr 2015 04:23:01 +0000]
tegra: adsp: actmon: tune actmon for power optimization

Increase sampling interval to 20ms to get more stable
activity count and reduce CPU wakeups.

Reduce boost_freq_step to avoid big change in frequency
at steady load.

Reduce "boost_up_coef" to double the boost freq in case of
boost interrupt. Earlier it's incrementing by 16 times.
Which is causing adsp freq reaching max after first boost.

Increase boost_down_threshold to obtain lower steady
state frequency.

Change up and down water mark window to avoid frequent
frequency fluctuations.

Increase BOOST_COUNT to keep ADSP at higher clock for
longer duration till load settles. This avoids sudden
drop in ADSP clock and glitches during HP->SPK switch.

Bug 200082064

Change-Id: I2e18d834e3923912939aefd64c48926436f2ac21
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/735548
(cherry picked from commit feb43cc2da1bb28d7ce602b368a3dcd7e1cfd6cd)
Reviewed-on: http://git-master/r/740605
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>

4 years agotegra-alt: adsp: ignore app load failure during init
Viraj Karandikar [Tue, 28 Apr 2015 10:49:43 +0000]
tegra-alt: adsp: ignore app load failure during init

Error in app loading skips loading of other apps and
disables further use of ADSP. This prevents use of
other successfully loaded apps which could have worked
fine.

Avoid skipping of remaining apps when loading fails for
one app. Failed app will anyway throw error whenever
user attempts to use it. This also allows adding entries
for optional apps.

Check if app was loaded when calling app_init().

Bug 200100724

Change-Id: I70a818df6fdeb54f94700e6c5f10a1dd1b269b72
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/736736
(cherry picked from commit 5387c9989420525b6ce7eaafd2ddb913f496740d)
Reviewed-on: http://git-master/r/740608
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>