6 years agovideo: tegra: dc: Fix clk enable/disable
Animesh Kishore [Thu, 27 Dec 2012 08:43:59 +0000]
video: tegra: dc: Fix clk enable/disable

-disable pll when display off
-balance extra clk reference

Bug 1209013

Change-Id: Ib810281ae692f6443171f4542ba71abb1d62e1d4
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/174432
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agokernel: Fix build breaks
Prashant Malani [Fri, 21 Dec 2012 03:10:29 +0000]
kernel: Fix build breaks

Fix build breaks caused by :-
- un-defined macro
- unused variable
- missing header include

Change-Id: I8497230dc9f1cd8cb4119e6a800c0a63c4a445f1
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/174328
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: tegra: fb: fix condition for screen panning
Rakesh Iyer [Fri, 21 Dec 2012 21:18:53 +0000]
video: tegra: fb: fix condition for screen panning

Check for screen panning by comparing with previously saved display parameters.

Bug 1046614

Change-Id: I77ab2c9f96711724f4dbc1e506de3b5901df8cc6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/173739
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dc: minimum window size is 1x1
Jon Mayo [Fri, 21 Dec 2012 01:32:05 +0000]
video: tegra: dc: minimum window size is 1x1

Use 1x1 as the minimum window size.

Bug 1193195

Change-Id: I42e13fec82bbc2dc37bde6416088f3ae49b304b7
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/173302
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dsi2edp: Add bridge driver
Animesh Kishore [Thu, 20 Dec 2012 13:28:56 +0000]
video: tegra: dsi2edp: Add bridge driver

Support for Toshiba tc358767 bridge.

Change-Id: I14888eb872f42f2bb68ca80c01381ff28b2abad1
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/173140
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: fbmon: Add hdmi_ext_modedb for 4Kx2K
Jon Mayo [Tue, 11 Dec 2012 23:00:20 +0000]
video: fbmon: Add hdmi_ext_modedb for 4Kx2K

Provide a new mode table to use to calculate Extended resolution (HDMI_VIC)

Bug 1167856

Change-Id: I3e123a9859b1c385fd81fbf60887b682c1c3f6ae
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/170280
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: dc: support HDMI avi format values
Jon Mayo [Tue, 11 Dec 2012 21:02:12 +0000]
video: tegra: dc: support HDMI avi format values

Support all HDMI VIC format values using cea_modes[] list for determining the
the AVI format number.  Stores aspect ratio in fb_videmode and tegra_dc_mode so
that ambiguous modes are resolved.

Bug 1167856
Bug 1173814

Change-Id: Icf66753732076b99dd0ff0163f4a4f6a9f90ae57
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/170279
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: clean up CMU config option
Jon Mayo [Wed, 5 Dec 2012 01:32:49 +0000]
video: tegra: dc: clean up CMU config option

Use CONFIG_TEGRA_DC_CMU to control the support for color management unit.

Change-Id: I6994b9b2a69b31ccf59f943ef40af8798db2cc12
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168799
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agohost: t14x: update syncpt irq number
Prashant Malani [Fri, 21 Dec 2012 06:28:03 +0000]
host: t14x: update syncpt irq number

Make it inline with what is being used on
other chips.
This was causing nvrm_channel to fail.

Change-Id: I77600c67e52c212ed8fe386258a863e65fd13428
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/173542
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: host: Fixup host1x build error
Alex Waterman [Thu, 6 Dec 2012 21:00:32 +0000]
video: tegra: host: Fixup host1x build error

Fixes build error introduced by latest merge. The
hw_host1x03_sync.h was out of date and needed a simple
update.

Change-Id: I2c531e491d140d00272dccdc8ff9f4ee5f403dc2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/169139
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: host: Add gather with opcode insert
Alex Waterman [Wed, 28 Nov 2012 02:46:03 +0000]
video: tegra: host: Add gather with opcode insert

Fix build break resulting from merge:

    commit dce3f8f1d64316c42b89994c8b9ea5a7360f5c79

Bug 1028459

Change-Id: I6335be3580dafc77315692548b60f6432e071b3a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/167043
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dc: fix hdmi build break after merge
Adeel Raza [Fri, 16 Nov 2012 04:11:53 +0000]
video: tegra: dc: fix hdmi build break after merge

Fix hdmi related build break after merge.

Change-Id: Icf8552ee4cb8684d51a489a4ef1a69f8e1dff8a8
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/164276
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: host: use platform bus/driver/device
Mayuresh Kulkarni [Fri, 26 Oct 2012 13:17:24 +0000]
video: tegra: host: use platform bus/driver/device

- this commit replaces the custom nvhost bus/driver/device
with platform bus/driver/device
- this is in preparation to add DT support
- following is the list of notable changes done:

1. chip_ops: The per SoC differences is encapsulated by chip_ops structure.
With nvhost_bus:
- It is hidden in nvhost_bus and exposed APIs to rest of the code.
These APIs land up in correct implementation for current SoC.
With platform_bus:
- I had to make this global and adjust the API accordingly.

2. nvhost_device
With nvhost_bus:
- The struct nvhost_device encapsulates both Linux device driver parts
as well as tegra specific parts.
With platform_bus:
- I had to move the current nvhost_device as a platform_data
for each platform_device. For this I renamed the struct nvhost_device
to struct nvhost_device_data.
- Also, since nvhost_driver is gone, I had to move all the
function pointers in it to struct nvhost_device_data.

3. Device specific private data: Host1x master device has its own
static data (called nvhost_master) which stores the per SoC
sync-point, IRQ info etc.
With nvhost_bus:
- This was stored as device specific platform_data.
With platform_bus:
- The device specific platform_data is now struct nvhost_device_data
(as mentioned above).
- I need to keep it common for all the devices whose code is
part of host1x directory, so that other parts of code that need per-device
info have a unique interface of platform_get_drvdata.
- As a result, I had to add a void * field in struct nvhost_device_data
which now holds per-device specific data and expose APIs to get/set this data.
- As of now, only host1x master parent device code uses this.

4. Per SoC device names:
With nvhost_bus:
- Per SoC device name is SAME for all the SoCs.
- The correct driver get linked to this device via the concept of id_table.
This id_table allows us to connect multiple devices to single driver code
and pass appropriate function pointer specific to SoC (you can check gr3d.c for details).
With platform_bus:
- The id_table usage of platform_bus is different from above.
- To adhere to its need, I had to append the per-SoC device name
with a version field (so gr3d for t20 became gr3d01, for t30 became gr3d02 etc).
- I adjusted the correct names in _probe of such devices.
Also, I adjusted the node names exposed to user space (/dev/host-gr3d etc)
to be consistent across SoCs.
- But this fails for the sysfs entries created by device registration code
of Linux, since during this time the _probe is not called.
So, device name is still appended with version field.

5. Per SoC device registration function: tegraXXX_register_host1x_devices
is the per SoC specific APIs which is called by board-file to register
the host1x and client devices. Host1x has strict requirements for the
parent->child relations i.e. any client of host1x device should have the
parent set properly BEFORE device registration.
With nvhost_bus:
- Setting of parent was taken care by nvhost_device_register call and other helpers.
With platform_bus:
- It is not possible to change parent till _probe of client device returns
(meaning not much of control in our hand). The device driver core,
takes a mutex lock of parent BEFORE calling _probe to avoid changing parent during _probe.
- So, to set correct parent, I changed the return type of
tegraXXX_register_host1x_devices to return pointer to master host1x parent device.

6. platform_get_drvdata calls:
With nvhost_bus:
- Only host1x master parent calls this.
With platform_bus:
- Almost all the common code ends up calling this.
Fortunately, we had designed the APIs such that they take nvhost_device * as argument.
So changing them to platform_device * is in a way easy.

7. Device list: The debug-fs dump code & module-reg-read-write
functionality rely on having a list of host1x devices registered currently.
With nvhost_bus:
- This is readily available since struct bus_type of Linux holds this list.
Moreover, it provides an iterators to access this list.
With platform_bus:
- Since it holds large number of devices in system, it is inefficient
to use the above iterators. Also, it is difficult to have a common matching
criteria for all the devices who have different platform_data.
- As a result, I had to add a simple list using Linux kernel's list implementation.
It holds the list of devices which have their code within host1x directory
and actually use channels (remember tegra-dc and nvavp are outside
host1x code && do not use physical channels they only need sync-point
and host1x hardware alive when they are alive).
I also had to provide 2 iterators one which is used for
module-reg-read-write and other for debug-fs dump.

8. I changed how tegra-dc and nvavp called the host1x externally exposed APIs
(such APIs end with _ext). In current code, they know little too much of
host1x code internals. I now changed to make them independent of host1x internal
implementation and structure know-how. They now simply send their own
platform_device * to the external visible APIs and these APIs
ensures that the call ends up in correct function call.

bug 1041377

Change-Id: Ia05263b74bf98af88f79e8110a2537ead9eb66e9
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/161923
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agodrivers: tegra: host: update HW headers
Prashant Malani [Thu, 1 Nov 2012 20:27:59 +0000]
drivers: tegra: host: update HW headers

Change-Id: I8bb09f59658db464a3b8a674bb41393bc04c066e
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/160656
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agovideo: tegra: dc: hdmi: Fill tdms_config for T148
Bhanu Chetlapalli [Thu, 25 Oct 2012 19:46:40 +0000]
video: tegra: dc: hdmi: Fill tdms_config for T148

Change-Id: Ib400f32da2c667330e1600a186da3c127171da9d
Signed-off-by: Bhanu Chetlapalli <bchetlapalli@nvidia.com>
Reviewed-on: http://git-master/r/147686
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agodriver: tegra: dc: No shutdown window blanking for simulation
Chao Xu [Wed, 26 Sep 2012 21:28:55 +0000]
driver: tegra: dc: No shutdown window blanking for simulation

To speed up simulation shutdown time.

Change-Id: I418e504b7473cb8258baac3f6bc30ba89e26609b
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/139748
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agovideo: tegra: host: merge fix -- Use common class_ids.
Chao Xu [Fri, 12 Oct 2012 01:23:38 +0000]
video: tegra: host: merge fix -- Use common class_ids.

Change-Id: Ie48b53a4251beff453835f41ef9816b7f7f0a77c
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/143954
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: host: fix num_3d_pixel_pipes for t148
Ken Adams [Tue, 9 Oct 2012 01:21:50 +0000]
video: tegra: host: fix num_3d_pixel_pipes for t148

dolak_sim broken w/o this... not sure this is correct
but it should definitely be tweaked further before checking
in as it will break t114 as well this way.

Change-Id: Icb492e9b29409e0c181da825662b3111df4d2faf
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/142543
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Tested-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: host: fix after merge
Mark Stadler [Thu, 4 Oct 2012 15:43:01 +0000]
video: tegra: host: fix after merge

Remove reference to non-existent symbol (nvhost_scale3d_debug_init)

Change-Id: Ie1bbc4e394c6e9ee325f7c45c9a53542a70d15cb
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-on: http://git-master/r/141674
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Yu-Huan Hsu <yhsu@nvidia.com>

6 years agovideo: tegra: dc: Fix dolak fpga build error
Ravindra Lokhande [Thu, 27 Sep 2012 10:36:01 +0000]
video: tegra: dc: Fix dolak fpga build error

Change-Id: Ia1cacc4a7261982dffe9d73cef1491ac1a80d7ca
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/139344
Reviewed-by: Raghavendra V K <rvk@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: host: add Tegra path to firmware
Ken Adams [Wed, 22 Aug 2012 01:23:43 +0000]
video: tegra: host: add Tegra path to firmware

This change coalesces paths for nvhost devices which request firmware.
And it allows a path to be prefixed to them based upon nvhost's
runtime determintion of the chip/SOC.

Change-Id: Ia5e360d03de655c7f2e315bc074e6f1fa0a4722f
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/125090
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dynamic tsec, msenc firmware name
Ken Adams [Wed, 8 Aug 2012 04:16:53 +0000]
video: tegra: dynamic tsec, msenc firmware name

Allows msenc and tsec choose different versions of the firmware at runtime.
For bug 980258

This is an application of http://git-master/r/116802 to the Tegra14 branch.
The change includes additions to accomodate msenc 3.0 on T148.

Change-Id: I662e186b85979d9c81e8308fb14c61d60fed1086
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/121971
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: host: Support T148 host1x new layout
Terje Bergstrom [Thu, 2 Aug 2012 08:38:57 +0000]
video: tegra: host: Support T148 host1x new layout

Tegra14 host1x has new register layout. Change T148 to use its own
headers, and change parameters to indicate 12 channels and 48
sync points.

Disables actmon in Tegra14 due to acmon code not using the registers
properly.

Bug 1022681

Change-Id: I75c2d831e72755b4d03cb03dc03dfee494ccf130
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/120305
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Parameterize Tegra14 host1x
Terje Bergstrom [Mon, 25 Jun 2012 09:56:22 +0000]
video: tegra: host: Parameterize Tegra14 host1x

Parameterize T148 host1x code, and register the devices in
board file.

Bug 982965

Change-Id: Idc190105aaad03cc912958713f4277a9a8101d99
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/110825
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Tested-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 0bf02e8bb7e13a5b4da360cd000b612f58776668)
(cherry picked from commit 316d9eb2a8e26238bd40e0eea26bd94d6f982eb3)
(cherry picked from commit 7d9371160750db44534072bf1371dfbe715ac97e)
Reviewed-on: http://git-master/r/116277
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: dc: Add t14x DC feature table.
Kevin Huang [Wed, 6 Jun 2012 18:17:27 +0000]
video: tegra: dc: Add t14x DC feature table.

Bug 962353

Change-Id: I08a7f2d5cee6e817b5597206bf007a96f1eded2c
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/106809
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Tested-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 8b705c12b8ac45e24b7c5ed4fc7300616be368ec)
(cherry picked from commit bf86139fff37b1841f6844f97e40d7c6a35fcf2b)
(cherry picked from commit 3df84956ae6898a0e223eec75b11eacbea2f3904)
Reviewed-on: http://git-master/r/116269
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Tegra14 function ptrs to driver
Terje Bergstrom [Wed, 30 May 2012 11:40:03 +0000]
video: tegra: host: Tegra14 function ptrs to driver

Move Tegra14 function pointers from nvhost_device to the driver.

Change-Id: Ic25a974bf757e427e8d1031d55710228e864aac7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105393
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Tested-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit cdd99b4064d2b8b90588e65ba32192873654b93d)
(cherry picked from commit 7962482e434af005b01ac5e31010f1d8c5d18bd9)
(cherry picked from commit 67b9943f807fd9f2d62d13a5c5931780a8d5dc8f)
Reviewed-on: http://git-master/r/116268
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Update function definition
Prashant Malani [Thu, 24 May 2012 18:30:02 +0000]
video: tegra: host: Update function definition

Updates t148_get_nvhost_device function
definition and API. Resolves build break.

Change-Id: Ie01340a059e6fe26d357e9c50755de7159e7696c
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/104555
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit b3aba8cb674ef06575e21719f7bac8f108218974)
(cherry picked from commit 2ce062c2c311eaf47f4883bddde8eed8f1f9b5d5)
(cherry picked from commit fd6bdf5422c4dbb3fcf9984800fba7fe27b3920b)
Reviewed-on: http://git-master/r/116265
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Update function APIs used
Prashant Malani [Thu, 17 May 2012 10:31:55 +0000]
video: tegra: host: Update function APIs used

Updates nvhost init functions to use new API's
Also added case for t148

Change-Id: Ie2989af659ebc8319e0db41fd3efc34a51b50434
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/103071
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit b3790cf17a30b647df74f9e8e4da83239fbc80f8)
(cherry picked from commit 927c2b37cd3075a5046ec9eb7821b843bc2031b4)
(cherry picked from commit d2b09f7ca4cde6dbd9d273a60285f32fd5655d3b)
Reviewed-on: http://git-master/r/116262
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Include header file
Prashant Malani [Fri, 11 May 2012 19:47:33 +0000]
video: tegra: host: Include header file

Includes the nvhost_ioctl.h header file which
was missing and causing build break.

Change-Id: I1ade64434faef7e66190d3d8a6fcebf6d9b195b9
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/102047
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 2b498579c1f2101a305e2498605812ea816333e0)
(cherry picked from commit 61daaa636a569d2db7b28f85445b6616b5034ee9)
(cherry picked from commit fb6aa9d46e43be91067da111552d4143ce80479d)
Reviewed-on: http://git-master/r/116260
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Add Tegra14x initialization
Ken Adams [Thu, 19 Apr 2012 16:21:31 +0000]
video: tegra: host: Add Tegra14x initialization

Change-Id: Ib02a6881190cb178ef2897f3ef3894b5d0062c68
Reviewed-on: http://git-master/r/97060
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Robert Bond <rbond@nvidia.com>
Reviewed-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
(cherry picked from commit 408b95d76a1490889f9bf7b509625ffbaff7f091)
(cherry picked from commit 477a73958ebcb1321de11ecdef542035fff6f903)
Reviewed-on: http://git-master/r/116255
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com>

6 years agovideo: tegra: host: Idle before suspend
Arto Merilainen [Wed, 19 Dec 2012 10:24:27 +0000]
video: tegra: host: Idle before suspend

In certain cases the device may be deinitialized before calling
idle() for the last time which causes invalid memory accesses. This
patch reorders device suspend and device deinitialization sequences
to be performed after calling the idle function.

Bug 1195805

Change-Id: Iad553575fbea26fa325ca93d98c7278aacd7ae90
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/172749
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: moving to clk prepare APIs
Sivaram Nair [Mon, 17 Dec 2012 16:41:17 +0000]
video: tegra: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: Iabe9eb6331809b4103cedea1a04b6e5cf96f2b10
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/172218
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: dsi: Fix mipi_cal sw init for ganged mode
Animesh Kishore [Tue, 11 Dec 2012 11:55:19 +0000]
video: tegra: dsi: Fix mipi_cal sw init for ganged mode

Move mipi calibration init code to region common
to both dsi controllers.

Change-Id: Ie7c37307c719e146f34034d2c993aca3a79ec99e
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/170101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: tegra: dsi: Fix dynamic suspend/resume
Animesh Kishore [Fri, 14 Dec 2012 10:09:29 +0000]
video: tegra: dsi: Fix dynamic suspend/resume

-Balance dc and dsi clks
-fine grain locks

Bug 1193172

Change-Id: I6cbfc1190b758f7361a11b84f284e53ac59bbee2
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/171397
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: Add stub runtime PM support
Prashant Gaikwad [Mon, 10 Dec 2012 08:59:39 +0000]
video: tegra: dc: Add stub runtime PM support

Add stub runtime_pm calls which go through the flow of enabling and
disabling but don't actually do anything with the device itself as
there's nothing useful we can do. This provides the core PM framework
with information about when the device is idle, enabling chip wide
power savings.

Bug 1010971

Change-Id: I93f9cb03746528dae0196d19560cde3307bf22d8
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/143542
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: TSEC KFUSE load
Terje Bergstrom [Wed, 5 Dec 2012 11:56:09 +0000]
video: tegra: host: TSEC KFUSE load

Load KFUSE value to TSEC on boot.

Bug 1179007

Change-Id: If5128f059987fcd80d1d2dd4b76929e1f3f422ab
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/168743
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Enable stub runtime PM
Prashant Gaikwad [Mon, 10 Dec 2012 09:35:36 +0000]
video: tegra: host: Enable stub runtime PM

Add stub runtime_pm calls which go through the flow of enabling and
disabling but don't actually do anything with the device itself as
there's nothing useful we can do. This provides the core PM framework
with information about when the device is idle, enabling chip wide
power savings.

Bug 1010971

Change-Id: I8d9ccffa2ed39bc10b83848cee0d864dfd129dcb
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/143543
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agonvmap: implement deferred cache maintenance
Kirill Artamonov [Mon, 25 Jun 2012 17:13:57 +0000]
nvmap: implement deferred cache maintenance

Defer maintenance till pin or unmap. Handle multiple deferred
operations in batches to flush faster. Enable full L1/L2 flush
if batch is big enough.

bug 983964
bug 994226

Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Change-Id: Ia704356bad7d56e1c60ea7db64f9dbb12fd84597
Reviewed-on: http://git-master/r/138931
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agovideo: tegra: dsi: ganged mode avdd_dsi_csi regulator handling
Rakesh Iyer [Fri, 7 Dec 2012 22:34:36 +0000]
video: tegra: dsi: ganged mode avdd_dsi_csi regulator handling

Modify avdd_dsi_csi regulator handling to work with dsi in ganged mode.

Change-Id: Idee91d35519bd1a1fdf0135fba57f654b37fa2bb
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/169532
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: host: use dev_pm_ops
Mayuresh Kulkarni [Wed, 12 Dec 2012 11:55:11 +0000]
video: tegra: host: use dev_pm_ops

this commit uses the driver->pm->dev_pm_ops for
suspend/resume over the legacy suspend/resume that
happens via bus suspend

this is in preparation to add runtime pm & power
domain support

bug 887332

Change-Id: I3e5b144bba0d618e87946eb3546e2d2445fd28ac
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/170465
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoALSA: hda: powergate HDA when clock gating
Jon Mayo [Fri, 7 Dec 2012 01:19:51 +0000]
ALSA: hda: powergate HDA when clock gating

Use powergating APIs to ensure that HDA and display play nice.
Export powergate APIs so snd-intel-hda can be built as a module.

Bug 1178366

Change-Id: I30559b9288fcbd86615a674756e70f04c9fb5d83
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/169245
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: host: Freeze channel prior to read FIFO
Terje Bergstrom [Tue, 11 Dec 2012 10:03:48 +0000]
video: tegra: host: Freeze channel prior to read FIFO

Freeze channel before reading its status, and do not unfreeze it
while reading the contents. Add memory barriers to ensure proper
sequence.

Bug 1177054

Change-Id: I939c89ec3b924a89906f9fbefe6e07a51e28a4cd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/170073
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Clean up BUG_ON()s and resources
Terje Bergstrom [Tue, 11 Dec 2012 08:31:43 +0000]
video: tegra: host: Clean up BUG_ON()s and resources

Remove BUG_ON()'s. None of the faults in nvhost can cause data
corruption, so it's safer and easier to debug if we just let the
kernel continue.

Some resources were incorrect, so fixing them. We had wrong irq
range and stored per syncpt irqs even though we haven't used them.
Also switch to devm_() calls where appropriate to enable resource
management.

Bug 1190089

Change-Id: Ica5c39756fbb14380c35b485d419acdfb18c8fee
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/169985
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Bypass mem_op abstraction
Terje Bergstrom [Tue, 23 Oct 2012 12:48:14 +0000]
video: tegra: host: Bypass mem_op abstraction

mem_op() abstraction is wrong. mem_op is defined per SoC, whereas
we actually need the operations to be defined per handle type. This
has been now implemented, so the mem_op abstraction is not useful
anymore.

Change-Id: I9f2b7f5dcdb228f899567d97db79946f5861a4c9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/166211
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Add channel reg read to MPE
Terje Bergstrom [Fri, 28 Sep 2012 11:11:05 +0000]
video: tegra: host: Add channel reg read to MPE

Add channel based register read to MPE. It looks like if user space
is at the same time reading MPE registers, and we're doing a context
save, there is a conflict.

Bug 1037620

Change-Id: Ia6978dd780376d38d95318653a536ffd33b6c30d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139651
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Karthik Vijayan <kvijayan@nvidia.com>

6 years agovideo: tegra: nvmap: Allow page pool shrink node to take number of pages to shrink
Krishna Reddy [Tue, 11 Dec 2012 01:21:43 +0000]
video: tegra: nvmap: Allow page pool shrink node to take number of pages to shrink

Bug 1181803
Change-Id: If2d84a566420bba7274806eb4fea2eaf1f200e1b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/169877
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

6 years agovideo: add ds90uh925q RGB to FPDLink Serializer i2c driver
Dongfang Shi [Mon, 29 Oct 2012 23:45:56 +0000]
video: add ds90uh925q RGB to FPDLink Serializer i2c driver

This driver configures the RGB to FPDLink Serializer for proper
output mode. It is used on different embedded platforms.

Before it was part of dc enable code in board panel file. Make it
separate driver to get it called at proper power stage to avoid
failure when resume from sleep mode.

bug 1158820

Change-Id: I6761c601b066339177f109656a227aa5214a9847
Signed-off-by: Dongfang Shi <dshi@nvidia.com>
Reviewed-on: http://git-master/r/159659
(cherry picked from commit c862396ff0eb4c872644c96dbb03f32e9acd26c8)
Reviewed-on: http://git-master/r/161470
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

6 years agovideo: tegra: host: Restrict FIFO read
Terje Bergstrom [Mon, 10 Dec 2012 12:23:40 +0000]
video: tegra: host: Restrict FIFO read

Restrict max number of words read from FIFO to 64 words. This
acts as a safety guard for situations where FIFO status changes
while software is reading it.

Bug 1177054

Change-Id: Ib7fbf74ec2fce4f7142fdede6e9a6b346ab25433
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/169724
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Janne Kiviluoto <jkiviluoto@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: dsi: Support sending frames at init
Kamal Kannan Balagopalan [Tue, 27 Nov 2012 21:54:33 +0000]
video: tegra: dsi: Support sending frames at init

Add support to send frames during DSI init sequence.

Bug 1036745

Change-Id: I1ffd36850786ed4902b25266751f3a7fe33ea58f
Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
Reviewed-on: http://git-master/r/166735
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Remove extra memory barriers
Terje Bergstrom [Mon, 19 Nov 2012 11:19:58 +0000]
video: tegra: host: Remove extra memory barriers

There are extra memory barrier operations in nvhost. Remove them.

Change-Id: Ic2839e8bdcd88c6ca43b84e51c84af4ffa2c34b2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/164686
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: host: save devfreq_rate in scale3d
Jihoon Bang [Thu, 6 Dec 2012 22:58:56 +0000]
video: tegra: host: save devfreq_rate in scale3d

Save 3d clock and 3d.emc clock to devfreq_rate.
This allows nvhost to set current devfreq_rate
before it goes idle instead of setting default_rate
which is max frequency for 3d.

Bug 1166272

Change-Id: I204625dabb5248b8b9004622fd6ddc5db773e3f3
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/169184
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijay Gupta <vijayg@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: nvmap: Fix dma_iova_alloc_at() param
Hiroshi Doyu [Fri, 7 Dec 2012 08:15:59 +0000]
video: tegra: nvmap: Fix dma_iova_alloc_at() param

Fix along with:
ARM: tegra: Use dma-mapping API version of map_linear

Bug 1182882
Bug 1024594

Change-Id: Id988107dc4cb4e5a6ab1ffc5c9b8394595ddfc2f
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/169329
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agoARM: tegra: add refcount to powergate for display
Jon Mayo [Thu, 6 Dec 2012 21:55:27 +0000]
ARM: tegra: add refcount to powergate for display

Keep a refcount for DISA and DISB power domains, as they are shared between
multiple drivers.

Bug 1178366

Change-Id: I30edf2d4922705f15c762342d9f502880f1e01b7
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/169147
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dc: set cmu table when enabling cmu.
Kevin Huang [Fri, 7 Dec 2012 04:33:40 +0000]
video: tegra: dc: set cmu table when enabling cmu.

Before we only change cmu enable bit when enabling/disabling cmu.
But if cmu is not set properly, it causes the display corruption.
Therefore, we set cmu table everytime cmu is enabled through sysfs.

Bug 1185222

Change-Id: Icf04cc7d8925f6cfe76105b964751d5df6d0c702
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/169279
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: fb: conditionalize screen panning
Rakesh Iyer [Thu, 6 Dec 2012 22:48:39 +0000]
video: tegra: fb: conditionalize screen panning

Conditionalize screen panning to only cases where display parameters change.

Bug 1046614

Change-Id: I9be3b9b474f90dc0966161f6b0b00d439eab30e7
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/169218
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

6 years agovideo: tegra: dc: fix refresh rate function
Rakesh Iyer [Thu, 6 Dec 2012 22:46:49 +0000]
video: tegra: dc: fix refresh rate function

Fix the refresh rate function so mode's refresh parameter is correct.

Bug 1046614

Change-Id: Id67fc98a592c44ab823544efd9fe088410000236
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/169217
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

6 years agovideo: tegra: host: Set host1x on Tegra11 to 136MHz
Terje Bergstrom [Wed, 5 Dec 2012 13:58:44 +0000]
video: tegra: host: Set host1x on Tegra11 to 136MHz

New DVFS tables list 144MHz as the maximum frequency for host1x at
lowest voltage. host1x is sourced from PLLP, so nearest step to
that is 136MHz. Use that as default clock rate.

Change-Id: I2554ef883d76d21387d6b5f4b6fbd6db8feff672
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/168748
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: dc: fix explicit null dereference
Deepak Nibade [Mon, 3 Dec 2012 13:07:24 +0000]
video: tegra: dc: fix explicit null dereference

Fix Coverity issue
In error path, dc->fb is assigned to NULL and
then is referenced in code to follow
Modify the error path to have correct roll back
Coverity id : 21156

Bug 1046331

Change-Id: Ice2460e1a204e50b98c6f58bded85870d180e785
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/168077
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: tune 3dfs algorithm for 114
Samuel Russell [Thu, 29 Nov 2012 21:30:17 +0000]
video: tegra: host: tune 3dfs algorithm for 114

Tune the 3dfs algorithm parameters for 114 chips to
improve perf/power.

Change-Id: I3c61ac53d69f1f53d9f762c3ff97c65b498a6fef
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/167417
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

6 years agovideo: tegra: mipi_cal: Remove hardwired code
Animesh Kishore [Tue, 27 Nov 2012 13:07:18 +0000]
video: tegra: mipi_cal: Remove hardwired code

Move calibration code under DSI_VS_1

Change-Id: If561e3007220a0b0190cb88701e0b37b033ad0ae
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/166585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: tegra: dc: clean up powergate code
Jon Mayo [Wed, 5 Dec 2012 21:10:44 +0000]
video: tegra: dc: clean up powergate code

Change-Id: Iec88ab24e676707dc51f1aa4eea0a176d7491186
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168830
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: apply CMU changes only if active
Jon Mayo [Thu, 6 Dec 2012 01:49:51 +0000]
video: tegra: dc: apply CMU changes only if active

Bug 1189604

Change-Id: I2f80ba92137a8a9153dad00fa3afea7ce4a1b0a1
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168912
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: nvmap: use phys_addr_t to hold phys addr
Krishna Reddy [Thu, 29 Nov 2012 00:20:29 +0000]
video: tegra: nvmap: use phys_addr_t to hold phys addr

Bug 1182878

Change-Id: I1f4888bf049ec362388c8db07ee0b0b43a375e46
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/167111
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: host: Restore several regs from other regs
Wei Sun [Sat, 17 Nov 2012 01:27:50 +0000]
video: tegra: host: Restore several regs from other regs

Part 3/3 checkin.

restore reg 0xe44 from reg 0x40e
restore reg 0x403 and 0xe45 from reg 0x411

bug 972588
bug 962360
bug 1159659

Change-Id: I9ff6dba35747a910df79a0345decdba2d32c9f89
Signed-off-by: Wei Sun <wsun@nvidia.com>
Reviewed-on: http://git-master/r/164481
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dsi: Implement regulator enable/disable
Animesh Kishore [Mon, 26 Nov 2012 09:03:23 +0000]
video: tegra: dsi: Implement regulator enable/disable

Handle avdd_dsi_csi on/off.

Bug 1051533
Bug 1178426

Change-Id: Ie9d80fa6972bda04a061ea43411421e5bf830c82
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/166151
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: multiple mode support
Rakesh Iyer [Sat, 10 Nov 2012 01:53:19 +0000]
video: tegra: dc: multiple mode support

Support multiple modes in platform device mode list.

Bug 1166276
Bug 560152

Change-Id: I94f9458f3ae006d2dd50cd3c3b704ea2153c3e1d
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/162840
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: moving to clk prepare APIs
Sivaram Nair [Thu, 1 Nov 2012 15:46:49 +0000]
video: tegra: dc: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I3798befdd10a78b95f844a39dc8dd52948f07d08
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/162325
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: organize clock setup by out type
Jon Mayo [Fri, 30 Nov 2012 22:53:10 +0000]
video: tegra: dc: organize clock setup by out type

Add an out_ops->setup_clk and move clock setup code to a function in each
output type.

Change-Id: I72bdce530fce2a68c5547ea2a6cee301bc9f2df1
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/168138
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dc: use apis to calculate EMC frequency
Jon Mayo [Wed, 31 Oct 2012 01:17:25 +0000]
video: tegra: dc: use apis to calculate EMC frequency

Use MC api tegra_mc_get_effective_bytes_width to calculate EMC clock.

bug 1167105

Change-Id: I06eee3ced3d54e5699ae84051e4e1a9f548079de
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/167836
Reviewed-by: Automatic_Commit_Validation_User

6 years agovideo: tegra: dc: fix the clock-gate for suspend.
Kevin Huang [Fri, 30 Nov 2012 19:45:06 +0000]
video: tegra: dc: fix the clock-gate for suspend.

Bug 1174105

Change-Id: I2eb6bb5e75b1bf7a65956e69abff798ca95fe35f
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/167803
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: nvmap: expose a few nvmap interfaces for RM
Jin Qian [Tue, 26 Jun 2012 01:17:58 +0000]
video: tegra: nvmap: expose a few nvmap interfaces for RM

Bug 979808

Change-Id: I06c11409f7cb300f2a8040a0623577c3db91c79f
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/135142
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Antoine Chauveau <achauveau@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

6 years agovideo: tegra: dc: No dependency check if only one DC instanced
Chao Xu [Fri, 30 Nov 2012 23:57:13 +0000]
video: tegra: dc: No dependency check if only one DC instanced

Change-Id: I5f2b333a2792f6948ed1bc18fdf28575a5f94681
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/167877
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: start tsec ucode at 256.
Marvin Zhang [Thu, 29 Nov 2012 02:37:03 +0000]
video: tegra: host: start tsec ucode at 256.

nvsi needs to use the first 256 bytes of tsec imem as secure storage, move
tsec ucode to start at 256 instead of 0. Copy 256 bytes ucode firmware to
imem offset 256, and make sure start execution at offset 256.

Bug 1179746

Change-Id: I5b732864355ace483e3aedc9992b2961b42a88cf
Signed-off-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-on: http://git-master/r/167158
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dc: update cmu_enable on sysfs write
Mitch Luban [Thu, 22 Nov 2012 19:14:56 +0000]
video: tegra: dc: update cmu_enable on sysfs write

When writing to cmu_enable sysfs node, we need to update
dc->pdata->cmu_enable before updating cmu.

Bug 1169109

Change-Id: I5fe24945dd778e4879d70454c4332a5c5dcc253a
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/165806
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: clock/power ungate when reading sd registers
Mitch Luban [Thu, 8 Nov 2012 23:02:56 +0000]
video: tegra: dc: clock/power ungate when reading sd registers

This change is a fix which allows reading from sd registers
via sysfs.

Bug 1173320

Change-Id: I1dacba312d34b955e117c7438f9edeb5a82534d2
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/162497
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: dc: ignore mode set during probe
Jon Mayo [Wed, 28 Nov 2012 00:07:54 +0000]
video: tegra: dc: ignore mode set during probe

Ignore the initialization of mode during probe to avoid multiple updates to
the current video mode.

Change-Id: Icfa158a2fe06225b0a14033a401da046203542ec
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/166731
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: remove obsolete code
Juha Tukkinen [Tue, 27 Nov 2012 12:51:14 +0000]
video: tegra: host: remove obsolete code

Do not test if unsigned variables are less than zero.

Change-Id: I2a4cf5f67e1290b22a9c21744cb81d94925a0632
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/166612
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dc: remove recursive mutex_lock in mode set
Jon Mayo [Wed, 28 Nov 2012 00:30:49 +0000]
video: tegra: dc: remove recursive mutex_lock in mode set

Change-Id: I05ce08ed7cebb7ae228db1f61c3ce4234b239922
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/166732
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Fix actmon deinit
Terje Bergstrom [Fri, 23 Nov 2012 11:36:19 +0000]
video: tegra: host: Fix actmon deinit

Deinitialize device when the last user closes it. Actmon relies on
it being disabled before its initialization sequence. Add also a
timeout to actmon init so that it won't wait indefinitely.

Change-Id: Ifce5bba9a730052916fcecf09f706c017f50d0fa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/165951
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: host: Restore several regs from other regs
Wei Sun [Thu, 15 Nov 2012 21:05:46 +0000]
video: tegra: host: Restore several regs from other regs

Part 2/3 checkin.

restore reg 0xe44 from reg 0x40e
restore reg 0x403 and 0xe45 from reg 0x411

bug 972588
bug 962360
bug 1159659

Change-Id: I0d031f53e76964ff6016d1466f6a733218d8e06b
Signed-off-by: Wei Sun <wsun@nvidia.com>
Reviewed-on: http://git-master/r/164452
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: host: Implement TSEC exclusive access
Terje Bergstrom [Tue, 16 Oct 2012 09:31:22 +0000]
video: tegra: host: Implement TSEC exclusive access

Add wiring to nvhost interrupt managemend so that TSEC driver can
handle TSEC irq.

TSEC driver adds a handshake with firmware. Firmware will set a state
variable to indicate that it wants exclusive host1x access, and
assert interrupt. TSEC driver will receive the interrupt and stop
CPUs for the duration of TSEC activity, and keeps polling the
variable. TSEC releases access by setting the state variable, at which
point TSEC driver will return system to normal.

TSEC sync point is also renumbered and renamed.

Bug 1164232
Bug 1157821

Change-Id: I9002e25769d9bef7206dce2bad4bf4f21bc60d28
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/159796
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Marvin Zhang <mzhang@nvidia.com>
Tested-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: dc: Powergate dependency between DCs.
Kevin Huang [Tue, 27 Nov 2012 19:09:22 +0000]
video: tegra: dc: Powergate dependency between DCs.

Powergate DISA iff DISB is powergated.

Bug 1178332

Change-Id: I306d142d2caceb94ffba51d75d9a2e2f3a73907f
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/166639
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: dc: update sd backlight on vpulse2
Kevin Huang [Mon, 26 Nov 2012 23:08:30 +0000]
video: tegra: dc: update sd backlight on vpulse2

Use threaded workqueue to update PRISM on vpulse2.

Change-Id: Id174d34f5189082056bd45adac009b48f892e78f
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/163674
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

6 years agovideo: tegra: fb: initialize mode width and height
Michael I. Gold [Tue, 27 Nov 2012 01:19:03 +0000]
video: tegra: fb: initialize mode width and height

Ensure the modedb modes have valid panel dimensions.

Change-Id: I1467b6f67021e25d89dd3ed852c6b5b13b26854a
Signed-off-by: Michael I. Gold <gold@nvidia.com>
Reviewed-on: http://git-master/r/166373
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

6 years agovideo: tegra: host: Reset T114 3D on powerup
Terje Bergstrom [Thu, 22 Nov 2012 13:24:22 +0000]
video: tegra: host: Reset T114 3D on powerup

3D is in invalid state when we power it on for the first time. Reset
it at power-up.

Bug 1172645

Change-Id: I2786389c7bf75eed5a411174da1d01c50a041494
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/165736
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: host: Fix memory leak in dmabuf
Arto Merilainen [Thu, 22 Nov 2012 09:35:16 +0000]
video: tegra: host: Fix memory leak in dmabuf

nvhost was not detached from imported dmabuf buffers correctly.
Refcount to the buffer was decreased so the actual memory area
was released. However, small amount of bookkeeping data was not
freed.

Change-Id: Ia2af6485a471cc77dcbb5235e2d525bbb5916a38
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/165660
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: host: Boot MSENC at init
Terje Bergstrom [Thu, 15 Nov 2012 12:30:10 +0000]
video: tegra: host: Boot MSENC at init

Boot MSENC at channel initialization time if power gating is not
enabled. If we support power gating, MSENC is booted when it's
powered up.

Bug 1164556

Change-Id: Icf8234bbf427e7e0452a98164163124d1c24704b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/163955
(cherry picked from commit cab9a80aa94df4e851d7aff923a9a453f47b28ff)
Reviewed-on: http://git-master/r/165626
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: dc: load video mode during vblank
Jon Mayo [Fri, 16 Mar 2012 19:50:59 +0000]
video: tegra: dc: load video mode during vblank

Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during
vblank). This elimiates the work around that requires disabling then
enabling display to change modes.

Bug 560152
Bug 1166276

Change-Id: If6d22627b7ff1f07691937235aec687688d3c608
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/163108
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: dc: remove duplicate code
Jon Mayo [Mon, 12 Nov 2012 18:41:25 +0000]
video: tegra: dc: remove duplicate code

Silent merge error introduced duplicate code.

Bug 1174707

Change-Id: I3bd3b6e9ddc2310768dcf87e5c59614ea48adb75
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/163107
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: host: New submit interface
Terje Bergstrom [Thu, 8 Nov 2012 13:21:07 +0000]
video: tegra: host: New submit interface

Add new interface for submit. Now a single IOCTL will send the whole
job to kernel.

Also removes 32 sync point limit from the interface, and adds
possibility to have variable number of sync point ids and increments.

Because of these changes, nvhost_job has been refactored to remove
dependency to the submit header struct.

Change-Id: Id43b0c916e5ad5cdc7541726ea2d96bfc7497256
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/162888
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: host: Modify 3dfs algorithm
Samuel Russell [Thu, 20 Sep 2012 01:10:19 +0000]
video: tegra: host: Modify 3dfs algorithm

Modify the 3dfs algorithm to address power regressions.
 - Use exponential-moving-average
 - Implement block before modifying target again
 - Only scale up or down by 1 step at a time
 - Inside hint limits use a combination of idle and hint

Bug 1048740
Bug 971602

Change-Id: Ic7d7950c57742410801f897d6439c71ab18355e7
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/134915
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simo Melenius <smelenius@nvidia.com>
Tested-by: Simo Melenius <smelenius@nvidia.com>
Tested-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

6 years agovideo: tegra: dc: reduce crc messages to dev_dbg
Adam Cheney [Tue, 13 Nov 2012 20:37:10 +0000]
video: tegra: dc: reduce crc messages to dev_dbg

Messages that confirm when CRC is enabled or disabled
only need to be shown in DEBUG mode.

bug 1056778

Change-Id: Ifa16345e60ef3bc3d1f1b1ee9277bf720ead7b51
Signed-off-by: Adam Cheney <acheney@nvidia.com>
Reviewed-on: http://git-master/r/163308
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

6 years agovideo: tegra: host: Wait for idle before regread
Terje Bergstrom [Tue, 20 Nov 2012 08:25:40 +0000]
video: tegra: host: Wait for idle before regread

Wait for idle before doing a 3D register read.

Bug 1157195

Change-Id: I3f017f04d1b42b666c24d27811040b15c95ddd2f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/164949
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

6 years agovideo: tegra: host: Compress debug dump
Terje Bergstrom [Mon, 19 Nov 2012 17:11:16 +0000]
video: tegra: host: Compress debug dump

UART is slow for long debug spews. Compress the output by removing
decoding into opcodes.

We also remove KERN_INFO from each printk, as that causes a newline
between each word.

Bug 1175902

Change-Id: I9f2c2baa5483e5c1eb82c9c4c3c2133ecb3209ac
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/164733
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

6 years agovideo: tegra: host: Fix memory leak on pin
Tuomas Tynkkynen [Fri, 9 Nov 2012 16:14:02 +0000]
video: tegra: host: Fix memory leak on pin

A scatter-gather table was left unfreed when unpinning a handle.

Bug 1173911

Change-Id: Iba3b06aa97fc69657f168a9d2aaf7959ef0ac890
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/162709
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>

6 years agovideo: tegra: host: Restore several regs from other regs
Wei Sun [Thu, 8 Nov 2012 00:07:05 +0000]
video: tegra: host: Restore several regs from other regs

Part 1/3 checkin.

restore reg 0xe44 from reg 0x40e
restore reg 0x403 and 0xe45 from reg 0x411

bug 972588
bug 962360
bug 1159659

Change-Id: Ibf0ddd18ef6127afff9e45f640b22779280896c5
Signed-off-by: Wei Sun <wsun@nvidia.com>
Reviewed-on: http://git-master/r/162163
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 years agovideo: tegra: dc: power host1x during HDCP link
Jon Mayo [Tue, 20 Nov 2012 00:17:25 +0000]
video: tegra: dc: power host1x during HDCP link

Add tegra_dc_io_start/end to take host1x references while negotiating HDCP.
Without these the module can be turned off and some state won't be
programmed properly.

Bug 1176386

Change-Id: I1893b017f09a406965b478b0a9de1730b16ca0ac
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/164809
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agodrivers:video:tegra:Use correct clock for freqtbl
Arto Merilainen [Tue, 25 Sep 2012 06:48:18 +0000]
drivers:video:tegra:Use correct clock for freqtbl

The device clock is bounded to its clock domain. This change makes
podgov to use the clock domain's clock while generating freqtbl.

Change-Id: I5f5501e62494a0f0fcc5a317aba5cc4f7d34de62
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/163987
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Simo Melenius <smelenius@nvidia.com>
Reviewed-by: Samuel Russell <samuelr@nvidia.com>
Tested-by: Samuel Russell <samuelr@nvidia.com>

6 years agovideo: tegra: host: handle function return value
Deepak Nibade [Thu, 15 Nov 2012 12:44:10 +0000]
video: tegra: host: handle function return value

-fix Coverity issue of unchecked return value
-use pr_err to report error

Coverity id : 20846

Bug 1046331

Change-Id: Id90be48d700d0098e9e4761be33090e7a44ce9e3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/163958
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

6 years agovideo: tegra: dc: add ioctl to expose CMU.
Kevin Huang [Mon, 12 Nov 2012 00:43:38 +0000]
video: tegra: dc: add ioctl to expose CMU.

Bug 1169109

Change-Id: I98ee2794724299113c7aab3a60703f2927c9ea8d
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/162990
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>