5 years agogpio: tegra: add tegra_is_gpio
aghuge [Tue, 4 Dec 2012 11:36:27 +0000]
gpio: tegra: add tegra_is_gpio

Added tegra_is_gpio function to
return true if pin is configured as gpio

Bug 1172972

Change-Id: Ieac0af9a6ee000cbeb73e714395169799ae18e3b
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/168285
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: Dalmore: Shutdown SMPS
Prem Sasidharan [Tue, 27 Nov 2012 22:25:22 +0000]
arm: tegra: Dalmore: Shutdown SMPS

Shutdown SMPS8 in LP0

Bug 1176125

Change-Id: I78a67a74da12d3bb7e9ab375652e84f1a65491a3
Signed-off-by: Prem Sasidharan <psasidharan@nvidia.com>
Reviewed-on: http://git-master/r/166694
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: Initial runtime pre-silicon support
Jeff Smith [Fri, 3 Aug 2012 22:11:17 +0000]
ARM: tegra: Initial runtime pre-silicon support

* Add runtime calls to determine pre-silicon config
* Determine mode from minor revision in tegra id
* Export mode through fuse sysfs for user mode tests/code

Change-Id: I500d4ae14b70322f558ab48634fb758d3014bca2
Signed-off-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-on: http://git-master/r/161324
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: Add PRE_SILICON_SUPPORT option
Jeff Smith [Thu, 2 Aug 2012 23:14:53 +0000]
ARM: tegra: Add PRE_SILICON_SUPPORT option

New option for enabling pre-silicon quirks and
differentiating between the various supported
platforms at run time instead of compile time.

After all features are ported from the PLATFORM
config, that option will be removed.

Change-Id: I0b1fcd1425a95bfb48ac4f64e306b4503955ac4f
Signed-off-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-on: http://git-master/r/161287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

5 years agomedia: video: tegra: nvavp: Fix nvmap handle issue
Gajanan Bhat [Wed, 12 Dec 2012 20:06:04 +0000]
media: video: tegra: nvavp: Fix nvmap handle issue

In open call we were assigning the driver's nvmap handle to
the nvavp's client context which would get released in release
call to driver. This will cause driver's nvmap handle to be
invalid if a parallel client context is running and driver does
any nvmap operation.

Bug 1013063
Bug 1192772

Change-Id: Id02520ae8ec511bb8c50bc4d3908ea3e75e1ea6b
Signed-off-by: Gajanan Bhat <gbhat@nvidia.com>
Reviewed-on: http://git-master/r/170585
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agodrivers: tegra: imx091/max77665: fix edp issue
Charlie Huang [Tue, 11 Dec 2012 20:17:10 +0000]
drivers: tegra: imx091/max77665: fix edp issue

Fix the potential NULL pointer usage in the case there is no edp client
allocated.

bug 1193275

Reviewed on: http://git-master/r/#change,170249

Change-Id: I8cf6670edfd8ddd8f60a5200efe80a49767296bf
(cherry picked from commit 4be68a5750f55ea9b8e1062d6d2b6789891ee371)

Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Change-Id: Iabb40765c7f5b935bb5938c24397fda54581638f
Reviewed-on: http://git-master/r/170560
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: Tegra: Print raw MC error code
Antti P Miettinen [Wed, 12 Dec 2012 14:04:19 +0000]
ARM: Tegra: Print raw MC error code

Print raw error code too for better diagnostic.

Change-Id: Iaf1268eeff3ad1077a6035755302fde1c650e76e
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/170558
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agomedia: video: tegra: imx091: Fix pll_mult value
Sudhir Vyas [Wed, 12 Dec 2012 08:56:04 +0000]
media: video: tegra: imx091: Fix pll_mult value

The pll_mult value for imx091 new mode [524x390]
is incorrectly set. Which is being used to derive
VtPixelClk and later this clock is used to calculate
coarse-time, frame-length and frame-rate, hence all
are being calculated to wrong values.
Slow-mo faces the incorrect fps issue when same mode
needs to be programmed with different fps.

Bug 1180474

Change-Id: I673f6ad77fbb52225c0b427f5c78bd53bc473bea
Signed-off-by: Sudhir Vyas <svyas@nvidia.com>
Reviewed-on: http://git-master/r/170414
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amit Purwar <apurwar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

5 years agoARM: Tegra: Fix MC error reporting
Antti P Miettinen [Wed, 12 Dec 2012 07:33:44 +0000]
ARM: Tegra: Fix MC error reporting

Check that array indexing is within bounds.

Change-Id: I36f4edf1567eec395a16c46711b3b25ead88cf98
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/170384
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

5 years agoARM: tegra: Skip unnecessary L1 flush for all tegra chips
Bo Yan [Mon, 10 Dec 2012 18:32:13 +0000]
ARM: tegra: Skip unnecessary L1 flush for all tegra chips

Change-Id: I52b7ae07c42f0f76b5e1e6d8564c9cb518c359a6
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/169768
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoarm: tegra: usb_phy: Fix race condition in resume
Abhishek Shukla [Sun, 9 Dec 2012 02:50:35 +0000]
arm: tegra: usb_phy: Fix race condition in resume

Resume could fail if remote wake is detected
by  PMC after controller has been put in suspend
during resume code. Restart bringing up host
controller as in case of remote wake if this hapens.

Bug 1179329

Change-Id: I7df4fcb73c565aedc4b22ff9cf229d3b50b99d15
Signed-off-by: Abhishek Shukla <abhisheks@nvidia.com>
Reviewed-on: http://git-master/r/169602
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinod Atyam <vatyam@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoALSA: hda: powergate HDA when clock gating
Jon Mayo [Fri, 7 Dec 2012 01:19:51 +0000]
ALSA: hda: powergate HDA when clock gating

Use powergating APIs to ensure that HDA and display play nice.
Export powergate APIs so snd-intel-hda can be built as a module.

Bug 1178366

Change-Id: I30559b9288fcbd86615a674756e70f04c9fb5d83
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/169245
Reviewed-by: Automatic_Commit_Validation_User

5 years agoarm: tegra: dalmore: Runtime panel detection
Vineel Kumar Reddy Kovvuri [Thu, 6 Dec 2012 12:31:33 +0000]
arm: tegra: dalmore: Runtime panel detection

Bug 1182416

Change-Id: I362f892c32e0f3e8e32e136b3595c71b696b2bae
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/169066
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: clock: Don't preset EMC VREF bits
Alex Frid [Tue, 11 Dec 2012 01:13:35 +0000]
ARM: tegra11: clock: Don't preset EMC VREF bits

Don't preset VREF bits in XM2DQSPADCTRL3 registers during EMC clock
change procedure.

Change-Id: I3abb6d07d93632b61363e2b0f7de37e1d7312af0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169874
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Use tabulated EMC clock register
Alex Frid [Fri, 7 Dec 2012 23:58:59 +0000]
ARM: tegra11: clock: Use tabulated EMC clock register

Instead of constructing settings for EMC clock source/divider
register, use value specified in the EMC DFS table.

Bug 1188643

Change-Id: I4d28ed00c0b049d4ab5ad645cbf721ef6453be8b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra11: clock: Add latency entry to EMC DFS table
Alex Frid [Thu, 6 Dec 2012 20:44:26 +0000]
ARM: tegra11: clock: Add latency entry to EMC DFS table

Bug 1189313

Change-Id: I4e39647c0c4702f05f03ecd00c82aa568f5fedf6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169138
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agofixup debug clock getting
Dan Willemsen [Fri, 1 Feb 2013 22:29:44 +0000]
fixup debug clock getting

Change-Id: Ieef5ca0d92ae9dce9b32713301c7451d861d5e7e
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoHACK Revert "regulator: core: Mark all DT based boards as having full constraints"
Dan Willemsen [Fri, 1 Feb 2013 00:37:37 +0000]
HACK Revert "regulator: core: Mark all DT based boards as having full constraints"

This reverts commit 86f5fcfc3e400b2ac1562cb0fd6aabc9f83ee3e2.

Change-Id: I2aae15af8f1a648d68e5a1e2a12fdf67208de5bf
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoHACK: disable our delay functions, causing hang
Dan Willemsen [Thu, 31 Jan 2013 10:15:05 +0000]
HACK: disable our delay functions, causing hang

Change-Id: Ic3e2960d29d9ccc51d57fe23a2a0b309f665a12b
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup tegra11x_init_early
Dan Willemsen [Thu, 31 Jan 2013 10:11:17 +0000]
fixup tegra11x_init_early

Change-Id: If124ad54e72cce9c4e241496e55ce014e5bef9e4
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup tegra11_clocks upstream uart changes
Dan Willemsen [Thu, 31 Jan 2013 10:10:02 +0000]
fixup tegra11_clocks upstream uart changes

Change-Id: I5908329b69e681171bf91123611aa4b6369dc751
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup tegra11_clocks pwm driver name
Dan Willemsen [Thu, 31 Jan 2013 10:09:49 +0000]
fixup tegra11_clocks pwm driver name

Change-Id: I2a4c4cd7ea691033b9f2211c84511a8badaaea96
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup tegra11_clocks apbdma driver name
Dan Willemsen [Thu, 31 Jan 2013 10:09:28 +0000]
fixup tegra11_clocks apbdma driver name

Change-Id: I53a61011c96b3f03d71451658cf37c194786459b
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup sound tegra30_i2s regmap changes
Dan Willemsen [Thu, 31 Jan 2013 07:26:15 +0000]
fixup sound tegra30_i2s regmap changes

incomplete, but a start

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup tegra_rt5640 compile
Dan Willemsen [Thu, 31 Jan 2013 07:19:01 +0000]
fixup tegra_rt5640 compile

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup hda_intel platform driver
Dan Willemsen [Thu, 31 Jan 2013 07:14:37 +0000]
fixup hda_intel platform driver

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup hda_intel pci driver
Dan Willemsen [Thu, 31 Jan 2013 07:14:10 +0000]
fixup hda_intel pci driver

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup hda_intel pci
Dan Willemsen [Thu, 31 Jan 2013 07:13:00 +0000]
fixup hda_intel pci

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agousb: otg: tegra: Updates for 3.6
Dan Willemsen [Thu, 31 Jan 2013 07:10:39 +0000]
usb: otg: tegra: Updates for 3.6

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup usb: host: tegra: update ehci to use common phy
Dan Willemsen [Thu, 31 Jan 2013 07:06:05 +0000]
fixup usb: host: tegra: update ehci to use common phy

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup usb: host: tegra: update ehci to use common phy
Dan Willemsen [Thu, 31 Jan 2013 07:02:11 +0000]
fixup usb: host: tegra: update ehci to use common phy

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agousb: gadget: tegra: Updates for 3.6
Dan Willemsen [Thu, 31 Jan 2013 06:59:25 +0000]
usb: gadget: tegra: Updates for 3.6

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup regulator: palma: Disable smps10 boost during suspend
Dan Willemsen [Thu, 31 Jan 2013 06:52:57 +0000]
fixup regulator: palma: Disable smps10 boost during suspend

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoARM: config: tegra11_android: Run savedefconfig
Dan Willemsen [Thu, 31 Jan 2013 05:56:16 +0000]
ARM: config: tegra11_android: Run savedefconfig

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup: mfd: max77663: mfd_add_devices addition
Dan Willemsen [Thu, 31 Jan 2013 05:31:26 +0000]
fixup: mfd: max77663: mfd_add_devices addition

See 0848c94fb4a5cc213a7fb0fb3a5721ad6e16f096

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup: mfd: max8831: mfd_add_devices addition
Dan Willemsen [Thu, 31 Jan 2013 05:26:04 +0000]
fixup: mfd: max8831: mfd_add_devices addition

See 0848c94fb4a5cc213a7fb0fb3a5721ad6e16f096

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup: mfd: bq2419x: mfd_add_devices addition
Dan Willemsen [Thu, 31 Jan 2013 05:25:10 +0000]
fixup: mfd: bq2419x: mfd_add_devices addition

See 0848c94fb4a5cc213a7fb0fb3a5721ad6e16f096

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup timer
Dan Willemsen [Thu, 31 Jan 2013 05:11:38 +0000]
fixup timer

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup timer arch_timer registration
Dan Willemsen [Thu, 31 Jan 2013 05:10:28 +0000]
fixup timer arch_timer registration

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup: crypto: testmgr - Adding ofb(aes) and cmac(aes) tests
Dan Willemsen [Thu, 31 Jan 2013 05:09:10 +0000]
fixup: crypto: testmgr - Adding ofb(aes) and cmac(aes) tests

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoARM: PCI: remove unused sys->hw
Dan Willemsen [Mon, 14 Jan 2013 22:31:17 +0000]
ARM: PCI: remove unused sys->hw

See upstream commit 8084de8ad53332ed6e0ffe5db85533b8150d7d6b

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup: tegra30_i2s compile fix
Dan Willemsen [Mon, 14 Jan 2013 05:04:23 +0000]
fixup: tegra30_i2s compile fix

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup/HACK sound changes
Dan Willemsen [Mon, 14 Jan 2013 04:05:30 +0000]
fixup/HACK sound changes

* switch to regmap
* switch to runtimepm
* remove hand register cache (may need to move to regmap)
* rename txcif/rxcif
* disable i2s due to not being updated for DT, where upstream requires
   DT

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup hda_intel.c: compiler errors due to function split
Dan Willemsen [Mon, 14 Jan 2013 02:31:24 +0000]
fixup hda_intel.c: compiler errors due to function split

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoRevert "LOOK Partial Revert "ALSA: hda: Support disabling of clocks for Tegra""
Dan Willemsen [Mon, 14 Jan 2013 02:25:20 +0000]
Revert "LOOK Partial Revert "ALSA: hda: Support disabling of clocks for Tegra""

This reverts commit a70fbb1efdf02c50699576f6e67c030dc2d5ceca.

5 years agofixup boot_hsic_class: Convert to dev_err
Dan Willemsen [Mon, 14 Jan 2013 02:08:21 +0000]
fixup boot_hsic_class: Convert to dev_err

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoHACK? fix USB compile
Dan Willemsen [Mon, 14 Jan 2013 01:56:23 +0000]
HACK? fix USB compile

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoregulator: Convert smb349 charger to use a struct to pass in regulator runtime config
Dan Willemsen [Sun, 13 Jan 2013 02:30:29 +0000]
regulator: Convert smb349 charger to use a struct to pass in regulator runtime config

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoregulator: Convert tps80031 charger to use a struct to pass in regulator runtime...
Dan Willemsen [Sun, 13 Jan 2013 02:27:35 +0000]
regulator: Convert tps80031 charger to use a struct to pass in regulator runtime config

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoRevert "gpio: tegra: implement gpio_request and gpio_free."
Dan Willemsen [Sat, 12 Jan 2013 23:45:40 +0000]
Revert "gpio: tegra: implement gpio_request and gpio_free."

This reverts commit 6bdc80e5837a2ee188f020fd34f81a37fedc24b9.

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agofixup mach-tegra: arm: tegra: power: lp0 wake enable modified
Dan Willemsen [Sat, 12 Jan 2013 23:43:42 +0000]
fixup mach-tegra: arm: tegra: power: lp0 wake enable modified

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

5 years agoRevert "ARM: tegra: gpio: Add range check for gpio enable/disable"
Dan Willemsen [Sat, 12 Jan 2013 23:42:36 +0000]
Revert "ARM: tegra: gpio: Add range check for gpio enable/disable"

This reverts commit 30ea3fa73c8b8fd65e504cf23169969b7032113f.

5 years agodrivers: video: tegra: 3d scaling uses devfreq
Arto Merilainen [Fri, 7 Sep 2012 08:06:32 +0000]
drivers: video: tegra: 3d scaling uses devfreq

This change separates 3d load estimation and adjustment (device
policy) from the governor that makes estimation for a proper
clock frequency.

This patch introduces a regression: Due to changes in the interface
EMC scaling cannot be disabled anymore.

Bug 965517

Change-Id: I1d42640f33054df4c659a4a20e3ab69e29392855
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/130581
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R132aff46dd256478a06f6824bf56ef59287fd629

5 years agoarm: tegra: roth:Change tfa9887L i2c address as per A01 design.
Vinod Subbarayalu [Mon, 10 Dec 2012 23:53:21 +0000]
arm: tegra: roth:Change tfa9887L i2c address as per A01 design.

Change-Id: Ib0ac39f263a3e3fbdeb4c6fbb08f1590b1a8643e
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
Reviewed-on: http://git-master/r/169846
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11x: Enable RAM repair per fuse setting
Bo Yan [Thu, 6 Dec 2012 20:41:39 +0000]
ARM: tegra11x: Enable RAM repair per fuse setting

fuse bits spare_10 and spare_11 decide whether or not to do RAM repair

bug 1027322
bug 1056548

Change-Id: Id12f5fde052332759b03d191fbea99dc01aab894
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/169134
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoasoc:tegra: BT Call on Pluto
Nikesh Oswal [Wed, 5 Dec 2012 09:29:02 +0000]
asoc:tegra: BT Call on Pluto

1. Use a DAM in BT Codec path
2. Add T114 specific code for DAM programming
   in call related functions
3. Add T114 specific code for I2S programming
   in call related functions
4. Update the machine drivers to call DAM functions
   only if DAM is used in the concerned path

Bug 1171615

Change-Id: I3ba9f088117045f2465ee0485d8f1afb0ac9ec59
Signed-off-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-on: http://git-master/r/168684
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoEnable UHSIC bus keepers always
srinivas thaduvai [Fri, 7 Dec 2012 09:09:47 +0000]
Enable UHSIC bus keepers always

Currently bus keepers are enabled 1 clock later
after drivers are tristated. But to be on safer
side bus keepers are enabled always.

Bug 1032043

Change-Id: I5a696c5fba1dde161fc674d80e3b4b2e937348fd
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/169332
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: usb: Fix phy_power_on condition
Petlozu Pravareshwar [Mon, 3 Dec 2012 06:01:39 +0000]
ARM: tegra: usb: Fix phy_power_on condition

When the Phy is left powered on, in non LP0 event phy_resume
should not be programmed while after an LP0 event it should be
programmed.

Bug 1166740

Change-Id: I046c38bcf5589e270fdd99dcd99af057f9bfba1c
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/167715
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: usb: fix hsic resume sequence
Suresh Mangipudi [Fri, 23 Nov 2012 10:40:31 +0000]
ARM: tegra: usb: fix hsic resume sequence

2LS sequnence for HSIC resume is removed.

Bug 1164414

Change-Id: I31fed9cc0edcdf447543c54284742f7ce35cb44b
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/165893
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinod Atyam <vatyam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

5 years agoARM: tegra: dalmore: Mask SDR104,DDR50 for SDIO
Pavan Kunapuli [Fri, 7 Dec 2012 13:41:30 +0000]
ARM: tegra: dalmore: Mask SDR104,DDR50 for SDIO

Mask SDR104 and DDR50 UHS mode support for SDIO
devices as CRC errors are observed in these modes.

Bug 1181574

Change-Id: I93fb9fecc5eadcccc4c1c7180100d723719bc74b
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/169397
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: pcie: Support more than one pcie card
Peter Daifuku [Wed, 28 Nov 2012 23:44:20 +0000]
ARM: tegra: pcie: Support more than one pcie card

- Increase tegra3 prefetchable memory space
- Restore missing initialization of root_bus_nr in
  add port in boot path.

Bug 1037185

Reviewed-on: http://git-master/r/167086
(cherry picked from commit b69a73dcf31daa377fe64c3d89a6fe3abc9e87ba)

Change-Id: Idefc0c89b4836e7e812d56257b606110eb6364c4
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/169385
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agosecureos: Remove useless smc for t114
Hyung Taek Ryoo [Fri, 7 Dec 2012 00:05:05 +0000]
secureos: Remove useless smc for t114

This change removes obsolete smc which causes abort when resuming
in secure os build.
Same smc function called twice at boot time by function tegra_resume,
1st in virtual context, 2nd in physical, cache clean during exec of 2nd call.
In consequence, if remove this obsolete call, the abort issue is fixed.

Change-Id: Ia08360e56738b5b70420929acf8885c16c266646
Signed-off-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-on: http://git-master/r/169227
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: config: Enable INA3221 config
Anshul Jain [Sat, 8 Dec 2012 01:37:22 +0000]
ARM: tegra11: config: Enable INA3221 config

Bug 1160066

Change-Id: I80d6ea65c437b21dbb3e7459282876e09e80db78
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/169216
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: roth: power key connected to KBC-COL0 on A01 rev board
Laxman Dewangan [Thu, 6 Dec 2012 09:52:34 +0000]
ARM: tegra: roth: power key connected to KBC-COL0 on A01 rev board

The Power key is connected to the KBC-COL0  from roth board
revision A01 onwards.

bug 1186701

Change-Id: I218fb10d0e89471f3d2e2db1b37bf15832bb1a03
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/169017
GVS: Gerrit_Virtual_Submit

5 years agoaudio: Add support for programming TFA9887.
Vinod Subbarayalu [Mon, 3 Dec 2012 02:02:29 +0000]
audio: Add support for programming TFA9887.

Change-Id: I82b85cea36a5cb6160ded5b65766ae82b11118ea
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
Reviewed-on: http://git-master/r/167977
Reviewed-by: Scott Peterson <speterson@nvidia.com>

5 years agoARM: tegra: roth: Add fan pwm device support
Anshul Jain [Wed, 5 Dec 2012 04:41:22 +0000]
ARM: tegra: roth: Add fan pwm device support

Following updates:
Makefile includes board-roth-fan
board-roth-fan initialized platform data for pwm fan driver
board-roth-pinmux change setting of PWM0
Change pll_p to 37Mhz

Bug 1179033

Change-Id: I36918256aed4e73c537cbfcbac57c3b011538d0a
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167680
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoasoc:tegra: Support setting bit clock
ScottPeterson [Tue, 18 Sep 2012 22:01:54 +0000]
asoc:tegra: Support setting bit clock

Support for setting I2S bit clock from information
in the pdata structure.

Correctly supported DSPA and DSPB modes of I2S
during voice call.

Change-Id: I50e20ed66d2d0a01050d1d3902d179133f767f87
Signed-off-by: ScottPeterson <speterson@nvidia.com>
Reviewed-on: http://git-master/r/133669
Reviewed-on: http://git-master/r/146605
Reviewed-by: Automatic_Commit_Validation_User

5 years agoaudio: a2220: Fix the wrong GPIO for reset
Bo Yan [Sat, 8 Dec 2012 03:06:31 +0000]
audio: a2220: Fix the wrong GPIO for reset

gpio number for reset is not specified in platform data, in fact, its
value is 0 after kzalloc.  Requesting gpio for this number is bad
because the pin for GPIO 0 is used for other purposes. The original
hack is to use a magic number 118 for reset GPIO, this still needs to
be fixed. Meanwhile, to unblock the work which requires GPIO 0,
do not request GPIO 0 in this module.

Change-Id: Ibe1c38e948603fcd1d9de1164d5f69b0804757d2
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/169562
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Tested-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: dma-mapping: Allow dma_map_linear to map out-of-range
Hiroshi Doyu [Fri, 7 Dec 2012 09:03:27 +0000]
ARM: dma-mapping: Allow dma_map_linear to map out-of-range

Allow dma_map_linear to map out-of-range of a map.

Depends on:
ARM: tegra: Use dma-mapping API version of map_linear

Bug 1182882
Bug 1024594

Change-Id: I8475e700d402f84661aa615d0bf0498b0c3e06ce
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/169328
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: iova_alloc_at() handles out-of-range separately
Hiroshi Doyu [Fri, 7 Dec 2012 08:12:51 +0000]
ARM: dma-mapping: iova_alloc_at() handles out-of-range separately

iova_alloc_at() sets -ENXIO at *iova for out-of-range, and -EINVAL for
the rest failure cases. We need to differenciate out-of-range to know
if 'da' reservation fails because of overwrapping or out-of-range.

Bug 1182882
Bug 1024594

Change-Id: If0441c0521ef74c8792a8f0562a821ca76dbbc34
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/169327
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: add refcount to powergate for display
Jon Mayo [Thu, 6 Dec 2012 21:55:27 +0000]
ARM: tegra: add refcount to powergate for display

Keep a refcount for DISA and DISB power domains, as they are shared between
multiple drivers.

Bug 1178366

Change-Id: I30edf2d4922705f15c762342d9f502880f1e01b7
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/169147
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 years agoARM: tegra: Introduce smmu_default_map
Hiroshi Doyu [Tue, 4 Dec 2012 10:00:08 +0000]
ARM: tegra: Introduce smmu_default_map

Introduce smmu_default_map as a default iommu map.

Bug 1025468

Change-Id: I3c915374a142d322fae902767974f921f8ec9baa
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/168404
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Naren Bhat <nbhat@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: dma-mapping: Pass phys_addr_t to dma_map_linear()
Hiroshi Doyu [Wed, 28 Nov 2012 06:21:50 +0000]
ARM: dma-mapping: Pass phys_addr_t to dma_map_linear()

Pass phys_addr_t to dma_map_linear() instead of void
*va. dma_map_linear_attrs() should take phys_addr_t as arg rather than
void *va. Passing va is a bug. This API is trying to set IOVA==PA for
the PA passed. The arg name "va" doesn't make sense.

Bug 1182882
Bug 1024594

Change-Id: Ideaf08b72bd6fa3ef0e750205f0af87ac7e35362
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/166815
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

5 years agoARM: tegra11: dvfs: Update SDMMC4 dvfs table
Alex Frid [Thu, 6 Dec 2012 23:37:00 +0000]
ARM: tegra11: dvfs: Update SDMMC4 dvfs table

Change-Id: I082b4606334e64c9e6efc4f678dc3c2551892687
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169215
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: dvfs: Limit SCLK operations to 0.95V minimum
Alex Frid [Thu, 6 Dec 2012 21:17:31 +0000]
ARM: tegra11: dvfs: Limit SCLK operations to 0.95V minimum

Restricted system bus (and respectively the entire SoC) operations
to 0.95V and above.

Change-Id: I3ea2882d4dee33b9256a630fc647cbb183a670d8
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169214
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: clock: Double PLLC VCO for 624MHz output
Alex Frid [Thu, 6 Dec 2012 20:35:32 +0000]
ARM: tegra11: clock: Double PLLC VCO for 624MHz output

Bug 1190880

Change-Id: If768c8812575d57b5ac02e99cf878bec4a9ea740
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/169137
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: Do L2 CMO before last CPU power down
Bo Yan [Thu, 6 Dec 2012 17:20:22 +0000]
ARM: tegra: Do L2 CMO before last CPU power down

Whether L2 flush is needed before powering down the last CPU
depends on the existence of external L2.  Therefore, fix the
conditional compilation appropriately.

Change-Id: I9f135edb71b8df22b04388676fa9365ee3908b52
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/169098
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>

5 years agoarm: tegra: baseband: enable wake out of low power modes
Neil Patel [Thu, 6 Dec 2012 16:09:34 +0000]
arm: tegra: baseband: enable wake out of low power modes

For modem devices supporting remote wake the kernel device wakeup
flag should be set to true. This ensures the SET_FEATURE remote
wakeup request is sent to the device before the AP enters LP0.

Bug 1191502

Change-Id: I4da5f332fc024c213aae0052d50bf5b884523840
Signed-off-by: Neil Patel <neilp@nvidia.com>
Reviewed-on: http://git-master/r/169086
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Steve Lin <stlin@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

5 years agomach: pluto: add baseband and bt bit clock
Dara Ramesh [Thu, 6 Dec 2012 08:53:29 +0000]
mach: pluto: add baseband and bt bit clock

Add parameter to specify the I2S bitclock
to use as part of pdata structure.

bug 1171615

Change-Id: Ia8a67555009cfa812ebf3cfdfeafe93782c8acd5
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/169006
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoThermal: Increase maximum number of trip-points to 32
Alex Frid [Thu, 6 Dec 2012 07:33:18 +0000]
Thermal: Increase maximum number of trip-points to 32

Change-Id: I499710dba6dc14aeedca4ed481e8da02f64d4099
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168998
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoARM: tegra: configs: roth: disable un-used bluetooth modules
Nagarjuna Kristam [Thu, 6 Dec 2012 04:08:04 +0000]
ARM: tegra: configs: roth: disable un-used bluetooth modules

From Android 4.2, only hidp-bluez is needed for bluetooth. So, remove other
not needed bluetooth modules

Bug 1188713

Change-Id: Ic9a679439f25411531f707b8d44b51140f59dd34
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/168941
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agoARM: tegra: power: Update core EDP with temperature
Alex Frid [Sun, 25 Nov 2012 03:13:04 +0000]
ARM: tegra: power: Update core EDP with temperature

Added core EDP thermal layer as active cooling device, and updated
core EDP limits when temperature threshold are tripped.

Bug 1165638

Change-Id: I37cd8ab0a94909d198f21ba02e9308ca4d23bcb6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168929
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: config: tegra11: Enable TEGRA_IOMMU_SMMU
Alex Waterman [Wed, 5 Dec 2012 08:51:33 +0000]
arm: config: tegra11: Enable TEGRA_IOMMU_SMMU

Change-Id: I7a79e40f6540a9c99b4f42459950500b9776d233
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/168674
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra: configs: roth: enable bluedroid_pm
Nagarjuna Kristam [Wed, 5 Dec 2012 08:05:34 +0000]
ARM: tegra: configs: roth: enable bluedroid_pm

enable bluedroid_pm driver
cleanup defconfigs

Bug 1188713

Change-Id: I4c012cb035a43d09af400b60e6b357dcada74508
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/168662
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

5 years agotouch: raydium: change Dalmore to 12 MHz SPI
David Jung [Tue, 4 Dec 2012 21:29:23 +0000]
touch: raydium: change Dalmore to 12 MHz SPI

Revert frequency of Dalmore SPI bus back to
12 MHz.

Bug 1168827

Change-Id: I038e39e783cf7e48241dba556db1b1784eb3a09e
Signed-off-by: David Jung <djung@nvidia.com>
Reviewed-on: http://git-master/r/168437
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoARM: tegra11: clock: Update EMC clock change procedure
Alex Frid [Tue, 4 Dec 2012 07:57:39 +0000]
ARM: tegra11: clock: Update EMC clock change procedure

- Removed auto-cal enable/disable steps
- Expanded EMC_CFG mask updated when clock is changed

Change-Id: I0b09855f41f308abef1d55e4802e3ea421064179
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

5 years agoARM: tegra: pluto: imx091/max77665 edp control
Charlie Huang [Mon, 3 Dec 2012 23:20:42 +0000]
ARM: tegra: pluto: imx091/max77665 edp control

add edp control on max77665 flash device and imx091 camera sensor.
the E-state tables added are not finetuned, need calibrate later.

bug 1159987
bug 1159989

Change-Id: I30e635d0b39be371779664eeb23bc4afa321acea
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/168179
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

5 years agoarm: tegra: power: Remove tegra3 thermal layer
Jinyoung Park [Wed, 21 Nov 2012 23:04:45 +0000]
arm: tegra: power: Remove tegra3 thermal layer

The tegra3 thermal layer is not used anymore after using Linux thermal
framework.

Change-Id: Ib0a7dc771ea4c13e6fe027b3a0c5460d23115f9a
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/167878
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>

5 years agoARM: tegra: Set scratch1_eco register for memory dpd
Karthik Ramakrishnan [Thu, 15 Nov 2012 00:15:02 +0000]
ARM: tegra: Set scratch1_eco register for memory dpd

Set proper memory settings for LP0 state.
Bug 1175084
Bug 1156167

Change-Id: I958af3f0dcd4805e195f6286894a011a3ed85537
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/164230
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

5 years agoarm: tegra: roth: Correct pclk values
Rakesh Iyer [Wed, 5 Dec 2012 23:06:37 +0000]
arm: tegra: roth: Correct pclk values

Upper layers depend on correct values of mode's pixel clock.

Bug 1183265.

Change-Id: Ide13e368ea9b1493626aff0d843377c4ab8fcd4a
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/168858
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoarm: tegra: dalmore: Correct pclk values
Rakesh Iyer [Wed, 5 Dec 2012 22:59:27 +0000]
arm: tegra: dalmore: Correct pclk values

Upper layers depend on correct values of mode's pixel clock.

Bug 1183265.

Change-Id: I30890fe36dd1fc580ded0e92c2a76db889c4f7f7
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/168857
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra11x: Eliminate redundant cache flush
Bo Yan [Wed, 28 Nov 2012 21:44:29 +0000]
ARM: tegra11x: Eliminate redundant cache flush

Tegra specific code flushes L1 cache when entering suspend, there
is no need to do the same thing in __cpu_suspend_save.

The L1 cache flush has to be done in Tegra specific code because:

1. we have to clear SCTLR.C bit before flushing cache and we can
   not write anything to external memory between clearing SCTLR.C
   and flushing cache.
2. we want to reduce entry latency by disabling cache at very late
   stage of suspend entry sequence.

Change-Id: I56ef4713bcd638ce6af88f0367c462f216b1bbf4
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/167060
Reviewed-by: Automatic_Commit_Validation_User

5 years agoARM: tegra11: clock: Update clock rate limits
Alex Frid [Wed, 5 Dec 2012 06:26:32 +0000]
ARM: tegra11: clock: Update clock rate limits

- Set minimum 24 MHz rate for system and AHB clocks (SCLK and HCLK),
keep APB clock (PCLK) minimum rate at 12 MHz, to maintain HCLK:PCLK
2:1 ratio (Bug 1057646)

- Set maximum 12MHz rate for TSENSOR and OWR clocks base on results
of characterization

Change-Id: Id45cfe5f218603c44fb2e609cfd78df78193df79
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168643
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: Tegra: Roth: location for NCT72/1008 sensors
Anshul Jain [Thu, 22 Nov 2012 07:37:10 +0000]
ARM: Tegra: Roth: location for NCT72/1008 sensors

Roth has multiple NCT sensors, left, right and on tegra. This
change specifies different platform data based on the location
of the NCT device.

Change-Id: I7067e6bb13d64d498d31534316e3e944f299794e
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/167620
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agodrivers: nct: tsensor: use location in nct drivers
Matt Wagner [Thu, 6 Dec 2012 05:14:15 +0000]
drivers: nct: tsensor: use location in nct drivers

Some boards have multiple nct sensors. This changes enables
platform data to specify location of the sensor by giving them
unique name.

Change-Id: I421dc4c5b147257f14f5da9fca200ad0491d080d
Signed-off-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-on: http://git-master/r/168225
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoARM: tegra11: dvfs: Update pll output tables
Alex Frid [Wed, 5 Dec 2012 00:47:38 +0000]
ARM: tegra11: dvfs: Update pll output tables

- Updated dvfs tables for PLLC/C2/C3, PLLM and PLLP outputs to take
into account limitation of all tegra "big blocks" dividers to integer
settings only.

- Removed PLLD/D2 and PLL_REFE tables - these PLLs can run at maximum
frequency in the entire voltage range their downstream clients (DSI,
CSI, and XUSB) can operate in.

Change-Id: Ie0e837ea76e53dc41ea8d62c5b49eeb8d0b8499e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168560
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

5 years agoarm: tegra: soctherm: high precision fuse handling computation
Diwakar Tundlam [Wed, 5 Dec 2012 00:26:43 +0000]
arm: tegra: soctherm: high precision fuse handling computation

bug 1169070

Change-Id: I59bf1aa6f4bcefda0914cd133d113afb4c54b56c
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/168486
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>

5 years agomisc: nct: add regulator enable/disable functionality
Sri Krishna chowdary [Wed, 5 Dec 2012 09:46:15 +0000]
misc: nct: add regulator enable/disable functionality

Bug 1189700

Change-Id: Idc2ad394a8b4bead90de757b5016c0d49fe54f26
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/168690
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit

5 years agoarm: tegra: pluto: Correct pclk values
Rakesh Iyer [Wed, 5 Dec 2012 22:38:26 +0000]
arm: tegra: pluto: Correct pclk values

Upper layers depend on correct values of mode's pixel clock.

Bug 1183265.

Change-Id: Ieae424a163bda5114c5f9519b017d037551ef69f
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/168856
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Michael I Gold <gold@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

5 years agoARM: tegra: thermal: Update Tegra11 thermal parameters
Diwakar Tundlam [Thu, 6 Dec 2012 01:26:29 +0000]
ARM: tegra: thermal: Update Tegra11 thermal parameters

Updated hotspot-offset for nct1008 device on Tegra11 platforms
Updated thermal throttle point and shutdown point appropriately

Bug 1058013

Change-Id: I16464dd3a832c69efb6dba8dc2335022965f7557
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/168894
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>