6 years agovideo: tegra: dc: fix shift clk divider
Animesh Kishore [Fri, 19 Oct 2012 14:47:05 +0000]
video: tegra: dc: fix shift clk divider

Real shift clk divider may be fraction.
Add support for the same.

Bug 1012298

Change-Id: I4f9dd7d5b3b9d3b3aa49345491e04f2c5b805a72
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/147510
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R5edb25fe80bcf30378295da49ce523269b1b159c

6 years agopluto: calibrated backlight and PRISM for LG 5"
Mitch Luban [Fri, 21 Sep 2012 08:15:04 +0000]
pluto: calibrated backlight and PRISM for LG 5"

PRISM is enabled and includes backlight adjustments
for LG 5" panel to ensure a linear backlight ramp up.

Bug 1047558
Bug 1027942

Reviewed-on: http://git-master/r/142749
(cherry picked from commit 4064265fc7569fdc4b71e0847070e982bc78d5c4)

Change-Id: I5552635b93dc60810a6c4e9d07d55dfa8384984f
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/147349
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: remove dummy devices for display & dsi
Mayuresh Kulkarni [Wed, 17 Oct 2012 08:39:55 +0000]
video: tegra: host: remove dummy devices for display & dsi

- the real display and dsi devices are owned by tegra-dc
- tegra-dc always access host1x via its parent
- hence there is no need to have dummy devices for display
& dsi in host1x code
- this commit removes these redundant dummy devices

Change-Id: Ie940679b1d4a69c3329928d080e099fbf272af28
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/145184
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: Rb407e429a452f90e5ae56628200a972d6b2a3300

6 years agodrivers: video: tegra: dc: Expose HBR capability
Rahul Mittal [Mon, 29 Oct 2012 12:50:47 +0000]
drivers: video: tegra: dc: Expose HBR capability

Enable HBR bit in HDMI_NV_PDISP_SOR_AUDIO_SPARE0_0 register
This exposes HBR pin capability in HD-Audio codec

Bug 966764

Change-Id: I5253daf9e2864b728bf8aab1a71a2f0e4230debd
Signed-off-by: Rahul Mittal <rmittal@nvidia.com>
Reviewed-on: http://git-master/r/159550
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R1e3bffa4d0836b1f8b064e1ab85b90a5a9aee9df

6 years agovideo: tegra: dc: power optimize DC and host1x clk
Jon Mayo [Tue, 17 Jul 2012 22:56:44 +0000]
video: tegra: dc: power optimize DC and host1x clk

Use threaded IRQ to support enabling clocks in interrupt handling.
Use io_start and io_end to hold and release host1x clock.
Disable IRQ after it is first requested to balance enable/disable.
Use disable_irq_nosync() anywhere dc->lock is held to avoid deadlock.

Change tegra_dc_update_windows() to always be balanced with
tegra_dc_sync_windows(). Sync points (from host1x) are potentially lost if
clock gated after update, generally this only affects applications that
update at a slow frame rate.

To balance update and sync calls, Colormap/LUT code now performs a
sync_windows on a LUT change, this makes LUT changes slower and take effect
immediately.

Add a nosync version of tegra_dc_dsi_write_data to be used within dsi
module.

Bug 1036025
Bug 1031933
Bug 1030415
Bug 1029041
Bug 1028716
Bug 1025621
Bug 1020592
Bug 1013506
Bug 1002768
Bug 955184
Bug 929609
Bug 899059
Bug 887342

Change-Id: Idc9b4c2922ad3d476d57fdf760acae76f0c837e2
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/146107
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>

Rebase-Id: Rf3a400e426699cbd7bf2065691efe14d43c8a695

6 years agovideo: tegra: host: optimize nvhost pin operations
Kirill Artamonov [Mon, 22 Oct 2012 16:05:46 +0000]
video: tegra: host: optimize nvhost pin operations

Pin both relocs and gathers in single pin_job_mem() call.
Use nvmap_pin_array() to avoid extra pin operation and
per-handle locking overhead.

Remove used relocs from the nvhost_job to avoid extra loop
iterations inside do_relocs.

Use fast nvmap functions _nvmap_duplicate_handle_id()
_nvmap_free().

bug 1158533

Change-Id: I856006decee4a309369e90f3c3d6721886e6ee64
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/142556
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R78f60636e865e5bd8f95f737d9ac2b5a6098fd40

6 years agovideo: tegra: dc: Fix computation of h offset
Michael Frydrych [Tue, 23 Oct 2012 07:33:18 +0000]
video: tegra: dc: Fix computation of h offset

Change-Id: I5eeae496dc167202fc9e6133e88c39ecd5734bd0
Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-on: http://git-master/r/146920
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R44bfd94883d2e579d3a37d4c17c427886f3c990d

6 years agobacklight: max8831: add regulator control in PM
Xin Xie [Sun, 30 Sep 2012 21:18:14 +0000]
backlight: max8831: add regulator control in PM

MAX8831 might share regulator with other device. We need make sure it is
powered during the brightness update.

Change-Id: Iec1dc902a3659ab979bb2c438c2b85b56a809cd6
Signed-off-by: Xin Xie <xxie@nvidia.com>
Reviewed-on: http://git-master/r/140020
(cherry picked from commit 6829d1075851448ab24666d24e1c697453a03471)
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/159129
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: Ra4714ce445c9caf4257869f82655e05a8d7085dc

6 years agovideo: tegra: nvmap: implement fast api functions
Kirill Artamonov [Thu, 25 Oct 2012 09:36:11 +0000]
video: tegra: nvmap: implement fast api functions

Implement optimized nvmap_pin_array() for fast pinning
of array of nvmap_handles.

Implement fast nvmap functions which skip slow validation
step if it is possible:

_nvmap_duplicate_handle_id()
_nvmap_free()
_nvmap_pin()

bug 1158533

Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Change-Id: I4639973bf9cf507ed68a03087ec6a91449f8453e
Reviewed-on: http://git-master/r/147505
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: R9fffa9aa17e427e3a9dd70c9b40ddbb63da7e5ff

6 years agovideo: tegra: dc: support for vblank sync
Rakesh Iyer [Wed, 22 Aug 2012 01:25:17 +0000]
video: tegra: dc: support for vblank sync

Add wait for vsync support for one-shot panels. The code supports extension
of this feature to other panels.

Bug 1033411.

Change-Id: Ie4d6cb45e5de81083458169ccdfa33230235ed72
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/140769
Reviewed-on: http://git-master/r/140766
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/147614
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Rf4e58f6f43b93ff3a6e4b3bdc70101e336b38403

6 years agovideo: tegra: dsi: set dsib clock source to pll_d
Rakesh Iyer [Wed, 26 Sep 2012 18:35:45 +0000]
video: tegra: dsi: set dsib clock source to pll_d

Program dsib clock source to pll_d. Add mechanism for panels to be reset
during command sequences.

Change-Id: Ia426d7ae0f5f849911f1da705f9634988d874cae
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/139116
(cherry picked from commit 7e95c6c88e89865de973b5a6bd2b25e5a69d27b6)
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/147610
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R9b3f608a70757657cb69f47b337ab73e463157c0

6 years agodc: mach-tegra: pass sd settings bl_device_name
Mitch Luban [Sat, 13 Oct 2012 00:09:49 +0000]
dc: mach-tegra: pass sd settings bl_device_name

We can't always pass the backlight device directly to
nvsd. This change gives the backlight device name
to nvsd (which is known at build time) and then at
runtime can lookup the backlight device.

Bug 1047558

Reviewed-on: http://git-master/r/144241
(cherry picked from commit f9b84c91ebc1d172a3ee9de0e578b0943d2cb13c)

Change-Id: I5c65317336e8f0497d90880e649e2e8cca0a222d
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/147278
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: backlight: Add backlight_device lookup by name
Chaitanya Bandi [Fri, 12 Oct 2012 11:10:42 +0000]
video: backlight: Add backlight_device lookup by name

Added funtionality for backlight_device lookup by name

Bug 1157528

Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/144069
(cherry picked from commit c6243a5f3dab27077240a1a67f15d2cf5080fa02)

Change-Id: I1a778946b4040690ec267b5e36738236a27702da
Signed-off-by: Mitch Luban <mluban@nvidia.com>
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/147093
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R54064b79949bd1977ec1069763ffa25ca970a184

6 years agovideo: tegra: dc: moving to clk prepare APIs
Sivaram Nair [Tue, 23 Oct 2012 07:25:58 +0000]
video: tegra: dc: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I1543181ccb7b1bfc458a6db899d7e6ae83147723
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146794
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R6950d3648236a2f93d1957d18f370d63bd110392

6 years agovideo: tegra: mipi_cal: Fix stub function definition
Animesh Kishore [Thu, 25 Oct 2012 06:03:26 +0000]
video: tegra: mipi_cal: Fix stub function definition

Change-Id: I8bdcc77541f3aa2f89813bf34f5c96b3455e3da8
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/147520
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R95f2e68c4c9cf13ccd208157cb7808b0087c949f

6 years agovideo: tegra: dc: Fix bootloader to kernel display transition
Animesh Kishore [Fri, 28 Sep 2012 04:38:10 +0000]
video: tegra: dc: Fix bootloader to kernel display transition

Bug 1053029

Change-Id: Ic4d0d2f6032fc6aa3a085272ba8f8dfbf860e659
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/139571
(cherry picked from commit fc5fb511a3fb08b65c026e7b31efb8b8ecbeeb73)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146675
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: Rb41ba94a4f0d3cc9203d8975d4857cb633cfd3fb

6 years agovideo: tegra: dsi: Config mipi cal block
Animesh Kishore [Tue, 23 Oct 2012 12:53:30 +0000]
video: tegra: dsi: Config mipi cal block

Bug 1054040

Change-Id: Ib981d1eb6073d531d9a4b8d4bb0016e5bb3911f5
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
(cherry picked from commit 76c07f43c7b4d7dd3f7da4e656146c08e65fbf6b)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146946
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: Rbe3542af1e42f6ddc5e37cd1492b7928dd8442bb

6 years agovideo: tegra: dsi: Fix EOT packet length
Animesh Kishore [Fri, 12 Oct 2012 01:43:17 +0000]
video: tegra: dsi: Fix EOT packet length

Bug 1156912

Change-Id: I1e368aa49cba911c8a7ada0c7e861bd9301891b0
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/143955
(cherry picked from commit dd5d7c774850b634f5e6f6e851d7e277e04e8368)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146700
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Ra1a47a46323812e51163d4f0005215d73ba3fda2

6 years agovideo: tegra: mipi_cal: Implement driver for mipi calibration
Animesh Kishore [Tue, 9 Oct 2012 04:44:37 +0000]
video: tegra: mipi_cal: Implement driver for mipi calibration

All mipi calibration has been moved to this block
from t11x onwards.

Bug 1054040

Change-Id: I6918fb229215208d63d4200073aeb42a2f2f37d3
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/142564
(cherry picked from commit 5cd4821c5bd138811a848518e129ce239c4fc1cd)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146696
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R949471424a3e9a285b527004e9dcf95ee6d226c9

6 years agovideo: tegra: dsi: Fix fifo overflow/underflow
Animesh Kishore [Fri, 5 Oct 2012 23:38:15 +0000]
video: tegra: dsi: Fix fifo overflow/underflow

Fixing video fifo overflow/underflow while entering
and exiting lp0.

Bug 1059255

Change-Id: Id51694c74b6897b99ebf6c2c108205ca101669b8
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/142118
(cherry picked from commit 86a01bf03ca6bcc77d7ada518f027fd569084013)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146689
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Ra9082ea06a92e213b24ec5470e7e0c75db904a40

6 years agovideo: tegra: max8831: Fix android to kernel brightness map
Animesh Kishore [Thu, 4 Oct 2012 21:56:15 +0000]
video: tegra: max8831: Fix android to kernel brightness map

Map 0-255 android brightness to 0-127 max8831 range.

Bug 1053872

Change-Id: I5e491182d7bfe181099118eb463f8c04a22f9ca8
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/141726
(cherry picked from commit c90452a5ec3798369669658d202d8ac892d712c9)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146684
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R2e1eaf071ba30231879c12564f62f3ec5a56b1c1

6 years agovideo: tegra: dsi: Add support for custom packet sequence
Animesh Kishore [Wed, 26 Sep 2012 21:42:54 +0000]
video: tegra: dsi: Add support for custom packet sequence

Some panels need non standard packet sequence.
Add support to provide the info as platform data.

Bug 1053940

Change-Id: I86ea1728a54731765ac9039e4ae19a1dec3d6e98
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/139077
(cherry picked from commit 5dc9d6ee4417c797eceee012e78ab2152bb54d33)
Signed-off-by: Gaurav Batra <gbatra@nvidia.com>
Reviewed-on: http://git-master/r/146669
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R469930edad8d7e2675580711159220efcc8e7162

6 years agovideo: tegra: dc: add the interface to CMU settings.
Kevin Huang [Tue, 25 Sep 2012 18:50:05 +0000]
video: tegra: dc: add the interface to CMU settings.

Change the code so CMU can be set through board file.
Add an interface to turn CMU on/off.

Bug 1047348

Change-Id: I48561dcbb7cfff2fd0bdb7652af5fbcab4c4b8ca
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/133771
(cherry picked from commit 641491fac06fb43db71af570c97424dddf1baf31)
Reviewed-on: http://git-master/r/131920
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R5b78e7aad905b47a0a20a0d06322b86e905f3c9f

6 years agovideo: tegra: host: Map cmdbuf using nvmap_kmap
Terje Bergstrom [Wed, 17 Oct 2012 08:53:47 +0000]
video: tegra: host: Map cmdbuf using nvmap_kmap

Use nvmap_kmap() instead of nvmap_mmap() to map individual pages from cmdbuf.

Bug 1158533

Change-Id: I76320d1373b0177debec76fe171f0b0c02fe35cd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/145504
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rc6877921212b2c6e1b09e86d22e0c4408b4177e1

6 years agovideo: tegra: nvmap: Add support for nvmap_kmap
Krishna Reddy [Wed, 17 Oct 2012 08:52:49 +0000]
video: tegra: nvmap: Add support for nvmap_kmap

Add support for mapping a single page from a buffer to kernel address
space.

Bug 1158533

Change-Id: Ie331e787663d98b644aa2e7f220020982f15fd9d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/145503
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rf84a07f48f031395985491249bcfc5d0ad1338e3

6 years agovideo: tegra: nvsd: Adjust PRISM by software.
Kevin Huang [Thu, 18 Oct 2012 18:32:13 +0000]
video: tegra: nvsd: Adjust PRISM by software.

Add software calculation on PRISM result based on higtogram to
get around of hardware flaws.

Bug 1156027

Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Change-Id: I29b7e773fd4818edd1b719f1003ec58c35a7fa01
Reviewed-on: http://git-master/r/146163
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R59e3bf05de3369f0d7604da8cf0ba29d78698f8d

6 years agovideo: tegra: host: moving to clk prepare APIs
Sivaram Nair [Tue, 23 Oct 2012 07:28:46 +0000]
video: tegra: host: moving to clk prepare APIs

The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.

This is needed for the migration to common clk framework.

Bug 920915

Change-Id: I786f742260c420746ed7770818c1944f965c61e3
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/146795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R6608921d15a4a6e0aeea35678683207b6cb3d641

6 years agovideo: tegra: dc: vfilter memclient only for 2x/3x
Jon Mayo [Thu, 27 Sep 2012 23:09:40 +0000]
video: tegra: dc: vfilter memclient only for 2x/3x

Make bandwidth and latency calculations for vfilter a Tegra 2x/3x only feature.

Bug 1055607

Change-Id: I182ce8fb3a0830532f7c8e9132d2d11119cfd009
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/139489
(cherry picked from commit ec4ad6ae4cd03dfb074ec30bc986bf2f59cb813d)
Reviewed-on: http://git-master/r/146976
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R423b02d14067b02c7a23034ea6c62e1143b6ad22

6 years agotegra: When using Tegra V4L2, don't use vi client
Andrew Chew [Tue, 16 Oct 2012 21:41:30 +0000]
tegra: When using Tegra V4L2, don't use vi client

The VI client within drivers/video/tegra is mutually exclusive with the
Tegra V4L2 framework, since they both want to own the camera hardware.

Signed-off-by: Andrew Chew <achew@nvidia.com>
Change-Id: I14da9d1da187c846919d23f62d17cabedc7e91ad
Reviewed-on: http://git-master/r/145344
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: R443d0a2bcede439295e39bc1bceae9d74982dbef

6 years agotegra: Add function to release resources
Andrew Chew [Wed, 1 Aug 2012 23:52:42 +0000]
tegra: Add function to release resources

Add a companion function to nvhost_client_device_get_resources() called
nvhost_client_device_put_resources() that does the opposite thing.  This
is useful for any nvhost clients that need to be loaded as modules, since
the driver removal path will be exercised in that case.

Signed-off-by: Andrew Chew <achew@nvidia.com>
Change-Id: I72ffc1e8d3eb7bc0d86896e80f121d2a432abbad
Reviewed-on: http://git-master/r/145343
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

Rebase-Id: Rb1f9c754c85da8bb0c1171e80f597b26f40c426a

6 years agovideo: tegra: dc: fix swap of window output dimensions
Michael Frydrych [Wed, 26 Sep 2012 09:13:16 +0000]
video: tegra: dc: fix swap of window output dimensions

Window position is expected in output/device coordinate
system. Window dimensions, however, were intepreted as being
in source coordinate system, which made intepretation of window
dimensions dependent on TEGRA_WIN_FLAG_SCAN_COLUMN
flag. The flag is bond to reading the source and should not
affect window content positioning on screen.

Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-on: http://git-master/r/138927
(cherry picked from commit 51b2af4e99bd5a881d5f3a6fd45315c76274925d)

Change-Id: I20d27f331cb7247bf5e2d19ac2df6896ef47ea69
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/146834
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rf3688667cfd5e8c7476755d02e41af3944f392c3

6 years agonvsd: fixes soft clipping register addresses
Mitch Luban [Mon, 1 Oct 2012 20:22:55 +0000]
nvsd: fixes soft clipping register addresses

Soft clipping settings in nvsd.c were writing to
the wrong address. This patch fixes the register
address to the correct value.

Also soft_clipping_threshold is changed to allow
for a range of [0, 255], instead of [0, 170].

Bug 1047558

Signed-off-by: Mitch Luban <mluban@nvidia.com>
Reviewed-on: http://git-master/r/140692
(cherry picked from commit acfe83d46d6f0f7c4da3703eb2630ef23ee05912)

Change-Id: I507c84fa216e0b7da67e001dcf786f0b797b6894
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/146836
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R177923d3fdb904e490cdbd060fee1e34d6afed28

6 years agovideo: tegra: host: Implement 2D power gating
Terje Bergstrom [Tue, 2 Oct 2012 07:24:11 +0000]
video: tegra: host: Implement 2D power gating

Implement power gating for 2D. 2D needs to be reset via module
teardown.

Bug 1058074

Change-Id: I5bcae96b641a733f2fee8365a00b331ade6924e2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/146749
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R61a2180ea067d386780ca01986fb45b407fa32c0

6 years agovideo: tegra: dc: Fix bootloader to kernel display transition
Animesh Kishore [Fri, 28 Sep 2012 04:38:10 +0000]
video: tegra: dc: Fix bootloader to kernel display transition

Bug 1053029

Change-Id: I7e0386f94f305842439884a0dbd549f09b61cde0
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/139571
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/145892
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R239be998351df5ea7937cf6039abdfceb747b4e1

6 years agovideo: tegra: dc: enable cp with global alpha
Prashant Malani [Thu, 11 Oct 2012 01:50:57 +0000]
video: tegra: dc: enable cp with global alpha

When global alpha is enabled, color palette also
has to be enabled, for the change to take effect.

This also enabled global alpha for 11x

Bug 672060

Change-Id: Ic2759dd7f15fa58a134ac5dfbaa968096e8a750a
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/143417
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Rebase-Id: R9542631b4d129c3464fe56a9e8d8ba69bd6339a6

6 years agovideo: tegra: host: Add SW WAR for tegra11
Wei Sun [Wed, 10 Oct 2012 23:33:04 +0000]
video: tegra: host: Add SW WAR for tegra11

Add WAR for bug 982750
Add comments for bug 976976
Add comments for bug 990395
Add Comments for bug 951938

Change-Id: Id01ddafc82b84ac488f249ebe7f024bcb80cf61a
Signed-off-by: Wei Sun <wsun@nvidia.com>
Reviewed-on: http://git-master/r/143385
(cherry picked from commit ecda3f6db53cc2238a270f0f8f46d01d4f1a7df0)
Reviewed-on: http://git-master/r/145546
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: Rfe1454b66ea276d4a04464ff7a27f88bb0f75f0d

6 years agoRevert "video: tegra: host: temp increase the syncpt check period"
Terje Bergstrom [Thu, 18 Oct 2012 08:12:20 +0000]
Revert "video: tegra: host: temp increase the syncpt check period"

This reverts commit 7a4937502cbc8dd00531a1a73b7c88fb71a86577.

Change-Id: If707c986b9e4b0d9e9dbc880496136dcf974abb0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/145545
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R0c7d79082ec9b6a381c1c632d3904fa4637d739d

6 years agovideo: tegra: host: Disable keepalive for MSENC
Terje Bergstrom [Tue, 2 Oct 2012 12:57:56 +0000]
video: tegra: host: Disable keepalive for MSENC

Disable keepalive flag for MSENC. This allows power gating and clock
gating even when channel is open.

MSENC boot is also moved to finalize_poweron to boot it again always after
power gating.

Bug 1056631

Change-Id: Icdc5cfc564e71f58adc6b7cdd0bf66b05f849c7d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/140886
(cherry picked from commit eefcc8fa8f94c38890547b98af6613181c248777)
Reviewed-on: http://git-master/r/142697
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R3344a685f92ea863eae8e89211495d73c163ec9f

6 years agovideo: tegra: host: Enable MSENC power gating
Terje Bergstrom [Fri, 28 Sep 2012 07:53:07 +0000]
video: tegra: host: Enable MSENC power gating

Enable power gating for MSENC.

Bug 1056631

Change-Id: I1544f9e55a6f2c71b2fa285da9edc78ee82f458a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139601
(cherry picked from commit 808e9b8710f2c3bfeee9f60473eed8e2422d9bf1)
Reviewed-on: http://git-master/r/142696
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R44e32beb878c126fe91b6a5462b1a75b9c498fb7

6 years agovideo: tegra: dsi: remove unsigned variable comparison with zero
Deepak Nibade [Thu, 20 Sep 2012 11:35:55 +0000]
video: tegra: dsi: remove unsigned variable comparison with zero

fix coverity issue
unsigned variable 'i' may result in infinite for loop
so change loop to 'while'

bug 1046331

Change-Id: I812845bcac3efda45101e8384ece132e1e6b8866
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134067
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R11b3393d5ed7be919e7ebd4a7f3761f8fc0275d5

6 years agovideo: tegra: dc: fix memory leak during video playback
Deepak Nibade [Fri, 21 Sep 2012 11:55:47 +0000]
video: tegra: dc: fix memory leak during video playback

-flip_worker flips the windows and in next iteration old handles are
queued up and freed
-during 1080p video playback with hdmi connected, a call from
tegra_fb_blank disables window flag
-because of disabled window flag, old handles of one of the window are
not queued for deletion in next iteration
-so using old handle as condition of deletion marking instead of window
flag

bug 1028179

Reviewed-on: http://git-master/r/134388
(cherry picked from commit be51b49e6ec894ec4a9977fed5690b55144b3d71)

Change-Id: I1cabaad4fc0d7f7812e0a12a32774484fe7c86c6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R69a19cbf615587fe254c768353e0374e55c4a44e

6 years agovideo: tegra: nvmap: Add pin, unpin trace events
Krishna Reddy [Thu, 11 Oct 2012 02:05:23 +0000]
video: tegra: nvmap: Add pin, unpin trace events

Change-Id: I62deda9d607476e3dc82428b872ad1a3e396e37e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/143421
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R31539ab505bb25d75724978b2ed728b87258ffbc

6 years agonvmap: Add trace points for nvmap.
Krishna Reddy [Mon, 4 Jun 2012 18:19:09 +0000]
nvmap: Add trace points for nvmap.

Change-Id: I86e68c57846fe14de7620edf4c241ad7d9e46df2
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/106491
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Satya Popuri <spopuri@nvidia.com>

Rebase-Id: Radfb7863259dc59508bd5153fbabb6c8d2d70254

6 years agovideo: tegra: nvmap: fix pinning unalloc'd handles
Tuomas Tynkkynen [Mon, 13 Aug 2012 14:10:42 +0000]
video: tegra: nvmap: fix pinning unalloc'd handles

nvmap_pin_ids takes a list of handles to pin from userspace.
Unfortunately, it does not check that the handles are actually
allocated, which will trigger a BUG_ON later in pin_locked().

Bug 1023954

Change-Id: Iba4c53bc0a6c47b7f4f740a93e59b613dc3b95f6
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/131888
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: Rec46cd069e6988549e83287ae6168eebfd3af861

6 years agovideo: tegra: nvmap: fix cache_maint leak
Tuomas Tynkkynen [Mon, 3 Sep 2012 09:54:34 +0000]
video: tegra: nvmap: fix cache_maint leak

Under certain error conditions, nvmap's cache_maint would do an early
return while holding an incremented refcount and an allocated pte,
causing leaks.

Bug 1042888

Change-Id: Ie6d557f5678e7475cf46c1524a43ed464502e94c
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/131887
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: R361b9839ecbd9388bf022c0682879fcb3b442efc

6 years agovideo: tegra: dc: change enable and hotplug_init arguments
Mallikarjun Kasoju [Thu, 11 Oct 2012 11:35:29 +0000]
video: tegra: dc: change enable and hotplug_init arguments

pass device as argument for enable and hotplug_init so that it
can be used in board files to get the regulator using device name.

Bug 1154495

Change-Id: Ib549e4d9f2c6eaf4fbcc24851a3866f2fd3cbf84
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/142702
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

6 years agovideo: tegra: host: add per device module-reg-read-write ioctl
Mayuresh Kulkarni [Wed, 10 Oct 2012 05:06:41 +0000]
video: tegra: host: add per device module-reg-read-write ioctl

- currently, the ioctl NVHOST_IOCTL_CTRL_MODULE_REGRDWR is
a part of nvhost-ctrl node
- however, it doesn't deal with host1x. infact it read/write
actual module registers
- for this kernel needs to maintain a list of all nvhost_devices
registered for a SoC. currently, this is encapsulated within
nvhost_bus which provides a iterator to walk these device list
- however, once we phase out nvhost_bus and adopt the platform_bus
we do not have a way to know the list of these devices
- this commit adds a new per-device ioctl for module register
read-write functionality
- all the new code should be using this new per device ioctl. the
old will be removed as soon as all the clients are ready to use
new ioctl

bug 1154790

Change-Id: I0552aec61a4506243461de82ac0cf6e4c1f3b220
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/141579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: Rd7de39e212b778f596666c7d111c825c05351840

6 years agovideo: tegra: nvmap: Introduce dma-buf exporter
Hiroshi Doyu [Tue, 4 Sep 2012 11:26:51 +0000]
video: tegra: nvmap: Introduce dma-buf exporter

Based on Terje's host nvmap exporter.

Change-Id: I9627ac9c4fc838f2e2c5c95b6972aa6185be7d6b
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Cc: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133500
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: Re0796dd92155c697d38b563fbb7a609483de2d19

6 years agovideo: tegra: dsi: Initialize mipi cal registers
Animesh Kishore [Fri, 21 Sep 2012 21:30:35 +0000]
video: tegra: dsi: Initialize mipi cal registers

Set default value of mipi cal registers to zero.

Reviewed-on: http://git-master/r/134493
(cherry picked from commit bb237898957c7a449801249fd4b8be4aceb96fc9)

Change-Id: I1ade141c851ba2ec85894234664e647b12424c2e
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143145
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R20cce1f5f0b6fb9cdc8685d953902e9119ff3d91

6 years agovideo: tegra: host: temp increase the syncpt check period
Wei Sun [Fri, 21 Sep 2012 01:11:32 +0000]
video: tegra: host: temp increase the syncpt check period

Reviewed-on: http://git-master/r/134238
(cherry picked from commit 544d9c3601aef488a8223c98b505939fedf9475a)

Change-Id: I593a43538c46e59c973d3874b160d24f2f8df237
Signed-off-by: Wei Sun <wsun@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143143
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R28181d56f1e2742c0102d1e07d84afb981e36114

6 years agoARM: tegra: dsi: Fix panel init sequence
Krishna Yarlagadda [Fri, 21 Sep 2012 10:44:02 +0000]
ARM: tegra: dsi: Fix panel init sequence

Panel spec recommends delays between each init cmd.
Providing the delay between cmds and increased delay
from sleep to display on

Reviewed-on: http://git-master/r/134360
(cherry picked from commit e314216dac4258e9d8253a3fb9fe264dbd7acdbb)

Change-Id: I0ce03ee8f0d2a10987bce3a9184e3736d5b8c462
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143138
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

6 years agovideo: tegra: dsi: Disable syncpt use
Animesh Kishore [Thu, 20 Sep 2012 21:47:28 +0000]
video: tegra: dsi: Disable syncpt use

Use polling instead of syncpt.

Bug 1051903

Reviewed-on: http://git-master/r/134176
(cherry picked from commit 3c7671a1c7a8be7bdfe60e472f0757024400d538)

Change-Id: I2ba45170c804bb20de2da474aaa07040e213741a
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143128
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R53c4e56745142fa92164f508c245ee25cecb82a8

6 years agoDSI: WAR: changes to bringup dsi and backlight
Krishna Yarlagadda [Wed, 19 Sep 2012 18:47:02 +0000]
DSI: WAR: changes to bringup dsi and backlight

backlight and dsi turned on

Reviewed-on: http://git-master/r/133854
(cherry picked from commit 12577d21e351fbc5341d4846c46fb956dccd1614)

Change-Id: I477db5ae80327dbb2aa127a48f666a8b8fe28644
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143099
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: dsi: Panasonic panel bring-up
Kevin Huang [Wed, 19 Sep 2012 00:21:21 +0000]
video: tegra: dsi: Panasonic panel bring-up

Fix dsi host and panel related issues.

Reviewed-on: http://git-master/r/133414
(cherry picked from commit f5fdc4a5b18aa74a9499dfe41ce972be09ed7abb)

Change-Id: I7c0eeaa62a19c79c475a5c20562bb98cd89ac441
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143092
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agoARM: tegra11: HDMI TMDS and PLL setup
Jon Mayo [Tue, 18 Sep 2012 04:44:52 +0000]
ARM: tegra11: HDMI TMDS and PLL setup

Use new TMDS and PLL_D2 settings for proper 1080p HDMI operation.

Reviewed-on: http://git-master/r/133418
(cherry picked from commit 80a1b76d4fff5b6a56234edf505c98fd48c7f991)

Change-Id: I912ae6463582374add95fb809fb122c675c37ed6
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143076
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

6 years agovideo: tegra: host: Use T114 power profile
Arto Merilainen [Tue, 2 Oct 2012 12:55:23 +0000]
video: tegra: host: Use T114 power profile

Change-Id: I24300a2cc4744465d21d270cd2627b6970da4295
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/140885
(cherry picked from commit 7032714aa48e7c179763c7087baca1c88f364a0a)
Reviewed-on: http://git-master/r/142304
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R7e952678a686a0512ec845df579050d2fc53493d

6 years agovideo: tegra: host: Remove irq_requested flags
Arto Merilainen [Thu, 4 Oct 2012 12:19:14 +0000]
video: tegra: host: Remove irq_requested flags

This patch removes host_general_irq_requested and irq_requested
flags from interrupt handling code.

Change-Id: Idb206bf6844e471a1189791d70c438ab68a3674e
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/141583
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Reb308ca30eac69a8f0e9aaca38b81bea8cba0510

6 years agovideo: tegra: host: Set submit timeout to 10s
Terje Bergstrom [Fri, 5 Oct 2012 12:17:23 +0000]
video: tegra: host: Set submit timeout to 10s

Set default timeout for submits to 10 seconds.

Change-Id: Ic2bf8fb0a5274f5c04e776dee0df609deb12a5a6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141956
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R4718482cfb3d86173e45729cfa846af6705ecb0f

6 years agovideo: tegra: host: Fix some coverity issues
Terje Bergstrom [Fri, 5 Oct 2012 10:28:18 +0000]
video: tegra: host: Fix some coverity issues

Fix a couple of minor coverity issues:
 * no need to deallocate job in failure path
 * no need to NULL check hwctx in 3D code

Bug 1046331

Change-Id: Ieb6fb2aec9d44d4f4c720d77672ea317ad3171cb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141953
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rf6abbed97bfc52c02c94b781deef0793f5a4a3d6

6 years agovideo: tegra: host: Fix unpowergating 3d corruption issue
Wei Sun [Mon, 1 Oct 2012 00:39:45 +0000]
video: tegra: host: Fix unpowergating 3d corruption issue

Hardware bug 999348 requires software to clear a field
in vpe_debug register. GL driver clears that field
during the context initialization time only. That requires
context switching code to save & restore that register.
So that that register has correct value after the system
comes back from powergating or LP0 mode.

Bug 999348
Bug 1051231
Bug 1057335

Change-Id: I96bb59a5eaab50bf8092e40887407fdebbb58e3b
Signed-off-by: Wei Sun <wsun@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/140034
(cherry picked from commit 1e99c08d948e6a5147ed00dc50395034b556d056)
Reviewed-on: http://git-master/r/141854
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R235b15f9923676aef6a5e2fbf2bfbbac2686dfab

6 years agovideo: tegra: host: Correct order of debug print
Terje Bergstrom [Thu, 4 Oct 2012 07:33:12 +0000]
video: tegra: host: Correct order of debug print

Correct order of parameters for debug print.

Change-Id: Iad480e55df6f9cbb1421d5b7c15d1f745aa57520
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141478
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R7ad838bc48d8562c4fc13b66ca90eba259cf1936

6 years agovideo: tegra: host: Use hw headers for methods
Terje Bergstrom [Wed, 3 Oct 2012 13:14:31 +0000]
video: tegra: host: Use hw headers for methods

Use constants from hardware headers for wait and load base methods.

Change-Id: I6cd5913da311bfcf4d30c8d67f3a50c1febb6fe9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141477
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rad5a4d910c59c9f96ec35bd1056339e20f1e063e

6 years agovideo: tegra: host: Add common header for classids
Terje Bergstrom [Wed, 3 Oct 2012 12:56:52 +0000]
video: tegra: host: Add common header for classids

Add class_ids.h, which includes the common class id definitions.

Change-Id: I76274dc260108526ab5609564713a7c871285e05
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141476
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R8c3953c862479a9169e00f3220f67571bae4ec2c

6 years agovideo: tegra: host: Use module id from hw headers
Terje Bergstrom [Wed, 3 Oct 2012 12:52:06 +0000]
video: tegra: host: Use module id from hw headers

Get module id for INDOFF/INDDATA from hardware headers.

Change-Id: I1a71c0a8e9edd4ad303cee5191c3b68a4e49a126
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141475
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R7582a13cd2a513b51dbdf20fbc3bdb661c855beb

6 years agovideo: tegra: host: Use correct clock for freqtbl
Arto Merilainen [Tue, 25 Sep 2012 06:48:18 +0000]
video: tegra: host: Use correct clock for freqtbl

The device clock is bounded to its clock domain. This change makes
podgov to use the clock domain's clock while generating freqtbl.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Change-Id: I26cfe8ee8e56d97064b37352923b9efe68208110
Reviewed-on: http://git-master/r/135016
(cherry picked from commit 88ec130b19d4cfc368d9abe9e465f6b192a0b535)
Reviewed-on: http://git-master/r/141133
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R22bf145f087b07d873f1c778d8d302eb67010231

6 years agovideo: tegra: host: Add dmabuf support
Terje Bergstrom [Sun, 23 Sep 2012 06:36:48 +0000]
video: tegra: host: Add dmabuf support

Change-Id: I316fc5b8cc748b29e4f9776e27610d7468682311
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139302
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rfe7ff7cabace52a9d9c75bcd7f5f768017367ff8

6 years agovideo: tegra: host: Pin each gather only once
Terje Bergstrom [Thu, 2 Aug 2012 04:58:44 +0000]
video: tegra: host: Pin each gather only once

Pin each gather only once. For each gather pinned, we copy the
acquired address to the rest of the gathers with the same memory
handle.

Change-Id: I47442cd5a167042b12a7fb4760a7ef0b83bdb9bd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139301
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R0e9ca1c4b262f58c79ced4109cca3f0b3ca4e9b0

6 years agovideo: tegra: host: Use sg_table for DMA addresses
Terje Bergstrom [Sun, 23 Sep 2012 07:42:35 +0000]
video: tegra: host: Use sg_table for DMA addresses

Use scatter-gather list for storing DMA addresses. This will allow
us to use DMA addresses from non-nvmap memory managers.

Change-Id: Id4a56ef5772a0d08b964336c51b06aa2b8432fe3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135086
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R40895e69d7ffb414a85a522b115b65f5f793f2a7

6 years agovideo: tegra: host: Support multiple mem types
Terje Bergstrom [Sat, 22 Sep 2012 12:37:54 +0000]
video: tegra: host: Support multiple mem types

Support multiple memory handle types.

Change-Id: Ieae49d93be88616dde2498da98c66671cb3090a3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135085
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rccf78ec7b4891885ff524e83b4f11f38e09abb24

6 years agovideo: tegra: host: Clean up mem alloc code paths
Terje Bergstrom [Sun, 23 Sep 2012 10:25:57 +0000]
video: tegra: host: Clean up mem alloc code paths

Clean up code paths for failed allocations.

Change-Id: I0086127202ef875a9552429a51800088a23b755e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135084
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Rb09dbb2a8862326607a06aa5ee93add8140fdef9

6 years agovideo: tegra: host: Actmon debugfs entries
Arto Merilainen [Mon, 17 Sep 2012 10:46:06 +0000]
video: tegra: host: Actmon debugfs entries

This patch adds actmon debugfs entries for:

 - Normalised AVG (read)
 - K-value (read/write)
 - Sample period in microseconds (read/write)
 - Raw sample period (read)

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Change-Id: I7d4affd6ef9bc1f7b7fa8c08226f4ba9f6e27efc
Reviewed-on: http://git-master/r/133237
(cherry picked from commit 197af69a7b0091e738e09a189e159abd70ff2b70)
Reviewed-on: http://git-master/r/140865
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Red0f692876045ab6a878618c4871cf2817467ce5

6 years agovideo: tegra: host: 3d profile for T114
Arto Merilainen [Wed, 26 Sep 2012 05:40:13 +0000]
video: tegra: host: 3d profile for T114

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Change-Id: I698e58c1dbfab3b1ab146ff115ccee15802c2895
Reviewed-on: http://git-master/r/133238
(cherry picked from commit 5815427fd6413d355b003ef52938188e1aeb349c)
Reviewed-on: http://git-master/r/140864
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: Raa9e9e4025ca8193462780cc16ff1c9b51882f35

6 years agovideo: tegra: host: Added actmon ops
Arto Merilainen [Tue, 11 Sep 2012 08:48:34 +0000]
video: tegra: host: Added actmon ops

This patch adds ability to:

 - Get normalised average load
 - Set and get sample time (raw and normalised values)

Bug 965517

Change-Id: I5ce3c373699db2f8d315a1e7b1f4aaf23716a2e0
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/133236
(cherry picked from commit 8ff5b1a5a5a699d7e2bb62d99a401ef6e888021b)
Reviewed-on: http://git-master/r/140863
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R70e9662077e45398ced7524be6f0d5c0f02ecb6d

6 years agodrivers: video: tegra: host: Init workqueue once
Arto Merilainen [Tue, 2 Oct 2012 05:45:45 +0000]
drivers: video: tegra: host: Init workqueue once

The workqueue was initialized every time the device woke up from
suspend. This patch fixes this issue.

Bug 1057478

Change-Id: I188511405dbcd536343e7f19f890e490a6a6a2df
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/140851
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>

Rebase-Id: R18b4885d672262115812c47058fbb61a2c57ae7c

6 years agoVideo: tegra: dc: Re-enable DC for mode change
Shashank Sharma [Fri, 28 Sep 2012 13:09:47 +0000]
Video: tegra: dc: Re-enable DC for mode change

Re-enable DC to recflect a video mode change.

Bug 1056767
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Change-Id: I70c0a29aecaf5ef05a7375b2b9e999c05ad7cd5d
Reviewed-on: http://git-master/r/139702
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Rebase-Id: Rfc033fb38847e0ee8d1e83a97a37e7106ed1898b

6 years agovideo: tegra: dsi: fix unreachable code
Deepak Nibade [Mon, 24 Sep 2012 08:44:52 +0000]
video: tegra: dsi: fix unreachable code

fix coverity issue

bug 1046331

Change-Id: I02738f564d91931b299c5edd2c3921ba9ce97d19
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134761
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R5da3506e7a7d144afd74c863e033f8679912504e

6 years agovideo: tegra: dc: handle function return value
Deepak Nibade [Fri, 21 Sep 2012 12:50:20 +0000]
video: tegra: dc: handle function return value

fix coverity issue
variable 'ret' is used to handle return value

bug 1046331

Change-Id: I20f848216b4a1adbf4dad2f004395e6791c66457
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134396
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R8dfff57c3db998214838f7632ea111468a730c0d

6 years agovideo: tegra: host: Empty name for undefined syncpts
Terje Bergstrom [Fri, 21 Sep 2012 05:36:04 +0000]
video: tegra: host: Empty name for undefined syncpts

Return empty name if syncpt name is not defined.

Bug 982965

Change-Id: Ib6d670f716b1781f3128e5703582cfcc60c35d27
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/134270
(cherry picked from commit a94a3a90b823c725ee6809133a4b6cb4c0441375)
Reviewed-on: http://git-master/r/139589
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rbd61db2271c80f5d2e5c8900dbc603e7504d06a6

6 years agotegra:dc: Init default mode on HDMI
Shashank Sharma [Mon, 24 Sep 2012 10:41:18 +0000]
tegra:dc: Init  default mode on HDMI

Set default videomode on DC before enabling HDMI.When running
framebuffer console on HDMI, a default mode must be set before
calling init, else tegra_dc_init will fail due to 0 pclk.

Bug 1046489
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Change-Id: If9360a0d037e6dd9d1f205d8092b4da2a71ce5bf
Reviewed-on: http://git-master/r/134814
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Rebase-Id: R5fae7cd666fdacac04858ef9f21ea6e0e9573c4f

6 years agodrivers: video: tegra: Use workqueues in SP ISRs
Arto Merilainen [Tue, 25 Sep 2012 07:57:49 +0000]
drivers: video: tegra: Use workqueues in SP ISRs

Bug 1041375

Change-Id: I2a0e53b325eafa61676febddb8c5b7cb0f4b7803
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/135043
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R06bf7a61d005b6e0235adec6323fb805c32d3b19

6 years agovideo: tegra: dc: use trace events
Jon Mayo [Tue, 25 Sep 2012 23:55:24 +0000]
video: tegra: dc: use trace events

Use trace events instead of trace_printk.
Removed some unnecessary traces.

Bug 990469

Change-Id: I060369b12c852b5584634641b8971e23f60fc399
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/138797
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Rf2a4526603f03aea2a7535dfcb48dc4ab2647bd0

6 years agovideo: tegra: host: Correct number of wait bases
Terje Bergstrom [Fri, 21 Sep 2012 12:38:55 +0000]
video: tegra: host: Correct number of wait bases

Use correct number of wait bases for Tegra11, and fix the loop for
showing wait bases in debug dump.

Change-Id: Ica15ce5c43271b61ca067fcbd14736f4750b317a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/134395
(cherry picked from commit 38d4a0d76439154baa6b190b25cb3b7aafa88be8)
Reviewed-on: http://git-master/r/138921
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: Re5d65f974cabf3192038b645b08e3563272b3edd

6 years agovideo: tegra: host: Write 32b on syncpt threshold
Terje Bergstrom [Wed, 26 Sep 2012 07:05:15 +0000]
video: tegra: host: Write 32b on syncpt threshold

In Tegra3, syncpt threshold register is 16-bits, and thus the
interrupt handling code was writing only the first 16 bits of the
threshold value. In Tegra11, hardware treats the value as 32-bits, so
we need to write the full 32 bits to hardware.

Bug 1053319

Change-Id: I484ee6b458144dafcf321e7f883b1b750ad3f71a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/138854
(cherry picked from commit cf0db6735bf988f9ad941c29f8e2e41c3e61cc6a)
Reviewed-on: http://git-master/r/138920
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rfb5ebed1fdacba0890f20eff48906117e61fffd9

6 years agovideo: tegra: host: Add trace events for ACM
Terje Bergstrom [Fri, 14 Sep 2012 08:23:13 +0000]
video: tegra: host: Add trace events for ACM

Add trace events to log when ACM changes the clock rate of a unit.

Bug 1046244

Change-Id: Ifcc643b41c95e06ae046414f6db201e286ecd913
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132570
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R0951b6690609a0ed6189cb40e95af23065a70136

6 years agovideo: tegra: host: 3D clock scaling uses ACM
Terje Bergstrom [Fri, 14 Sep 2012 07:38:31 +0000]
video: tegra: host: 3D clock scaling uses ACM

Use ACM for setting 3D clock. This allows aggregating requests from
user space and devfreq together.

Bug 1046244

Change-Id: Iaf1baa6ac251db63c34729275e4904a5c26f0f58
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132569
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R8af8f63aa0060a1d2bc02864ca40cbffe3b83b3a

6 years agovideo: tegra: host: Make rate requests per clock
Terje Bergstrom [Fri, 14 Sep 2012 06:47:31 +0000]
video: tegra: host: Make rate requests per clock

Change the IOCTLs for getting and setting the clock rate for a
module to allow setting each clock separately. Clock is specified
with module id.

Bug 1046244

Change-Id: I184e823d51deb1535f0b5267d98881ae264e7407
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132568
Reviewed-by: Automatic_Commit_Validation_User

Rebase-Id: R1fa711ff3ef34363029e4f797d7e20f024ede4aa

6 years agovideo: tegra: dc: remove dereference of null pointer
Deepak Nibade [Fri, 21 Sep 2012 09:01:12 +0000]
video: tegra: dc: remove dereference of null pointer

fix coverity issue
pointer 'dc' is dereferenced after null checking
so use pr_err instead of dev_err

bug 1046331

Change-Id: I51a56870d19d2bf1f44875d29d3fddd670af5159
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit

Rebase-Id: R518156a47a6d35f0438e52f7aa4a718297e7b64b

6 years agovideo: tegra: dc: Use more exact error messages.
Tuomas Kulve [Fri, 7 Sep 2012 09:55:43 +0000]
video: tegra: dc: Use more exact error messages.

Describe DC CRC related error messages more precisely to be able to
distinguish the errors from each other based on the kernel log.

Bug 1039940

Change-Id: I9853e4a508df27c87d30a8ae4e72aaa16fae6a9b
Signed-off-by: Tuomas Kulve <tkulve@nvidia.com>
Reviewed-on: http://git-master/r/130645
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: Rf8c83502d3221b22a0e245c96208c082cacfb320

6 years agovideo: tegra: dc: remove unused pointer variable
Deepak Nibade [Thu, 20 Sep 2012 08:04:13 +0000]
video: tegra: dc: remove unused pointer variable

fix Coverity issue
pointer 'win' is not used in context so remove it

bug 1046331

Change-Id: I3a6f962000591d93a017eb2065da7aff01796b35
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/134016
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Adam Cheney <acheney@nvidia.com>

Rebase-Id: R0707ec2741772ca6e474d42b0fb11662d35a5c0d

6 years agovideo: tegra: host: Clear syncpt intr on disable
Terje Bergstrom [Wed, 19 Sep 2012 06:04:09 +0000]
video: tegra: host: Clear syncpt intr on disable

Clear syncpt interrupt status when disabling it. Otherwise the
interrupt might have been left asserted.

Bug 1042566

Change-Id: Ib20b05af8782630dd711d203c0155eec7628bcd3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133807
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R3a74bc220ba9e01df5a9c949ac767d3fb56ab6d9

6 years agovideo: tegra: host: Fix copyright text on Tegra11
Terje Bergstrom [Wed, 19 Sep 2012 05:58:25 +0000]
video: tegra: host: Fix copyright text on Tegra11

Replace copyright text for Tegra11 code with appropriate one.

Change-Id: I4a0a8d2d0ddbd6c464e6c8e70ddfe03dbc68215c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133746
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rf8e6aec932f5db74b722b0aef72816532e1a93cf

6 years agovideo: tegra: host: Tegra3 3D reg read on Tegra11
Terje Bergstrom [Wed, 19 Sep 2012 05:54:05 +0000]
video: tegra: host: Tegra3 3D reg read on Tegra11

Replace Tegra11 3D register read with the same code path as in
Tegra3.

Bug 1038891

Change-Id: Iac15dd2187049246777ffc7b398d643936f7ea32
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133745
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R4d0ef5dd464594e36876dcd2c5653a524e05607b

6 years agovideo: tegra: host: fix memory leak during submit
Tuomas Tynkkynen [Mon, 17 Sep 2012 14:32:47 +0000]
video: tegra: host: fix memory leak during submit

If a channel submit is performed while an existing job is not yet
flushed, the memory used for the old job gets leaked.
Also, if pinning a job fails partially, the successful pins
would get leaked.

Bug 1038389

Change-Id: I167dd1724027e8cd7eb40a551e0a48627b7b2d2f
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/133264
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R5670b8e68ec89e8c3a665a2b2f564bcfd6410eac

6 years agovideo: tegra: host: Use 3D DW for register read
Terje Bergstrom [Sat, 15 Sep 2012 10:58:57 +0000]
video: tegra: host: Use 3D DW for register read

Use 3D direct to memory write for reading 3D registers.

Bug 1038891

Change-Id: I9dc17ea988b6946d5f8748fd22ae3589d42cdef0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132990
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: Rd9aab3f3947c5d4279cee8e359cbc0ae0c683fef

6 years agodrivers: video: tegra: host: Faster queue cleanup
Arto Merilainen [Fri, 14 Sep 2012 07:42:35 +0000]
drivers: video: tegra: host: Faster queue cleanup

If a job timeouts, remaining jobs in the queue (that came from the
same task) are handled with a small timeout (500ms).

Change-Id: I83539d4de3c38446f08c06b20899c1ba73b46c83
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/132562
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R9c6d06f30b88b5cd0508a207374de632c3ba0706

6 years agodrivers: video: tegra: Set correct clock for 3d
Arto Merilainen [Wed, 12 Sep 2012 07:38:06 +0000]
drivers: video: tegra: Set correct clock for 3d

This patch ensures that 3d clock is set to its maximum when 3d
scaling is disabled.

Change-Id: I2ddbb3c0359b28477fbd7d637b468132353d64a7
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/131717
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Rebase-Id: R82e1572ef0b2c3a00ec23e212a7c715c6c38ac4b

6 years agodrivers: video: tegra: host: Fix sysfs interface
Arto Merilainen [Mon, 17 Sep 2012 08:11:38 +0000]
drivers: video: tegra: host: Fix sysfs interface

The sysfs interface was accidentally modified at the same time
when devfreq was taken into use. This patch returns the old
sysfs interface.

Bug 965517

Change-Id: I45de75a87cd109454c118988abf36014922109ac
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/133217
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R97b9c61f7c7337b3f89c07d2c0a1d93ff1e42721

6 years agovideo: tegra: host: Set Tegra11 host1x clock
Terje Bergstrom [Fri, 14 Sep 2012 13:06:00 +0000]
video: tegra: host: Set Tegra11 host1x clock

Set Tegra11 host1x clock default to 102MHz.

Change-Id: I68d44328ed09b501c76677f3f0d1c6f01bfa6383
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/132653
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

Rebase-Id: R804ec89bc445452dd9872eb2dae0e3613daf357c

6 years agovideo: tegra: host: use constant EMC clock for MPE
Jihoon Bang [Thu, 6 Sep 2012 18:22:23 +0000]
video: tegra: host: use constant EMC clock for MPE

MPE clock is tied to MPE EMC clock. Although MPE clock
goes low due to DFS, lowering MPE EMC is not recommended
because video recording is high memory bandwidth use case.
MPE EMC is set to 400MHz initially and won't change even
if MPE is set to a new clock frequency.

For now, 400MHz is used for MPE EMC. But later it might be
tuned in a way to have relatioship with MPE clock.
For example, MPE EMC could be (MPE + 100MHz). To find
a right value, we need more experiment.

Bug 1039281

Reviewed-on: http://git-master/r/130240
(cherry picked from commit a1fcf5c38f76c1b939fed7f8c771dbbc7147b244)

Change-Id: Ia364daee5ffb3ccd5917953b471f53f065e8af55
Signed-off-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-on: http://git-master/r/132483
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R191d2d83555d476379e695f3062d02f0441283c4

6 years agovideo: tegra: host: Add Tegra11 3D per pipe context switching
Wei Sun [Thu, 30 Aug 2012 00:34:16 +0000]
video: tegra: host: Add Tegra11 3D per pipe context switching

Change-Id: If96b13d4efe238a4fba4f0a33fee1b170c6ca39f
Signed-off-by: Wei Sun <wsun@nvidia.com>
Reviewed-on: http://git-master/r/132368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

Rebase-Id: R2d483c3c8c8eef7ce16f7d91f4bc79c7de3ef789