clock: tegra21: Update EMC restoration after suspend
[linux-3.10.git] / drivers / platform / tegra / tegra21_clocks.c
2014-08-06 Alex Frid clock: tegra21: Update EMC restoration after suspend
2014-08-06 Alex Frid clock: tegra21: Update SCLK restoration order
2014-08-06 Alex Frid clock: tegra21: Limit OSC control restore scope
2014-08-06 Alex Frid clock: tegra21: Update saved/restored clock sources
2014-08-06 Alex Waterman arm: tegra: Make tegra include directory
2014-08-05 Alex Frid ARM: tegra: dvfs: Limit number of DVFS frequencies
2014-08-05 Alex Frid dvfs: tegra21: Integrate SoC DVFS tables
2014-08-05 Alex Frid clock: tegra21: Re-format clock table
2014-08-01 Alex Frid dvfs: tegra21: Check device availability
2014-08-01 Alex Frid clock: tegra21: Replace clock enable interfaces
2014-08-01 Hoang Pham clock: tegra21: Update flags for some module clocks
2014-07-31 Alex Frid clock: tegra21: Clean up pad controls
2014-07-31 Alex Frid clock: tegra21: Update PLLE operations
2014-07-31 Alex Frid clock: tegra21: Update XUSB HS clock mux control
2014-07-30 Puneet Saxena tegra: adsp: Add emc dfs driver
2014-07-30 Hoang Pham clock: tegra21: Update flags for xusb_dev_src clk
2014-07-30 Alex Frid clock: tegra21: Update GPU bus properties
2014-07-30 Alex Frid clock: tegra21: Update GPU clocks
2014-07-30 Hoang Pham clock: tegra21: Add usb2_hsic_trk clock
2014-07-28 Seshendra Gadagottu clock: tegra21: Update gm20b clock name
2014-07-28 Alex Waterman gpu: nvgpu: Update gm20b GPU name
2014-07-25 Alex Frid gpu: nvgpu: Use GPU device name in clock get operation
2014-07-25 Hoang Pham clock: tegra21: Fix pex_uphy clock
2014-07-24 Alex Frid clock: tegra21: Update PLLU switch to h/w control
2014-07-23 Alex Frid clock: tegra21: Check PLL VCO state for 2ndary dividers
2014-07-23 Alex Frid clock: tegra21: Clean up peripheral clock operations
2014-07-23 Alex Frid clock: tegra21: Add read fences to clock operations
2014-07-23 Hoang Pham clock: tegra21: Add sata_uphy clock
2014-07-23 Hoang Pham clock: tegra21: Fix flags for I2S and SPDIF_IN/OUT...
2014-07-21 Hoang Pham clock: tegra21; Update mux for hda2codec_2x clock
2014-07-21 Hoang Pham clock: tegra21: Add xusb_padctl clock
2014-07-19 Hoang Pham clock: tegra21: Update dev_id for xusb clocks
2014-07-19 Alex Frid clock: tegra21: Fix PLL fractional dividers range
2014-07-18 Alex Frid clock: tegra21: Allow BPMP to control SCLK skipper
2014-07-18 Alex Frid clock: tegra21: Update CBUS skipper operations
2014-07-18 Alex Frid clock: tegra21: Set PCLK clock boot floor
2014-07-18 Alex Frid clock: tegra21: Update PLLC4 usage policy
2014-07-18 Rahul Mittal clock: tegra21: Correct DMIC dev names
2014-07-14 Alex Frid clock: tegra21: Use virtual ADSP CPU for scaling
2014-07-14 Alex Frid clock: tegra21: Implement virtual ADSP CPU clock
2014-07-14 Alex Frid clock: tegra21: Update ADSP super clock
2014-07-14 Alex Frid clock: tegra21: Update PLLCX dynamic ramp support
2014-07-14 Alex Frid clock: tegra21: Re-populate PLLC2 and PLLC3 buses
2014-07-14 Alex Frid clock: tegra21: Remove TSEC from cbus
2014-07-12 Alex Frid clock: tegra21: Increase display clocks max limits
2014-07-12 Alex Frid clock: tegra21: Update SOR1 clocks configuration
2014-07-10 Alex Frid clock: tegra21: Update SOR0 clocks configuration
2014-07-10 Alex Frid clock: tegar21: Don't overwrite initial ratio
2014-07-10 Hoang Pham clock: tegra21: Add control gbus_round_pass_thru_enable...
2014-07-10 Alex Frid clock: tegra21: Update display clock configuration
2014-07-10 Alex Frid clock: tegra21: Update SDMMC configuration
2014-07-10 Hoang Pham clock: tegra21: Convert mselect clock to shared bus
2014-07-09 Hoang Pham clock: tegra21: Update nvdec.emc setting
2014-07-08 Alex Frid clock: tegra21: Implement PLLC4 clock policy
2014-07-01 Alex Frid clock: tegra21: Update cluster switch clock control
2014-06-26 Alex Frid clock: tegra21: Update DFLL operations
2014-06-26 Alex Frid clock: tegra21: Restore CPU LP clocks
2014-06-26 Hoang Pham clock: tegra21: Update capping shared users
2014-06-26 Hoang Pham clock: tegra21: Increase GPU bus max rate to 1.3 GHz
2014-06-25 Alex Frid clock: tegra21: Update CPU clock set rate operation
2014-06-25 Alex Frid Revert "platform: tegra: do not set t210 cpu clock...
2014-06-25 Alex Frid clock: tegra21: Restore check for boot super-state
2014-06-25 Alex Frid clock: tegra21: Remove PLLX divided-by-2 output
2014-06-25 Hoang Pham clock: tegra21: Clean up VI, DMIC, MIPI clock settings
2014-06-24 Hoang Pham clock: tegra21: clean up clk_m_init
2014-06-24 Alex Frid clock: tegra21: Separate common PLL operations
2014-06-24 Alex Frid clock: tegra21: Change PLL input divider selection
2014-06-24 Alex Frid clock: tegra21: Re-factor common PLL configuration
2014-06-23 Alex Frid clock: tegra21: Allow to change disabled divider
2014-06-23 Alex Frid clock: tegra21: Protect shared user state update
2014-06-21 Hoang Pham clock: tegra21: Increase max freq for ISP and VI
2014-06-20 Alex Frid clock: tegra21: Update Tegra21 PLLE support
2014-06-20 Alex Frid emc: tegra21: Add EMC clock source selection policy
2014-06-19 Matt Craighead clock: tegra21: fix bug in clk_m_init
2014-06-18 Hoang Pham clock: tegra21: Update max freq for some modules
2014-06-17 Alex Frid clock: tegra21: Clean-up PLL support code
2014-06-17 Alex Frid clock: tegra21: Update PLLD register access
2014-06-17 Alex Frid clock: tegra21: Add PLLMB resume
2014-06-12 Hoang Pham clock: tegra21: Update mux for some modules
2014-06-12 Hoang Pham clock: tegra21: add utmip-pad clock entry for xusb
2014-06-11 Alex Frid clock: tegra21: Add Tegra21 PLLMB support
2014-06-11 Alex Frid clock: tegra21: Re-implement Tegra21 PLLM support
2014-06-09 Alex Frid clock: tegra21: Update PLLP branches
2014-06-09 Alex Frid clock: tegra21: Re-implement Tegra21 PLLP support
2014-06-09 Alex Frid clock: tegra21: Fix SCLK mux inputs
2014-06-09 Alex Frid clock: tegra21: Update PLLU mapping and ops
2014-06-09 Hoang Pham clock: tegra21: Add uart_mipi_cal clock
2014-06-09 Hoang Pham clock: tegra21: Add API to enable/disable gpu round...
2014-06-09 Hoang Pham clock: tegra21: Add gbus round pass-thru option
2014-06-05 Alex Frid clock: tegra21: Re-implement SCLK clock control
2014-06-05 Alex Frid clock: tegra21: Clear sbus threshold
2014-06-05 Alex Frid clock: tegra21: Round up skipper output
2014-06-05 Alex Frid clock: tegra21: Update non-gated dividers initial state
2014-06-05 Hoang Pham clock: tegra21: add missing sbc clock
2014-06-05 Hoang Pham clock: tegra21: Add SDMMC clocks for DDR mode
2014-06-05 Hoang Pham clock: tegra21: Update mux for SDMMC modules
2014-06-02 Hoang Pham clock: tegra21: Put PLLE under h/w control
2014-05-31 Prashant Gaikwad clock: tegra21: make lock error print conditional
2014-05-31 Alex Frid clock: tegra21: Re-implement Tegra21 PLLU support
2014-05-31 Alex Frid clock: tegra21: Support fixed rate PLLs
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