arm: tegra: Move driver files to drivers/platform
[linux-3.10.git] / drivers / platform / tegra / tegra21_clocks.c
2014-09-29 Sumit Singh arm: tegra: Move driver files to drivers/platform
2014-09-29 Sumit Singh arm: tegra: Move clock drivers to platform/tegra
2014-09-29 Sumit Singh arm: tegra: Move dvfs files to drivers/platform/tegra
2014-09-25 Alex Frid clock: tegra21: Limit SCLK high rate source usage
2014-09-25 Alex Frid clock: tegra21: Add PTO counters table
2014-09-24 Hoang Pham clock: tegra21: Update mux for some modules
2014-09-22 Rakesh Babu Bodla Revert "clock: tegra21: Disable hardware power sequencer"
2014-09-22 Sang-Hun Lee Revert "clock: tegra21: Enable PLLE SS configuration"
2014-09-19 Hoang Pham clock: tegra21: Update vi source clocks
2014-09-19 Alex Frid clock: tegra21: Scale down EMC before suspend
2014-09-18 Alex Frid clock: tegra21: Update PLLDP settings
2014-09-17 Alex Frid clock: tegra21: Enable PLLE SS configuration
2014-09-15 Alex Frid clock: tegra21: Protect XUSB SS clock access
2014-09-15 Alex Frid clock: tegra21: Support XUSB SS clock bypass
2014-09-15 Alex Frid clock: tegra21: Add SLCG clocks
2014-09-15 Alex Frid clock: tegra21: Add SLCG clock operations
2014-09-12 Sai Gurrappadi drivers: tegra: Error check clk_prepare_enable
2014-09-10 Hoang Pham clock: tegra21: Update dpaux and dpaux1 clocks
2014-09-10 Charlie Huang drivers: platform: tegra: t21x clock: typo fix
2014-09-08 Sudhir Vyas clock: tegra21: Define VIC emc_shared
2014-09-05 Chien-Yu Chen t210: make vii2c and i2cslow required by vi
2014-08-30 Hoang Pham clock: tegra21: Add lock to protect register read
2014-08-30 Nitin Kumbhar TEMP: clock: tegra21: reset ADSP INTF first
2014-08-30 Hoang Pham clock: tegra21: Add sata_aux clock
2014-08-27 Alex Frid clock: tegra21: Use OSC as PLLE reference
2014-08-27 JC Kuo clock: tegra21: add xusb_hs_src to mux_xusb_dev
2014-08-27 Charlie Huang clock: tegra21: fix clk_out_3
2014-08-27 JC Kuo clock: tegra21: set ENABLE_DLY to 0x50 for UTMIPLL
2014-08-27 Alex Frid clock: tegra21: Check architectural timer rate in DT
2014-08-27 Rakesh Babu Bodla clock: tegra21: Disable hardware power sequencer
2014-08-27 Alex Frid clock: tegra21: Initialize udelay scale early
2014-08-27 Arto Merilainen platform: tegra: Fix ispa device name
2014-08-27 Alex Frid clock: tegra21: Update PLLA/D/X setup
2014-08-27 Alex Frid clock: tegra21: Fix PLLE reference clock selection
2014-08-18 Vineel Kumar Reddy... clock: tegra21: correct pwm clock dev name
2014-08-18 Rakesh Bodla clock: tegra21: update UTMIPLL register programming
2014-08-15 Sumit Bhattacharya clock: tegra21: Add duplicate clock for OPE
2014-08-14 Alex Frid clock: tegra21: Expand PLLM frequencies table
2014-08-13 Hoang Pham clock: tegra21: Remove audio sync clock doubler for I2S
2014-08-13 Hoang Pham clock: tegra21: Increase pll_a_out0 max limits
2014-08-12 Alex Frid clock: tegra21: Restore "pll_u" clock name
2014-08-11 Alex Frid clock: tegra21: Add support for SDMMC2/4 LJ inputs
2014-08-11 Alex Frid clock: tegra21: Apply safe rate to ISP
2014-08-11 Alex Frid clock: tegra21: Split PERIPH_NO_RESET / PERIPH_NO_ENB
2014-08-10 Alex Frid clock: tegra21: Update PLLC4 configuration
2014-08-10 Alex Frid clock: tegra21: Force safe rate on clock with no reset
2014-08-10 Alex Frid dvfs tegra21: Add DVFS tables for I/Os
2014-08-09 Junghyun Kim clock: tegra21: duplicate clock for ahub
2014-08-09 Arun Shamanna Lakshmi clock: tegra21: Update IQC clocks
2014-08-07 Hoang Pham clock: tegra21: Add duplicated clk72mhz clock
2014-08-07 Hoang Pham clock: tegra21: Fix CLK_OUT_ENB_X_RESET_MASK
2014-08-07 Sudhir Vyas platform: tegra: t210: Define Vic cbus floor
2014-08-06 Alex Frid clock: tegra21: Update EMC restoration after suspend
2014-08-06 Alex Frid clock: tegra21: Update SCLK restoration order
2014-08-06 Alex Frid clock: tegra21: Limit OSC control restore scope
2014-08-06 Alex Frid clock: tegra21: Update saved/restored clock sources
2014-08-06 Alex Waterman arm: tegra: Make tegra include directory
2014-08-05 Alex Frid ARM: tegra: dvfs: Limit number of DVFS frequencies
2014-08-05 Alex Frid dvfs: tegra21: Integrate SoC DVFS tables
2014-08-05 Alex Frid clock: tegra21: Re-format clock table
2014-08-01 Alex Frid dvfs: tegra21: Check device availability
2014-08-01 Alex Frid clock: tegra21: Replace clock enable interfaces
2014-08-01 Hoang Pham clock: tegra21: Update flags for some module clocks
2014-07-31 Alex Frid clock: tegra21: Clean up pad controls
2014-07-31 Alex Frid clock: tegra21: Update PLLE operations
2014-07-31 Alex Frid clock: tegra21: Update XUSB HS clock mux control
2014-07-30 Puneet Saxena tegra: adsp: Add emc dfs driver
2014-07-30 Hoang Pham clock: tegra21: Update flags for xusb_dev_src clk
2014-07-30 Alex Frid clock: tegra21: Update GPU bus properties
2014-07-30 Alex Frid clock: tegra21: Update GPU clocks
2014-07-30 Hoang Pham clock: tegra21: Add usb2_hsic_trk clock
2014-07-28 Seshendra Gadagottu clock: tegra21: Update gm20b clock name
2014-07-28 Alex Waterman gpu: nvgpu: Update gm20b GPU name
2014-07-25 Alex Frid gpu: nvgpu: Use GPU device name in clock get operation
2014-07-25 Hoang Pham clock: tegra21: Fix pex_uphy clock
2014-07-24 Alex Frid clock: tegra21: Update PLLU switch to h/w control
2014-07-23 Alex Frid clock: tegra21: Check PLL VCO state for 2ndary dividers
2014-07-23 Alex Frid clock: tegra21: Clean up peripheral clock operations
2014-07-23 Alex Frid clock: tegra21: Add read fences to clock operations
2014-07-23 Hoang Pham clock: tegra21: Add sata_uphy clock
2014-07-23 Hoang Pham clock: tegra21: Fix flags for I2S and SPDIF_IN/OUT...
2014-07-21 Hoang Pham clock: tegra21; Update mux for hda2codec_2x clock
2014-07-21 Hoang Pham clock: tegra21: Add xusb_padctl clock
2014-07-19 Hoang Pham clock: tegra21: Update dev_id for xusb clocks
2014-07-19 Alex Frid clock: tegra21: Fix PLL fractional dividers range
2014-07-18 Alex Frid clock: tegra21: Allow BPMP to control SCLK skipper
2014-07-18 Alex Frid clock: tegra21: Update CBUS skipper operations
2014-07-18 Alex Frid clock: tegra21: Set PCLK clock boot floor
2014-07-18 Alex Frid clock: tegra21: Update PLLC4 usage policy
2014-07-18 Rahul Mittal clock: tegra21: Correct DMIC dev names
2014-07-14 Alex Frid clock: tegra21: Use virtual ADSP CPU for scaling
2014-07-14 Alex Frid clock: tegra21: Implement virtual ADSP CPU clock
2014-07-14 Alex Frid clock: tegra21: Update ADSP super clock
2014-07-14 Alex Frid clock: tegra21: Update PLLCX dynamic ramp support
2014-07-14 Alex Frid clock: tegra21: Re-populate PLLC2 and PLLC3 buses
2014-07-14 Alex Frid clock: tegra21: Remove TSEC from cbus
2014-07-12 Alex Frid clock: tegra21: Increase display clocks max limits
2014-07-12 Alex Frid clock: tegra21: Update SOR1 clocks configuration
2014-07-10 Alex Frid clock: tegra21: Update SOR0 clocks configuration
2014-07-10 Alex Frid clock: tegar21: Don't overwrite initial ratio
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