t210: tegra-fuse: correct the fuse offsets l4t/l4t-r24.2 tegra-l4t-r24.2.3
Shardar Shariff Md [Tue, 23 Aug 2016 12:17:05 +0000 (17:17 +0530)]
Correct the fuse offsets for device_key, device_selection, reserved_sw
and arm_jtag_disable fuses

Bug 200214601

Change-Id: I52cbd48182cd8e3d9b8e76ec65cd43437c9ed05a
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1206366
(cherry picked from commit cb417897f5e103bfc4e37ecf4e030883c15d2f72)
Reviewed-on: http://git-master/r/1208300
Reviewed-on: https://git-master.nvidia.com/r/1494422
GVS: Gerrit_Virtual_Submit
Reviewed-by: Martin Chi <mchi@nvidia.com>
Tested-by: Martin Chi <mchi@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

drivers/misc/tegra-fuse/tegra210_fuse_offsets.h

index 1cd2b3c..d72538d 100644 (file)
 
 /* private_key4 */
 #define DEVKEY_START_OFFSET                    0x2A
-#define DEVKEY_START_BIT                       12
+#define DEVKEY_START_BIT                       20
 
 /* arm_debug_dis */
 #define JTAG_START_OFFSET              0x0
-#define JTAG_START_BIT                 3
+#define JTAG_START_BIT                 12
 
 /* security_mode */
 #define ODM_PROD_START_OFFSET          0x0
@@ -39,8 +39,8 @@
 #define SB_DEVCFG_START_BIT            20
 
 /* reserved_sw[2:0] */
-#define SB_DEVSEL_START_OFFSET         0x2C
-#define SB_DEVSEL_START_BIT            28
+#define SB_DEVSEL_START_OFFSET         0x2E
+#define SB_DEVSEL_START_BIT            4
 
 /* private_key0 -> private_key3 (SBK) */
 #define SBK_START_OFFSET       0x22
@@ -48,8 +48,8 @@
 
 /* reserved_sw[7:4] */
 #define SW_RESERVED_START_OFFSET       0x2E
-#define SW_RESERVED_START_BIT          4
-#define SW_RESERVED_SIZE_BITS          12
+#define SW_RESERVED_START_BIT          8
+#define SW_RESERVED_SIZE_BITS          8
 
 /* reserved_sw[3] */
 #define IGNORE_DEVSEL_START_OFFSET     0x2E